platform/kernel/u-boot.git
3 years agoarm: mach-k3: am642: Unlock all applicable control MMR registers
Dave Gerlach [Fri, 23 Apr 2021 16:27:34 +0000 (11:27 -0500)]
arm: mach-k3: am642: Unlock all applicable control MMR registers

To access various control MMR functionality the registers need to
be unlocked. Do that for all control MMR regions in the MAIN domain.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
3 years agoarm: mach-k3: am642: Add support for boot device detection
Keerthy [Fri, 23 Apr 2021 16:27:33 +0000 (11:27 -0500)]
arm: mach-k3: am642: Add support for boot device detection

AM642 allows for booting from primary or backup boot media.
Both media can be chosen individually based on switch settings.
ROM looks for a valid image in primary boot media, if not found
then looks in backup boot media. In order to pass this boot media
information to boot loader, ROM stores a value at a particular
address. Add support for reading this information and determining
the boot media correctly.

Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
3 years agoarm: mach-k3: Add basic support for AM642 SoC definition
Dave Gerlach [Fri, 23 Apr 2021 16:27:32 +0000 (11:27 -0500)]
arm: mach-k3: Add basic support for AM642 SoC definition

The AM642 SoC belongs to the K3 Multicore SoC architecture platform,
providing advanced system integration to enable applications such as
Motor Drives, PLC, Remote IO and IoT Gateways.

Some highlights of this SoC are:
* Dual Cortex-A53s in a single cluster, two clusters of dual Cortex-R5F
  MCUs, and a single Cortex-M4F.
* Two Gigabit Industrial Communication Subsystems (ICSSG).
* Integrated Ethernet switch supporting up to a total of two external
  ports.
* PCIe-GEN2x1L, USB3/USB2, 2xCAN-FD, eMMC and SD, UFS, OSPI memory
  controller, QSPI, I2C, eCAP/eQEP, ePWM, ADC, among other
  peripherals.
* Centralized System Controller for Security, Power, and Resource
  Management (DMSC).

See AM64X Technical Reference Manual (SPRUIM2, Nov 2020)
for further details: https://www.ti.com/lit/pdf/spruim2

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
3 years agoRevert "fdt: translate address if #size-cells = <0>"
Dario Binacchi [Sat, 1 May 2021 15:05:26 +0000 (17:05 +0200)]
Revert "fdt: translate address if #size-cells = <0>"

This reverts commit d64b9cdcd475eb7f07b49741ded87e24dae4a5fc.

As pointed by [1] and [2], the reverted patch made every DT 'reg'
property translatable. What the patch was trying to fix was fixed in a
different way from previously submitted patches which instead of
correcting the generic address translation function fixed the issue with
appropriate platform code.

[1] https://patchwork.ozlabs.org/project/uboot/patch/1614324949-61314-1-git-send-email-bmeng.cn@gmail.com/
[2] https://lore.kernel.org/linux-clk/20210402192054.7934-1-dariobin@libero.it/T/

Signed-off-by: Dario Binacchi <dariobin@libero.it>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
3 years agoclk: ti: am3-dpll: use custom API for memory access
Dario Binacchi [Sat, 1 May 2021 15:05:25 +0000 (17:05 +0200)]
clk: ti: am3-dpll: use custom API for memory access

Using the custom TI functions required not only replacing common memory
access functions but also rewriting the routines used to set bypass and
lock states. As for readl() and writel(), they also required the address
of the register to be accessed, a parameter that is hidden by the TI clk
module.

Signed-off-by: Dario Binacchi <dariobin@libero.it>
3 years agoclk: ti: gate: use custom API for memory access
Dario Binacchi [Sat, 1 May 2021 15:05:24 +0000 (17:05 +0200)]
clk: ti: gate: use custom API for memory access

Replaces the common memory access functions used by the driver with the
ones exported from the TI clk module.

Signed-off-by: Dario Binacchi <dariobin@libero.it>
3 years agoclk: ti: change clk_ti_latch() signature
Dario Binacchi [Sat, 1 May 2021 15:05:23 +0000 (17:05 +0200)]
clk: ti: change clk_ti_latch() signature

The clock access functions exported by the clk header use the
struct clk_ti_reg parameter to get the address of the register. This
must also apply to clk_ti_latch(). Changes to TI's clk-mux and
clk-divider drivers prevented the patch from generating compile errors.

Signed-off-by: Dario Binacchi <dariobin@libero.it>
3 years agoclk: ti: add custom API for memory access
Dario Binacchi [Sat, 1 May 2021 15:05:22 +0000 (17:05 +0200)]
clk: ti: add custom API for memory access

As pointed by [1] and [2], commit
d64b9cdcd4 ("fdt: translate address if #size-cells = <0>") is wrong:
- It makes every 'reg' DT property translatable. It changes the address
  translation so that for an I2C 'reg' address you'll get back as reg
  the I2C controller address + reg value.
- The quirk must be fixed with platform code.

The clk_ti_get_reg_addr() is the platform code able to make the correct
address translation for the AM33xx clocks registers. Its implementation
was inspired by the Linux Kernel code.

[1] https://patchwork.ozlabs.org/project/uboot/patch/1614324949-61314-1-git-send-email-bmeng.cn@gmail.com/
[2] https://lore.kernel.org/linux-clk/20210402192054.7934-1-dariobin@libero.it/T/

Signed-off-by: Dario Binacchi <dariobin@libero.it>
3 years agoPrepare v2021.07-rc2
Tom Rini [Mon, 10 May 2021 21:03:22 +0000 (17:03 -0400)]
Prepare v2021.07-rc2

Signed-off-by: Tom Rini <trini@konsulko.com>
3 years agoMerge https://source.denx.de/u-boot/custodians/u-boot-x86
Tom Rini [Mon, 10 May 2021 12:02:00 +0000 (08:02 -0400)]
Merge https://source.denx.de/u-boot/custodians/u-boot-x86

- x86: correct regwidth prompt in cbsysinfo
- virtio: convert README.virtio to reST

3 years agoMAINTAINERS: Add an entry for VirtIO
Bin Meng [Thu, 29 Apr 2021 09:40:08 +0000 (17:40 +0800)]
MAINTAINERS: Add an entry for VirtIO

This was missed when VirtIO support was initially brought to U-Boot
back in 2018. Add an entry for it and list myself as the maintainer.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
3 years agodoc: develop: Convert README.virtio to reST
Bin Meng [Thu, 29 Apr 2021 09:40:07 +0000 (17:40 +0800)]
doc: develop: Convert README.virtio to reST

This converts the existing README.virtio to reST, and puts it under
the develop/driver-model/ directory.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
3 years agox86: Correct regwidth prompt in cbsysinfo
Simon Glass [Fri, 23 Apr 2021 22:04:57 +0000 (10:04 +1200)]
x86: Correct regwidth prompt in cbsysinfo

This should be 'regwidth', not 'baud'. Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
3 years agoMerge https://source.denx.de/u-boot/custodians/u-boot-riscv
Tom Rini [Fri, 7 May 2021 12:57:32 +0000 (08:57 -0400)]
Merge https://source.denx.de/u-boot/custodians/u-boot-riscv

3 years agoMerge branch '2021-05-06-misc-updates'
Tom Rini [Thu, 6 May 2021 15:00:07 +0000 (11:00 -0400)]
Merge branch '2021-05-06-misc-updates'

- Allow for boards to update bootargs before booting the OS (helpful in
  some forms of secure boot).
- Enhance GPT write support.
- gpio-sysinfo updates
- Allow env to be appended from dtb

3 years agocmd/exception: support ebreak exception on RISC-V
Heinrich Schuchardt [Fri, 9 Apr 2021 10:48:14 +0000 (10:48 +0000)]
cmd/exception: support ebreak exception on RISC-V

The ebreak instruction should generate a breakpoint exception.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
3 years agoatcspi200: Add timeout mechanism in spi_xfer()
Dylan Jhong [Thu, 1 Apr 2021 08:48:51 +0000 (16:48 +0800)]
atcspi200: Add timeout mechanism in spi_xfer()

Adding timeout mechanism to avoid spi driver from stucking
in the while loop in __atcspi200_spi_xfer().

Signed-off-by: Dylan Jhong <dylan@andestech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Rick Chen <rick@andestech.com>
3 years agoriscv: cpu: fu740: clear feature disable CSR
Green Wan [Mon, 3 May 2021 06:23:05 +0000 (23:23 -0700)]
riscv: cpu: fu740: clear feature disable CSR

Clear feature disable CSR to turn on all features of hart. The detail
is specified at section, 'SiFive Feature Disable CSR', in user manual

https://sifive.cdn.prismic.io/sifive/aee0dd4c-d156-496e-a6c4-db0cf54bbe68_sifive_U74MC_rtl_full_20G1.03.00_manual.pdf

Signed-off-by: Green Wan <green.wan@sifive.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
3 years agoriscv: cpu: Add callback to init each core
Green Wan [Mon, 3 May 2021 06:23:04 +0000 (23:23 -0700)]
riscv: cpu: Add callback to init each core

Add a callback harts_early_init() to start.S to allow different riscv
hart perform setup code for each hart as early as possible. Since all
the harts enter the callback, they must be able to run the same
setup.

Signed-off-by: Green Wan <green.wan@sifive.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
3 years agofdt_support.c: Allow late kernel cmdline modification
Niko Mauno [Mon, 22 Feb 2021 19:18:51 +0000 (19:18 +0000)]
fdt_support.c: Allow late kernel cmdline modification

By declaring board-specific board_fdt_chosen_bootargs() the kernel
command line arguments can be adjusted before injecting to flat dt
chosen node.

Signed-off-by: Niko Mauno <niko.mauno@vaisala.com>
3 years agocmd: gpt: Add option to write GPT partitions to environment variable
Farhan Ali [Fri, 26 Feb 2021 18:17:33 +0000 (10:17 -0800)]
cmd: gpt: Add option to write GPT partitions to environment variable

This change would enhance the existing 'gpt read' command to allow
(optionally) writing of the read GPT partitions to an environment
variable in the UBOOT partitions layout format. This would allow users
to easily change the overall partition settings by editing said variable
and then using the variable in the 'gpt write' and 'gpt verify' commands.

Signed-off-by: Farhan Ali <farhan.ali@broadcom.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Cc: Corneliu Doban <cdoban@broadcom.com>
Cc: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Cc: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Simon Glass <sjg@chromium.org>
3 years agosandbox: add test of CONFIG_ENV_IMPORT_FDT
Rasmus Villemoes [Wed, 21 Apr 2021 09:06:55 +0000 (11:06 +0200)]
sandbox: add test of CONFIG_ENV_IMPORT_FDT

Check that a variable defined in /config/environment is found in the
run-time environment, and that clearing fdt_env_path from within that
node works.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
[trini: Conditionalize the test being linked in]
Signed-off-by: Tom Rini <trini@konsulko.com>
3 years agoenv: allow environment to be amended from control dtb
Rasmus Villemoes [Wed, 21 Apr 2021 09:06:54 +0000 (11:06 +0200)]
env: allow environment to be amended from control dtb

It can be useful to use the same U-Boot binary for multiple purposes,
say the normal one, one for developers that allow breaking into the
U-Boot shell, and one for use during bootstrapping which runs a
special-purpose bootcmd. Or one can have several board variants that
can share almost all boot logic, but just needs a few tweaks in the
variables used by the boot script.

To that end, allow the control dtb to contain a /config/enviroment
node (or whatever one puts in fdt_env_path variable), whose
property/value pairs are used to update the run-time environment after
it has been loaded from its persistent location.

The indirection via fdt_env_path is for maximum flexibility - for
example, should the user wish (or board logic dictate) that the values
in the DTB should no longer be applied, one simply needs to delete the
fdt_env_path variable; that can even be done automatically by
including a

  fdt_env_path = "";

property in the DTB node.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
3 years agotest: Add gpio-sysinfo test
Sean Anderson [Tue, 20 Apr 2021 14:50:58 +0000 (10:50 -0400)]
test: Add gpio-sysinfo test

This adds a test for the gpio-sysinfo driver.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
3 years agosysinfo: Add gpio-sysinfo driver
Sean Anderson [Tue, 20 Apr 2021 14:50:57 +0000 (10:50 -0400)]
sysinfo: Add gpio-sysinfo driver

This uses the newly-added dm_gpio_get_values_as_int_base3 function to
implement a sysinfo device. The revision map is stored in the device tree.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
3 years agosysinfo: Require that sysinfo_detect be called before other methods
Sean Anderson [Tue, 20 Apr 2021 14:50:56 +0000 (10:50 -0400)]
sysinfo: Require that sysinfo_detect be called before other methods

This has the uclass enforce calling detect() before other methods.  This
allows drivers to cache information in detect() and perform (cheaper)
retrieval in the other accessors. This also modifies the only instance
where this sequencing was not followed.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
3 years agosysinfo: Use global sysinfo IDs for existing sysinfo drivers
Sean Anderson [Tue, 20 Apr 2021 14:50:55 +0000 (10:50 -0400)]
sysinfo: Use global sysinfo IDs for existing sysinfo drivers

Since 07c9e683a4 ("smbios: Allow a few values to come from sysinfo")
there are common global sysinfo IDs. This patch moved existing IDs above
SYSINFO_ID_USER.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
3 years agodm: gpio: Fix gpio_get_list_count failing with livetree
Sean Anderson [Tue, 20 Apr 2021 14:50:54 +0000 (10:50 -0400)]
dm: gpio: Fix gpio_get_list_count failing with livetree

of_parse_phandle_with_args (called by dev_read_phandle_with_args) does not
support getting the length of a phandle list by using the index -1.
Instead, use dev_count_phandle_with_args which supports exactly this
use-case.

Fixes: 8558217153 ("gpio: Convert to use APIs which support live DT")

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
3 years agoMerge tag 'dm-pull-29apr21' of https://source.denx.de/u-boot/custodians/u-boot-dm
Tom Rini [Fri, 30 Apr 2021 01:03:38 +0000 (21:03 -0400)]
Merge tag 'dm-pull-29apr21' of https://source.denx.de/u-boot/custodians/u-boot-dm

buildman environment fix
binman FMAP improvements
minor test improvements and fixes
minor dm improvements

3 years agoMerge tag 'xilinx-for-v2021.07-rc2' of https://source.denx.de/u-boot/custodians/u...
Tom Rini [Thu, 29 Apr 2021 15:31:06 +0000 (11:31 -0400)]
Merge tag 'xilinx-for-v2021.07-rc2' of https://source.denx.de/u-boot/custodians/u-boot-microblaze

Xilinx changes for v2021.07-rc2

xilinx:
- Enable saving variables based on bootmode
- Cleanup usb dfu setup and wire it up with usb bootmode
- Fix bootscript address logic
- Remove GD references (spi, Versal)
- Enable capsule update

clk:
- Small Kconfig fix

net:
- Fix gmii2rgmii bridge binding

usb:
- Propagate error (dfu gadget)

3 years agospi: zynqmp: Remove gd reference
Michal Simek [Mon, 26 Apr 2021 06:26:33 +0000 (08:26 +0200)]
spi: zynqmp: Remove gd reference

gd is not used in this file that's why doesn't make sense to declare it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
3 years agoMerge https://source.denx.de/u-boot/custodians/u-boot-cfi-flash
Tom Rini [Thu, 29 Apr 2021 12:22:17 +0000 (08:22 -0400)]
Merge https://source.denx.de/u-boot/custodians/u-boot-cfi-flash

- mtd: cfi: Fix PPB lock status readout (Marek)

3 years agoMerge https://source.denx.de/u-boot/custodians/u-boot-marvell
Tom Rini [Thu, 29 Apr 2021 12:21:55 +0000 (08:21 -0400)]
Merge https://source.denx.de/u-boot/custodians/u-boot-marvell

- Add base support for Marvell OcteonTX2 CN9130 CRB (mostly done
  by Kostya)
- Sync Armada 3k/7k/8k SERDES code with Marvell version (misc Marvell
  authors)
- pci-aardvark: Fix processing PIO transfers (Pali)

3 years agotpm: missing event types
Heinrich Schuchardt [Wed, 21 Apr 2021 10:24:29 +0000 (12:24 +0200)]
tpm: missing event types

Add a reference for the TPM event types and provide missing constants.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
3 years agotest: dm: add test item for ofnode_get_addr() and ofnode_get_size()
Chen Guanqiao [Mon, 12 Apr 2021 06:51:12 +0000 (14:51 +0800)]
test: dm: add test item for ofnode_get_addr() and ofnode_get_size()

Add test item for getting address and size functions

Test the following function:
- ofnode_get_addr()
- ofnode_get_size()

Signed-off-by: Chen Guanqiao <chenguanqiao@kuaishou.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
3 years agodm: core: Add size operations on device tree references
Chen Guanqiao [Mon, 12 Apr 2021 06:51:11 +0000 (14:51 +0800)]
dm: core: Add size operations on device tree references

Add functions to add size of addresses in the device tree using ofnode
references.

If the size is not set, return FDT_SIZE_T_NONE.

Signed-off-by: Chen Guanqiao <chenguanqiao@kuaishou.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
3 years agobuildman: Use bytes for the environment
Simon Glass [Sun, 11 Apr 2021 04:27:28 +0000 (16:27 +1200)]
buildman: Use bytes for the environment

At present we sometimes see problems in gitlab where the environment has
0x80 characters or sequences which are not valid UTF-8.

Avoid this by using bytes for the environment, both internal to buildman
and when writing out the 'env' file. Add a test to make sure this works
as expected.

Reported-by: Marek Vasut <marex@denx.de>
Fixes: e5fc79ea718 ("buildman: Write the environment out to an 'env' file")
Signed-off-by: Simon Glass <sjg@chromium.org>
3 years agobuildman: Handle exceptions in threads gracefully
Simon Glass [Sun, 11 Apr 2021 04:27:27 +0000 (16:27 +1200)]
buildman: Handle exceptions in threads gracefully

There have been at least a few cases where an exception has occurred in a
thread and resulted in buildman hanging: running out of disk space and
getting a unicode error.

Handle these by collecting a list of exceptions, printing them out and
reporting failure if any are found. Add a test for this.

Signed-off-by: Simon Glass <sjg@chromium.org>
3 years agobuildman: Use common code to send an result
Simon Glass [Sun, 11 Apr 2021 04:27:26 +0000 (16:27 +1200)]
buildman: Use common code to send an result

At present the code to report a build result is duplicated. Put it in a
common function to avoid this.

Signed-off-by: Simon Glass <sjg@chromium.org>
3 years agobuildman: Tidy up a few comments
Simon Glass [Sun, 11 Apr 2021 04:27:25 +0000 (16:27 +1200)]
buildman: Tidy up a few comments

Add some function comments which are missing, or missing arguments.

Signed-off-by: Simon Glass <sjg@chromium.org>
3 years agodm: core: Fix uninitialized return value from dm_scan_fdt_node
Sean Anderson [Thu, 8 Apr 2021 21:15:00 +0000 (17:15 -0400)]
dm: core: Fix uninitialized return value from dm_scan_fdt_node

If there are no nodes or if all nodes are disabled, this function would
return err without setting it first. Fix this by initializing err to
zero.

Fixes: 94f7afdf7e ("dm: core: Ignore disabled devices when binding")

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
3 years agodm: core: Add address translation in fdt_get_resource
Patrick Delaunay [Tue, 6 Apr 2021 07:38:06 +0000 (09:38 +0200)]
dm: core: Add address translation in fdt_get_resource

Today of_address_to_resource() is called only in
ofnode_read_resource() for livetree support and
fdt_get_resource() is called when livetree is not supported.

The fdt_get_resource() doesn't do the address translation
so when it is required, but the address translation is done
by ofnode_read_resource() caller, for example in
drivers/firmware/scmi/smt.c::scmi_dt_get_smt_buffer() {
...
ret = ofnode_read_resource(args.node, 0, &resource);
if (ret)
return ret;

faddr = cpu_to_fdt32(resource.start);
paddr = ofnode_translate_address(args.node, &faddr);
...

The both behavior should be aligned and the address translation
must be called in fdt_get_resource() and removed for each caller.

Fixes: a44810123f9e ("dm: core: Add dev_read_resource() to read device resources")
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
3 years agobinman: Support adding sections to FMAPs
Simon Glass [Fri, 2 Apr 2021 22:05:10 +0000 (11:05 +1300)]
binman: Support adding sections to FMAPs

When used with hierarchical images, use the Chromium OS convention of
adding a section before all the subentries it contains.

Signed-off-by: Simon Glass <sjg@chromium.org>
3 years agobinman: Tweak implementation of fmap
Simon Glass [Fri, 2 Apr 2021 22:05:09 +0000 (11:05 +1300)]
binman: Tweak implementation of fmap

Use an interator in two of the fmap tests so it is easier to add new
items. Also check the name first since that is the first indication
that something is wrong. Use a variable for the expected size of the
fmap to avoid repeating the code.

Signed-off-by: Simon Glass <sjg@chromium.org>
3 years agopatman: Parse checkpatch by message instead of by line
Evan Benn [Thu, 1 Apr 2021 02:49:30 +0000 (13:49 +1100)]
patman: Parse checkpatch by message instead of by line

Parse each empty-line-delimited message separately. This saves having to
deal with all the different line content styles, we only care about the
header ERROR | WARNING | NOTE...

Also make checkpatch print line information for a uboot specific
warning.

Signed-off-by: Evan Benn <evanbenn@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
3 years agopatman: Assume we always have pygit2 for tests
Tom Rini [Fri, 26 Feb 2021 12:52:31 +0000 (07:52 -0500)]
patman: Assume we always have pygit2 for tests

Given that we have tests that require pygit2 and it can be installed
like any other python module, fail much more loudly if it is missing.

Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
3 years agotests: patman: Add requests to the module list
Tom Rini [Fri, 26 Feb 2021 12:52:30 +0000 (07:52 -0500)]
tests: patman: Add requests to the module list

The patman tests require the requests module, add it.

Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
3 years agoAzure/GitLab: Ensure we use requirements.txt for testsuites
Tom Rini [Fri, 26 Feb 2021 12:52:29 +0000 (07:52 -0500)]
Azure/GitLab: Ensure we use requirements.txt for testsuites

Given that test/py/requirements.txt has all required test modules, make
use of that rather than a manual pip install list before running our
assorted tool testsuites.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
3 years agotest: Use positive conditional in test_matches()
Andy Shevchenko [Thu, 11 Feb 2021 14:40:11 +0000 (16:40 +0200)]
test: Use positive conditional in test_matches()

It is easier to read the positive conditional.

While at it, convert hard coded length of "_test_" to strlen("_test_")
which will be converted to a constant bu optimizing compiler.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
3 years agotest: Allow simple glob pattern in the test name
Andy Shevchenko [Thu, 11 Feb 2021 14:40:10 +0000 (16:40 +0200)]
test: Allow simple glob pattern in the test name

When run `ut dm [test name]` allow to use simple pattern to run all tests
started with given prefix. For example, to run all ACPI test cases:
ut dm acpi*

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
3 years agodtoc: Correct dtoc output when testing
Simon Glass [Mon, 26 Apr 2021 20:19:48 +0000 (08:19 +1200)]
dtoc: Correct dtoc output when testing

At present each invocation of run_steps() updates OUTPUT_FILES_COMMON,
since it does not make a copy of the dict. This is fine for a single
invocation, but for tests, run_steps() is invoked many times.

As a result it may include unwanted items from the previous run, if it
happens that a test runs twice on the same CPU. The problem has not been
noticied previously, as there are few enough tests and enough CPUs that
is is rare for the 'wrong' combination of tests to run together.

Fix this by making a copy of the dict, before updating it. Update the
tests to suit, taking account of the files that are no-longer generated.

With this fix, we no-longer generate files which are not needed for a
particular state of OF_PLATDATA_INST, so the check_instantiate() function
is not needed anymore. It has become dead code and so fails the
code-coverage test (dtoc -T). Remove it.

Signed-off-by: Simon Glass <sjg@chromium.org>
3 years agobinman: Correct testSplNoDtb() and Tpl also
Simon Glass [Sat, 24 Apr 2021 20:39:32 +0000 (08:39 +1200)]
binman: Correct testSplNoDtb() and Tpl also

These two tests require an ELF image so that symbol information can be
written into the SPL/TPL binary. At present they rely on other tests
having set it up first, but every test must run independently. This can
cause occasional errors in CI.

Fix this by setting up the required files, as other tests do.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
3 years agonet: phy: xilinx: Break while loop over ethernet phy
Michal Simek [Mon, 26 Apr 2021 12:26:48 +0000 (14:26 +0200)]
net: phy: xilinx: Break while loop over ethernet phy

The commit 6c993815bbea ("net: phy: xilinx: Be compatible with live OF
tree") change driver behavior to while loop which wasn't correct because
the driver was looping over again and again. The reason was that
ofnode_valid() is taking 0 as correct value.
Fix it by changing while loop to ofnode_for_each_subnode() which is only
loop over available nodes.

Fixes: 6c993815bbea ("net: phy: xilinx: Be compatible with live OF tree")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
3 years agoarm: a37xx: pci: Fix processing PIO transfers
Pali Rohár [Thu, 22 Apr 2021 14:23:04 +0000 (16:23 +0200)]
arm: a37xx: pci: Fix processing PIO transfers

Trying to clear PIO_START register when it is non-zero (which indicates
that previous PIO transfer has not finished yet) causes an External
Abort with SError 0xbf000002.

This bug is currently worked around in TF-A by handling External Aborts
in EL3 and ignoring this particular SError.

This workaround was also discussed at:
https://git.trustedfirmware.org/TF-A/trusted-firmware-a.git/commit/?id=3c7dcdac5c50
https://lore.kernel.org/linux-pci/20190316161243.29517-1-repk@triplefau.lt/
https://lore.kernel.org/linux-pci/971be151d24312cc533989a64bd454b4@www.loen.fr/
https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/1541

Implement a proper fix to prevent this External Abort. As it is not
possible to cancel a pending PIO transfer, simply do not start a new one
if previous has not finished yet. In this case return an error to the
caller.

In most cases this SError happens when there is no PCIe card connected
or when PCIe link is down. The reason is that in these cases a PIO
transfer takes about 1.44 seconds. For this reason we also increase the
wait timeout in pcie_advk_wait_pio() to 1.5 seconds.

If PIO read transfer for PCI_VENDOR_ID register times out, or if it
isn't possible to read it yet because previous transfer is not finished,
return Completion Retry Status value instead of failing, to give the
caller a chance to send a new read request.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
3 years agodoc: dt-bindings: add Marvell comphy binding
Igal Liberman [Wed, 26 Apr 2017 15:05:29 +0000 (18:05 +0300)]
doc: dt-bindings: add Marvell comphy binding

Change-Id: I29094afb646744afe78ad09bb7479894d1a65e96
Signed-off-by: Igal Liberman <igall@marvell.com>
3 years agophy: marvell: utmi: update utmi config which fixes usb2.0 instability
Grzegorz Jaszczyk [Thu, 14 Mar 2019 12:00:53 +0000 (13:00 +0100)]
phy: marvell: utmi: update utmi config which fixes usb2.0 instability

- Add additional step which enables the Impedance and PLL calibration.
- Enable old squelch detector instead of the new analog squelch detector
circuit and update host disconnect threshold value.
- Update LS TX driver strength coarse and fine adjustment values.

Change-Id: Ifa0a585bfb5ecab0bfa033eed6874ff98b16a7df
Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com>
3 years agophy: marvell: add support for SFI1
Igal Liberman [Mon, 14 May 2018 08:20:54 +0000 (11:20 +0300)]
phy: marvell: add support for SFI1

In CP115, comphy4 can be configured into SFI port1
(in addition to SFI0). This patch adds the option
described above.

In addition, rename all existing SFI/XFI references:
COMPHY_TYPE_SFI --> COMPHY_TYPE_SFI0

No functional change for exsiting configuration.

Change-Id: If9176222e0080424ba67347fe4d320215b1ba0c0
Signed-off-by: Igal Liberman <igall@marvell.com>
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
3 years agophy: marvell: fix pll initialization for second utmi port
Grzegorz Jaszczyk [Wed, 27 Feb 2019 14:35:58 +0000 (15:35 +0100)]
phy: marvell: fix pll initialization for second utmi port

According to Design Reference Specification the PHY PLL and Calibration
register from PHY0 are shared for multi-port PHY. PLL control registers
inside other PHY channels are not used.

This commit reworks utmi device tree nodes in a way that common PHY PLL
registers are moved to main utmi node. Accordingly both child nodes
utmi-unit range is reduced and register offsets in utmi_phy.h are updated
to this change.

This fixes issues in scenarios when only utmi port1 was in use, which
resulted with lack of correct pll initialization.

Change-Id: Icc520dfa719f43a09493ab31f671efbe88872097
Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com>
3 years agophy: marvell: allow to initialize up to 6 USB ports
Grzegorz Jaszczyk [Fri, 1 Feb 2019 11:08:07 +0000 (12:08 +0100)]
phy: marvell: allow to initialize up to 6 USB ports

New products can contain up to 6 usb ports, therefore allow to initialize
all relevant UTMI PHYs.

Change-Id: I28c36e59fa0e3e338bb3ee0cee2240b923f39785
Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com>
Reviewed-by: Kostya Porotchkin <Kostya.Porotchkin@cavium.com>
3 years agophy: marvell: cp110: mark u-boot power-off calls
Igal Liberman [Mon, 19 Nov 2018 07:58:32 +0000 (09:58 +0200)]
phy: marvell: cp110: mark u-boot power-off calls

It helps ATF to determine who called power off
function (U-boot/Linux) and act accordingly

Change-Id: Icfc5cbfdba64754496812154272b28c0ff639f0f
Signed-off-by: Igal Liberman <igall@marvell.com>
Reviewed-by: Grzegorz Jaszczyk <jaz@semihalf.com>
3 years agophy: marvell: fix handling of unconnected comphy
Christine Gharzuzi [Wed, 23 May 2018 09:10:36 +0000 (12:10 +0300)]
phy: marvell: fix handling of unconnected comphy

- the default value of comphy pipe selector is set to PCIe (x4)
  in case of unconnected comphy the default value remains 0x4
  which may lead to several issues with comphy initialization.

- this patch adds SMC call that powers off the comphy lane in case of
  unconnected comphy.

Change-Id: I196b2916518dd8df3b159ffa85e2989b8e483087
Signed-off-by: Christine Gharzuzi <chrisg@marvell.com>
Signed-off-by: Igal Liberman <igall@marvell.com>
Reviewed-by: Grzegorz Jaszczyk <jaz@semihalf.com>
3 years agophy: marvell: pass sgmii id to firmware
Igal Liberman [Wed, 9 May 2018 15:50:29 +0000 (18:50 +0300)]
phy: marvell: pass sgmii id to firmware

Currently, we don't pass id for SGMII 0/1.
A bug in comphy selector configuration was found (in comphy
firmware), after fixing it, SGMII0/1 have different configuration,
so we need to pass the ID the firmware.

Change-Id: Idcff4029cc9cf018278e493221b64b33574e0d38
Signed-off-by: Igal Liberman <igall@marvell.com>
Reviewed-by: Grzegorz Jaszczyk <jaz@semihalf.com>
3 years agophy: marvell: cp110: clean up driver after it was moved to atf
Grzegorz Jaszczyk [Wed, 4 Apr 2018 14:42:43 +0000 (16:42 +0200)]
phy: marvell: cp110: clean up driver after it was moved to atf

Change-Id: I358792a96c13b54e700c05227cc7a8f6bd584694
Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
3 years agophy: marvell: cp110: remove both phy and pipe selector configuration
Grzegorz Jaszczyk [Wed, 4 Apr 2018 14:26:36 +0000 (16:26 +0200)]
phy: marvell: cp110: remove both phy and pipe selector configuration

Now the comphy configuration is handled in atf, therefore there is no
need to configure phy or pipe selector in u-boot, it is configured by
atf for each particular pair: lane and mode.

Change-Id: I0bebf8d5ff66dbeb6bf9ef90876195938a8eb705
Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
3 years agophy: marvell: cp110: let the firmware perform training for XFI
Grzegorz Jaszczyk [Tue, 3 Apr 2018 14:59:12 +0000 (16:59 +0200)]
phy: marvell: cp110: let the firmware perform training for XFI

Replace the XFI training with appropriate SMC call, so the firmware will
perform exact initialization.

Update Stefan 2021-03-23:
Move comphy_smc() function to an earlier place - necessary for the
mainline merge.

Change-Id: I789b130b05529dc80dadcf66aef407d93595b762
Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Igal Liberman <igall@marvell.com>
3 years agophy: marvell: cp110: let the firmware configure comphy for USB
Grzegorz Jaszczyk [Thu, 29 Mar 2018 10:30:20 +0000 (12:30 +0200)]
phy: marvell: cp110: let the firmware configure comphy for USB

Replace the comphy initialization for USB with appropriate SMC call,
so the firmware will execute required serdes configuration.

Change-Id: I7f773c0dfac70db9dd2653de2cdcfac577e78c4e
Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com>
3 years agophy: marvell: cp110: let the firmware configure comphy for RXAUI
Grzegorz Jaszczyk [Tue, 27 Mar 2018 10:52:24 +0000 (12:52 +0200)]
phy: marvell: cp110: let the firmware configure comphy for RXAUI

Replace the comphy initialization for RXAUI with appropriate SMC call,
so the firmware will execute required serdes configuration.

Change-Id: Iedae0285fb283e05bb263a8b4ce46e8e7451a309
Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
3 years agophy: marvell: cp110: remove unused definitions
Marcin Wojtas [Tue, 15 Oct 2019 10:30:39 +0000 (12:30 +0200)]
phy: marvell: cp110: remove unused definitions

Even if comphy types of SATA2/SATA3/SGMII3 and comphy speeds of
1.5G/3G/6.25G were referenced in the driver non configuration (dts)
was using it.

This patch removes unused definitions.

Change-Id: I53ed6f9d3a82b9d18cb4e488bc14d3cf687f9488
Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com>
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
3 years agophy: marvell: enable comphy info prints for all devices
Igal Liberman [Sun, 3 Dec 2017 13:13:08 +0000 (15:13 +0200)]
phy: marvell: enable comphy info prints for all devices

Change-Id: I3b97253e7102a0868440a9e0200acc1c7919c743
Signed-off-by: Igal Liberman <igall@marvell.com>
3 years agophy: marvell: add RX training command
Igal Liberman [Tue, 23 Mar 2021 10:57:57 +0000 (11:57 +0100)]
phy: marvell: add RX training command

This patch adds support for running RX training using new command called
"rx_training"
Usage:
rx_training - rx_training <cp id> <comphy id>

RX training allows to improve link quality (for SFI mode)
by running training sequence between us and the link partner,
this allows to reach better link quality then using static configuration.

Change-Id: I818fe67ccaf19a87af50d4c34a9db7d6802049a5
Signed-off-by: Igal Liberman <igall@marvell.com>
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
3 years agophy: marvell: save comphy_map_data priv structure
Igal Liberman [Mon, 21 Aug 2017 13:58:21 +0000 (16:58 +0300)]
phy: marvell: save comphy_map_data priv structure

This allows the lower level driver access to comphy map data
(required for RX training support, which is introduced
in the following patches).

Change-Id: Ib7ffdc4b32076c01c3a5d33f59552c9dfc6b12fa
Signed-off-by: Igal Liberman <igall@marvell.com>
3 years agophy: marvell: fix several minor bugs in comphy_probe
Igal Liberman [Tue, 22 Aug 2017 08:14:22 +0000 (11:14 +0300)]
phy: marvell: fix several minor bugs in comphy_probe

If fdtdec_get_int can't find speed, set COMPHY_SPEED_INVALID
If fdtdec_get_int can't find type, set COMPHY_TYPE_INVALID
Move the error print if phy-type is invalid
Add continue to the probe loop (in a case of invalid phy)
Cosmetic changes

Change-Id: I0c61b40bfe685437426fe907942ed338b7845378
Signed-off-by: Igal Liberman <igall@marvell.com>
3 years agophy: marvell: cp110: utmi: update analog parameters according to latest ETP
Igal Liberman [Sun, 30 Apr 2017 17:16:55 +0000 (20:16 +0300)]
phy: marvell: cp110: utmi: update analog parameters according to latest ETP

Add UTMI analog parameters initialization values according to
latest ETP.

Change-Id: I5bcca205a3995202a18ff126f371a81f69e205c8
Signed-off-by: Igal Liberman <igall@marvell.com>
3 years agophy: marvell: cp110: initialize only enabled UTMI units
Omri Itach [Thu, 6 Apr 2017 09:54:16 +0000 (12:54 +0300)]
phy: marvell: cp110: initialize only enabled UTMI units

UTMI should be initialized only for enabled device tree nodes.

This fix overrides current internal configuration array
entry with the next DT entry data if error is detected
during the current DT entry parsing or the current port
is disabled.

This way the internal configuration structure will only
contain valid ports information obtained from the DT.

Change-Id: I9c43c6a5d234e15ae9005d1c9bc983fc1f3544b8
Signed-off-by: Omri Itach <omrii@marvell.com>
Signed-off-by: Ken Ma <make@marvell.com>
3 years agophy: marvell: add missing speed during info prints
Igal Liberman [Wed, 26 Apr 2017 14:20:47 +0000 (17:20 +0300)]
phy: marvell: add missing speed during info prints

In get_speed_string() we have an array (speed_strings[])
which includes all possible speed strings.
This array size and content must be aligned to the speed
defines in comphy_data.h.

This patch adds missing 5.125G speed, aligns speed_strings[]
and fixes incorrect printing when speed > 5.0G.

Change-Id: I9900d23595094be321be0c62fcaa88036324568e
Signed-off-by: Igal Liberman <igall@marvell.com>
3 years agophy: marvell: rename comphy related definitions to COMPHY_XX
Igal Liberman [Wed, 26 Apr 2017 12:40:00 +0000 (15:40 +0300)]
phy: marvell: rename comphy related definitions to COMPHY_XX

Currently, all comphy definitions are PHY_TYPE_XX and PHY_SPEEED_XX.
Those definition might be confused with MDIO PHY definitions.

This patch does the following changes:
 - PHY_TYPE_XX --> COMPHY_TYPE_XX
 - PHY_SPEED_XX --> COMPHY_SPEED_XX

This improves readability, no functional change.

Change-Id: I2bd1d9289ebbc5c16fa80f9870f797ea1bcaf5fa
Signed-off-by: Igal Liberman <igall@marvell.com>
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
3 years agophy: marvell: add comphy type PHY_TYPE_USB3
jinghua [Mon, 24 Apr 2017 07:51:03 +0000 (15:51 +0800)]
phy: marvell: add comphy type PHY_TYPE_USB3

- For some Marvell SoCs, like armada-3700, there are both
  USB host and device controller, but on PHY level the
  configuration is the same.
- The new type supports both USB device and USB host
- This patch is cherry-picked from u-boot-2015 as-is.

Change-Id: I01262027edd8ec23391cff6fb409b3009aedfbb9
Signed-off-by: jinghua <jinghua@marvell.com>
Signed-off-by: Ken Ma <make@marvell.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
3 years agoarm: octeontx2: cn9130-crb.dtsi: Disable eth2 for now
Stefan Roese [Tue, 27 Apr 2021 09:05:09 +0000 (11:05 +0200)]
arm: octeontx2: cn9130-crb.dtsi: Disable eth2 for now

Because of the incorrectly supported SGMII_2500 mode, this patch
disables eth2 for now until this issue will be fixed in mainline.

Also fix an incorrect comment.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Konstantin Porotchkin <kostap@marvell.com>
Cc: Stefan Chulski <stefanc@marvell.com>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Marek Behun <marek.behun@nic.cz>
3 years agoarm: octeontx2: Add Octeon TX2 CN9130 CRB support
Konstantin Porotchkin [Tue, 16 Mar 2021 16:20:57 +0000 (17:20 +0100)]
arm: octeontx2: Add Octeon TX2 CN9130 CRB support

This patch adds the base support for the Marvell Octeon TX2 CN9130 CRB.
Not all interfaces are supported fully yet.

Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
3 years agoarm: octeontx2: Add dtsi/dts files for Octeon TX2 CN9130 CRB
Konstantin Porotchkin [Tue, 16 Mar 2021 16:20:52 +0000 (17:20 +0100)]
arm: octeontx2: Add dtsi/dts files for Octeon TX2 CN9130 CRB

This patch adds the dtsi/dts files needed to support the Marvell
Octeon TX2 CN9130 CRB. This is only the base port with not all
interfaces supported fully.

Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
3 years agoarm: armada: configs: Move environment location for mvebu
Konstantin Porotchkin [Mon, 18 Jan 2021 16:35:54 +0000 (18:35 +0200)]
arm: armada: configs: Move environment location for mvebu

Move the default environment location to the end of 4MB flash
region. This change allows to accomodate larger flash boot
images making space for forthcoming code changes.

Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
3 years agoarm: armada: dts: Add support for ap807-based platforms
Konstantin Porotchkin [Tue, 23 Feb 2021 13:11:36 +0000 (14:11 +0100)]
arm: armada: dts: Add support for ap807-based platforms

Add support for SoCs based on AP807 die.
Remove unused include file for Armada-8020 SoC.

Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
3 years agoarm: armada: dts: Use a single dtsi for cp110 die description
Konstantin Porotchkin [Sun, 17 Jan 2021 15:19:49 +0000 (17:19 +0200)]
arm: armada: dts: Use a single dtsi for cp110 die description

Use a single dtsi file for CP110 die instead of master/slave.
Moving to single file will allow miltiple DTSI inclusions with
re-defined CP index and name.
This change will also allow support for SoCs containing more than
two CP110 dies on board.
Move pin control definitions from CP110 DTS to board DTS files

Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
3 years agocmd/mvebu: fix the bubt command
Konstantin Porotchkin [Wed, 17 Mar 2021 16:53:43 +0000 (18:53 +0200)]
cmd/mvebu: fix the bubt command

- fix the dependency for MMC boot (add XENON to MVEBU_MMC)
- fix the bubt destination assignment (missing # in "else" case)

Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
3 years agopower: regulator: Add support for regulator-force-boot-off
Konstantin Porotchkin [Mon, 29 May 2017 12:59:38 +0000 (15:59 +0300)]
power: regulator: Add support for regulator-force-boot-off

Add support for regulator-force-boot-off DT property.
This property can be used by the board/device drivers for
turning off regulators on early init stages as pre-requisite
for the other components initialization.

Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
3 years agoMerge https://source.denx.de/u-boot/custodians/u-boot-usb
Tom Rini [Wed, 28 Apr 2021 22:35:54 +0000 (18:35 -0400)]
Merge https://source.denx.de/u-boot/custodians/u-boot-usb

3 years agoMerge tag 'u-boot-amlogic-20210428' of https://source.denx.de/u-boot/custodians/u...
Tom Rini [Wed, 28 Apr 2021 18:22:43 +0000 (14:22 -0400)]
Merge tag 'u-boot-amlogic-20210428' of https://source.denx.de/u-boot/custodians/u-boot-amlogic

- net: designware: fix PHY reset with DM_MDIO, fixing boot of (at least) Odroid-C4

3 years agonet: designware: fix PHY reset with DM_MDIO
Neil Armstrong [Wed, 21 Apr 2021 08:58:01 +0000 (10:58 +0200)]
net: designware: fix PHY reset with DM_MDIO

The dw_eth_pdata is not accessible from the mdio device, it gets the mdio bus plat
leading to random sleeps (-10174464 on Odroid-HC4).

This moves the dw_mdio_reset function to a common one taking the ethernet
device as parameter and use it from the dw_mdio_reset and dm_mdio variant functions.

Fixes: 5160b4567c ("net: designware: add DM_MDIO support")
Reported-by: Mark Kettenis <mark.kettenis@xs4all.nl>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
3 years agousb: ehci-mx6: Limit PHY address parsing to !CONFIG_PHY
Marek Vasut [Thu, 22 Apr 2021 19:06:40 +0000 (21:06 +0200)]
usb: ehci-mx6: Limit PHY address parsing to !CONFIG_PHY

For systems which use generic PHY support and implement USB PHY driver,
the parsing of PHY properties is unnecessary, disable it.

Signed-off-by: Marek Vasut <marex@denx.de>
Tested-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Ye Li <ye.li@nxp.com>
Cc: uboot-imx <uboot-imx@nxp.com>
3 years agomtd: cfi: Fix PPB lock status readout
Marek Vasut [Sun, 11 Apr 2021 18:47:45 +0000 (20:47 +0200)]
mtd: cfi: Fix PPB lock status readout

According to S26KL512S datasheet [1] and S29GL01GS datasheet [2],
the procedure to read out PPB lock bits is to send the PPB Entry,
PPB Read, Reset/ASO Exit. Currently, the code does send incorrect
PPB Entry, PPB Read and Reset/ASO Exit is completely missing.

The PPB Entry sent is implemented by sending flash_unlock_seq()
and flash_write_cmd(..., FLASH_CMD_READ_ID). This translates to
sequence 0x555:0xaa, 0x2aa:0x55, 0x555:0x90=FLASH_CMD_READ_ID.
However, both [1] and [2] specify the last byte of PPB Entry as
0xc0=AMD_CMD_SET_PPB_ENTRY instead of 0x90=FLASH_CMD_READ_ID,
that is  0x555:0xaa, 0x2aa:0x55, 0x555:0xc0=AMD_CMD_SET_PPB_ENTRY.
Since this does make sense, this patch fixes it and thus also
aligns the code in flash_get_size() with flash_real_protect().

The PPB Read returns 00h in case of Protected state and 01h in case
of Unprotected state, according to [1] Note 83 and [2] Note 17, so
invert the result. Moreover, align the arguments with similar code
in flash_real_protect().

Finally, Reset/ASO Exit command should be executed to exit the PPB
mode, so add the missing reset.

[1] https://www.cypress.com/file/213346/download
    Document Number: 001-99198 Rev. *M
    Table 40. Command Definitions, Nonvolatile Sector Protection
    Command Set Definitions
[2] https://www.cypress.com/file/177976/download
    Document Number: 001-98285 Rev. *R
    Table 7.1 Command Definitions, Nonvolatile Sector Protection
    Command Set Definitions

Fixes: 03deff433e ("cfi_flash: Read PPB sector protection from device for AMD/Spansion chips")
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Stefan Roese <sr@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
3 years agoconfigs: Resync with savedefconfig
Tom Rini [Tue, 27 Apr 2021 12:28:38 +0000 (08:28 -0400)]
configs: Resync with savedefconfig

Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
3 years agoreset: fix reset_get_by_index_nodev index handling
Neil Armstrong [Tue, 20 Apr 2021 08:42:26 +0000 (10:42 +0200)]
reset: fix reset_get_by_index_nodev index handling

This fixes an issue getting resets index 1 and 3+, the spurius "> 0"
made it return the index 0 or 1, whatever index was passed.

The dm_test_reset_base() did not catch it, but the dm_test_reset_base() extension
catches it and this fixes the regression.

This also fixes a reggression on Amlogic G12A/G12B SoCs, where HDMI output was disable
even when Linux was booting.

Fixes: ea9dc35aab ("reset: Get the RESET by index without device")
Reported-by: B1oHazard <ty3uk@mail.ua>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
3 years agotest: reset: Extend base reset test to catch error
Neil Armstrong [Tue, 20 Apr 2021 08:42:25 +0000 (10:42 +0200)]
test: reset: Extend base reset test to catch error

With this extended test, we get the following failure :

=> ut dm reset_base
Test: dm_test_reset_base: reset.c
test/dm/reset.c:52, dm_test_reset_base(): reset_method3.id == reset_method3_1.id: Expected 0x14 (20), got 0x2 (2)
Test: dm_test_reset_base: reset.c (flat tree)
test/dm/reset.c:52, dm_test_reset_base(): reset_method3.id == reset_method3_1.id: Expected 0x14 (20), got 0x2 (2)
Failures: 2

A fix is needed in reset_get_by_index_nodev() when introduced in [1].

[1] ea9dc35aab ("reset: Get the RESET by index without device")

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
3 years agoIOMUX: Fix buffer overflow in iomux_replace_device()
Yuichiro Goto [Sun, 25 Apr 2021 23:08:03 +0000 (08:08 +0900)]
IOMUX: Fix buffer overflow in iomux_replace_device()

Use of strcat() against an uninitialized buffer would lead
to buffer overflow. This patch fixes it.

Fixes: 694cd5618c ("IOMUX: Introduce iomux_replace_device()")
Signed-off-by: Yuichiro Goto <goto@k-tech.co.jp>
Cc: Peter Robinson <pbrobinson@gmail.com>
Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Cc: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
3 years agopinctrl: single: fix a never true comparison
Dario Binacchi [Thu, 22 Apr 2021 20:28:56 +0000 (22:28 +0200)]
pinctrl: single: fix a never true comparison

As reported by Coverity Scan for Das U-Boot, the 'less-than-zero'
comparison of an unsigned value is never true.

Signed-off-by: Dario Binacchi <dariobin@libero.it>
Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
3 years agopinctrl: single: check function mask to be non-zero
Dario Binacchi [Thu, 22 Apr 2021 16:35:58 +0000 (18:35 +0200)]
pinctrl: single: check function mask to be non-zero

Otherwise it can generate a division by zero, which has an undefined
behavior.

Signed-off-by: Dario Binacchi <dariobin@libero.it>
3 years agoMakefile: fix generation of defaultenv.h from empty initial file
Rasmus Villemoes [Thu, 22 Apr 2021 07:44:18 +0000 (09:44 +0200)]
Makefile: fix generation of defaultenv.h from empty initial file

When CONFIG_USE_DEFAULT_ENV_FILE=y and the file
CONFIG_DEFAULT_ENV_FILE is empty (or at least doesn't contain any
non-comment, non-empty lines), we end up feeding nothing into xxd,
which in turn then outputs nothing. Then blindly appending ", 0x00"
means that we end up trying to compile (roughly)

const char defaultenv[] = { , 0x00 }

which is of course broken.

To fix that, change the frobbing of the text file so that we always
end up printing an extra empty line (which gets turned into that extra
nul byte we need) - that corresponds better to the binary format
consisting of a series of key=val nul terminated strings, terminated
by an empty string.

Reported-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
3 years agofs: btrfs: fix the false alert of decompression failure
Qu Wenruo [Sat, 17 Apr 2021 12:52:13 +0000 (20:52 +0800)]
fs: btrfs: fix the false alert of decompression failure

There are some cases where decompressed sectors can have padding zeros.

In kernel code, we have lines to address such situation:

        /*
         * btrfs_getblock is doing a zero on the tail of the page too,
         * but this will cover anything missing from the decompressed
         * data.
         */
        if (bytes < destlen)
                memset(kaddr+bytes, 0, destlen-bytes);
        kunmap_local(kaddr);

But not in U-boot code, thus we have some reports of U-boot failed to
read compressed files in btrfs.

Fix it by doing the same thing of the kernel, for both inline and
regular compressed extents.

Reported-by: Matwey Kornilov <matwey.kornilov@gmail.com>
Link: https://bugzilla.suse.com/show_bug.cgi?id=1183717
Fixes: a26a6bedafcf ("fs: btrfs: Introduce btrfs_read_extent_inline() and btrfs_read_extent_reg()")
Signed-off-by: Qu Wenruo <wqu@suse.com>
3 years agoarm: zimage: Use correct symbol to hide messages in SPL
Samuel Holland [Sat, 17 Apr 2021 14:34:37 +0000 (09:34 -0500)]
arm: zimage: Use correct symbol to hide messages in SPL

When zImage support was added to SPL, the messages were hidden to reduce
code size. However, the wrong config symbol was used. Since this file is
only built when CONFIG_SPL_FRAMEWORK=y, the messages were always hidden.

Use the correct symbol so the messages are printed in U-Boot proper.
Also use IS_ENABLED to drop the #ifdef.

Fixes: 431889d6ad9a ("spl: zImage support in Falcon mode")
Signed-off-by: Samuel Holland <samuel@sholland.org>
3 years agopowerpc: introduce CONFIG_CACHE_FLUSH_WATCHDOG_THRESHOLD
Rasmus Villemoes [Wed, 21 Apr 2021 09:16:03 +0000 (11:16 +0200)]
powerpc: introduce CONFIG_CACHE_FLUSH_WATCHDOG_THRESHOLD

When flush_cache() is called during boot on our ~7M kernel image, the
hundreds of thousands of WATCHDOG_RESET calls end up adding
significantly to boottime. Flushing a single cache line doesn't take
many microseconds, so doing these calls for every cache line is
complete overkill.

The generic watchdog_reset() provided by wdt-uclass.c actually
contains some rate-limiting logic that should in theory mitigate this,
but alas, that rate-limiting must be disabled on powerpc because of
its get_timer() implementation - get_timer() works just fine until
interrupts are disabled, but it just so happens that the "big"
flush_cache() call happens in the part of bootm where interrupts are
indeed disabled. [1] [2] [3]

I have checked with objdump that the generated code doesn't change
when this option is left at its default value of 0: gcc is smart
enough to see that the ">=" comparison is tautologically true, hence
all assignments to "flushed" are eliminated as dead stores.

On our board, setting the option to something like 65536 ends up
reducing total boottime by about 0.8 seconds.

[1] https://patchwork.ozlabs.org/project/uboot/patch/20200605111657.28773-1-rasmus.villemoes@prevas.dk/
[2] https://lists.denx.de/pipermail/u-boot/2021-April/446906.html
[3] https://lists.denx.de/pipermail/u-boot/2021-April/447280.html

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>