radeonsi: remove compute-based DCC decompression because it's broken

The new blit test discovered that it doesn't always work.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17864>

radeonsi: add common helper si_launch_grid_internal_images that is more robust

It does things in the correct order, which isn't easy to get right.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17864>

radeonsi: make si_launch_grid_internal static

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17864>

radeonsi: call pipe->blit instead of util_blitter_blit after MSAA resolving

This fixes a problem where the destination has a DCC-incompatible view
format and triggers a DCC decompression using a custom u_blitter path, which
is disallowed inside u_blitter due to it being a u_blitter recursion that
always crashes.

This is also better because we'll get the best codepath (u_blitter or
compute) instead of just u_blitter,

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17864>

radeonsi: move SI_MAX_VRAM_MAP_SIZE to si_debug_options.h

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17864>

radeonsi: unify VGT_TESS_DISTRIBUTION programming

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17864>

ac/surface: don't forbid 256KB swizzle modes on smaller gfx11 chips

let addrlib make the right choice

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17864>

amd/addrlib: fix 3D texture allocation failures on gfx11

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17864>

util/format: add util_format_rgbx_to_rgba helper

Image stores don't like RGBX on AMD. This is required by compute blits.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17864>

glthread: don't sync on IsEnabled(GL_DEPTH_TEST) by tracking it in glthread

Discovered with viewperf.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17781>

glthread: don't ignore glPushAttrib/glPopAttrib when tracking GL_CULL_FACE

Fixes: f4348ef60d51b07 - glthread: don't sync for glIsEnabled with a few enums

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17781>

r600: increase possible stack size in binary code

With the trace posted in #6969 we get a nesting level of 149,
so make it a round 256 of stack entries.

Related: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6969

Fixes: a4840e15ab77b44a72cabd7d503172e8357477eb
  r600: Use nir-to-tgsi instead of TGSI when the NIR debug opt is disabled.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17849>

freedreno/registers/a6xx: Some reg64 conversion

Reduce the spurious delta from a7xx regs.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17817>

freedreno/registers: Move varset to <enum>

De-noisify the enum values that are generation specific.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17817>

freedreno/registers: Allow varset to be specified on enum

It gets a bit repetitive to specify the same varset on each value.  The
rnn decode already handles it when specified on the enum, we just need
to relax the schema to allow this.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17817>

freedreno/registers: Whitespace fix for gen_header.py

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17817>

freedreno/ci: Update unit test reference decodes

Apparently we aren't running unit tests in CI?

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17817>

freedreno: Use enum for primtypes table

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17817>

freedreno/a6xx: De-open-code CACHE_FLUSH enum

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17817>

freedreno/drm: Combine upper and lower 32b of OR val

The original reason it was split was because of libdrm ABI.  But that no
longer applies since we pulled it into mesa.

While we are at it, remove the c++ workaround.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17817>

freedreno/autotune: Make 'offset' macro "private"

Otherwise it conflicts with glsl_types.h DEFAULT_CONSTRUCTOR when
included from a c++ file.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17817>

freedreno/ir3: Remove unneeded forward declaration

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17817>

freedreno: Extract common helper macros

De-duplicate some macros that had been copy/pasta'd around, etc.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17817>

freedreno/a6xx: Fix enum tag

This wasn't meant to be a variable.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17817>

freedreno/a6xx: Remove fd6_format.[ch]

Just use the fdl6 version of the one remaining helper.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17817>

pan/decode: Fix overrun decoding planes

We need to calculate the # of descriptors like we do on Midgard.

Fixes: ae9316f8128 ("pan/decode: Decode Valhall surface descriptor")
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17842>

vulkan: Improve the docs for vk_subpass_info

Reviewed-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17858>

vulkan: Always populate vk_render_pass_state::render_pass

This way drivers can at least see whether dynamic rendering is being
used or not even if they use vk_render_pass.  Dynamic rendering only
drivers are expected to ignore those fields anyway.

Reviewed-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17858>

etnaviv: Move nir_shader_compiler_options to compiler

It fits there much better and is an other step to get the
compiler to common code.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17819>

ci: set reasonable amount of wget retries for each download

Acked-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17655>

r300: don't read from output transform_r300_vertex_SEQ/SNE

Native rewrite in current form doesn't check
type of register and may use output as a
temp.

Helps with 218 deqp-gles2 tests.

Cc: mesa-stable
Reviewed-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17736>

radv: Use vk_descriptor_set_layout

Use the common ref counting and the common destroy entrypoint.

Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17818>

vulkan: Handle descriptor set layout alloc fails

Fixes: 949ce92 ("vulkan: Add a base struct for descriptor set layouts")
Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17818>

vulkan: Fix descriptor set layout allocation scope

Fixes: 949ce92 ("vulkan: Add a base struct for descriptor set layouts")
Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17818>

anv: Move Wa_1806527549 and enable by default

Move Wa_1806527549 into `init_render_queue_state` and
set HIZ_CHICKEN (7018h) bit = 1 by default.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6717
Signed-off-by: Mykhailo Skorokhodov <mykhailo.skorokhodov@globallogic.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17778>

iris: Move Wa_1806527549 and enable by default

Move Wa_1806527549 into `iris_init_render_context` and
set HIZ_CHICKEN (7018h) bit = 1 by default for TGL.

Cc: mesa-stable
Signed-off-by: Mykhailo Skorokhodov <mykhailo.skorokhodov@globallogic.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17778>

freedreno: WFI after PC_TESSFACTOR_ADDR update

Updating PC_TESSFACTOR_ADDR could race with the next draw which uses it.

Don't know any failures in tests.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17833>

tu: WFI after PC_TESSFACTOR_ADDR update

Updating PC_TESSFACTOR_ADDR could race with the next draw which uses it.

Fixes GL CTS tests running via Zink:
 KHR-Single-GL46.enhanced_layouts.glsl_contant_values
 KHR-GLES32.core.tessellation_shader.tessellation_shader_point_mode.point_rendering
 KHR-GLES32.core.tessellation_shader.winding.quads_cw
 KHR-GLES32.core.tessellation_shader.winding.triangles_cw

And probably more.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6815

Suggested-by: Connor Abbott <cwabbott0@gmail.com>
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17833>

intel/dev: remove INTEL_DEVID_OVERRIDE

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17831>

intel/dev: add a test verifying that device override works

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17831>

intel/tools/stub: fixup parsing of --platform=

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17831>

intel/tools/drm-shim: fixup eu_stride for topology

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17831>

intel/dev: move verification function to a header

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17831>

anv: decode init batch with INTEL_DEBUG=bat

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Mykhailo Skorokhodov <mykhailo.skorokhodov@globallogic.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17852>

virgl: do not share virgl_screen between different drm_files

Now, only one instance of virgl_screen exists for a device
(/dev/dri/cardX), and it is shared by different frontends (eg GLX,
GBM, etc.). There is a problem with this, as follows:

  /* Init GLX */
  ...
  glXCreateContext(...);
  ...

  /* GBM */
  gbm_fd = open("/dev/dri/card0", O_RDWR);
  dev = gbm_create_device(gbm_fd);
  bo = gbm_bo_create(dev, ...);
  plane_handle = gbm_bo_get_handle_for_plane(bo, ...);
  drmPrimeHandleToFD(gbm_fd, handle.u32, flags, &plane_fd);

The above drmPrimeHandleToFD() call will fail with ENOENT.
The reason is that GBM and GLX share the same virgl_screen (file
descriptor), and it is not gbm_fd that is used to create gbm_bo,
but other fd (opened during GLX initialization). Since the scope
of prime handle is limited to drm_file, the above plane_handle is
invalid under gbm_fd.

By canceling the sharing of virgl_screen between different drm_files,
GBM can use the correct fd to create resources, thereby avoiding the
problem of invalid prime handle.

Signed-off-by: Feng Jiang <jiangfeng@kylinos.cn>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16738>

intel/compiler: use NIR_PASS more

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17619>

intel/compiler: insert URB fence before task/mesh termination

Bspec 53421 says:
"A URB fence memory is typically performed prior the thread
exit message, so that the next thread dispatch that reads
that URB memory will see it."

Cc: 22.1 <mesa-stable>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16665>

intel/compiler: there are 4 types of fences on gfx >= 12.5

Found by code inspection.

There's an assert later checking that we haven't overflown
this array, so this change probably doesn't matter for any
workload.

Cc: 22.1 <mesa-stable>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16665>

intel/compiler: emit URB fences for TASK/MESH

Cc: 22.1 <mesa-stable>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16665>

intel/compiler: Delete unused Gfx8+ code in brw_find_live_channel()

We now handle this in fs_visitor::lower_find_live_channel().

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17530>

intel/compiler: Lower FIND_[LAST_]LIVE_CHANNEL in IR on Gfx8+

This allows the software scoreboarding pass, scheduler, and so on
to handle the individual instructions and handle them, rather than
trusting in the generator to do scoreboarding correctly when expanding
the virtual instruction to multiple actual instructions.

By using SHADER_OPCODE_READ_SR_REG, we also correctly handle the
software scoreboarding workaround when reading DMask/VMask.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17530>

intel/dev: drop warning for unhandled hwconfig keys

The hwconfig api may change unexpectedly prior to public release of
new platforms.  Also, public documentation of the hwconfig api
sometimes lags the release.

For these reasons, warnings about unhandled hwconfig keys are noisy,
likely to occur, and unhelpful to most users.  This commit drops those
warnings, in favor of a separate internal process for tracking
hwconfig api changes.

Suggested-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17846>

r600/sfn: Handle R600 class sin/cos

Fixes: 33765aa92aa5c150873fc210e9d6c1fe22cf8646
  r600/sfn: Enable NIR for pre EG hardware

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17840>

virgl: Set res->maybe_busy to true when creating resources

Currently, res->maybe_busy is false by default. If wait immediately
after the resource is created, virgl_drm_resource_wait() will return
directly without checking the actual state of the kernel, which will
cause synchronization problems, such as:

On Guest:
  pipe_buffer_create [mesa]
    virgl_drm_winsys_resource_create
      virtio_gpu_resource_create_ioctl [kernel]
        virtio_gpu_fence_alloc
        virtio_gpu_object_create
          virtio_gpu_cmd_resource_create_3d
            VIRTIO_GPU_CMD_RESOURCE_CREATE_3D
          virtio_gpu_object_attach
            virtio_gpu_cmd_resource_attach_backing
              VIRTIO_GPU_CMD_RESOURCE_ATTACH_BACKING
  resource_wait [mesa]
    virgl_drm_resource_wait /* return directly without fence waiting */
  pipe_buffer_map [mesa]
    virgl_drm_resource_map
      virtio_gpu_map_ioctl [kernel]
      os_mmap
  memcpy /* <== here */

On Host (with QEMU):
  VIRTIO_GPU_CMD_RESOURCE_CREATE_3D
    virgl_cmd_create_resource_3d [qemu]
      virgl_renderer_resource_create [virglrenderer]
  VIRTIO_GPU_CMD_RESOURCE_ATTACH_BACKING
    virgl_resource_attach_backing [qemu]
      virtio_gpu_create_mapping_iov
      virgl_renderer_resource_attach_iov [virglrenderer]
        virgl_resource_attach_iov
          vrend_pipe_resource_attach_iov
            vrend_write_to_iovec /* <== here */
      virtio_gpu_cleanup_mapping_iov [qemu]

In the example above, there is a race condition between memcpy and
vrend_write_to_iovec.

Signed-off-by: Jiang Feng <jiangfeng@kylinos.cn>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17592>

ci/lava: Remove MINIO_RESULTS_UPLOAD if requested

When we don't want to communicate with minio, e.g. running
lava_job_submitter script locally, MINIO_RESULTS_UPLOAD should be unset.
But this variable is already set by generate-env script, so we need to
remove it from the /set-job-env-vars.sh to avoid declaring it in
unexpected scenarios.

Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17645>

libsync: Fix compiler warning

../src/util/libsync.h:134:33: warning: suggest braces around initialization of subobject [-Wmissing-braces]
        struct sync_merge_data data = {0};
                                       ^

Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17816>

util: Fix c++ enum casting pickiness

Fix problems when included from c++

Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17816>

intel/dev: Fill in system memory info when using INTEL_DEVID_OVERRIDE

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17828>

ci/lava: Only parse result within testcase section

This commit fixes an issue related to leftover between jobs in the same
device under test in LAVA.

There is a possibility of having the resulting output being dumped just
after the boot, such as this job:
https://gitlab.freedesktop.org/mesa/mesa/-/jobs/25674303#L155

Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17752>

nir/from_ssa: Ignore undef sources

Is a phi source is an undef, there's no point in copying it or really
caring about it at all.  We would just end up inserting a mov from an
undef to a register.  Instead, treat phi sources which point to an undef
as if the phi source doesn't exist.

This also prevents them from being included in phi webs which should
reduce the overall interference seen in the shader.  Currently, if two
phis share an undef, their phi webs are consdiered to interfere.  By
ignoring undefs we can get rid of this false interference and reduce the
size of phi webs.  Reducing the number of things being copied by the
parallel copy instructions should also free up the paralle copy
algorithm and reduce the over-all churn of movs.

Shader-db results on Haswell:

    total instructions in shared programs: 8156608 -> 8155406 (-0.01%)
    instructions in affected programs: 164838 -> 163636 (-0.73%)

Shader-db results on Skylake:

    total instructions in shared programs: 18227370 -> 18227359 (<.01%)
    instructions in affected programs: 519 -> 508 (-2.12%)
    helped: 6
    HURT: 0

Shader-db results on Tigerlake:

    total instructions in shared programs: 21167987 -> 21168025 (<.01%)
    instructions in affected programs: 23701 -> 23739 (0.16%)
    helped: 21
    HURT: 27

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16817>

lima: Lower undefs to zero and run DCE after from_ssa

Undefs can happen even in real GLSL shaders so it's best to handle them.
Lowering to zero is a perfectly valid implementation.  Also, run DCE
because some of the undefs may be dead after from_ssa and there's no
point in processing those in the back-end.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16817>

lavapipe: enable VK_FORMAT_R5G5B5A1_UNORM_PACK16

Doesn't cause any cts regressions here.

Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17826>

gallium/dri2: Enable {GLX_ARB,EGL_KHR}_context_flush_control

This was disabled ages ago because it provoked bugs between us and
xserver about context creation attributes, hopefully those servers are
out of circulation by now, let's find out.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17756>

r600/sfn: remove leftover debug output

Fixes: 3c7368de56c32fb399306e888bc7a61ff721f3b6
   r600/sfn: Handle slot differences between pre-EG and EG

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17839>

pan/bi: Rename CLPER_V6.i32 to CLPER_OLD.i32

To reflect that it is the CLPER of choice on Mali-G31 which is a v7 target.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17754>

pan/bi: Assert that we use the correct CLPER

Add an assert at pack time that would have caught the bug fixed in 75353622046
("pan/bi: Fix clper_xor on Mali-G31").

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17754>

agx: Port minifloat tests to GTest

These tests predate using GTest in the compiler. Now that we do, we'd like to
have the tests together so they run regularly.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17824>

nir: Use nir_foreach_phi_src consistently.

I copy-and-pasted one of these and people noted that we had a better tool,
so make sure nobody else copy and pastes it.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17664>

glsl: Remove opt_conditional_discard().

The nir_opt_conditional_discard pass is called anyway and covers
discard/demote/terminate.

iris shader-db:

total instructions in shared programs: 8933422 -> 8933426 (<.01%)
instructions in affected programs: 48 -> 52 (8.33%)
helped: 0
HURT: 4

which is a synmark shader going from 12 to 13 instrs.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17664>

nir: Add an opt pass for phis after if choosing between true/false.

This pattern almost always gets peephole-selected out anyway, but I
noticed it once I removed glsl opt_conditional_discard.

iris shader-db:
total instructions in shared programs: 8933934 -> 8933158 (<.01%)
instructions in affected programs: 75575 -> 74799 (-1.03%)
helped: 179
HURT: 15

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17664>

v3d/ci: enable ARB_texture_cube_map piglit tests

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17836>

v3d/vc4/ci: Fix typo in skipped list

The skipped piglit tests should be those about arb_gpu_shader5, not
arb_gpu_shader_gpu5.

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17836>

v3dv/ci: Update expected list

Add some tests in the skip list that takes too much time to be executed.

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17836>

zink: more accurately set ImageQuery cap

Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17734>

zink: more accurately set {Sampled,Image}Buffer caps

Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17734>

zink: more accurately set {Sampled,Image}1D caps

We don't really need to set this for every shader that uses textures,
only the ones that use 1D textures.

Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17734>

zink: set dynamic indexing caps

If we're not using uniform indexing, we need to emit caps to enable
dynamic indexing.

Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17734>

zink: clean up extension emitting

do not emit SPV_KHR_storage_buffer_storage_class if we have vulkan 1.1

Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17734>

intel/nullhw: Use correct macro to fix build regression

Fixes: b510ee0d ("Use vk_foreach_struct_const where needed")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6950

Signed-off-by: Sviatoslav Peleshko <sviatoslav.peleshko@globallogic.com>
Tested-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17789>

vc4/v3d: restore calling debug_get_option_vc4/v3d_debug

As it is needed to have V3D_DEBUG defined. For the v3d case, I did it
restoring v3d_process_debug_variable, as it is at v3d_debug.c that
DEBUG_GET_ONCE_FLAGS_OPTION is called.

Fixes: 106b33405e8 ("vc4/v3d: stop adding NORAST when SHADERDB debug option is used")

Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17812>

ci/MinGW: LLD is not really used anywhere

Fixes: bbfd6dfe ("ci: Prepare the container for building all mesa components with mingw under linux")

Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17766>

ci/MSVC: LLD is not really used anywhere

Fixes: 0f46a319 ("CI: Windows: Build LLVM and llvmpipe")

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17766>

r600/sfn: Enable NIR for pre RG hardware

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Filip Gawin <filip@gawin.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17822>

r600/sfn: Advertise support for fmulz

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Filip Gawin <filip@gawin.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17822>

r600/sfn: Disable FP64 for pre-CEDAR

There is no point in trying to get the softfp to work here,
since these cards don't support tesselation shaders, they will
never get OpenGL 4.0.

v2: Fix formatting (Filip)

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Filip Gawin <filip@gawin.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17822>

r600/sfn: Handle pre-EG buffer fetch

v2: Fix formatting (Filip)

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Filip Gawin <filip@gawin.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17822>

r600/sfn: Set trans flag for flt_to_int on pre-EG

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Filip Gawin <filip@gawin.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17822>

r600/sfn: Handle non-compressed MS texel fetch

v2: Fix formatting (Filip)

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Filip Gawin <filip@gawin.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17822>

r600/sfn: Handle primitive input handling for pre-EG

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Filip Gawin <filip@gawin.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17822>

r600/sfn: Handle pre-EG GS input fetch

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Filip Gawin <filip@gawin.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17822>

r600/sfn: Handle buffer size query on pre-EG

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Filip Gawin <filip@gawin.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17822>

r600/sfn: Handle chipclass with kcache allocation

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Filip Gawin <filip@gawin.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17822>

r600/sfn: Handle slot differences between pre-EG and EG

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Filip Gawin <filip@gawin.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17822>

r600/sfn: Prepare StreamOut instruction for pre EG opcodes

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Filip Gawin <filip@gawin.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17822>

r600/sfn: Support pre-EG style FS input

v2: Fix formatting

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Filip Gawin <filip@gawin.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17822>

r600/sfn: Factor out fragement shader class for EG

Pre-EG hardware handles the FS inputs differently, so we
need to prepare a different code path.

v2: Make m_interolators_used private (Filip)

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Filip Gawin <filip@gawin.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17822>

virgl: honor host caps in shader cash sha evaluation

This is needed because when we switch between GLES and GL on the host,
we have to lower atomics to ssbo, and with that the shaders  can't be
pulled from the cache anymore. Likewise when we move the disk image with
a shader cache to a different host, other features might change that
will need lowering. To avoid using stale shaders in this case, merge the
caps into into the shader cache sha.

Fixes: d6db4d2e08100b12fe6ac539f419768b3b412643
    virgl: Add simple disk cache

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17798>

meson: add various generated header dependencies as order-only deps

https://mesonbuild.com/FAQ.html#how-do-i-tell-meson-that-my-sources-use-generated-headers

A few locations had underspecified deps on the header files, and this
caused builds to fail given sufficient parallelism.

Fixes #6531

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16659>

auxiliary: Remove pipe_tsd

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17213>

glx: Remove usage of pipe_tsd_set and pipe_tsd_get

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17213>