Fangrui Song [Fri, 27 Mar 2020 06:55:43 +0000 (23:55 -0700)]
[MCInstPrinter] Add parameter `Address` to MCInstPrinter::printAliasInstr. NFC
Follow-up of D72172.
Shengchen Kan [Tue, 17 Mar 2020 14:35:46 +0000 (22:35 +0800)]
[X86][MC] Fix the bug for prefix padding support
Summary:
There is a tiny logic error of D75300, making branch is not
correctly aligned with option -x86-pad-max-prefix-size
Reviewers: reames, MaskRay, craig.topper, LuoYuanke, jyknight
Reviewed By: reames
Subscribers: hiraditya, llvm-commits, annita.zhang
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D76285
Kai Luo [Fri, 27 Mar 2020 05:28:34 +0000 (05:28 +0000)]
[PowerPC] Fix test for PR45297 to adapt build without asserts. NFC.
Kai Luo [Fri, 27 Mar 2020 03:30:33 +0000 (03:30 +0000)]
[PowerPC] Enhance test for PR45297. NFC.
Uday Bondhugula [Thu, 26 Mar 2020 16:18:53 +0000 (21:48 +0530)]
[MLIR][NFC] drop some unnecessary includes
Drop unnecessary includes
Differential Revision: https://reviews.llvm.org/D76898
Juneyoung Lee [Tue, 24 Mar 2020 14:57:40 +0000 (23:57 +0900)]
[DAGCombine] Add basic optimizations for FREEZE in SelDag
Summary: This patch is the first effort to adding basic optimizations for FREEZE in SelDag.
Reviewers: spatel, lebedev.ri
Reviewed By: spatel
Subscribers: xbolva00, hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D76707
David Blaikie [Fri, 27 Mar 2020 03:09:14 +0000 (20:09 -0700)]
Use llvm_unreachable after a fully covered/always-returning switch
David Blaikie [Thu, 26 Mar 2020 20:47:34 +0000 (13:47 -0700)]
Make llvm::function_ref's operator bool explicit
This can avoid all sorts of mistakes with implicit conversion
(indirectly) to int, etc. I'm quite surprise there aren't any things to
fixup with this - but I guess most uses of function_ref aren't
optional/nullable.
Zakk Chen [Tue, 24 Mar 2020 16:42:22 +0000 (09:42 -0700)]
Fix typo, targetFeature should be lowercase.
this fixing also enable llc -mattr=+cpuhelp
Reviewers: ziangwan, kongyi
Reviewed By: kongyi
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D76757
Kai Wang [Thu, 26 Mar 2020 01:39:46 +0000 (09:39 +0800)]
[NFC] Clang format for the ELF header and ARM build attributes.
Differential Revision: https://reviews.llvm.org/D76819
Leonard Chan [Thu, 26 Mar 2020 23:39:03 +0000 (16:39 -0700)]
Move setBugReportMsg() out from under a conditional
Fixes a build break with LLVM_ENABLE_BACKTRACES=OFF.
Differential Revision: https://reviews.llvm.org/D76893
Cyndy Ishida [Thu, 26 Mar 2020 23:29:21 +0000 (16:29 -0700)]
[llvm][TextAPI/MachO] silence clang-tidy warnings, NFC
* applies only to tests
Dan Gohman [Sat, 21 Dec 2019 05:44:24 +0000 (21:44 -0800)]
[WebAssembly] Support wasm exports with zero-length names.
Zero-length strings are valid export names in WebAssembly, so allow
users to specify them.
Differential Revision: https://reviews.llvm.org/D71793
Dan Gohman [Sun, 24 Nov 2019 15:27:54 +0000 (07:27 -0800)]
[WebAssembly] Fix the order of destructors in the LowerGlobalDtors pass.
Fix the LowerGlobalDtors pass to run destructors in the same order as the
regular LLVM destructor lowering -- in reverse order. Adjacent
destructors with the same associated object are grouped, but destructors
are not reordered based on associated objects.
Differential Revision: https://reviews.llvm.org/D70685
Douglas Yung [Thu, 26 Mar 2020 22:45:40 +0000 (15:45 -0700)]
Make PS4 use -fno-use-init-array only as the ABI does not support .init_array.
Reviewed by Paul Robinson
Sid Manning [Tue, 3 Mar 2020 14:19:59 +0000 (08:19 -0600)]
[Hexagon] Add support for Linux/Musl ABI (part 2)
A continuation of https://reviews.llvm.org/D72701. This
adds support needed in clang.
Differential Revision: https://reviews.llvm.org/D75638
Stanislav Mekhanoshin [Wed, 25 Mar 2020 19:57:44 +0000 (12:57 -0700)]
[AMDGPU] Propagate amdgpu-waves-per-eu to callees
Differential Revision: https://reviews.llvm.org/D76868
Alexey Bataev [Thu, 26 Mar 2020 21:12:45 +0000 (17:12 -0400)]
[OPENMP50]Fix the checks for the nesting of scan directives.
Fixed the check for the orhaned scan directives and improved checks for
parallel for and parallel for simd directives.
Paolo Severini [Thu, 26 Mar 2020 21:26:31 +0000 (14:26 -0700)]
[lld][Wasm] Wasm-ld emits invalid .debug_ranges entries for non-live symbols
When the debug info contains a relocation against a dead symbol, wasm-ld
may emit spurious range-list terminator entries (entries with Start==0
and End==0). This change fixes this by emitting the WasmRelocation
Addend as End value for a non-live symbol.
Reviewed by: sbc100, dblaikie
Differential Revision: https://reviews.llvm.org/D74781
LLVM GN Syncbot [Thu, 26 Mar 2020 21:10:45 +0000 (21:10 +0000)]
[gn build] Port
9f7d4150b9e
Craig Topper [Thu, 26 Mar 2020 18:09:08 +0000 (11:09 -0700)]
[X86] Move combineLoopMAddPattern and combineLoopSADPattern to an IR pass before SelecitonDAG.
These transforms rely on a vector reduction flag on the SDNode
set by SelectionDAGBuilder. This flag exists because SelectionDAG
can't see across basic blocks so SelectionDAGBuilder is looking
across and saving the info. X86 is the only target that uses this
flag currently. By removing the X86 code we can remove the flag
and the SelectionDAGBuilder code.
This pass adds a dedicated IR pass for X86 that looks across the
blocks and transforms the IR into a form that the X86 SelectionDAG
can finish.
An advantage of this new approach is that we can enhance it to
shrink the phi nodes and final reduction tree based on the zeroes
that we need to concatenate to bring the partially reduced
reduction back up to the original width.
Differential Revision: https://reviews.llvm.org/D76649
Sam Clegg [Thu, 19 Mar 2020 22:20:49 +0000 (15:20 -0700)]
[clang] Allow -DDEFAULT_SYSROOT to be a relative path
In this case we interpret the path as relative the clang driver binary.
This allows SDKs to be built that include clang along with a custom
sysroot without requiring users to specify --sysroot to point to the
directory where they installed the SDK.
See https://github.com/WebAssembly/wasi-sdk/issues/58
Differential Revision: https://reviews.llvm.org/D76653
Simon Pilgrim [Thu, 26 Mar 2020 20:46:11 +0000 (20:46 +0000)]
[X86] Prefer PACKUS(AND(),AND()) to SHUFFLE(PSHUFB(),PSHUFB()) on all targets
Extends rG9d1721ce3926 to support AVX2+ targets.
Jay Foad [Thu, 26 Mar 2020 14:58:31 +0000 (14:58 +0000)]
[AMDGPU] Rename overloaded getMaxWavesPerEU to getWavesPerEUForWorkGroup
Summary: I think Max in the name was misleading. NFC.
Reviewers: arsenm, rampitec
Subscribers: kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, hiraditya, kerbowa, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D76860
Jay Foad [Thu, 26 Mar 2020 13:44:07 +0000 (13:44 +0000)]
[AMDGPU] Remove getMaxWavesPerCU in favour of getWavesPerWorkGroup.
Summary:
These methods were identical. I chose to remove getMaxWavesPerCU because
I think Max in the name was misleading. NFC.
Reviewers: arsenm, rampitec
Subscribers: kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, hiraditya, kerbowa, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D76859
Derek Schuff [Wed, 25 Mar 2020 17:35:12 +0000 (10:35 -0700)]
[WEbAssembly] Clear frame base vreg in explicit-locals when stack pointer is dead
Having an alloca in a function causes the stack pointer to be generated in the
prolog, but if it's unused other than for debug info, explicit-locals will drop
it and not allocate a local. In this case we need to reset the FrameBaseVreg.
Differential Revision: https://reviews.llvm.org/D76784
Simon Pilgrim [Thu, 26 Mar 2020 19:59:37 +0000 (19:59 +0000)]
[X86] lowerV16I8Shuffle - create v8i16 mask for PACKUS(AND(),AND()) patterns.
We can improve computeKnownBits results by avoiding excess bitcasts.
For this pattern we were doing:
(v16i8 PACKUS(v8i16 BITCAST(v16i8 AND(V1, MASK)), v8i16 BITCAST(v16i8 AND(V2, MASK))))
By performing the MASK/AND with a v8i16 type and bitcasting V1/V2 directly we can help computeKnownBits see that the mask is clearing the upper bits and allows shuffle combining to peek through later on.
This will be necessary to extend rG9d1721ce3926 to AVX2+ targets in a future patch.
Alexey Bataev [Thu, 26 Mar 2020 19:47:50 +0000 (15:47 -0400)]
Revert "[OPENMP50]Add basic support for inscan reduction modifier."
This reverts commit
8099e0fe82ce78c15bc6c4cf52caca5b6fbe28f5 to fix the
problems with the Windows-based buildbots.
Luís Marques [Thu, 26 Mar 2020 19:54:29 +0000 (19:54 +0000)]
[sanitizer][RISCV] Implement SignalContext::GetWriteFlag for RISC-V
This patch follows the approach also used for MIPS, where we decode the
offending instruction to determine if the fault was caused by a read or
write operation, as that seems to be the only relevant information we have
in the signal context structure to determine that.
Differential Revision: https://reviews.llvm.org/D75168
diggerlin [Thu, 26 Mar 2020 19:46:52 +0000 (15:46 -0400)]
[AIX] discard the label in the csect of function description and use qualname for linkage
SUMMARY:
SUMMARY
for a source file "test.c"
void foo() {};
llc will generate assembly code as (assembly patch)
.globl foo
.globl .foo
.csect foo[DS]
foo:
.long .foo
.long TOC[TC0]
.long 0
and symbol table as (xcoff object file)
[4] m 0x00000004 .data 1 unamex foo
[5] a4 0x0000000c 0 0 SD DS 0 0
[6] m 0x00000004 .data 1 extern foo
[7] a4 0x00000004 0 0 LD DS 0 0
After first patch, the assembly will be as
.globl foo[DS] # -- Begin function foo
.globl .foo
.align 2
.csect foo[DS]
.long .foo
.long TOC[TC0]
.long 0
and symbol table will as
[6] m 0x00000004 .data 1 extern foo
[7] a4 0x00000004 0 0 DS DS 0 0
Change the code for the assembly path and xcoff objectfile patch for llc.
Reviewers: Jason Liu
Subscribers: wuzish, nemanjai, hiraditya
Differential Revision: https://reviews.llvm.org/D76162
Jon Chesterfield [Thu, 26 Mar 2020 19:07:31 +0000 (19:07 +0000)]
[libomptarget] Add missing elf_end call in elf_common.c
Summary:
[libomptarget] Add missing elf_end call in elf_common.c
Noticed when reviewing D76843.
Reviewers: simoll, jdoerfert, efocht, AndreyChurbanov, grokos, manorom
Reviewed By: grokos
Subscribers: openmp-commits
Tags: #openmp
Differential Revision: https://reviews.llvm.org/D76874
Alexey Bataev [Wed, 25 Mar 2020 21:14:07 +0000 (17:14 -0400)]
[OPENMP50]Add basic support for inscan reduction modifier.
Added basic support (parsing/sema checks) for the inscan modifier in the
reduction clauses.
Michael Liao [Sat, 7 Mar 2020 06:49:58 +0000 (01:49 -0500)]
[cuda][hip] Add CUDA builtin surface/texture reference support.
Summary:
- Even though the bindless surface/texture interfaces are promoted,
there are still code using surface/texture references. For example,
[PR#26400](https://bugs.llvm.org/show_bug.cgi?id=26400) reports the
compilation issue for code using `tex2D` with texture references. For
better compatibility, this patch proposes the support of
surface/texture references.
- Due to the absent documentation and magic headers, it's believed that
`nvcc` does use builtins for texture support. From the limited NVVM
documentation[^nvvm] and NVPTX backend texture/surface related
tests[^test], it's believed that surface/texture references are
supported by replacing their reference types, which are annotated with
`device_builtin_surface_type`/`device_builtin_texture_type`, with the
corresponding handle-like object types, `cudaSurfaceObject_t` or
`cudaTextureObject_t`, in the device-side compilation. On the host
side, that global handle variables are registered and will be
established and updated later when corresponding binding/unbinding
APIs are called[^bind]. Surface/texture references are most like
device global variables but represented in different types on the host
and device sides.
- In this patch, the following changes are proposed to support that
behavior:
+ Refine `device_builtin_surface_type` and
`device_builtin_texture_type` attributes to be applied on `Type`
decl only to check whether a variable is of the surface/texture
reference type.
+ Add hooks in code generation to replace that reference types with
the correponding object types as well as all accesses to them. In
particular, `nvvm.texsurf.handle.internal` should be used to load
object handles from global reference variables[^texsurf] as well as
metadata annotations.
+ Generate host-side registration with proper template argument
parsing.
---
[^nvvm]: https://docs.nvidia.com/cuda/pdf/NVVM_IR_Specification.pdf
[^test]: https://raw.githubusercontent.com/llvm/llvm-project/master/llvm/test/CodeGen/NVPTX/tex-read-cuda.ll
[^bind]: See section 3.2.11.1.2 ``Texture reference API` in [CUDA C Programming Guide](https://docs.nvidia.com/cuda/pdf/CUDA_C_Programming_Guide.pdf).
[^texsurf]: According to NVVM IR, `nvvm.texsurf.handle` should be used. But, the current backend doesn't have that supported. We may revise that later.
Reviewers: tra, rjmccall, yaxunl, a.sidorin
Subscribers: cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D76365
Scott Linder [Tue, 24 Mar 2020 21:24:49 +0000 (17:24 -0400)]
[AMDGPU] Fix PC register mapping in wave32 mode
Summary:
The PC_32 DWARF register is for a 32-bit process address space which we
don't implement in AMDGCN; another way of putting this is that the size
of the PC register is not a function of the wavefront size. If we ever
implement a 32-bit process address space we will need to add two more
DwarfFlavours i.e. we will need to represent the product of (wave32,
wave64) x (64-bit address space, 32-bit address space).
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D76732
David Blaikie [Thu, 26 Mar 2020 18:32:15 +0000 (11:32 -0700)]
Roll otherwise unused subexpressions into an assertion
Sanjay Patel [Wed, 25 Mar 2020 18:29:12 +0000 (14:29 -0400)]
[InstCombine] add shuffle-with-bitcast-operand tests; NFC
Sterling Augustine [Thu, 26 Mar 2020 01:09:25 +0000 (18:09 -0700)]
Correctly handle using foo = std::foo inside namespaces.
Summary:
The gdb pretty printer misprints variables declared via
using declarations of the form:
namespace foo {
using string_view = std::string_view;
string_view bar;
}
This change fixes that, by deferring the decision to ignore
types not inside std until after desugaring.
Reviewers: #libc!
Subscribers: broadwaylamb, libcxx-commits
Tags: #libc
Differential Revision: https://reviews.llvm.org/D76816
Guillaume Chatelet [Thu, 26 Mar 2020 17:51:25 +0000 (17:51 +0000)]
[Alignment][NFC] Use llvmTargetFrameLowering::getStackAlign
Summary:
This is patch is part of a series to introduce an Alignment type.
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html
See this patch for the introduction of the type: https://reviews.llvm.org/D64790
Reviewers: courbet
Reviewed By: courbet
Subscribers: wuzish, arsenm, jyknight, nemanjai, jvesely, nhaehnle, hiraditya, kbarton, fedor.sergeev, jrtc27, kerbowa, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D76613
Jonathan Roelofs [Wed, 25 Mar 2020 20:50:16 +0000 (14:50 -0600)]
[InstCombine] Fix Incorrect fold of ashr+xor -> lshr w/ vectors
Fixes https://bugs.llvm.org/show_bug.cgi?id=43665
Jinsong Ji [Thu, 26 Mar 2020 18:05:34 +0000 (18:05 +0000)]
[docs][Phabricator] git migration related update
1.Add instructions to update author when committing other's patch
We have updated DeveloperPolicy to show how to change author in
https://reviews.llvm.org/D72468
We should also update Phabricator page to include such infomation,
in case people follow the steps here and forget to update author info.
2. Replace `git llvm push` with `git push`
Reviewed By: probinson
Differential Revision: https://reviews.llvm.org/D76718
Heejin Ahn [Thu, 26 Mar 2020 04:48:37 +0000 (21:48 -0700)]
[WebAssembly] Add test for event section order change
Summary:
This adds a test for D76752. Now the global section comes after the
event section, and this change makes sure it is satisfied.
Reviewers: sbc100, tlively
Reviewed By: tlively
Subscribers: dschuff, jgravelle-google, sunfish, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D76823
Marius Brehler [Thu, 26 Mar 2020 16:25:19 +0000 (09:25 -0700)]
[mlir] Rename CMake target MLIRQuantOps to MLIRQuant
With commit 4d60f47 VectorOps was renamed to Vector and the naming of
the CMake target was adjusted. With commit 363dd3f QuantOps was
renamed to Quant, but the naming of the CMake target is left
untouched. This renames the CMake target.
Dan Liew [Wed, 25 Mar 2020 02:39:44 +0000 (19:39 -0700)]
[ASan] Fix issue where system log buffer was not cleared after reporting an issue.
Summary:
When ASan reports an issue the contents of the system log buffer
(`error_message_buffer`) get flushed to the system log (via
`LogFullErrorReport()`). After this happens the buffer is not cleared
but this is usually fine because the process usually exits soon after
reporting the issue.
However, when ASan runs in `halt_on_error=0` mode execution continues
without clearing the buffer. This leads to problems if more ASan
issues are found and reported.
1. Duplicate ASan reports in the system log. The Nth (start counting from 1)
ASan report will be duplicated (M - N) times in the system log if M is the
number of ASan issues reported.
2. Lost ASan reports. Given a sufficient
number of reports the buffer will fill up and consequently cannot be appended
to. This means reports can be lost.
The fix here is to reset `error_message_buffer_pos` to 0 which
effectively clears the system log buffer.
A test case is included but unfortunately it is Darwin specific because
querying the system log is an OS specific activity.
rdar://problem/
55986279
Reviewers: kubamracek, yln, vitalybuka, kcc, filcab
Subscribers: #sanitizers, llvm-commits
Tags: #sanitizers
Differential Revision: https://reviews.llvm.org/D76749
Sean Silva [Tue, 24 Mar 2020 22:13:31 +0000 (15:13 -0700)]
Allow IndexType inside tensors.
It's common in many dialects to use tensors to themselves hold tensor shapes (for example, the shape is itself the result of some non-trivial calculation). Currently, such dialects have to use `tensor<?xi64>` or worse (like allowing either i32 or i64 tensors to represent shapes). `tensor<?xindex>` is the natural type to represent this, but is currently disallowed. This patch allows it.
Differential Revision: https://reviews.llvm.org/D76726
Sam McCall [Thu, 26 Mar 2020 17:42:40 +0000 (18:42 +0100)]
Test that would have caught recovery-expr crashes in
0788acbccbec. NFC
Alex Zinenko [Thu, 26 Mar 2020 17:09:26 +0000 (18:09 +0100)]
[mlir] StandardToLLVM: clean up conversion patterns for vector operations
Summary:
Provide a public VectorConvertToLLVMPattern utility class to implement
conversions with automatic unrolling of operation on multidimensional vectors
to lists of operations on single-dimensional vectors when lowering to the LLVM
dialect. Drop the template-based check on the number of operands since the
actual implementation does not depend on the operand number anymore. This check
only creates spurious concepts (UnaryOpLowering, BinaryOpLowering, etc).
Differential Revision: https://reviews.llvm.org/D76865
Alex Zinenko [Thu, 26 Mar 2020 17:08:57 +0000 (18:08 +0100)]
[mlir] StandardToLLVM: make one-to-one convresion pattern publicly available
Summary:
The Standard-to-LLVM dialect convresion has a set of utility classes that
simplify conversions, including patterns that provide one-to-one conversion
operation conversion with optional result packing. Expose these classes in a
public header so that conversions other than Standard-to-LLVM (e.g. vectors, or
LLVM-based intrinsics) could also use them. Since the patterns are implemented
as class templates and in order to keep the code size limited, keep the
implementation private by resorting to op identifiers instead of template-based
builders.
Differential Revision: https://reviews.llvm.org/D76864
Louis Dionne [Thu, 26 Mar 2020 17:14:51 +0000 (13:14 -0400)]
[libc++abi] Remove unused lit feature
Mitch Phillips [Thu, 26 Mar 2020 17:09:57 +0000 (10:09 -0700)]
[GWP-ASan] Use functions in backtrace test, not line numbers.
Summary:
There's no unwinding functionality on Android that allows for line
numbers to be retrieved in-process. As a result, we can't have
this backtrace test run on Android.
Cleanup the test to use optnone functions instead, which is more stable
than line numbers anyway.
Reviewers: eugenis
Reviewed By: eugenis
Subscribers: #sanitizers, morehouse, cferris
Tags: #sanitizers
Differential Revision: https://reviews.llvm.org/D76807
Jonas Devlieghere [Thu, 26 Mar 2020 16:51:04 +0000 (09:51 -0700)]
[lldb/CMake] Fix `install` for multi-configuration generators.
For multi-generator builds like MSVC and Xcode, the install source and
destination of the lldb-python-scripts target contains configuration
dependent paths and therefore need to be substituted.
Differential revision: https://reviews.llvm.org/D76827
Kirstóf Umann [Thu, 26 Mar 2020 16:27:13 +0000 (17:27 +0100)]
[analyzer] Add the Preprocessor to CheckerManager
Matt Arsenault [Thu, 26 Mar 2020 15:51:25 +0000 (11:51 -0400)]
CUDA: Fix broken test run lines
There was a misisng space between the -march and --cuda-gpu-arch
arguments, so --cuda-gpu-arch wasn't actually being parsed. I'm not
sure what the intent of the sm_10 run lines were, but they error as an
unsupported architecture. Switch these to something else.
Jay Foad [Thu, 26 Mar 2020 13:39:51 +0000 (13:39 +0000)]
[AMDGPU] Make use of divideCeil. NFC.
Jay Foad [Thu, 26 Mar 2020 13:10:05 +0000 (13:10 +0000)]
[AMDGPU] Remove unused methods. NFC.
Fangrui Song [Thu, 26 Mar 2020 16:07:37 +0000 (09:07 -0700)]
[llvm-objdump] Fix typo. NFC
Kirstóf Umann [Thu, 26 Mar 2020 16:03:37 +0000 (17:03 +0100)]
Make a windows buildbot happy
Justin Hibbits [Tue, 24 Mar 2020 01:09:45 +0000 (20:09 -0500)]
[PowerPC]: Don't allow r0 as a target for LD_GOT_TPREL_L/32
Summary:
The linker is free to relax this (relocation R_PPC_GOT_TPREL16) against
R_PPC_TLS, if it sees fit (initial exec to local exec). If r0 is used,
this can generate execution-invalid code (converts to 'addi %rX, %r0,
FOO, which translates in PPC-lingo to li %rX, FOO). Forbid this
instead.
This fixes static binaries using locales on FreeBSD/powerpc
(tested on FreeBSD/powerpcspe).
Reviewed By: nemanjai
Differential Revision: https://reviews.llvm.org/D76662
Anton Kolesov [Thu, 26 Mar 2020 15:48:04 +0000 (18:48 +0300)]
[lldb-vscode] Convert launch_info and attach_info to local variables
Those fields inside of the global variable can be local variables because
they are used in only inside of one function: request_launch for launch_info
and request_attach for attach_info.
To avoid confusion an already existing local variable attach_info of
request_attach has been renamed to better reflect its purpose.
Differential Revision: https://reviews.llvm.org/D76593
Simon Pilgrim [Thu, 26 Mar 2020 14:39:46 +0000 (14:39 +0000)]
[X86][SSE] Prefer PACKUS(AND(),AND()) to SHUFFLE(PSHUFB(),PSHUFB()) on pre-AVX2 targets
As discussed on PR31443, we should be trying to use PACKUS for binary truncation patterns to reduce the number of shuffles.
The plan is to support AVX2+ targets once we've worked around PR45315 - we fail to peek through a VBROADCAST_LOAD mask to recognise zero upper bits in a PACKUS pattern.
We should also be able to add support for v8i16 and possibly 256/512-bit vectors as well.
Fangrui Song [Mon, 23 Mar 2020 06:03:09 +0000 (23:03 -0700)]
[PPCInstPrinter] Change printBranchOperand(calltarget) to print the target address in hexadecimal form
```
// llvm-objdump -d output (before)
0: bl .-4
4: bl .+0
8: bl .+4
// llvm-objdump -d output (after) ; GNU objdump -d
0: bl 0xfffffffc / bl 0xfffffffffffffffc
4: bl 0x4
8: bl 0xc
```
Many Operand's are not annotated as OPERAND_PCREL.
They are not affected (e.g. `b .+
67108860`). I plan to fix them in future patches.
Modified test/tools/llvm-objdump/ELF/PowerPC/branch-offset.s to test
address space wraparound for powerpc32 and powerpc64.
Reviewed By: sfertile, jhenderson
Differential Revision: https://reviews.llvm.org/D76591
James Henderson [Thu, 26 Mar 2020 14:14:50 +0000 (14:14 +0000)]
[lld][ELF] Fix error message
The error previously talked about a "section header" but was actually
referring to a program header.
Reviewed by: grimar, MaskRay
Differential Revision: https://reviews.llvm.org/D76846
Fangrui Song [Sun, 22 Mar 2020 22:03:10 +0000 (15:03 -0700)]
[X86InstPrinter] Change printPCRelImm to print the target address in hexadecimal form
```
// llvm-objdump -d output (before)
400000: e8 0b 00 00 00 callq 11
400005: e8 0b 00 00 00 callq 11
// llvm-objdump -d output (after)
400000: e8 0b 00 00 00 callq 0x400010
400005: e8 0b 00 00 00 callq 0x400015
// GNU objdump -d. The lack of 0x is not ideal because the result cannot be re-assembled
400000: e8 0b 00 00 00 callq 400010
400005: e8 0b 00 00 00 callq 400015
```
In llvm-objdump, we pass the address of the next MCInst. Ideally we
should just thread the address of the current address, unfortunately we
cannot call X86MCCodeEmitter::encodeInstruction (X86MCCodeEmitter
requires MCInstrInfo and MCContext) to get the length of the MCInst.
MCInstPrinter::printInst has other callers (e.g llvm-mc -filetype=asm, llvm-mca) which set Address to 0.
They leave MCInstPrinter::PrintBranchImmAsAddress as false and this change is a no-op for them.
Reviewed By: jhenderson
Differential Revision: https://reviews.llvm.org/D76580
Haojian Wu [Thu, 26 Mar 2020 15:07:50 +0000 (16:07 +0100)]
Revert "[AST] Build recovery expressions by default for C++."
This reverts commit
0788acbccbec094903a3425ffe5a98f8d55cbd64.
This reverts commit
c2d7a1f79cedfc9fcb518596aa839da4de0adb69: Revert "[clangd] Add test for FindTarget+RecoveryExpr (which already works). NFC"
It causes a crash on invalid code:
class X {
decltype(unresolved()) foo;
};
constexpr int s = sizeof(X);
Simon Cook [Thu, 26 Mar 2020 15:23:07 +0000 (15:23 +0000)]
[RISCV] Support negative constants in CompressInstEmitter
Summary:
Some compressed instructions match against negative values; store
immediates as a signed value such that these patterns will now match
the intended instructions.
Reviewers: asb, lenary, PaoloS
Reviewed By: asb
Subscribers: rbar, johnrusso, sabuasal, niosHD, kito-cheng, shiva0217, jrtc27, MaskRay, zzheng, edward-jones, rogfer01, MartinMosbeck, brucehoult, the_o, rkruppe, PkmX, jocewei, psnobl, benna, Jim, s.egerton, pzheng, sameer.abuasal, apazos, luismarques, evandro, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D76767
Fangrui Song [Sun, 22 Mar 2020 19:32:27 +0000 (12:32 -0700)]
[MCInstPrinter] Pass `Address` parameter to MCOI::OPERAND_PCREL typed operands. NFC
Follow-up of D72172 and D72180
This patch passes `uint64_t Address` to print methods of PC-relative
operands so that subsequent target specific patches can change
`*InstPrinter::print{Operand,PCRelImm,...}` to customize the output.
Add MCInstPrinter::PrintBranchImmAsAddress which is set to true by
llvm-objdump.
```
// Current llvm-objdump -d output
aarch64: 20000: bl #0
ppc: 20000: bl .+4
x86: 20000: callq 0
// Ideal output
aarch64: 20000: bl 0x20000
ppc: 20000: bl 0x20004
x86: 20000: callq 0x20005
// GNU objdump -d. The lack of 0x is not ideal because the result cannot be re-assembled
aarch64: 20000: bl 20000
ppc: 20000: bl 0x20004
x86: 20000: callq 20005
```
In `lib/Target/X86/X86GenAsmWriter1.inc` (generated by `llvm-tblgen -gen-asm-writer`):
```
case 12:
// CALL64pcrel32, CALLpcrel16, CALLpcrel32, EH_SjLj_Setup, JCXZ, JECXZ, J...
- printPCRelImm(MI, 0, O);
+ printPCRelImm(MI, Address, 0, O);
return;
```
Some targets have 2 `printOperand` overloads, one without `Address` and
one with `Address`. They should annotate derived `Operand` properly with
`let OperandType = "OPERAND_PCREL"`.
Reviewed By: jhenderson
Differential Revision: https://reviews.llvm.org/D76574
LLVM GN Syncbot [Thu, 26 Mar 2020 15:16:51 +0000 (15:16 +0000)]
[gn build] Port
2aac0c47aed
Kristóf Umann [Fri, 28 Feb 2020 14:07:50 +0000 (15:07 +0100)]
Reland "[analyzer][NFC] Tie CheckerRegistry to CheckerManager, allow CheckerManager to be constructed for non-analysis purposes"
Originally commited in rG57b8a407493c34c3680e7e1e4cb82e097f43744a, but
it broke the modules bot. This is solved by putting the contructors of
the CheckerManager class to the Frontend library.
Differential Revision: https://reviews.llvm.org/D75360
Dominik Montada [Thu, 26 Mar 2020 12:59:08 +0000 (13:59 +0100)]
[GlobalISel] add helper function to create arbitrary libcalls
Summary:
The existing helper function can only create a libcall to functions available in
RTLIB. Add a helper function that can create a libcall to a given function name
using the provided calling convention.
Reviewers: aditya_nandakumar, t.p.northover, rovka, arsenm, dsanders
Reviewed By: arsenm
Subscribers: wdng, hiraditya, volkan, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D76845
Louis Dionne [Thu, 26 Mar 2020 15:04:49 +0000 (11:04 -0400)]
[lit] NFC: Remove trailing whitespace
I keep having to remove them from my diffs!
John Brawn [Thu, 26 Mar 2020 15:01:22 +0000 (15:01 +0000)]
Add a release note for attribute plugins
Qiu Chaofan [Thu, 26 Mar 2020 14:01:19 +0000 (22:01 +0800)]
[Legalizer] Fix some flags miss in vector results
In some scalarize/split result methods (unary, binary, ...), flags in
SDNode were not passed down, which may lead to unexpected results in
unsafe float-point optimization. This patch fixes them. (maybe not
complete)
Reviewed By: spatel
Differential Revision: https://reviews.llvm.org/D76832
Pavel Labath [Wed, 25 Mar 2020 15:18:50 +0000 (16:18 +0100)]
[lldb/breakpad] Fix register resolution on arm
In breakpad, only x86 (and mips) registers have a leading '$' in their
names. Arm architectures use plain register names.
Previously, lldb was assuming all registers have a '$'. Fix the code to
match the (unfortunately, inconsistent) reality.
Ilya Leoshkevich [Thu, 26 Mar 2020 12:35:09 +0000 (13:35 +0100)]
[compiler-rt] Use uname syscall in GetKernelAreaSize()
Commit
5f5fb56c68e4 ("[compiler-rt] Intercept the uname() function")
broke clang-cmake-thumbv7-full-sh build:
http://lab.llvm.org:8011/builders/clang-cmake-thumbv7-full-sh/builds/4296
This also affects i386.
The reason is that intercepted uname() is called by GetKernelAreaSize()
during ASAN initialization on 32-bit platforms, but the respective
interceptor is not initialized yet at this point, leading to null
pointer dereference.
Introduce internal_uname() wrapper around uname syscall, and use it in
GetKernelAreaSize() and in FixedCVE_2016_2143().
Author: Ilya Leoshkevich
Reviewed By: Evgenii Stepanov
Differential Revision: https://reviews.llvm.org/D76776
Ilya Leoshkevich [Thu, 26 Mar 2020 12:31:02 +0000 (13:31 +0100)]
[asan] Fix read_binary_name_regtest.c test dying with SIGPIPE
Disable symbolization of results, since llvm-symbolizer cannot start
due to restricted readlink(), causing the test to die with SIGPIPE.
Author: Ilya Leoshkevich
Reviewed By: Evgenii Stepanov
Differential Revision: https://reviews.llvm.org/D76576
Sam Parker [Thu, 26 Mar 2020 12:20:39 +0000 (12:20 +0000)]
[NFC] Create X86 subdirectory for indvar tests
Many IndVarSiimplify tests target an x86 triple, so move them into
a target specific folder.
Aaron Ballman [Thu, 26 Mar 2020 12:07:21 +0000 (08:07 -0400)]
Clarify use of llvm_unreachable in the coding standard.
There has been some ongoing confusion regarding when to use `llvm_unreachable`
which this patch attempts to address. Specifically, the confusion has been
around whether `llvm_unreachable` is intended to mark only unreachable code
paths that the compiler cannot determine itself or to mark a code path which is
unconditionally a bug to reach. Based on email and IRC discussions, it sounds
like "unconditional bug to reach" is the consensus.
Eric Fiselier [Thu, 26 Mar 2020 12:06:24 +0000 (08:06 -0400)]
Revert "[libc++] Run the builders Docker containers 'as 'buildbot instead of 'root'"
This reverts commit
a32b94c6c3a1ae3455208bdad6dad217a4286d09.
The buildbot startup scripts need to run as root. The buildbot
worker should have already been running as a different account.
More investigation needed.
Tatyana Krasnukha [Thu, 26 Mar 2020 12:03:27 +0000 (15:03 +0300)]
[lldb][testsuite] Check that process is launched successfully in inline tests
Tatyana Krasnukha [Thu, 26 Mar 2020 12:01:09 +0000 (15:01 +0300)]
[lldb][testsuite] Add lldb-server category
Simon Pilgrim [Thu, 26 Mar 2020 11:54:52 +0000 (11:54 +0000)]
[X86][SSE] getFauxShuffleMask - peek through TRUNCATE/AEXT/ZEXT for INSERT_VECTOR_ELT(EXTRACT_VECTOR_ELT())
As long we extract from a source vector with smaller elements and we zero-extend the element in the final shuffle mask then we can safely peek through truncations and any/zero-extensions to find the source extraction.
Louis Dionne [Tue, 17 Mar 2020 16:27:10 +0000 (12:27 -0400)]
[libc++] Do not force the use of -Werror in verify tests
Forcing -Werror and other warnings means that the test suite isn't
actually testing what most people are seeing in their code -- it seems
better and less arbitrary to compile these tests as close as possible
to the compiler default instead.
Removing -Werror also means that we get to differentiate between
diagnostics that are errors and those that are warnings, which makes
the test suite more precise.
Differential Revision: https://reviews.llvm.org/D76311
Sam McCall [Thu, 26 Mar 2020 11:47:36 +0000 (12:47 +0100)]
[AST] Make thinlto testcase robust to
159a9f7e76307734bcdcae3357640e42e0733194
Ultimately it relies on the output of __PRETTY_FUNCTION__ which isn't reliable.
Sam McCall [Thu, 26 Mar 2020 11:37:48 +0000 (12:37 +0100)]
Revert "[AST] Fix thinlto testcase missed in
159a9f7e76307734bcdcae3357640e42e0733194"
This reverts commit
4bd1d55884aaeb582aa8f313e45823fe0f60b32d.
Cure is worse than the disease: "> >" is still expected in most configs.
Working on fixing the fuchsia builder.
Jonas Paulsson [Thu, 26 Mar 2020 11:22:14 +0000 (12:22 +0100)]
[SystemZ] Bugfix in tieOpsIfNeeded()
This function did a check which was broken to see if an opcode requires op0
and op1 to be tied. By chance this is NFC.
Review: Ulrich Weigand
Georgii Rymar [Tue, 24 Mar 2020 11:07:15 +0000 (14:07 +0300)]
[obj2yaml] - Refactor how we dump sections. NFCI.
This is a NFC splitted from D75342.
Previously obj2yaml never dumped a normal SHT_NULL section (i.e. when it is just zeroed)
or non-allocatable SHT_STRTAB/SHT_SYMTAB/SHT_DYNSYM sections.
This patch does not change the output, but it changes the logic so that we now dump these
sections, and them remove them later. It allows us to create and work with our internal representation
of sections, i.e. to work with the vector of Chunks, what looks cleaner.
It is used by D75342 and also should help us to support dumping a content that does not
belong to a section (i.e. to dump some data as `Fill` chunks).
Differential revision: https://reviews.llvm.org/D76684
Emre Kultursay [Thu, 26 Mar 2020 09:33:57 +0000 (10:33 +0100)]
[LLDB] Fix parsing of IPv6 host:port inside brackets
Summary:
When using IPv6 host:port pairs, typically the host is put inside
brackets, such as [2601:1234:...:0213]:5555, and the UriParser
can handle this format.
However, the Android infrastructure in LLDB assumes an additional
brackets around the host:port pair, such that the entire host:port
string can be treated as the host (which is used as an Android Serial
Number), and UriParser cannot handle multiple brackets. Parsing
inputs with such extra backets requires searching the closing bracket
from the right.
Test: BracketedHostnameWithPortIPv6 covers the case mentioned above
Reviewers: #lldb, labath
Reviewed By: labath
Subscribers: kwk, shafik, lldb-commits
Tags: #lldb
Differential Revision: https://reviews.llvm.org/D76736
gbreynoo [Thu, 26 Mar 2020 10:26:59 +0000 (10:26 +0000)]
Tools emit the bug report URL on crash
When Clang crashes a useful message is output:
"PLEASE submit a bug report to https://bugs.llvm.org/ and include the
crash backtrace, preprocessed source, and associated run script."
A similar message is now output for all tools.
Differential Revision: https://reviews.llvm.org/D74324
Karl-Johan Karlsson [Thu, 26 Mar 2020 08:10:25 +0000 (09:10 +0100)]
Remove extra ';', NFC
Fixed gcc -Wpedantic warning about extra ';'
Shivam Mittal [Thu, 26 Mar 2020 10:15:07 +0000 (11:15 +0100)]
Convert CommandObjectCommands functions to return StringRefs
Reviewers: jingham, aprantl, labath, jankratochvil
Reviewed By: labath, jankratochvil
Subscribers: labath, jankratochvil, lldb-commits
Tags: #lldb
Differential Revision: https://reviews.llvm.org/D76569
Haojian Wu [Wed, 25 Mar 2020 13:17:23 +0000 (14:17 +0100)]
[CodeComplete] Don't replace the rest of line in #include completion.
Summary:
The previous behavior was aggressive,
#include "abc/f^/abc.h"
foo/ -> candidate
"f/abc.h" is replaced with "foo/", this patch will preserve the "abc.h".
Reviewers: sammccall
Subscribers: jkorous, arphaman, kadircet, usaxena95, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D76770
Kang Zhang [Thu, 26 Mar 2020 09:58:30 +0000 (09:58 +0000)]
[PowerPC] Remove the repeated definition for some InstAlias for mtspr/mfspr
Summary:
Below InstAlias have been redefined, this patch is to remove the repeated
definition.
mtdec/mfdec mtsdr1/mfsdr1 mtsrr0/mfsrr0 mtsrr1/mfsrr1 mtasr
Reviewed By: nemanjai, steven.zhang
Differential Revision: https://reviews.llvm.org/D75821
James Henderson [Wed, 25 Mar 2020 12:46:43 +0000 (12:46 +0000)]
[NFC][llvm-readobj] Refactor unique warning handler
The unique warning handler was previously a property of the dump style,
but it is commonly used in the dumper too. Since the two ELF output
styles have no impact on the way warnings are printed, this patch moves
the handler and related functions into the dumper class, instead of the
dump style class.
Reviewed by: MaskRay, grimar
Differential Revision: https://reviews.llvm.org/D76777
Cullen Rhodes [Wed, 25 Mar 2020 16:54:55 +0000 (16:54 +0000)]
[AArch64][SVE] Implement structured store intrinsics
Summary:
This patch adds initial support for the following intrinsics:
* llvm.aarch64.sve.st2
* llvm.aarch64.sve.st3
* llvm.aarch64.sve.st4
For storing two, three and four vectors worth of data. Basic codegen for
reg+immediate forms are implemented. Reg+reg addressing modes will be
addressed in a later patch.
These intrinsics are intended for use in the Arm C Language Extension
(ACLE).
Reviewed By: efriedma
Differential Revision: https://reviews.llvm.org/D75947
Sam McCall [Thu, 26 Mar 2020 09:28:38 +0000 (10:28 +0100)]
Pavel Labath [Thu, 26 Mar 2020 09:23:13 +0000 (10:23 +0100)]
[lldb] Fix TestVSCode_completions for clang 159a9f7
Printing of types has changed slightly.
Also improve the error messages the test gives when it fails.
Ties Stuij [Thu, 26 Mar 2020 08:17:29 +0000 (08:17 +0000)]
[PATCH] [ARM] ARMv8.6-a command-line + BFloat16 Asm Support
Summary:
This patch introduces command-line support for the Armv8.6-a architecture and assembly support for BFloat16. Details can be found
https://community.arm.com/developer/ip-products/processors/b/processors-ip-blog/posts/arm-architecture-developments-armv8-6-a
in addition to the GCC patch for the 8..6-a CLI:
https://gcc.gnu.org/legacy-ml/gcc-patches/2019-11/msg02647.html
In detail this patch
- march options for armv8.6-a
- BFloat16 assembly
This is part of a patch series, starting with command-line and Bfloat16
assembly support. The subsequent patches will upstream intrinsics
support for BFloat16, followed by Matrix Multiplication and the
remaining Virtualization features of the armv8.6-a architecture.
Based on work by:
- labrinea
- MarkMurrayARM
- Luke Cheeseman
- Javed Asbar
- Mikhail Maltsev
- Luke Geeson
Reviewers: SjoerdMeijer, craig.topper, rjmccall, jfb, LukeGeeson
Reviewed By: SjoerdMeijer
Subscribers: stuij, kristof.beyls, hiraditya, dexonsmith, danielkiss, cfe-commits, llvm-commits
Tags: #clang, #llvm
Differential Revision: https://reviews.llvm.org/D76062
Simon Tatham [Thu, 26 Mar 2020 09:06:59 +0000 (09:06 +0000)]
Do export symbols when LLVM_EXPORT_SYMBOLS_FOR_PLUGINS is on.
Summary:
In D76527, we stopped exporting symbols from clang, opt and llc unless
the `LLVM_ENABLE_PLUGINS` cmake variable is true (which causes clang's
own plugin collection to be built).
But another reasonable build configuration is to ask clang to export
its symbols for out-of-tree plugins to use, without building the
in-tree ones. That is, you might set `LLVM_EXPORT_SYMBOLS_FOR_PLUGINS`
without also setting `LLVM_ENABLE_PLUGINS` (at least if you're using
MSVC, where you need to ask explicitly for the symbols to be
exported).
In that situation, the symbols should still be exported, but after
D76527, they weren't being.
Reviewers: efriedma, john.brawn
Reviewed By: efriedma, john.brawn
Subscribers: mgorny, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D76760
David Green [Wed, 25 Mar 2020 11:35:53 +0000 (11:35 +0000)]
[ARM] Sink splats to vector float instructions
Some MVE floating point instructions have gpr register variants that take
the scalar gpr value and splat them to all lanes. In order to accept
them in loops, the shuffle_vector and insert need to be sunk down into
the loop, next to the instruction so that ISel can see the whole
pattern.
This does that sinking for FAdd, FSub, FMul and FCmp. The patterns for
mul are slightly more constrained as there are no fms variants taking
register arguments.
Differential Revision: https://reviews.llvm.org/D76023
Tres Popp [Thu, 26 Mar 2020 08:52:09 +0000 (09:52 +0100)]
[MLIR] Delete extra declaration of createAffineDataCopyGenerationPass.
This was caused by a bad rebase for
27c201aa1d972c10bfc38ff5b4abaf78ab3d2ad2
Sam McCall [Wed, 25 Mar 2020 20:41:12 +0000 (21:41 +0100)]
[AST] Print a<b<c>> without extra spaces in C++11 or later.
Summary: It's not 1998 anymore.
Reviewers: kadircet
Subscribers: jkorous, arphaman, usaxena95, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D76801