Marek Olšák [Wed, 1 Sep 2021 01:45:21 +0000 (21:45 -0400)]
radeonsi: use a trick to extract and pack edgeflags using fewer instructions
This removes 4 instructions from the prim export packing.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12343>
Marek Olšák [Wed, 18 Aug 2021 19:27:47 +0000 (15:27 -0400)]
radeonsi: convert gfx10_emit_ge_pc_alloc to radeon_opt_set_uconfig_reg
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12343>
Marek Olšák [Wed, 18 Aug 2021 17:05:16 +0000 (13:05 -0400)]
radeonsi: eliminate redundant SPI_SHADER_PGM_RSRC3/4_GS register writes
They don't change much.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12343>
Marek Olšák [Thu, 12 Aug 2021 13:39:04 +0000 (09:39 -0400)]
radeonsi: put si_pm4_state at the beginning of si_shader
instead of allocating it separately. This removes pointer indirections.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12343>
Marek Olšák [Wed, 11 Aug 2021 16:53:46 +0000 (12:53 -0400)]
radeonsi: move setting one GS shader key field out of si_shader_selector_key
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12343>
Marek Olšák [Wed, 11 Aug 2021 16:53:46 +0000 (12:53 -0400)]
radeonsi: move setting most TCS shader key fields out of si_shader_selector_key
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12343>
Marek Olšák [Wed, 11 Aug 2021 16:41:52 +0000 (12:41 -0400)]
radeonsi: set prefer_mono outside of si_shader_selector_key
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12343>
Marek Olšák [Wed, 11 Aug 2021 07:54:14 +0000 (03:54 -0400)]
radeonsi: precompute more spi_map code
This replaces vs_output_param_offset by vs_output_ps_input_cntl,
which is easier to use.
For geometry shaders, vs_output_ps_input_cntl is stored in the GS si_shader
structure, not gs_copy_shader. This requires that gs_copy_shader compilation
is finished before the GS main shader part, so that GS can initialize
vs_output_ps_input_cntl using the compiled GS copy shader.
output_semantic_to_slot becomes unused, so it's removed.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12343>
Marek Olšák [Wed, 11 Aug 2021 07:07:03 +0000 (03:07 -0400)]
radeonsi: unroll loops in si_emit_spi_map using 33 C++ template instantiations
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12343>
Marek Olšák [Wed, 11 Aug 2021 06:54:08 +0000 (02:54 -0400)]
radeonsi: inline si_get_ps_input_cntl because it has only one use
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12343>
Marek Olšák [Wed, 11 Aug 2021 06:29:47 +0000 (02:29 -0400)]
radeonsi: simplify si_emit_spi_map for back-face colors
Just precompute what we need in si_shader_info.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12343>
Marek Olšák [Wed, 11 Aug 2021 04:56:51 +0000 (00:56 -0400)]
radeonsi: precompute num_interp for si_emit_spi_map
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12343>
Marek Olšák [Wed, 11 Aug 2021 04:48:17 +0000 (00:48 -0400)]
radeonsi: interleave si_shader_info::input_* in memory for faster emit_spi_map
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12343>
Marek Olšák [Wed, 11 Aug 2021 03:50:09 +0000 (23:50 -0400)]
radeonsi: restructure si_get_ps_input_cntl for future refactoring
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12343>
Marek Olšák [Wed, 11 Aug 2021 04:12:05 +0000 (00:12 -0400)]
radeonsi: force flat for PrimID early in si_nir_scan_shader
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12343>
Marek Olšák [Wed, 11 Aug 2021 04:28:57 +0000 (00:28 -0400)]
radeonsi: eliminate a not-found conditional for PrimID in si_get_ps_input_cntl
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12343>
Marek Olšák [Tue, 10 Aug 2021 23:37:25 +0000 (19:37 -0400)]
radeonsi: determine num_vbos_in_user_sgprs from template arguments in draw_vbo
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12343>
Marek Olšák [Tue, 10 Aug 2021 15:47:47 +0000 (11:47 -0400)]
radeonsi: deduplicate si_compiler_ctx_state initialization
to remove it from si_update_shaders
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12343>
Marek Olšák [Tue, 10 Aug 2021 15:27:53 +0000 (11:27 -0400)]
radeonsi: precompute si_vgt_stages_key for NGG in si_shader
to remove this overhead from si_update_shaders
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12343>
Marek Olšák [Tue, 10 Aug 2021 15:22:07 +0000 (11:22 -0400)]
radeonsi: move flat shading VRS enablement out of si_update_shaders
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12343>
Marek Olšák [Tue, 10 Aug 2021 15:14:50 +0000 (11:14 -0400)]
radeonsi: move DB_SHADER_CONTROL update for PS out of si_update_shaders
It only depends on the pixel shader CSO and alpha test.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12343>
Marek Olšák [Tue, 10 Aug 2021 15:08:44 +0000 (11:08 -0400)]
radeonsi: check flatshade and sprite_coord_enable for spi_map in bind_rs_state
it doesn't need to be in si_update_shaders
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12343>
Marek Olšák [Tue, 10 Aug 2021 13:14:48 +0000 (09:14 -0400)]
radeonsi: optimize scratch buffer size updates using C++ template arguments
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12343>
Marek Olšák [Tue, 10 Aug 2021 12:44:49 +0000 (08:44 -0400)]
radeonsi: make si_update_shaders a C++ template in si_state_draw.cpp
This reduces driver overhead.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12343>
Marek Olšák [Tue, 10 Aug 2021 12:23:50 +0000 (08:23 -0400)]
radeonsi: unset SI_PREFETCH_* only when we unbind pm4 shader states
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12343>
Marek Olšák [Tue, 10 Aug 2021 11:47:32 +0000 (07:47 -0400)]
radeonsi: move PS inputs_read computation out of si_get_vs_key_outputs
to reduce overhead of si_update_shaders
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12343>
Marek Olšák [Tue, 10 Aug 2021 11:31:29 +0000 (07:31 -0400)]
radeonsi: move si_shader_io_get_unique_index calls out of si_get_vs_key_outputs
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12343>
Marek Olšák [Tue, 10 Aug 2021 10:33:44 +0000 (06:33 -0400)]
radeonsi: rewrite inlinable uniform states for shader keys in si_context
directly update the shader keys in si_context
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12343>
Marek Olšák [Tue, 10 Aug 2021 10:16:07 +0000 (06:16 -0400)]
radeonsi: update the VS shader key in set & bind functions and remove memsets
This decreases overhead of si_update_shaders and overall driver overhead.
The VS shader key portion related to VS inputs is updated in set & bind
functions. Other fields related to outputs are still updated
in si_shader_selector_key.
Now that all modified fields are set to 0 when not needed, and remove
the memsets.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12343>
Marek Olšák [Tue, 10 Aug 2021 10:56:06 +0000 (06:56 -0400)]
radeonsi: clean up and clear VS shader key fields related to outputs
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12343>
Marek Olšák [Tue, 10 Aug 2021 07:21:55 +0000 (03:21 -0400)]
radeonsi: update most of the PS shader key in set & bind functions
This decreases overhead of si_update_shaders and overall driver overhead.
There is only one function that depends on the rasterized primitive type,
and thus it can't be moved to set & bind functions.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12343>
Marek Olšák [Tue, 10 Aug 2021 07:10:46 +0000 (03:10 -0400)]
radeonsi: ignore blitter when computing the PS shader key
it doesn't have any effect
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12343>
Marek Olšák [Tue, 10 Aug 2021 07:04:31 +0000 (03:04 -0400)]
radeonsi: divide si_update_ps_shader_key into many separate functions
they will be used in bind functions etc.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12343>
Marek Olšák [Tue, 10 Aug 2021 06:35:32 +0000 (02:35 -0400)]
radeonsi: don't memset part in si_update_ps_shader_key
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12343>
Marek Olšák [Tue, 10 Aug 2021 06:35:32 +0000 (02:35 -0400)]
radeonsi: don't memset mono and opt in si_update_ps_shader_key
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12343>
Marek Olšák [Tue, 10 Aug 2021 06:32:19 +0000 (02:32 -0400)]
radeonsi: move PS shader key code into a separate function
There is reordering and new comments.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12343>
Marek Olšák [Tue, 10 Aug 2021 06:30:38 +0000 (02:30 -0400)]
radeonsi: sink memsets and disable uniform inlining in si_shader_selector_key
to facilitate refactoring. Uniform inlining will be re-enabled later.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12343>
Marek Olšák [Tue, 10 Aug 2021 06:18:15 +0000 (02:18 -0400)]
radeonsi: handle NO_OPT_VARIANT in si_shader_select_with_key
so as not to change the keys in si_context
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12343>
Marek Olšák [Tue, 10 Aug 2021 06:15:15 +0000 (02:15 -0400)]
radeonsi: add const to the key parameter in si_shader_select_with_key
The keys will match the current state, so we shouldn't change them.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12343>
Mike Blumenkrantz [Sat, 11 Sep 2021 15:16:16 +0000 (11:16 -0400)]
compiler/spirv: add a fail if tex instr coord components aren't dimensional enough
this is really hard to pin down later on, so catch it here instead
gotta have those dimensions.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12825>
Charlie Turner [Mon, 13 Sep 2021 18:08:19 +0000 (19:08 +0100)]
radv/ci: Fix the GPU_VERSION for polaris10
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11426>
Charlie Turner [Mon, 14 Jun 2021 10:45:05 +0000 (11:45 +0100)]
radv/ci: Remove duplication in dEQP skip lists.
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Martin Peres <martin.peres@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11426>
Charlie Turner [Wed, 16 Jun 2021 14:59:15 +0000 (15:59 +0100)]
ci: Support per-driver skip lists.
In addition to a global skip list introduced in
https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11333
(enabled by
https://gitlab.freedesktop.org/anholt/deqp-runner/-/merge_requests/4)
it is also useful to have a per-driver skip list in addition to a
per-gpu list. Now, there are multiple levels at which skips can be
specified, from least to most specific,
- (deqp|piglit)-all-skips.txt :: affecting all tests
- (deqp|piglit)-$(DRIVER_NAME|VK_DRIVER|GALLIUM_DRIVER)-skips.txt ::
affecting the specified driver
- (deqp|piglit)-$GPU_VERSION-skips.txt :: affecting a specific GPU
This idea could be useful for -fails.txt as well.
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Martin Peres <martin.peres@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11426>
Connor Abbott [Mon, 13 Sep 2021 11:32:57 +0000 (13:32 +0200)]
freedreno, turnip: Disable 8bpp UBWC on a650
While it doesn't immediately hang like on a660, it seems to be buggy and
the blob disables it.
This fixes a bunch of r8_* dEQP-VK tests, which seem to pass
individually but don't work when run after other tests. For example this
fixes failures running dEQP-VK.pipeline.sampler.*.r8_uint*.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12830>
Tomeu Vizoso [Fri, 10 Sep 2021 13:07:20 +0000 (15:07 +0200)]
panfrost/ci: Enable test runs on G72
Looks pretty stable now!
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Acked-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12850>
Danylo Piliaiev [Mon, 13 Sep 2021 17:23:46 +0000 (20:23 +0300)]
turnip/kgsl: fix compilation after perfetto introduction
Perfetto isn't supported with kgsl at the moment. Make stubs for
missing functions.
Fixes:
3dd1bb6355743b95b54e205012b605662a7e1cc5 "turnip: implement basic perfetto support"
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5352
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12837>
Kenneth Graunke [Thu, 22 Jul 2021 05:50:22 +0000 (22:50 -0700)]
iris: Add some accessor wrappers for a few fields.
In the future, we're going to have "real" BOs representing GEM objects,
and "slab allocated" BOs suballocated out of a larger BO. Many fields
are properties of the real underlying BO, but we may still want to ask
about an arbitrary BO, and have the accessor chase answers down as
necessary.
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12848>
Kenneth Graunke [Wed, 4 Aug 2021 18:05:13 +0000 (11:05 -0700)]
iris: Defer construction of the validation (exec_object2) list
When I wrote this code originally, I decided to try and construct the
validation list up front, rather than at submission time. That worked
okay, but it's not really necessary. It's a fair amount of data to
store (struct drm_i915_gem_exec_object2 is 56 bytes per object), when
we can easily construct it on the fly.
More importantly, with suballocation, batch->exec_bos[i] may have
multiple entries corresponding to a single validation list entry.
Rather than tracking two lists with an awkward mapping between them,
we choose to just store the BO list and generate the other on the fly.
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12848>
Kenneth Graunke [Wed, 4 Aug 2021 17:47:36 +0000 (10:47 -0700)]
iris: Track written BOs via a bitfield rather than exec_object2 entries
When we start suballocating BOs, multiple logical BOs may map to the
same GEM object, and thus share a validation list entry. However, we
want to track whether logical BOs are written, to avoid unnecessary
cross-batch data dependencies.
Just track that in a bitfield instead, where bit i corresponds to
batch->exec_bos[i].
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12848>
Kenneth Graunke [Wed, 4 Aug 2021 17:47:31 +0000 (10:47 -0700)]
iris: Rewrite bo->index comment to refer to exec_bos[]
batch->validation_list[] will be going away shortly, but exec_bos[]
will live on. bo->index is the index into both lists, so we can just
refer to the one we're not about to delete.
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12848>
Dave Airlie [Tue, 14 Sep 2021 06:59:03 +0000 (16:59 +1000)]
crocus/gen7: add missing IVB/GT2 geom shader workaround.
Noticed this in passing.
Fixes:
f3630548f1da ("crocus: initial gallium driver for Intel gfx 4-7")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12847>
Mike Blumenkrantz [Thu, 2 Sep 2021 19:21:47 +0000 (15:21 -0400)]
zink: add some debug asserts to validate imageless framebuffer correctness
not sure if these matter enough to assert on but they're annoying to track down
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12843>
Mike Blumenkrantz [Thu, 2 Sep 2021 19:21:04 +0000 (15:21 -0400)]
zink: update surface info when rebinding to storage
fixes some validation for imageless framebuffer usage
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12843>
Mike Blumenkrantz [Thu, 2 Sep 2021 19:20:43 +0000 (15:20 -0400)]
zink: force imageless fb rebind if rebinding an attachment
ensure that the STORAGE usage gets picked up here
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12843>
Mike Blumenkrantz [Thu, 2 Sep 2021 18:17:47 +0000 (14:17 -0400)]
zink: be smarter about fb surface rebinds
the aspect info lets us avoid unnecessary comparisons
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12843>
Mike Blumenkrantz [Tue, 31 Aug 2021 15:33:26 +0000 (11:33 -0400)]
zink: wrap framebuffer surfaces to preserve gallium expectations
gallium needs pipe_surface::context to reflect the context used to create
the surface, but zink caches surfaces, so instead return a wrapper object
that can be destroyed without blowing up the stack
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12843>
Mike Blumenkrantz [Tue, 31 Aug 2021 13:57:30 +0000 (09:57 -0400)]
zink: move surface and bufferview caches onto resources
this makes the locking smaller in scope and also make the lookups faster
due to having smaller populations in the hash tables
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12843>
Mike Blumenkrantz [Tue, 31 Aug 2021 13:51:52 +0000 (09:51 -0400)]
zink: add a resource reference for bufferviews
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12843>
Mike Blumenkrantz [Tue, 10 Aug 2021 14:41:24 +0000 (10:41 -0400)]
zink: assert surface geometry
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12843>
Jordan Justen [Thu, 16 May 2019 23:24:18 +0000 (16:24 -0700)]
intel/isl: Enable MOCS 61 for external surfaces on TGL
Reworks:
* Lionel/Francisco: Add comment
Cc: mesa-stable
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12292>
Mike Blumenkrantz [Mon, 13 Sep 2021 18:25:43 +0000 (14:25 -0400)]
zink: unset src access in barriers if there's no src pipeline stages
this is a partial barrier, so having access of any kind is invalid
VUID-vkCmdPipelineBarrier-srcAccessMask-02815(ERROR / SPEC): msgNum:
618171435 - Validation Error: [ VUID-vkCmdPipelineBarrier-srcAccessMask-02815 ] Object 0: handle = 0x2834530, type = VK_OBJECT_TYPE_COMMAND_BUFFER; | MessageID = 0x24d88c2b | vkCmdPipelineBarrier(): .pImageMemoryBarriers[0].srcAccessMask bit VK_ACCESS_TRANSFER_READ_BIT is not supported by stage mask (VK_PIPELINE_STAGE_TOP_OF_PIPE_BIT). The Vulkan spec states: The srcAccessMask member of each element of pMemoryBarriers must only include access flags that are supported by one or more of the pipeline stages in srcStageMask, as specified in the table of supported access types (https://www.khronos.org/registry/vulkan/specs/1.2-extensions/html/vkspec.html#VUID-vkCmdPipelineBarrier-srcAccessMask-02815)
Objects: 1
[0] 0x2834530, type: 6, name: NULL
zink DEBUG: ERR: 'Validation Error: [ VUID-vkCmdPipelineBarrier-srcAccessMask-02815 ] Object 0: handle = 0x2834530, type = VK_OBJECT_TYPE_COMMAND_BUFFER; | MessageID = 0x24d88c2b | vkCmdPipelineBarrier(): .pImageMemoryBarriers[0].srcAccessMask bit VK_ACCESS_TRANSFER_READ_BIT is not supported by stage mask (VK_PIPELINE_STAGE_TOP_OF_PIPE_BIT). The Vulkan spec states: The srcAccessMask member of each element of pMemoryBarriers must only include access flags that are supported by one or more of the pipeline stages in srcStageMask, as specified in the table of supported access types (https://www.khronos.org/registry/vulkan/specs/1.2-extensions/html/vkspec.html#VUID-vkCmdPipelineBarrier-srcAccessMask-02815)'
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12845>
Mike Blumenkrantz [Wed, 8 Sep 2021 19:25:42 +0000 (15:25 -0400)]
zink: unset barrier info if resource object no longer has usage after reset
this avoids spurious barriers
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12845>
Mike Blumenkrantz [Wed, 8 Sep 2021 19:25:01 +0000 (15:25 -0400)]
zink: move barrier info to resource object struct
this is a bit more accurate
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12845>
Mike Blumenkrantz [Wed, 8 Sep 2021 19:21:52 +0000 (15:21 -0400)]
zink: add return values for resource usage unsetting
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12845>
Kenneth Graunke [Mon, 13 Sep 2021 22:05:09 +0000 (15:05 -0700)]
glsl: Assert that lower_blend_equation_advanced is only called for FS
It only makes sense to call this pass for fragment shaders, and the
first thing the pass does is read a FS-specific field out of a union,
so it isn't safe to call it for other shader stages.
We could make it early return, but instead we just assert, so that
drivers know to only call it when appropriate.
(A previous version of this patch, which early returned instead of
asserting, was Reviewed-by: Emma Anholt <emma@anholt.net> as well.)
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12839>
Kenneth Graunke [Mon, 13 Sep 2021 22:47:47 +0000 (15:47 -0700)]
i965: Only call lower_blend_equation_advanced for fragment shaders
i965 called this pass unconditionally, while st/mesa only calls it for
fragment shaders. It only makes sense to run for fragment shaders, and
the first thing the pass does is read a FS-specific field out of a
union. This isn't safe for other stages.
Fixes about 20,630 test failures on i965 since
91dc863921a, which moved
the advanced_blend_modes field. The field had previously been in a
union with no other fields, so it never aliased anything, and thus
worked, even if it was wrong. That commit moved it to a union that had
fields for other stages, so it started reading garbage and trying to
lower advanced blending for other stages on i965.
Fixes:
91dc863921a ("mesa: Move the advanced blend bitmask to shader_info.")
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12839>
Mike Blumenkrantz [Sat, 11 Sep 2021 15:57:37 +0000 (11:57 -0400)]
zink: fix some return values
the function used to return the layout directly
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12844>
Mike Blumenkrantz [Thu, 9 Sep 2021 18:02:16 +0000 (14:02 -0400)]
zink: unconditionally support conditional rendering
this lets drivers that don't support the vk ext provide support
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12801>
Mike Blumenkrantz [Fri, 10 Sep 2021 00:47:10 +0000 (20:47 -0400)]
zink: fix dmabuf cap export
this requires a lot more than just one extension
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11967>
Mike Blumenkrantz [Fri, 10 Sep 2021 00:46:07 +0000 (20:46 -0400)]
zink: add dmabuf fd handling
just gotta get it out of the underlying graphics layer
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11967>
Mike Blumenkrantz [Fri, 10 Sep 2021 00:45:29 +0000 (20:45 -0400)]
zink: use foreign queue import for dmabufs
this is required to get image data
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11967>
Mike Blumenkrantz [Fri, 10 Sep 2021 00:44:35 +0000 (20:44 -0400)]
zink: fix import pNext attachment during image creation
there's better checks for this now, so the weird pNext handling here
can be simplified
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11967>
Mike Blumenkrantz [Fri, 10 Sep 2021 00:44:02 +0000 (20:44 -0400)]
zink: handle image creation for dmabufs
these use PREINIT layout
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11967>
Mike Blumenkrantz [Fri, 10 Sep 2021 00:48:38 +0000 (20:48 -0400)]
zink: set a flag for dmabuf init
this will be useful for barrier handling
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11967>
Mike Blumenkrantz [Fri, 10 Sep 2021 00:41:33 +0000 (20:41 -0400)]
zink: split import and export fd handle types
these can maybe be different
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11967>
Mike Blumenkrantz [Wed, 21 Apr 2021 20:26:12 +0000 (16:26 -0400)]
zink: hook up VK_EXT_queue_family_foreign
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11967>
Mike Blumenkrantz [Wed, 21 Apr 2021 18:00:57 +0000 (14:00 -0400)]
zink: add dmabuf modifier query hooks for screen
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11967>
Mike Blumenkrantz [Fri, 10 Sep 2021 00:36:41 +0000 (20:36 -0400)]
zink: hook up dmabuf ext
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11967>
Anuj Phogat [Tue, 2 Jun 2020 17:31:12 +0000 (10:31 -0700)]
intel/dg2: Add L3 configuration
Rework:
* Jordan: Merge dg1/dg2 into empty_l3_list
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12711>
Jordan Justen [Mon, 9 Dec 2019 18:51:40 +0000 (10:51 -0800)]
intel/dev: Add is_dg2 to devinfo
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12711>
Mike Blumenkrantz [Mon, 13 Sep 2021 13:30:21 +0000 (09:30 -0400)]
zink: use smallest int type possible for decompose shader key
this reduces the component key size for decomposition by up to 75%, down
to as low as 2 bytes, which is more optimal for both hashing and memcmp of
the key
it will become more useful as further changes are added to improve vertex format
support, enabling the keysize to remain relatively small
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12771>
Mike Blumenkrantz [Tue, 24 Aug 2021 20:01:56 +0000 (16:01 -0400)]
zink: decompose vertex attribs into single components when not supported
this avoids vbuf in a lot more cases on radv where 3component attribs aren't supported
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12771>
Mike Blumenkrantz [Mon, 13 Sep 2021 13:22:01 +0000 (09:22 -0400)]
zink: add function for decomposing vertex format to single component
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12771>
Marek Olšák [Sat, 11 Sep 2021 01:47:04 +0000 (21:47 -0400)]
radeonsi: fix DCC image stores with image descriptors in user SGPRs
The bug workaround was not applied there.
Fixes:
34a2c753107 - radeonsi: enable DCC stores on gfx10.3 APUs for better performance
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12809>
Marek Olšák [Wed, 1 Sep 2021 08:50:03 +0000 (04:50 -0400)]
driconf: remove leftover code for allow_incorrect_primitive_id
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12809>
Marek Olšák [Thu, 9 Sep 2021 17:13:21 +0000 (13:13 -0400)]
radeonsi: copy a few nir_shader_compiler_options from RADV
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12809>
Marek Olšák [Fri, 10 Sep 2021 19:03:27 +0000 (15:03 -0400)]
radeonsi: fix DCC image stores with display DCC
Fixes:
34a2c753107 - radeonsi: enable DCC stores on gfx10.3 APUs for better performance
Tested-by: Joshua Ashton <joshua@froggi.es>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12809>
Kai Wasserbäch [Sat, 4 Sep 2021 12:01:39 +0000 (14:01 +0200)]
fix(clover/llvm): update code to build with recent versions of LLVM 14 (Git)
`hasAttribute()` in `llvm::AttributeList` is gone, use `hasParamAttr()` instead.
This fixes an FTBFS.
Signed-off-by: Kai Wasserbäch <kai@dev.carbon-project.org>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12826>
Jordan Justen [Wed, 8 Sep 2021 23:54:57 +0000 (16:54 -0700)]
intel/devinfo: Add devinfo->max_scratch_ids
This consolidates several duplicated pieces of code into devinfo.
max_scratch_ids is an array that provides the max number of threads
for the rendering and compute stages.
This fixes some exceptions missed by crocus for scratch ids on haswell
and cherryview.
It also fills out devinfo->max_scratch_ids properly for stages VS
through CS on Gfx12.5. But, functionally this should not make a
difference as Gfx12.5 already uses COMPUTE for all stages.
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12799>
Jordan Justen [Wed, 8 Sep 2021 23:20:24 +0000 (16:20 -0700)]
intel: Move subslice_total into devinfo
Reworks:
* Move asserts for subslice_total into intel_device_info.c (s-b Ken)
* Drop now unused intel_device_info_subslice_total (s-b Ken)
* Add comment for subslice_total (Ken)
Suggested-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12799>
Simon Ser [Tue, 7 Sep 2021 13:06:46 +0000 (15:06 +0200)]
vulkan/wsi/x11: add driconf option to not wait under Xwayland
By default, Mesa's X11 Vulkan WSI will wait for buffers to be ready
before submitting them to Xwayland when the swapchain is created
with the IMMEDIATE mode.
This is undesirable when the Wayland compositor already monitors
fences. A Wayland compositor may want to know the delay between
the buffer submition and the end of the GPU work, this is impossible
to measure if the WSI waits for the buffer to be ready before
submission.
Since most compositors don't monitor fences, let's introduce a driconf
option for this for now. We can reconsider once more compositors
have better support for fences.
Signed-off-by: Simon Ser <contact@emersion.fr>
Acked-by: Michel Dänzer <mdaenzer@redhat.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11290>
Emma Anholt [Sat, 11 Sep 2021 00:06:43 +0000 (17:06 -0700)]
mesa: Move the advanced blend bitmask to shader_info.
For drivers that don't lower advanced blend to FBFETCH, we need the
bitmask to be in the NIR shader so that it gets carried over to TGSI
successfully.
Reviewed-by: Rob Clark <robdclark@chromium.org>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12813>
Mike Blumenkrantz [Mon, 13 Sep 2021 11:49:54 +0000 (07:49 -0400)]
zink: fix ZINK_MAX_DESCRIPTORS_PER_TYPE to stop exploding the stack
this isn't the max per type, it's the max that can be used for a type,
which is the max used by a shader stage * the number of shader stages
Cc: mesa-stable
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12829>
Rob Clark [Sun, 12 Sep 2021 22:57:01 +0000 (15:57 -0700)]
freedreno: Move a6xx specific screen init
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12820>
Rob Clark [Sun, 12 Sep 2021 22:49:02 +0000 (15:49 -0700)]
freedreno: Cleanup primtypes/primtypes_mask
Move primtypes/primtypes_mask to screen to remove duplicated introduced
by
744ef862b8d30d2037b8826153d2d2366e99844b.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5299
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12820>
Rob Clark [Sun, 12 Sep 2021 22:39:25 +0000 (15:39 -0700)]
freedreno: Remove unused function
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12820>
Samuel Pitoiset [Fri, 20 Aug 2021 06:56:10 +0000 (08:56 +0200)]
radv: enable comp-to-single for MSAA images
This allows fast clears for concurrent MSAA images.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12483>
Samuel Pitoiset [Fri, 20 Aug 2021 06:55:46 +0000 (08:55 +0200)]
radv: add MSAA support to the comp-to-single fast clear path
Clearing the first sample is enough as long as CMASK is also cleared
to indicate that other samples are also cleared.
I verified that the first sample is always at the beginning of 256B
blocks.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12483>
Juan A. Suarez Romero [Mon, 13 Sep 2021 10:46:07 +0000 (12:46 +0200)]
ci/v3dv: update flakes
dEQP-VK.api.external.fence.opaque_fd.signal_export_import_wait_permanent
became a flake in latest kernel (5.10.60-v8+)
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12832>
Charlie Turner [Wed, 8 Sep 2021 17:34:00 +0000 (18:34 +0100)]
ci: Fix syntax error in radv fails files
Fixes instances of,
Error: Failed to parse dEQP-VK.ssbo.phys.layout.random.8bit.all_per_block_buffers.46 as CSV test,status[,duration] or comment at line 1
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Martin Peres <martin.peres@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12777>