Matt Arsenault [Mon, 1 Jul 2019 17:40:18 +0000 (17:40 +0000)]
AMDGPU/GlobalISel: RegBankSelect for sendmsg/sendmsghalt
llvm-svn: 364819
Julian Lettner [Mon, 1 Jul 2019 17:39:39 +0000 (17:39 +0000)]
[TSan] Improve handling of stack pointer mangling in {set,long}jmp, pt.2
Switch `LongJmp` over to lookup JmpBuf via plain old (unmangled) SP.
This makes the computation of mangled SPs in the TSan assembly files
unnecessary, which will be cleaned up in follow-up revisions.
Reviewed By: dvyukov
Differential Revision: https://reviews.llvm.org/D63942
llvm-svn: 364818
Matt Arsenault [Mon, 1 Jul 2019 17:35:53 +0000 (17:35 +0000)]
AMDGPU/GlobalISel: Legalize s16 fcmp
llvm-svn: 364817
Matt Arsenault [Mon, 1 Jul 2019 17:18:03 +0000 (17:18 +0000)]
GlobalISel: Implement lower for min/max
llvm-svn: 364816
Nicolai Haehnle [Mon, 1 Jul 2019 17:17:52 +0000 (17:17 +0000)]
AMDGPU/GFX10: implement ds_ordered_count changes
Summary:
ds_ordered_count can now simultaneously operate on up to 4 dwords
in a single instruction, which are taken from (and returned to)
lanes 0..3 of a single VGPR.
Change-Id: I19b6e7b0732b617c10a779a7f9c0303eec7dd276
Reviewers: mareko, arsenm, rampitec
Subscribers: kzhuravl, jvesely, wdng, yaxunl, dstuttard, tpr, t-tye, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D63716
llvm-svn: 364815
Nicolai Haehnle [Mon, 1 Jul 2019 17:17:45 +0000 (17:17 +0000)]
AMDGPU: Support GDS atomics
Summary:
Original patch by Marek Olšák
Change-Id: Ia97d5d685a63a377d86e82942436d1fe6e429bab
Reviewers: mareko, arsenm, rampitec
Subscribers: kzhuravl, jvesely, wdng, yaxunl, dstuttard, tpr, t-tye, jfb, Petar.Avramovic, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D63452
llvm-svn: 364814
Fangrui Song [Mon, 1 Jul 2019 17:12:26 +0000 (17:12 +0000)]
[ELF][RISCV] Support GD/LD/IE/LE TLS models
RISC-V psABI doesn't specify TLS relaxation. It can be handled the same
way as we handle ARM TLS. RISC-V TLS is even simpler because GD/LD use
the same relocation type.
Reviewed By: jrtc27, ruiu
Differential Revision: https://reviews.llvm.org/D63220
llvm-svn: 364813
Fangrui Song [Mon, 1 Jul 2019 17:12:18 +0000 (17:12 +0000)]
[ELF][RISCV] Support PLT, GOT, copy and relative relocations
* Handle initial relocation types: R_RISCV_CALL_PLT and R_RISCV_GOT_HI20.
* Produce dynamic relocation types: R_RISCV_COPY, R_RISCV_RELATIVE, R_RISCV_JUMP_SLOT.
* Define SymbolRel as R_RISCV_{32,64}
* Generate PLT header: it is used by lazy binding PLT in glibc.
* R_RISCV_CALL is changed from R_PC to R_PC_PLT. If the target symbol is preemptable, this will suppress an unnecessary "canonical PLT".
This behavior is different from ld.bfd but it is agreed the current lld behavior is favored.
I have received positive responses from the binutils maintainer that the ABI/binutils implementation can be improved, see:
https://github.com/riscv/riscv-elf-psabi-doc/issues/98
https://sourceware.org/bugzilla/show_bug.cgi?id=24685
Many -no-pie/-pie/-shared programs linked against musl or glibc should work with this patch.
Reviewed By: jrtc27
Differential Revision: https://reviews.llvm.org/D63076
llvm-svn: 364812
Matt Arsenault [Mon, 1 Jul 2019 17:04:57 +0000 (17:04 +0000)]
AMDGPU/GlobalISel: RegBankSelect for DS ordered add/swap
llvm-svn: 364811
Matt Arsenault [Mon, 1 Jul 2019 17:02:24 +0000 (17:02 +0000)]
AArch64/GlobalISel: Fix trying to select invalid MIR
Physical registers are not allowed to be a phi operand.
llvm-svn: 364810
Shaurya Gupta [Mon, 1 Jul 2019 16:55:29 +0000 (16:55 +0000)]
Summary: [Clangd] Added hidden command line option -tweaks to specify which tweaks to enable
- Only for development purposes
- Disabled tweaks in fixits-duplications test
Reviewers: sammccall, kadircet
Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D63989
llvm-svn: 364809
Matt Arsenault [Mon, 1 Jul 2019 16:41:36 +0000 (16:41 +0000)]
AMDGPU/GlobalISel: RegBankSelect for amdgcn.writelane
llvm-svn: 364808
Matt Arsenault [Mon, 1 Jul 2019 16:36:39 +0000 (16:36 +0000)]
AMDGPU/GlobalISel: Fail instead of assert when selecting loads
llvm-svn: 364807
Matt Arsenault [Mon, 1 Jul 2019 16:34:48 +0000 (16:34 +0000)]
AMDGPU/GlobalISel: Complete implementation of G_GEP
Also works around tablegen defect in selecting add with unused carry,
but if we have to manually select GEP, might as well handle add
manually.
llvm-svn: 364806
Matt Arsenault [Mon, 1 Jul 2019 16:32:47 +0000 (16:32 +0000)]
AMDGPU/GlobalISel: Select G_PHI
llvm-svn: 364805
Matt Arsenault [Mon, 1 Jul 2019 16:27:32 +0000 (16:27 +0000)]
AMDGPU/GlobalISel: Try to select VOP3 form of add
There are several things broken, but at least emit the right thing for
gfx9.
The import of the pattern with the unused carry out seems to not
work. Needs a special class for clamp, because OperandWithDefaultOps
doesn't really work.
llvm-svn: 364804
Simon Pilgrim [Mon, 1 Jul 2019 16:20:47 +0000 (16:20 +0000)]
[X86] Add widenSubVector to size in bits helper. NFCI.
We can already widenSubVector to a specific type (of the same scalar type) - this variant just specifies the target vector size.
This will be useful when CombineShuffleWithExtract relaxes the need to have the same scalar type for all shuffle operand subvector sources.
llvm-svn: 364803
Marshall Clow [Mon, 1 Jul 2019 16:20:25 +0000 (16:20 +0000)]
Implement LWG2221: 'Formatted output for nullptr_t' Reviewed as: https://reviews.llvm.org/D63053
llvm-svn: 364802
Matt Arsenault [Mon, 1 Jul 2019 16:19:39 +0000 (16:19 +0000)]
AMDGPU/GlobalISel: RegBankSelect for readlane/readfirstlane
llvm-svn: 364801
James Henderson [Mon, 1 Jul 2019 16:18:57 +0000 (16:18 +0000)]
[docs][llvm-readelf] Expand llvm-readelf documentation
Previously, the llvm-readelf documentation was essentially just a list
of differences to llvm-readobj. Since llvm-readelf is the more likely
goto tool for many people migrating to the LLVM toolchain, it seems like
it would be helpful to document all the switches in the llvm-readelf
document too. This change expands the options listed accordingly.
Additionally, they are unlikely to care what the differences are to
llvm-readobj, since they won't be familiar with the latter as there is
no GNU equivalent, so this change moves the "differences" section to
llvm-readobj's documentation.
Reviewed by: peter.smith
Differential Revision: https://reviews.llvm.org/D63826
llvm-svn: 364800
Bruce Mitchener [Mon, 1 Jul 2019 16:18:38 +0000 (16:18 +0000)]
__threading_support: Remove (void) in favor of ().
Summary:
This fixes a clang-tidy warning when building something that uses
this file.
Reviewers: mclow.lists, EricWF
Subscribers: cfe-commits
Differential Revision: https://reviews.llvm.org/D43226
llvm-svn: 364799
Bruce Mitchener [Mon, 1 Jul 2019 16:13:31 +0000 (16:13 +0000)]
Fix -Wdouble-promotion warnings.
Reviewers: mclow.lists
Subscribers: christof, ldionne, cfe-commits, libcxx-commits
Differential Revision: https://reviews.llvm.org/D62782
llvm-svn: 364798
Tom Stellard [Mon, 1 Jul 2019 16:09:33 +0000 (16:09 +0000)]
AMDGPU/GlobalISel: Implement select for 32-bit G_ADD
Reviewers: arsenm
Reviewed By: arsenm
Subscribers: hiraditya, kzhuravl, jvesely, wdng, nhaehnle, yaxunl, rovka, kristof.beyls, dstuttard, tpr, t-tye, Petar.Avramovic, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D58804
llvm-svn: 364797
Mikhail Maltsev [Mon, 1 Jul 2019 16:07:58 +0000 (16:07 +0000)]
[ARM] Fix MVE_VQxDMLxDH instruction class
Summary:
According to the ARMARM, the VQDMLADH, VQRDMLADH, VQDMLSDH and
VQRDMLSDH instructions handle their results as follows: "The base
variant writes the results into the lower element of each pair of
elements in the destination register, whereas the exchange variant
writes to the upper element in each pair". I.e., the initial content
of the output register affects the result, as usual, we model this
with an additional input.
Also, for 32-bit variants Qd is not allowed to be the same register as
Qm and Qn, we use @earlyclobber to indicate this.
This patch also changes vpred_r to vpred_n because the instructions
don't have an explicit 'inactive' operand.
Reviewers: dmgreen, ostannard, simon_tatham
Reviewed By: simon_tatham
Subscribers: javed.absar, kristof.beyls, hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D64007
llvm-svn: 364796
Matt Arsenault [Mon, 1 Jul 2019 16:06:02 +0000 (16:06 +0000)]
AMDGPU/GlobalISel: Select G_BRCOND for vcc
llvm-svn: 364795
Mikhail Maltsev [Mon, 1 Jul 2019 16:05:23 +0000 (16:05 +0000)]
[ARM] MVE: support QQPRRegClass and QQQQPRRegClass
Summary:
QQPRRegClass and QQQQPRRegClass are used by the
interleaving/deinterleaving loads/stores to represent sequences of
consecutive SIMD registers.
Reviewers: ostannard, simon_tatham, dmgreen
Reviewed By: simon_tatham
Subscribers: javed.absar, kristof.beyls, hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D64009
llvm-svn: 364794
Krzysztof Parzyszek [Mon, 1 Jul 2019 16:01:15 +0000 (16:01 +0000)]
Update email address in CODE_OWNERS
llvm-svn: 364793
Roman Lebedev [Mon, 1 Jul 2019 15:55:24 +0000 (15:55 +0000)]
[InstCombine] (Y + ~X) + 1 --> Y - X fold (PR42459)
Summary:
To be noted, this pattern is not unhandled by instcombine per-se,
it is somehow does end up being folded when one runs opt -O3,
but not if it's just -instcombine. Regardless, that fold is
indirect, depends on some other folds, and is thus blind
when there are extra uses.
This does address the regression being exposed in D63992.
https://godbolt.org/z/7DGltU
https://rise4fun.com/Alive/EPO0
Fixes [[ https://bugs.llvm.org/show_bug.cgi?id=42459 | PR42459 ]]
Reviewers: spatel, nikic, huihuiz
Reviewed By: spatel
Subscribers: llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D63993
llvm-svn: 364792
Roman Lebedev [Mon, 1 Jul 2019 15:55:15 +0000 (15:55 +0000)]
[InstCombine] Shift amount reassociation in bittest (PR42399)
Summary:
Given pattern:
`icmp eq/ne (and ((x shift Q), (y oppositeshift K))), 0`
we should move shifts to the same hand of 'and', i.e. rewrite as
`icmp eq/ne (and (x shift (Q+K)), y), 0` iff `(Q+K) u< bitwidth(x)`
It might be tempting to not restrict this to situations where we know
we'd fold two shifts together, but i'm not sure what rules should there be
to avoid endless combine loops.
We pick the same shift that was originally used to shift the variable we picked to shift:
https://rise4fun.com/Alive/6x1v
Should fix [[ https://bugs.llvm.org/show_bug.cgi?id=42399 | PR42399]].
Reviewers: spatel, nikic, RKSimon
Reviewed By: spatel
Subscribers: llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D63829
llvm-svn: 364791
Krzysztof Parzyszek [Mon, 1 Jul 2019 15:50:09 +0000 (15:50 +0000)]
[Hexagon] Custom-lower UADDO(x, 1) and USUBO(x, 1)
llvm-svn: 364790
Matt Arsenault [Mon, 1 Jul 2019 15:48:18 +0000 (15:48 +0000)]
AMDGPU/GlobalISel: Select G_FRAME_INDEX
llvm-svn: 364789
Nicolai Haehnle [Mon, 1 Jul 2019 15:43:00 +0000 (15:43 +0000)]
AMDGPU/GFX10: fix scratch resource descriptor
Summary:
The stride should depend on the wave size, not the hardware generation.
Also, the 32_FLOAT format is 0x16, not 16; though that shouldn't be
relevant.
Change-Id: I088f93bf6708974d085d1c50967f119061da6dc6
Reviewers: arsenm, rampitec, mareko
Subscribers: kzhuravl, jvesely, wdng, yaxunl, dstuttard, tpr, t-tye, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D63808
llvm-svn: 364788
Matt Arsenault [Mon, 1 Jul 2019 15:42:47 +0000 (15:42 +0000)]
AMDGPU/GlobalISel: Make s16 select legal
This is easy to handle and avoids legalization artifacts which are
likely to obscure combines.
llvm-svn: 364787
Matt Arsenault [Mon, 1 Jul 2019 15:39:27 +0000 (15:39 +0000)]
AMDGPU/GlobalISel: Select G_BRCOND for scc conditions
llvm-svn: 364786
Gabor Marton [Mon, 1 Jul 2019 15:37:07 +0000 (15:37 +0000)]
[ASTImporter] Mark erroneous nodes in shared st
Summary:
Now we store the errors for the Decls in the "to" context too. For
that, however, we have to put these errors in a shared state (among all
the ASTImporter objects which handle the same "to" context but different
"from" contexts).
After a series of imports from different "from" TUs we have a "to" context
which may have erroneous nodes in it. (Remember, the AST is immutable so
there is no way to delete a node once we had created it and we realized
the error later.) All these erroneous nodes are marked in
ASTImporterSharedState::ImportErrors. Clients of the ASTImporter may
use this as an input. E.g. the static analyzer engine may not try to
analyze a function if that is marked as erroneous (it can be queried via
ASTImporterSharedState::getImportDeclErrorIfAny()).
Reviewers: a_sidorin, a.sidorin, shafik
Subscribers: rnkovacs, dkrupp, Szelethus, gamesh411, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D62376
llvm-svn: 364785
Matt Arsenault [Mon, 1 Jul 2019 15:23:04 +0000 (15:23 +0000)]
AMDGPU/GlobalISel: Tolerate copies with no type set
isVCC has the same bug, but isn't used in a context where it can cause
a problem.
llvm-svn: 364784
Matt Arsenault [Mon, 1 Jul 2019 15:23:03 +0000 (15:23 +0000)]
AMDGPU: Fix tests using the default alloca address space
llvm-svn: 364783
Matt Arsenault [Mon, 1 Jul 2019 15:18:56 +0000 (15:18 +0000)]
AMDGPU/GlobalISel: Select src modifiers
llvm-svn: 364782
Michal Gorny [Mon, 1 Jul 2019 15:11:42 +0000 (15:11 +0000)]
[lldb] [Process/NetBSD] Use global enable bits for watchpoints
Set global enable bits (i.e. bits 1, 3, 5, 7) to enable watchpoints
on NetBSD rather than the local enable bits (0, 2, 4, 6). The former
are necessary for watchpoints to be correctly recognized by the NetBSD
kernel. The latter cause them to be reported as trace points.
Differential Revision: https://reviews.llvm.org/D63792
llvm-svn: 364781
Michal Gorny [Mon, 1 Jul 2019 15:11:10 +0000 (15:11 +0000)]
[lldb] [Process/NetBSD] Fix segfault when handling watchpoint
Fix the watchpoint/breakpoint code to search for matching thread entry
in m_threads explicitly rather than assuming that it will be present
at specified index. The previous code segfault since it wrongly assumed
that the index will match LWP ID which was incorrect even for a single
thread (where index was 0 and LWP ID was 1).
While fixing that off-by-one error would help for this specific task,
I believe it is better to be explicit in what we are searching for.
Differential Revision: https://reviews.llvm.org/D63791
llvm-svn: 364780
Michal Gorny [Mon, 1 Jul 2019 15:11:04 +0000 (15:11 +0000)]
[lldb] [Process/NetBSD] Support reading YMM registers via PT_*XSTATE
Provide a (conditional) support for the new PT_GETXSTATE
and PT_SETXSTATE ptrace() requests, and use them to implement getting
and setting YMM registers. The functions used for splitting
and recombining YMM register data are based on matching functions
in FreeBSD plugin, with some simplification and updates to match NetBSD
structures.
Differential Revision: https://reviews.llvm.org/D63545
llvm-svn: 364779
Diana Picus [Mon, 1 Jul 2019 15:07:38 +0000 (15:07 +0000)]
Fixup r364512
Fix stack-use-after-scope errors from r364512. One instance was already
fixed in r364611 - this patch simplifies that fix and addresses one more
instance of similar code.
Discussed in: https://reviews.llvm.org/D63905
llvm-svn: 364778
Sam Elliott [Mon, 1 Jul 2019 14:53:56 +0000 (14:53 +0000)]
[RISCV] Avoid save-restore target feature warning
Summary:
LLVM issues a warning if passed unknown target features. Neither I nor
@asb noticed this until after https://reviews.llvm.org/D63498 landed.
This patch stops passing the (unknown) "save-restore" target feature to
the LLVM backend, but continues to emit a warning if a driver asks for
`-msave-restore`. The default of assuming `-mno-save-restore` (and
emitting no warnings) remains.
Reviewers: asb
Reviewed By: asb
Subscribers: rbar, johnrusso, simoncook, apazos, sabuasal, niosHD, kito-cheng, shiva0217, jrtc27, zzheng, edward-jones, rogfer01, MartinMosbeck, brucehoult, the_o, rkruppe, PkmX, jocewei, psnobl, benna, Jim, cfe-commits, asb
Tags: #clang
Differential Revision: https://reviews.llvm.org/D64008
llvm-svn: 364777
Michal Gorny [Mon, 1 Jul 2019 14:38:47 +0000 (14:38 +0000)]
Revert "[lldb] [Process/NetBSD] Fix constructor after r363707"
Now that r364751 has been reverted, we need to revert this fixup
as well.
llvm-svn: 364776
Jinsong Ji [Mon, 1 Jul 2019 14:37:48 +0000 (14:37 +0000)]
[UpdateTestChecks][PowerPC] Avoid empty string when scrubbing loop comments
Summary:
SCRUB_LOOP_COMMENT_RE was introduced in https://reviews.llvm.org/D31285
This works for some loops.
However, we may generate lines with loop comments only.
And since we don't scrub leading white spaces, this will leave an empty
line there, and FileCheck will complain it.
eg: llvm/test/CodeGen/PowerPC/PR35812-neg-cmpxchg.ll:27:15:
error: found empty check string with prefix 'CHECK:'
; CHECK-NEXT:
This prevented us from using the `update_llc_test_checks.py` for quite some cases.
We should still keep the comment token there, so that we can safely
scrub the loop comment without breaking FileCheck.
Reviewers: timshen, hfinkel, lebedev.ri, RKSimon
Subscribers: nemanjai, jfb, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D63957
llvm-svn: 364775
Benjamin Kramer [Mon, 1 Jul 2019 14:33:26 +0000 (14:33 +0000)]
[ASTImporter] Silence unused variable warning in Release builds. NFC.
llvm-svn: 364774
Jan Kratochvil [Mon, 1 Jul 2019 14:31:26 +0000 (14:31 +0000)]
Fix lookup of symbols at the same address with no size vs. size
This fixes a failing testcase on Fedora 30 x86_64 (regression Fedora 29->30):
PASS:
./bin/lldb ./lldb-test-build.noindex/functionalities/unwind/noreturn/TestNoreturnUnwind.test_dwarf/a.out -o 'settings set symbols.enable-external-lookup false' -o r -o bt -o quit
* frame #0: 0x00007ffff7aa6e75 libc.so.6`__GI_raise + 325
frame #1: 0x00007ffff7a91895 libc.so.6`__GI_abort + 295
frame #2: 0x0000000000401140 a.out`func_c at main.c:12:2
frame #3: 0x000000000040113a a.out`func_b at main.c:18:2
frame #4: 0x0000000000401134 a.out`func_a at main.c:26:2
frame #5: 0x000000000040112e a.out`main(argc=<unavailable>, argv=<unavailable>) at main.c:32:2
frame #6: 0x00007ffff7a92f33 libc.so.6`__libc_start_main + 243
frame #7: 0x000000000040106e a.out`_start + 46
vs.
FAIL - unrecognized abort() function:
./bin/lldb ./lldb-test-build.noindex/functionalities/unwind/noreturn/TestNoreturnUnwind.test_dwarf/a.out -o 'settings set symbols.enable-external-lookup false' -o r -o bt -o quit
* frame #0: 0x00007ffff7aa6e75 libc.so.6`.annobin_raise.c + 325
frame #1: 0x00007ffff7a91895 libc.so.6`.annobin_loadmsgcat.c_end.unlikely + 295
frame #2: 0x0000000000401140 a.out`func_c at main.c:12:2
frame #3: 0x000000000040113a a.out`func_b at main.c:18:2
frame #4: 0x0000000000401134 a.out`func_a at main.c:26:2
frame #5: 0x000000000040112e a.out`main(argc=<unavailable>, argv=<unavailable>) at main.c:32:2
frame #6: 0x00007ffff7a92f33 libc.so.6`.annobin_libc_start.c + 243
frame #7: 0x000000000040106e a.out`.annobin_init.c.hot + 46
The extra ELF symbols are there due to Annobin (I did not investigate why this problem happened specifically since F-30 and not since F-28).
It is due to:
Symbol table '.dynsym' contains 2361 entries:
Valu e Size Type Bind Vis Name
0000000000022769 5 FUNC LOCAL DEFAULT _nl_load_domain.cold
000000000002276e 0 NOTYPE LOCAL HIDDEN .annobin_abort.c.unlikely
...
000000000002276e 0 NOTYPE LOCAL HIDDEN .annobin_loadmsgcat.c_end.unlikely
...
000000000002276e 0 NOTYPE LOCAL HIDDEN .annobin_textdomain.c_end.unlikely
000000000002276e 548 FUNC GLOBAL DEFAULT abort
000000000002276e 548 FUNC GLOBAL DEFAULT abort@@GLIBC_2.2.5
000000000002276e 548 FUNC LOCAL DEFAULT __GI_abort
0000000000022992 0 NOTYPE LOCAL HIDDEN .annobin_abort.c_end.unlikely
Differential Revision: https://reviews.llvm.org/D63540
llvm-svn: 364773
Roman Lebedev [Mon, 1 Jul 2019 14:28:24 +0000 (14:28 +0000)]
[NFC][InstCombine] Better commutative tests for "shift amount reassociation in bittest" pattern.
As discussed in https://reviews.llvm.org/D63829
*if* *both* shifts are one-use, we'd most likely want to produce `lshr`,
and not rely on ordering.
Also, there should likely be a *separate* fold to do this reordering.
llvm-svn: 364772
Gabor Marton [Mon, 1 Jul 2019 14:19:53 +0000 (14:19 +0000)]
[ASTImporter] Mark erroneous nodes in from ctx
Summary:
During import of a specific Decl D, it may happen that some AST nodes
had already been created before we recognize an error. In this case we
signal back the error to the caller, but the "to" context remains
polluted with those nodes which had been created. Ideally, those nodes
should not had been created, but that time we did not know about the
error, the error happened later. Since the AST is immutable (most of
the cases we can't remove existing nodes) we choose to mark these nodes
as erroneous.
Here are the steps of the algorithm:
1) We keep track of the nodes which we visit during the import of D: See
ImportPathTy.
2) If a Decl is already imported and it is already on the import path
(we have a cycle) then we copy/store the relevant part of the import
path. We store these cycles for each Decl.
3) When we recognize an error during the import of D then we set up this
error to all Decls in the stored cycles for D and we clear the stored
cycles.
Reviewers: a_sidorin, a.sidorin, shafik
Subscribers: rnkovacs, dkrupp, Szelethus, gamesh411, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D62375
llvm-svn: 364771
Krzysztof Parzyszek [Mon, 1 Jul 2019 13:50:47 +0000 (13:50 +0000)]
[Hexagon] Rework VLCR algorithm
Add code to catch pattern for commutative instructions for VLCR.
Patch by Suyog Sarda.
llvm-svn: 364770
Matt Arsenault [Mon, 1 Jul 2019 13:44:46 +0000 (13:44 +0000)]
AMDGPU: Convert some places to Register
llvm-svn: 364769
Matt Arsenault [Mon, 1 Jul 2019 13:40:18 +0000 (13:40 +0000)]
AMDGPU/GlobalISel: Fix RegBankSelect for G_FCANONICALIZE
llvm-svn: 364768
Matt Arsenault [Mon, 1 Jul 2019 13:40:17 +0000 (13:40 +0000)]
AMDGPU/GlobalISel: Fix RegBankSelect for G_BUILD_VECTOR
llvm-svn: 364767
Matt Arsenault [Mon, 1 Jul 2019 13:37:39 +0000 (13:37 +0000)]
AMDGPU/GlobalISel: Fail on store to 32-bit address space
llvm-svn: 364766
Matt Arsenault [Mon, 1 Jul 2019 13:34:26 +0000 (13:34 +0000)]
AMDGPU/GlobalISel: Improve icmp selection coverage.
Select s64 eq/ne scalar icmp.
llvm-svn: 364765
Roman Lebedev [Mon, 1 Jul 2019 13:31:06 +0000 (13:31 +0000)]
[NFC][InstCombine] Improve test coverage for ((~x) + y) + 1 -> y - x fold fold (PR42459)
So we indeed to have this fold, but only if +1 is not the last operation..
llvm-svn: 364764
Matt Arsenault [Mon, 1 Jul 2019 13:30:12 +0000 (13:30 +0000)]
AMDGPU/GlobalISel: RegBankSelect for WWM/WQM
llvm-svn: 364763
Matt Arsenault [Mon, 1 Jul 2019 13:30:09 +0000 (13:30 +0000)]
AMDGPU/GlobalISel: Use vcc reg bank for amdgcn.wqm.vote
llvm-svn: 364762
Matt Arsenault [Mon, 1 Jul 2019 13:22:07 +0000 (13:22 +0000)]
AMDGPU/GlobalISel: Fix scc->vcc copy handling
This was checking the size of the register with the value of the size,
which happens to be exec. Also fix assuming VCC is 64-bit to fix
wave32.
Also remove some untested handling for physical registers which is
skipped. This doesn't insert the V_CNDMASK_B32 if SCC is the physical
copy source. I'm not sure if this should be trying to handle this
special case instead of dealing with this in copyPhysReg.
llvm-svn: 364761
Matt Arsenault [Mon, 1 Jul 2019 13:22:06 +0000 (13:22 +0000)]
AMDGPU/GlobalISel: Use and instead of BFE with inline immediate
Zext from s1 is the only case where this should do anything with the
current legal extensions.
llvm-svn: 364760
Matt Arsenault [Mon, 1 Jul 2019 13:22:04 +0000 (13:22 +0000)]
GlobalISel: Add GINodeEquiv for min/max
llvm-svn: 364759
Matt Arsenault [Mon, 1 Jul 2019 13:22:00 +0000 (13:22 +0000)]
GlobalISel: Add DAG compat for G_FCANONICALIZE
llvm-svn: 364758
Simon Atanasyan [Mon, 1 Jul 2019 13:21:05 +0000 (13:21 +0000)]
[mips] Add missing schedinfo for MSA and ASE instructions
llvm-svn: 364757
Simon Atanasyan [Mon, 1 Jul 2019 13:20:56 +0000 (13:20 +0000)]
[mips] Add missing schedinfo for atomic instructions
llvm-svn: 364756
Simon Atanasyan [Mon, 1 Jul 2019 13:20:48 +0000 (13:20 +0000)]
[mips] Add missing schedinfo for ADJCALLSTACKDOWN, ADJCALLSTACKUP
llvm-svn: 364755
Pavel Labath [Mon, 1 Jul 2019 13:18:19 +0000 (13:18 +0000)]
Don't check the validity of newly contructed data buffers
A bunch of places were checking that DataBufferHeap::GetBytes returns a
non-null pointer right after constructing it. The only time when
GetBytes returns a null pointer is if it is empty (and I'm not sure that
even this is a good idea), but that is clearly not the case here, as the
buffer was constructed with a non-zero size just a couple of lines back.
llvm-svn: 364754
Pavel Labath [Mon, 1 Jul 2019 13:12:29 +0000 (13:12 +0000)]
@skipIfXmlSupportMissing TestRecognizeBreakpoint
llvm-svn: 364753
Gabor Marton [Mon, 1 Jul 2019 12:44:39 +0000 (12:44 +0000)]
[ASTImporter] Propagate error from ImportDeclContext
Summary:
During analysis of one project we failed to import one
CXXDestructorDecl. But since we did not propagate the error in
importDeclContext we had a CXXRecordDecl without a destructor. Then the
analyzer engine had a CallEvent where the nonexistent dtor was requested
(crash).
Solution is to propagate the errors we have during importing a
DeclContext.
Reviewers: a_sidorin, a.sidorin, shafik
Subscribers: rnkovacs, dkrupp, Szelethus, gamesh411, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D63603
llvm-svn: 364752
Pavel Labath [Mon, 1 Jul 2019 12:41:20 +0000 (12:41 +0000)]
Revert "Implement xfer:libraries-svr4:read packet"
D62502, together with D62503 have broken the builds which have XML
support enabled. Reverting D62503 (r364355) fixed that, but has broken
has left some of the tests introduced by D62502 broken more or less
nondeternimistically (it depended on whether the system happens to place
the library list near unreadable pages of memory). I attempted to make a
partial fix for this in r364748, but Jan Kratochvil pointed out that
this reintroduces the problem which reverting D62503 was trying to
solve.
So instead, I back out the whole thing so we can get back to a clean
slate that works for everyone. We can figure out a way forward from
there.
This reverts r364748, r363772 and r363707.
llvm-svn: 364751
Florian Hahn [Mon, 1 Jul 2019 12:36:44 +0000 (12:36 +0000)]
[AMDGPU] Call isLoopExiting for blocks in the loop.
isLoopExiting should only be called for blocks in the loop. A follow
up patch makes this requirement an assertion.
I've updated the usage here, to only match for actual exit blocks. Previously,
it would also match blocks not in the loop.
Reviewers: arsenm, nhaehnle
Reviewed By: nhaehnle
Differential Revision: https://reviews.llvm.org/D63980
llvm-svn: 364750
Roman Lebedev [Mon, 1 Jul 2019 12:22:06 +0000 (12:22 +0000)]
[NFC][InstCombine] Tests for ((~x) + y) + 1 -> y - x fold fold (PR42459)
To be noted, this pattern is not unhandled by instcombine per-se,
it is somehow does end up being folded when one runs opt -O3,
but not if it's just -instcombine. Regardless, that fold is
indirect, depends on some other folds, and is thus blind
when there are extra uses.
https://bugs.llvm.org/show_bug.cgi?id=42459
https://rise4fun.com/Alive/EPO0
llvm-svn: 364749
Pavel Labath [Mon, 1 Jul 2019 12:00:25 +0000 (12:00 +0000)]
Fix TestGdbRemoteLibrariesSvr4Support
D62502 had a bug (visible only with D62503 reverted), where it would
error out if attempting to read a string from memory and the memory page
after the string happened to be unmapped.
This fixes the problem by checking for whether ReadMemory read *any*
bytes, instead of checking whether it returned an error. A greater
question is whether ReadMemory should even return an error if it read at
least one byte, but I'm leaving that for a separate patch.
llvm-svn: 364748
Johan Vikstrom [Mon, 1 Jul 2019 11:49:01 +0000 (11:49 +0000)]
[clangd] No longer getting template instantiations from header files in Main AST.
Previous implementation to filter decls not in the main file did not
work in the case where a template was instantiated from a header in the
main file. It would than include that function/class in topLevelDecls.
Differential Revision: https://reviews.llvm.org/D63817
llvm-svn: 364747
Fangrui Song [Mon, 1 Jul 2019 11:41:07 +0000 (11:41 +0000)]
[RISCV] Add break; to the last switch case
As suggested by jrtc27 in the post-commit review of D60528.
llvm-svn: 364746
Simon Pilgrim [Mon, 1 Jul 2019 11:33:45 +0000 (11:33 +0000)]
[X86] CombineShuffleWithExtract - updated description comments. NFCI.
CombineShuffleWithExtract no longer requires that both shuffle ops are extract_subvectors, from the same type or from the same size.
llvm-svn: 364745
Pavel Labath [Mon, 1 Jul 2019 11:09:15 +0000 (11:09 +0000)]
Remove null checks of results of new expressions
operator new doesn't return a null pointer, even if one turns off
exceptions (it calls std::terminate instead). Therefore, all of this is
dead code.
llvm-svn: 364744
Benjamin Kramer [Mon, 1 Jul 2019 11:00:23 +0000 (11:00 +0000)]
[SelectionDAG] Do minnum->minimum at legalization time instead of building time
The SDAGBuilder behavior stems from the days when we didn't have fast
math flags available in SDAG. We do now and doing the transformation in
the legalizer has the advantage that it also works for vector types.
llvm-svn: 364743
Andrew Ng [Mon, 1 Jul 2019 10:58:20 +0000 (10:58 +0000)]
[benchmark] Disable CMake get_git_version
Disabled CMake get_git_version as it is meaningless for this in-tree
build, and hardcoded a null version.
Not using get_git_version avoids a refresh of the git index that is
executed by get_git_version. Refreshing the index can take a
considerable amount of time if the index needs to be refreshed
(particularly with the mono repo). This situation can arise when
building shared source on a host in VMs.
Differential Revision: https://reviews.llvm.org/D63925
llvm-svn: 364742
Sam McCall [Mon, 1 Jul 2019 10:13:03 +0000 (10:13 +0000)]
[clangd] Fix unused var from r364735
llvm-svn: 364741
Sam McCall [Mon, 1 Jul 2019 10:11:18 +0000 (10:11 +0000)]
[clangd] Make PreambleStatusCache handle filenames more carefully
Summary:
- when we hit the cache, the reported filename should be that of the
cache query, not that of the cache store. This matches behaviors of
common FSes, and avoids triggering difficult edge cases in
FileManager when files are being moved around concurrently.
- filename comparisons (both cache queries and == mainfile checks)
should fold away . and .. in paths. These can appear when relative
paths occur in compile_commands.json. (gn does this).
Reviewers: kadircet
Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D63931
llvm-svn: 364740
Roman Lebedev [Mon, 1 Jul 2019 09:57:53 +0000 (09:57 +0000)]
[NFC][InstCombine] Tests for x - ~(y) -> x + y + 1 fold (PR42457)
https://bugs.llvm.org/show_bug.cgi?id=42457
https://rise4fun.com/Alive/iFhE
llvm-svn: 364739
Roman Lebedev [Mon, 1 Jul 2019 09:41:43 +0000 (09:41 +0000)]
[InstCombine] Omit 'urem' where possible
This was added in D63390 / rL364286 to backend,
but it makes sense to also handle it in middle-end.
https://rise4fun.com/Alive/Zsln
llvm-svn: 364738
Roman Lebedev [Mon, 1 Jul 2019 09:41:27 +0000 (09:41 +0000)]
[NFC][InstCombine] Copy test for omit urem when possible from TargetLowering
Was added in D63390 / rL364286 to backend, but it makes sense to also handle it here.
https://rise4fun.com/Alive/Zsln
llvm-svn: 364737
Jeremy Morse [Mon, 1 Jul 2019 09:38:23 +0000 (09:38 +0000)]
[DebugInfo] Avoid adding too much indirection to pointer-valued variables
This patch addresses PR41675, where a stack-pointer variable is dereferenced
too many times by its location expression, presenting a value on the stack as
the pointer to the stack.
The difference between a stack *pointer* DBG_VALUE and one that refers to a
value on the stack, is currently the indirect flag. However the DWARF backend
will also try to guess whether something is a memory location or not, based
on whether there is any computation in the location expression. By simply
prepending the stack offset to existing expressions, we can accidentally
convert a register location into a memory location, which introduces a
suprise (and unintended) dereference.
The solution is to add DW_OP_stack_value whenever we add a DIExpression
computation to a stack *pointer*. It's an implicit location computed on the
expression stack, thus needs to be flagged as a stack_value.
For the edge case where the offset is zero and the location could be a register
location, DIExpression::prepend will still generate opcodes, and thus
DW_OP_stack_value must still be added.
Differential Revision: https://reviews.llvm.org/D63429
llvm-svn: 364736
Haojian Wu [Mon, 1 Jul 2019 09:26:48 +0000 (09:26 +0000)]
[clangd] Show better message when we rename macros.
Summary:
Previously, when we rename a macro, we get an error message of "there is
no symbol found".
This patch improves the message of this case (as we don't support macros).
Reviewers: sammccall
Subscribers: ilya-biryukov, MaskRay, jkorous, mgrang, arphaman, kadircet, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D63922
llvm-svn: 364735
Yevgeny Rouban [Mon, 1 Jul 2019 08:43:53 +0000 (08:43 +0000)]
[SimpleLoopUnswitch] Implement handling of prof branch_weights metadata for SwitchInst
Differential Revision: https://reviews.llvm.org/D60606
llvm-svn: 364734
Sam Parker [Mon, 1 Jul 2019 08:21:28 +0000 (08:21 +0000)]
[ARM] WLS/LE Code Generation
Backend changes to enable WLS/LE low-overhead loops for armv8.1-m:
1) Use TTI to communicate to the HardwareLoop pass that we should try
to generate intrinsics that guard the loop entry, as well as setting
the loop trip count.
2) Lower the BRCOND that uses said intrinsic to an Arm specific node:
ARMWLS.
3) ISelDAGToDAG the node to a new pseudo instruction:
t2WhileLoopStart.
4) Add support in ArmLowOverheadLoops to handle the new pseudo
instruction.
Differential Revision: https://reviews.llvm.org/D63816
llvm-svn: 364733
Billy Robert O'Neal III [Mon, 1 Jul 2019 08:09:02 +0000 (08:09 +0000)]
[libcxx] [test] Add void cast to result of compare_exchange_weak to suppress [[nodiscard]].
llvm-svn: 364732
Haojian Wu [Mon, 1 Jul 2019 08:05:53 +0000 (08:05 +0000)]
[clangd] Make FixIt message be consistent with the clang-tidy diagnostic message.
Summary:
We strip the "[clang-tidy-check]" suffix from the clang-tidy diagnostics, we
should be consistent with the message in FixIt (strip the suffix as well).
Reviewers: sammccall
Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, kadircet, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D63926
llvm-svn: 364731
Craig Topper [Mon, 1 Jul 2019 07:59:42 +0000 (07:59 +0000)]
[X86] Add more load folding tests for vcvt(t)ps2(u)qq showing missed foldings. NFC
llvm-svn: 364730
Craig Topper [Mon, 1 Jul 2019 07:09:34 +0000 (07:09 +0000)]
[X86] Improve the type checking fast-isel handling of vector bitcasts.
We had a bunch of vector size legality checks for the source type
based on feature flags, but we didn't check the destination type at
all beyond ensuring that it was a "simple" type. But this allowed
the destination to be i128 which isn't legal.
This commit changes the code to use TLI's isTypeLegal logic in
place of the all the subtarget checks. Then additionally checks
that the source and dest are vectors.
Fixes 42452
llvm-svn: 364729
Craig Topper [Mon, 1 Jul 2019 07:09:31 +0000 (07:09 +0000)]
[X86] Add a DAG combine to replace vector loads feeding a v4i32->v2f64 CVTSI2FP/CVTUI2FP node with a vzload.
But only when the load isn't volatile.
This improves load folding during isel where we only have vzload
and scalar_to_vector+load patterns. We can't have full vector load
isel patterns for the same volatile load issue.
Also add some missing masked cvtsi2fp/cvtui2fp with vzload patterns.
llvm-svn: 364728
Craig Topper [Mon, 1 Jul 2019 07:09:26 +0000 (07:09 +0000)]
[X86] Add some additional load folding tests to vec_int_to_fp.ll/vec_int_to_fp-widen.ll and disable the peephole pass.
Also copy some missing test cases from vec_int_to_fp.ll to vec_int_to_fp-widen.ll
llvm-svn: 364727
Craig Topper [Mon, 1 Jul 2019 07:09:23 +0000 (07:09 +0000)]
[X86] Add MOVHPDrm/MOVLPDrm patterns that use VZEXT_LOAD.
We already had patterns that used scalar_to_vector+load. But we can
also have a vzload.
Found while investigating combining scalar_to_vector+load to vzload.
llvm-svn: 364726
Mike Spertus [Sun, 30 Jun 2019 22:04:25 +0000 (22:04 +0000)]
Various tweaks to MSVC natvis visualizers
Make more consistent use of na format.
Improve visualization of deduction guides.
Add visualizer for explicit specifier (including conditionally explicit)
Fix some typos
llvm-svn: 364724
Mike Spertus [Sun, 30 Jun 2019 21:54:34 +0000 (21:54 +0000)]
Clean up MSVC visualization of LLVM pointer types
Create separate natvis ptr and int views for PointerIntPair.
These are convenient in watch Windows and will be used by
Clang visualizers to be checked in shortly
Also, removed deref views as the MSVC na format has
done the same thing natively since MSVC2013.
llvm-svn: 364723
Jonas Devlieghere [Sun, 30 Jun 2019 19:00:09 +0000 (19:00 +0000)]
Revert "[GDBRemote] Remove code that flushes GDB remote packets"
Reverting this again as it doesn't appear to solve the flakiness on the
LLDB standalone bot.
llvm-svn: 364722
Sanjay Patel [Sun, 30 Jun 2019 13:40:31 +0000 (13:40 +0000)]
[InstCombine] canonicalize fcmp+select to minnum/maxnum intrinsics
This is the opposite direction of D62158 (we have to choose 1 form or the other).
Now that we have FMF on the select, this becomes more palatable. And the benefits
of having a single IR instruction for this operation (less chances of missing folds
based on extra uses, etc) overcome my previous comments about the potential advantage
of larger pattern matching/analysis.
Differential Revision: https://reviews.llvm.org/D62414
llvm-svn: 364721
Fangrui Song [Sun, 30 Jun 2019 11:19:56 +0000 (11:19 +0000)]
Cleanup: llvm::bsearch -> llvm::partition_point after r364719
llvm-svn: 364720
Fangrui Song [Sun, 30 Jun 2019 09:17:59 +0000 (09:17 +0000)]
[ADT] Implement llvm::bsearch() with std::partition_point()
Summary:
Delete the begin-end form because the standard std::partition_point
can be easily used as a replacement.
The ranges-style llvm::bsearch will be renamed to llvm::partition_point
in the next clean-up patch.
The name "bsearch" doesn't meet people's expectation because in C:
> If two or more members compare equal, which member is returned is unspecified.
Reviewed By: sammccall
Differential Revision: https://reviews.llvm.org/D63718
llvm-svn: 364719