Samuel Thibault [Tue, 27 Apr 2021 20:19:17 +0000 (13:19 -0700)]
hurd: Clean up test
- Unsupported Windows to drop backslashes code
- Upgrade to current gcc 10 version
Reviewed By: MaskRay
Differential Revision: https://reviews.llvm.org/D101347
Arthur Eubanks [Tue, 27 Apr 2021 20:06:32 +0000 (13:06 -0700)]
[test] Fix some func-attrs tests under the legacy PM
The new PM doesn't visit declarations in CGSCC passes. These tests
aren't testing that detail, so just run them against the new PM.
Samuel Thibault [Tue, 27 Apr 2021 20:04:41 +0000 (13:04 -0700)]
hurd: Detect libstdc++ include paths on Debian Hurd i386
This is a follow-up of
e92d2b80c6c9 ("[Driver] Detect libstdc++ include
paths for native gcc (-m32 and -m64) on Debian i386") for the Debian Hurd
case, which has the same multiarch name reduction from i686 to i386.
i386-linux-gnu is actually Linux-only, so this moves the code of that commit
to Linux.cpp, and adds the same to Hurd.cpp
Reviewed By: MaskRay
Differential Revision: https://reviews.llvm.org/D101331
Peter Steinfeld [Mon, 26 Apr 2021 22:20:22 +0000 (15:20 -0700)]
[flang] Handle structure constructors with forward references to PDTs
We were not correctly handling structure constructors that had forward
references to parameterized derived types. I harvested the code that checks
for forward references that was used during analysis of function call
expressions and called it from there and also called it during the
analysis of structure constructors.
I also added a test that will produce an internal error without this change.
Differential Revision: https://reviews.llvm.org/D101330
Samuel Thibault [Tue, 27 Apr 2021 19:41:18 +0000 (12:41 -0700)]
hurd: Fix i386 research path
f26341840253 ("[Driver] Gnu.cpp: remove obsoleted i386 triple detection
from end-of-life distribution versions") dropped the i686-gnu gcc path, but
GNU/Hurd's gcc is actually using it, and not i386.
This fixes the gcc path and update the tests to reflect it.
Reviewed By: MaskRay
Differential Revision: https://reviews.llvm.org/D101317
Evgenii Stepanov [Tue, 27 Apr 2021 19:31:34 +0000 (12:31 -0700)]
Revert "tsan: fix deadlock in pthread_atfork callbacks"
Tests fail on debug builders. See the forward fix in
https://reviews.llvm.org/D101385.
This reverts commit
efd254b63621de9ce750eddf9e8135154099d261.
Sanjay Patel [Tue, 27 Apr 2021 19:14:29 +0000 (15:14 -0400)]
[InstCombine] fold clamp to 2 values from min/max intrinsics
The "select" versions of these folds is also missing and can
cause infinite loops as shown in:
https://llvm.org/PR48900
...but it seems easier to match these as max/min as a first fix.
https://alive2.llvm.org/ce/z/wv-_dT
Sanjay Patel [Tue, 27 Apr 2021 18:43:09 +0000 (14:43 -0400)]
[InstCombine] add tests for clamp patterns using min/max intrinsics; NFC
Andy Kaylor [Tue, 27 Apr 2021 19:15:26 +0000 (12:15 -0700)]
[Dependence Analysis] Fix ExactSIV producing wrong analysis
Patch by Artem Radzikhovskyy!
Symptom: ExactSIV test produced incorrect analysis of dependencies see LIT tests
Bug: At the end of the algorithm when determining dependence direction original author forgot to divide intermediate results by gcd and round result toward zero
Although this bug can be fixed with significantly fewer changes I opted to write the code in such a way that reflects the original algorithm that Banerjee proposed, for easier reference in the future. This surprisingly results in shorter code, and fewer quotient and max/min calculations.
Changes Summary:
- fixed findGCD to return valid x and y so that they match the function description where: ax - by = gcd(a,b)
- Fixed ExactSIV test, to produce proper results
- Documented the extension of Banerjee's algorithm that the original code author introduced. Banerjee's original algorithm only tested whether Dst depends on Src, the extension also allows us to test whether Src depends on Dst, in one pass.
- ExactRDIV test worked fine. Since it uses findGCD(), it needed to be updated.Since ExactRDIV test has very few changes from the core algorithm of ExactSIV I modified the test to have consistent format as ExactSIV.
- Updated the LIT tests to be testing for correct values.
Differential Revision: https://reviews.llvm.org/D100331
Jay Foad [Tue, 27 Apr 2021 16:03:22 +0000 (17:03 +0100)]
[AMDGPU] GCNHazardRecognizer: ignore all meta instructions
This is hopefully NFC, but should be more robust in ignoring all
instructions that should be ignored, instead of just some of them.
Differential Revision: https://reviews.llvm.org/D101372
Evgenii Stepanov [Tue, 27 Apr 2021 19:06:21 +0000 (12:06 -0700)]
Fix -Wunused-but-set-variable warning in msan_test.cpp
Roman Lebedev [Tue, 27 Apr 2021 18:28:53 +0000 (21:28 +0300)]
[NFC][SimplifyCFG] Autogenerate check lines in many test files
These are potentially being affected by an upcoming patch.
David Green [Tue, 27 Apr 2021 18:33:24 +0000 (19:33 +0100)]
[ARM] Recognize VIDUP from BUILDVECTORs of additions
This adds a pattern to recognize VIDUP from BUILD_VECTOR of incrementing
adds. This can come up from either geps or adds, and came up recently in
D100550. We are just looking for a BUILD_VECTOR where each lane is an
add of the first lane with N*i, where i is the lane and N is one of 1,
2, 4, or 8, supported by the VIDUP instruction.
Differential Revision: https://reviews.llvm.org/D101263
David Green [Tue, 27 Apr 2021 08:37:31 +0000 (09:37 +0100)]
[ARM] Additional VIDUP tests. NFC
Alexey Bataev [Wed, 21 Apr 2021 16:59:58 +0000 (09:59 -0700)]
[COST][X86]Improve cost model for reverse shuffle v32i16/v64i8 in AVX512F.
Improved cost model for reverse shuffle on AVX512F for types
v32i16/v64i8.
Differential Revision: https://reviews.llvm.org/D100974
Roman Lebedev [Tue, 27 Apr 2021 18:09:20 +0000 (21:09 +0300)]
[NFC][Verifier] Fixup token PHINode test cases
It would still pass in non-assert build,
but with asserts it would now crash.
I haven't checked, but hopefully `not`'s `--crash` argument
should be enough to support both paths.
Jessica Clarke [Tue, 27 Apr 2021 18:03:57 +0000 (19:03 +0100)]
[ELF][MIPS] Emit dynamic relocations for PIC non-preemptible static TLS
This is the same problem as
127176e59eb9, but for static TLS rather than
dynamic TLS. Although we know the symbol will be the one in our own TLS
segment, and thus the offset of it within that, we don't know where in
the static TLS block our data will be allocated and thus we must emit a
dynamic relocation for this case.
Reviewed By: MaskRay, atanasyan
Differential Revision: https://reviews.llvm.org/D101381
Jessica Clarke [Tue, 27 Apr 2021 17:57:47 +0000 (18:57 +0100)]
[ELF][MIPS] Don't emit dynamic relocations for PIE non-preemptible TLS
Whilst not wrong (unless using static PIE where the relocations are
likely not implemented by the runtime), this is inefficient, as the TLS
module indices and offsets are independent of the executable's load
address.
Reviewed By: MaskRay, atanasyan
Differential Revision: https://reviews.llvm.org/D101382
Ahmed Bougacha [Tue, 20 Apr 2021 15:59:51 +0000 (08:59 -0700)]
[docs] Replace Apple representative to security group.
Differential Revision: https://reviews.llvm.org/D100864
Roman Lebedev [Tue, 27 Apr 2021 17:52:44 +0000 (20:52 +0300)]
[NFC][IR] PHINode: ... and assert in another ctor too
Roman Lebedev [Tue, 27 Apr 2021 17:40:15 +0000 (20:40 +0300)]
[NFC][IR] PHINode: assert we aren't trying to create token-typed PHI
Verifier will complain, but by then it may be too late,
because we might have never reached it because
we already crashed with some bogus bug.
It is best to catch this the moment it happens.
Anirudh Prasad [Tue, 27 Apr 2021 17:37:16 +0000 (13:37 -0400)]
[SystemZ][z/OS] Remove register prefixes when printing out the register.
- This patch is the first part in enforcing prefix-less registers for the HLASM dialect in z/OS
- This patch removes the "%[r|f|v]" prefix while printing registers
- To achieve this, the `AssemblerDialect` field of MAI was used
- There is also a bit of refactoring done to ensure code repetition is reduced.
- Currently the LLVM assembler for SystemZ/z/OS accepts both prefixed registers and prefix-less registers. A subsequent follow-up patch will restrict the SystemZAsmParser to only accept prefix-less registers.
Crediting @kianm as an author as well.
Reviewed By: uweigand, abhina.sreeskantharajan
Differential Revision: https://reviews.llvm.org/D101308
Craig Topper [Tue, 27 Apr 2021 16:21:28 +0000 (09:21 -0700)]
[TableGen] Add predicate checks to isel patterns for default HwMode.
As discussed in D100691 and based on D100889.
I removed the ModeChecks cache which provides little value. Reduced
from three loops to two. Used ArrayRef to pass the Predicate to
AppendPattern to avoid needing to construct a vector for single
mode. Used SmallVector to avoid heap allocation constructing
DefaultCheck for the in tree targets the use it.
Reviewed By: kparzysz
Differential Revision: https://reviews.llvm.org/D101240
Vitaly Buka [Tue, 27 Apr 2021 17:45:53 +0000 (10:45 -0700)]
[NFC][lsan] Another attempt to fix arm bot
Adrian Prantl [Tue, 27 Apr 2021 17:38:51 +0000 (10:38 -0700)]
Also display the underlying error message when displaying a fixit
When the user running LLDB with default settings sees the fixit
notification it means that the auto-applied fixit didn't work. This
patch shows the underlying error message instead of just the fixit to
make it easier to understand what the error in the expression was.
Differential Revision: https://reviews.llvm.org/D101333
Michał Górny [Sat, 24 Apr 2021 20:36:20 +0000 (22:36 +0200)]
[lldb] [gdb-remote] Report QPassSignals and qXfer via extensions API
Remove hardcoded platform list for QPassSignals, qXfer:auxv:read
and qXfer:libraries-svr4:read and instead query the process plugin
via the GetSupportedExtensions() API.
Differential Revision: https://reviews.llvm.org/D101241
Petr Hosek [Tue, 27 Apr 2021 09:15:37 +0000 (02:15 -0700)]
[Driver] Fix tests failing in per-target multiarch layout
These failures were revealed by
b4537c3f51bc6c011ddd9c10b80043ac4ce16a01.
Differential Revision: https://reviews.llvm.org/D101348
Nick Desaulniers [Tue, 27 Apr 2021 16:58:42 +0000 (09:58 -0700)]
[CodeGenOptions] make StackProtectorGuardOffset signed
GCC supports negative values for -mstack-protector-guard-offset=, this
should be a signed value. Pre-req to D100919.
Reviewed By: MaskRay
Differential Revision: https://reviews.llvm.org/D101325
LLVM GN Syncbot [Tue, 27 Apr 2021 16:56:33 +0000 (16:56 +0000)]
[gn build] Port
241c2da4064c
Victor Huang [Thu, 22 Apr 2021 16:00:28 +0000 (11:00 -0500)]
[AIX][Power10] Restrict prefixed instructions from crossing the 64byte boundary
This patch adds the support to restrict prefixed instruction from
crossing the 64 byte boundary:
- Add the infrastructure to register a custom XCOFF streamer
- Add a custom XCOFF streamer for PowerPC to allow us to
intercept instructions as they are being emitted and align all 8 byte
instructions to a 64 byte boundary if required by adding a 4 byte nop.
Reviewed By: stefanp
Differential Revision: https://reviews.llvm.org/D101107
Nico Weber [Tue, 27 Apr 2021 16:31:09 +0000 (12:31 -0400)]
[llvm, clang] Remove stdlib includes from .h files without `std::`
Found files not containing `std::` with:
INCL="algorithm|array|list|map|memory|queue|set|string|utility|vector|unordered_map|unordered_set"
git ls-files llvm/include/llvm | grep '\.h$' | xargs grep -L std:: | \
xargs grep -El "#include <($INCL)>$" > to_process.txt
git ls-files clang/include/clang | grep '\.h$' | xargs grep -L std:: | \
xargs grep -El "#include <($INCL)>$" >> to_process.txt
Then removed these headers from those files with
INCL_ESCAPED="$(echo $INCL|sed 's/|/\\|/g')"
cat to_process.txt | xargs sed -i "/^#include <\($INCL_ESCAPED\)>$/d"
cat to_process.txt | xargs sed -i '/^$/N;/^\n$/D'
No behavior change.
Differential Revision: https://reviews.llvm.org/D101378
Christian Kühnel [Wed, 21 Apr 2021 09:33:44 +0000 (11:33 +0200)]
[doc] added documentation for pre-merge testing
fixes https://github.com/google/llvm-premerge-checks/issues/275
Differential Revision: https://reviews.llvm.org/D100936
David Sherwood [Tue, 27 Apr 2021 14:46:03 +0000 (15:46 +0100)]
Revert "[LoopVectorize] Simplify scalar cost calculation in getInstructionCost"
This reverts commit
4afeda9157cffd2daa83f8075d73f1e11ea34c81.
Asher Mancinelli [Mon, 19 Apr 2021 14:33:25 +0000 (07:33 -0700)]
[flang] Add format test to GTest suite
Reviewed by: awarzynski
Differential Revision: https://reviews.llvm.org/D100765
Simon Pilgrim [Tue, 27 Apr 2021 14:39:06 +0000 (15:39 +0100)]
Revert rG9b7a0a50355d5 - Revert "[X86] Add support for reusing ZF etc. from locked XADD instructions (PR20841)"
Still causing some sanitizer buildbot failures.
David Sherwood [Wed, 10 Mar 2021 08:34:19 +0000 (08:34 +0000)]
[LoopVectorize] Simplify scalar cost calculation in getInstructionCost
This patch simplifies the calculation of certain costs in
getInstructionCost when isScalarAfterVectorization() returns a true value.
There are a few places where we multiply a cost by a number N, i.e.
unsigned N = isScalarAfterVectorization(I, VF) ? VF.getKnownMinValue() : 1;
return N * TTI.getArithmeticInstrCost(...
After some investigation it seems that there are only these cases that occur
in practice:
1. VF is a scalar, in which case N = 1.
2. VF is a vector. We can only get here if: a) the instruction is a
GEP/bitcast/PHI with scalar uses, or b) this is an update to an induction
variable that remains scalar.
I have changed the code so that N is assumed to always be 1. For GEPs
the cost is always 0, since this is calculated later on as part of the
load/store cost. PHI nodes are costed separately and were never previously
multiplied by VF. For all other cases I have added an assert that none of
the users needs scalarising, which didn't fire in any unit tests.
Only one test required fixing and I believe the original cost for the scalar
add instruction to have been wrong, since only one copy remains after
vectorisation.
I have also added a new test for the case when a pointer PHI feeds directly
into a store that will be scalarised as we were previously never testing it.
Differential Revision: https://reviews.llvm.org/D99718
David Goldman [Fri, 19 Mar 2021 20:23:15 +0000 (16:23 -0400)]
[clangd] Improve handling of Objective-C protocols in types
Improve support for Objective-C protocols for types/type locs
Differential Revision: https://reviews.llvm.org/D98984
Martin Storsjö [Tue, 6 Apr 2021 08:37:52 +0000 (11:37 +0300)]
[libcxx] [test] Convert a couple of LIBCXX-WINDOWS-FIXME into XFAIL: windows-dll for known bugs
These are caused due to inconsistencies regarding always inline in
combination with dllimport. A bug report reference is added next to
each XFAIL line.
Differential Revision: https://reviews.llvm.org/D100789
Martin Storsjö [Tue, 6 Apr 2021 07:44:52 +0000 (10:44 +0300)]
[libcxx] [test] Add a separate 'windows-dll' feature to check for
This allows distinguishing failures in tests that only fail when libcxx
is linked as a DLL, allowing narrowing down XFAILs (avoiding XPASS errors
if not built as a DLL).
If both enable_shared and enable_static are set, the tests link and use
the shared version of the lib.
Differential Revision: https://reviews.llvm.org/D100221
David Goldman [Mon, 26 Apr 2021 21:58:35 +0000 (17:58 -0400)]
[clangd] run clang-format on FindTargetTests.cpp's FindExplicitReferencesTest
Addressing comments in https://reviews.llvm.org/D98984
Differential Revision: https://reviews.llvm.org/D101328
Yaxun (Sam) Liu [Tue, 27 Apr 2021 13:35:20 +0000 (09:35 -0400)]
[HIP] Fix help text for -fgpu-allow-device-init
Add 'experimental' to help text.
Simon Pilgrim [Tue, 27 Apr 2021 14:00:57 +0000 (15:00 +0100)]
[X86] Add support for reusing ZF etc. from locked XADD instructions (PR20841)
XADD has the same EFLAGS behaviour as ADD
Reapplies rG2149aa73f640 (after it was reverted at rG535df472b042) - AFAICT rG029e41ec9800 should ensure we correctly tag the LXADD* ops as load/stores - I haven't been able to repro the sanitizer buildbot fails locally so this is a speculative commit.
Joachim Protze [Tue, 27 Apr 2021 13:50:53 +0000 (15:50 +0200)]
[OpenMP][libomptarget] Separate lit tests for different offloading targets (2/2)
This patch fuses the RUN lines for most libomptarget tests. The previous patch
D101315 created separate test targets for each supported offloading triple.
This patch updates the RUN lines in libomptarget tests to use a generic run
line independent of the offloading target selected for the lit instance.
In cases, where no RUN line was defined for a specific offloading target,
the corresponding target is declared as XFAIL. If it turns out that a test
actually supports the target, the XFAIL line can be removed.
Differential Revision: https://reviews.llvm.org/D101326
Gabor Marton [Tue, 27 Apr 2021 12:57:12 +0000 (14:57 +0200)]
[analyzer][StdLibraryFunctionsChecker] Track dependent arguments
When we report an argument constraint violation, we should track those
other arguments that participate in the evaluation of the violation. By
default, we depend only on the argument that is constrained, however,
there are some special cases like the buffer size constraint that might
be encoded in another argument(s).
Differential Revision: https://reviews.llvm.org/D101358
Jay Foad [Tue, 27 Apr 2021 13:03:42 +0000 (14:03 +0100)]
[AMDGPU] Minor refactoring in AMDGPUUnifyDivergentExitNodes. NFC.
Make unifyReturnBlockSet a member function so we don't have to pass TTI
around as an argument.
Simon Pilgrim [Tue, 27 Apr 2021 13:11:05 +0000 (14:11 +0100)]
[X86] Ensure multiclass ATOMIC_RMW_BINOP is tagged as MayLoad and MayStore
These are RMW ops and should be tagged as both loads and stores.
Frederik Gossen [Tue, 27 Apr 2021 13:02:47 +0000 (15:02 +0200)]
[MLIR] Debug log IR after pattern applications
Like `print-ir-after-all` and `-before-all`, this allows to inspect IR for
debug purposes. While the former allow to inspect only between passes, this
change allows to follow the rewrites that happen within passes.
Differential Revision: https://reviews.llvm.org/D100940
Alexey Bataev [Fri, 23 Apr 2021 19:33:41 +0000 (12:33 -0700)]
[SLP]Improved isGatherShuffledEntry, NFC.
Reworked isGatherShuffledEntry function, simplified and moved
common code to the lambda (it shall go away when non-power-2 patch will
be landed).
Frederik Gossen [Tue, 27 Apr 2021 12:50:52 +0000 (14:50 +0200)]
[MLIR][Shape] Remove empty extent tensor operands
Empty extent tensor operands were only removed when they were defined as a
constant. Additionally, we can remove them if they are known to be empty by
their type `tensor<0xindex>`.
Differential Revision: https://reviews.llvm.org/D101351
Florian Hahn [Mon, 26 Apr 2021 12:18:34 +0000 (13:18 +0100)]
[LV,LAA] Add test cases with pointer phis in loops.
Pre-commits tests for D101286.
Frederik Gossen [Tue, 27 Apr 2021 12:47:39 +0000 (14:47 +0200)]
[MLIR][Shape] Replace single operand broadcasts with appropriate cast
Differential Revision: https://reviews.llvm.org/D101350
Petar Avramovic [Tue, 27 Apr 2021 12:44:59 +0000 (14:44 +0200)]
AMDGPU/GlobalISel: Fix negative offset folding for buffer_load
Buffer_load does unsigned offset calculations. Don't fold
operands of 32-bit add that are likely to cause unsigned add
overflow (common case is when one of the operands is negative).
Differential Revision: https://reviews.llvm.org/D91336
Petar Avramovic [Tue, 27 Apr 2021 12:40:26 +0000 (14:40 +0200)]
AMDGPU/GlobalISel: Add test for buffer_load with negative offset
Pre-commit test for D91336.
Florian Hahn [Tue, 27 Apr 2021 12:28:27 +0000 (13:28 +0100)]
[LV] Hoist code to get vector loop latch (NFC).
Address suggestion from D99294.
Sanjay Patel [Tue, 27 Apr 2021 12:02:44 +0000 (08:02 -0400)]
[IndVars] avoid crash in LFTR when assuming an add recurrence
The test is a crasher reduced from:
https://llvm.org/PR49993
linearFunctionTestReplace() assumes that we have an add recurrence,
so check for that as a condition of matching a loop counter.
Differential Revision: https://reviews.llvm.org/D101291
Nicholas Guy [Thu, 4 Mar 2021 14:36:13 +0000 (14:36 +0000)]
[AArch64] Enable runtime unrolling for in-order sched models
Differential Revision: https://reviews.llvm.org/D97947
Anastasia Stulova [Tue, 27 Apr 2021 10:03:26 +0000 (11:03 +0100)]
[C++4OpenCL] Add diagnostics for OpenCL types in templates.
Refactored diagnostics for OpenCL types to allow their
reuse for templates.
Patch by olestrohm (Ole Strohm)!
Differential Revision: https://reviews.llvm.org/D100860
Florian Hahn [Tue, 27 Apr 2021 11:21:27 +0000 (12:21 +0100)]
[VPlan] Use recursive traversal iterator in VPSlotTracker.
This patch simplifies VPSlotTracker by using the recursive traversal
iterator to traverse all blocks in a VPlan in reverse post-order when
numbering VPValues in a plan.
This depends on a fix to RPOT (D100169). It also extends the traversal
unit tests to check RPOT.
Reviewed By: a.elovikov
Differential Revision: https://reviews.llvm.org/D100176
Zarko Todorovski [Mon, 26 Apr 2021 14:50:16 +0000 (10:50 -0400)]
[AIX] Allow safe for 32bit P9 VSX extract and insert pattern matches
In https://reviews.llvm.org/D92789 PPC64 checks were added that disallowed most
VSX pattern matching. We enable some safe ones for 32bit in this patch.
Reviewed By: nemanjai
Differential Revision: https://reviews.llvm.org/D97503
Dmitry Vyukov [Fri, 23 Apr 2021 11:10:39 +0000 (13:10 +0200)]
tsan: fix deadlock in pthread_atfork callbacks
We take report/thread_registry locks around fork.
This means we cannot report any bugs in atfork handlers.
We resolved this by enabling per-thread ignores around fork.
This resolved some of the cases, but not all.
The added test triggers a race report from a signal handler
called from atfork callback, we reset per-thread ignores
around signal handlers, so we tried to report it and deadlocked.
But there are more cases: a signal handler can be called
synchronously if it's sent to itself. Or any other report
types would cause deadlocks as well: mutex misuse,
signal handler spoiling errno, etc.
Disable all reports for the duration of fork with
thr->suppress_reports and don't re-enable them around
signal handlers.
Reviewed By: vitalybuka
Differential Revision: https://reviews.llvm.org/D101154
Pushpinder Singh [Tue, 27 Apr 2021 10:47:05 +0000 (10:47 +0000)]
Reapply "[AMDGPU][OpenMP] Add amdgpu-arch tool to list AMD GPUs installed"
This reverts commit
93604305bb72201641f31cc50a6e7b2fe65d3af3.
Kadir Cetinkaya [Thu, 22 Apr 2021 14:08:48 +0000 (16:08 +0200)]
[clangd] Dont index deeply nested symbols
This is fix for some timeouts and OOM problems faced while indexing an
auto-generated file with thousands of nested lambdas.
Differential Revision: https://reviews.llvm.org/D101066
Alexander Belyaev [Tue, 27 Apr 2021 10:27:04 +0000 (12:27 +0200)]
[mlir] Add a pass to tile Linalg ops using `linalg.tiled_loop`.
Differential Revision: https://reviews.llvm.org/D101084
Joachim Protze [Tue, 27 Apr 2021 10:23:18 +0000 (12:23 +0200)]
[OpenMP][libomptarget] Separate lit tests for different offloading targets (1/2)
This patch creates a separate test directory for each offloading target to be
tested. This allows to test multiple architectures in one configuration, while
still see all failing tests separately. The lit test names include the target
triple, so that it will be easier to spot the failing target.
This patch also allows to mark expected failing tests based on the
target-triple, as the currently used triple is added to the lit "features":
```
// XFAIL: nvptx64-nvidia-cuda
```
Differential Revision: https://reviews.llvm.org/D101315
Petar Avramovic [Tue, 27 Apr 2021 10:21:57 +0000 (12:21 +0200)]
AMDGPU/GlobalISel: Remove redundant G_FCANONICALIZE
Add basic version of isCanonicalized for global-isel. Copied from sdag.
Add post legalizer combine that deletes G_FCANONICALIZE when its input
is already Canonicalized.
Differential Revision: https://reviews.llvm.org/D96605
Marek Kurdej [Tue, 27 Apr 2021 10:22:56 +0000 (12:22 +0200)]
[libc++] Fix set-but-not-used warning. NFC.
Sven van Haastregt [Tue, 27 Apr 2021 10:15:47 +0000 (11:15 +0100)]
[NFC] Workaround MSVC2019 32-bit compiler crash
As reported on D100492, this restructuring should stop the internal
compiler error from happening.
Fixes PR50128.
Petar Avramovic [Tue, 27 Apr 2021 09:51:22 +0000 (11:51 +0200)]
AMDGPU/GlobalISel: Add integer med3 combines
Add signed and unsigned integer version of med3 combine.
Source pattern is min(max(Val, K0), K1) or max(min(Val, K1), K0)
where K0 and K1 are constants and K0 <= K1. Destination is med3
that corresponds to signedness of min/max in source.
Differential Revision: https://reviews.llvm.org/D90050
David Zarzycki [Tue, 27 Apr 2021 09:44:17 +0000 (05:44 -0400)]
[llvm] Unbreak no-asserts testing after
18839be9c5c8b9f882dd241769784035b082d4e1
Petar Avramovic [Tue, 27 Apr 2021 09:37:42 +0000 (11:37 +0200)]
[MIPatternMatch]: Add matchers for binary instructions
Add matchers that support commutative and non-commutative binary opcodes.
Differential Revision: https://reviews.llvm.org/D99736
Petar Avramovic [Tue, 27 Apr 2021 09:08:16 +0000 (11:08 +0200)]
[MIPatternMatch]: Add mi_match for MachineInstr
This utility allows more efficient start of pattern match.
Often MachineInstr(MI) is available and instead of using
mi_match(MI.getOperand(0).getReg(), MRI, ...) followed by
MRI.getVRegDef(Reg) that gives back MI we now use
mi_match(MI, MRI, ...).
Differential Revision: https://reviews.llvm.org/D99735
Petar Avramovic [Tue, 27 Apr 2021 08:53:17 +0000 (10:53 +0200)]
[MIPatternMatch]: Add ICstRegMatch
Matches G_CONSTANT and returns its def register.
Differential Revision: https://reviews.llvm.org/D99734
Petar Avramovic [Tue, 27 Apr 2021 08:52:07 +0000 (10:52 +0200)]
[GlobalISel]: Add a getConstantIntVRegVal utility
Returns ConstantInt from G_CONSTANT instruction given its def register.
Differential Revision: https://reviews.llvm.org/D99733
Luo, Yuanke [Thu, 22 Apr 2021 12:51:46 +0000 (20:51 +0800)]
[X86][AMX] Add description for AMX new interface.
Differential Revision: https://reviews.llvm.org/D101059
David Sherwood [Fri, 16 Apr 2021 11:11:48 +0000 (12:11 +0100)]
[NFC][SVE] Add tests for inserting subvectors into illegal scalable vectors
A previous commit fixed some issues with inserting subvectors into
illegal scalable vectors:
0035decae7ab9ab1c988fdcede46598540afd1a0
I've created a patch that simply adds some of those same tests for SVE.
Differential Revision: https://reviews.llvm.org/D100641
Marek Kurdej [Tue, 27 Apr 2021 07:32:09 +0000 (09:32 +0200)]
[clang-format] Merge SpacesInAngles tests. NFC.
Marek Kurdej [Tue, 27 Apr 2021 07:10:58 +0000 (09:10 +0200)]
[clang-format] Reformat. NFC.
Frederik Gossen [Mon, 26 Apr 2021 15:37:15 +0000 (17:37 +0200)]
[MLIR][Linalg] Generalize splat constant folding
Splat constant folding was limited to `std.constant` operations. Instead, use
the constant matcher and apply splat constant folding to any constant-like
operation that holds a splat attribute.
Differential Revision: https://reviews.llvm.org/D101301
Petr Hosek [Tue, 27 Apr 2021 06:35:04 +0000 (23:35 -0700)]
[Fuchsia] Use correct target triple for ARM
The Debian multiarch triple is arm-linux-gnueabihf, but the target
is armv7-linux-gnueabihf because some builtins require armv7.
Mikael Holmen [Tue, 27 Apr 2021 04:26:27 +0000 (06:26 +0200)]
Only ignore -Wdeprecated-copy if the used compiler supports the warning
This is needed after
https://reviews.llvm.org/rG9658d045926545e62cc3f963fe611d7c5d0c9d98
which introduced code that at least didn't compile clean with clang 8.
Differential Revision: https://reviews.llvm.org/D101288
LLVM GN Syncbot [Tue, 27 Apr 2021 05:57:29 +0000 (05:57 +0000)]
[gn build] Port
51495fd2855c
Lang Hames [Tue, 27 Apr 2021 05:54:31 +0000 (22:54 -0700)]
[ORC] Temporarily remove the ORC C API test.
This should get the builders green again until I have time to look into the
outstanding failures.
dfukalov [Thu, 22 Apr 2021 09:41:01 +0000 (12:41 +0300)]
[TTI] NFC: Change getScalarizationOverhead and getOperandsScalarizationOverhead to return InstructionCost.
This patch migrates the TTI cost interfaces to return an InstructionCost.
See this patch for the introduction of the type: https://reviews.llvm.org/D91174
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2020-November/146408.html
Reviewed By: sdesmalen
Differential Revision: https://reviews.llvm.org/D101283
Lang Hames [Tue, 27 Apr 2021 05:30:09 +0000 (22:30 -0700)]
[ORC] Disable Orc C API test for armv8l targets.
The https://lab.llvm.org/buildbot/#/builders/107 builder is failing on this
testcase, but doesn't produce a helpful error message yet. Disabling for now
until I have time to dig in further.
Lang Hames [Tue, 27 Apr 2021 05:25:26 +0000 (22:25 -0700)]
[ORC] Make LLVMOrcLLJITBuilderSetJITTargetMachineBuilder consume as advertised.
This should fix some of the memory leaks seen in the ORC C API test case.
Lang Hames [Tue, 27 Apr 2021 05:13:08 +0000 (22:13 -0700)]
[ORC] Remove unused headers in C API test.
Petr Hosek [Thu, 22 Apr 2021 20:44:46 +0000 (13:44 -0700)]
[Driver] Push multiarch path setup to individual drivers
Different platforms use different rules for multiarch triples so
it's difficult to provide a single method for all platforms. We
instead move the getMultiarchTriple to the ToolChain class and let
individual platforms override it and provide their custom logic.
Differential Revision: https://reviews.llvm.org/D101194
Vitaly Buka [Tue, 27 Apr 2021 05:09:10 +0000 (22:09 -0700)]
[NFC] Fix "not used" warning
Alok Kumar Sharma [Sun, 25 Apr 2021 14:20:58 +0000 (19:50 +0530)]
[DebugInfo][llvm-dwarfdump] Fix printing of Unit header with DW_UT_partial type
llvm-dwarfdump crashed for Unit header with DW_UT_partial type.
-------------
llvm-dwarfdump: /tmp/llvm/include/llvm/ADT/Optional.h:197: T& llvm::optional_detail::OptionalStorage<T, true>::getValue() &
[with T = long unsigned int]: Assertion `hasVal' failed.
PLEASE submit a bug report to the technical support section of https://developer.amd.com/amd-aocc and include the crash backtrace.
Stack dump:
0. Program arguments: llvm-dwarfdump -v /tmp/test/DebugInfo/X86/Output/dwarfdump-he
ader.s.tmp.o
#0 0x00007f37d5ad8838 llvm::sys::PrintStackTrace(llvm::raw_ostream&, int) /tmp/llvm/lib/Support/Unix/Signals.inc:565:0
#1 0x00007f37d5ad88ef PrintStackTraceSignalHandler(void*) /tmp/llvm/lib/Support/Unix/Signals.inc:632:0
#2 0x00007f37d5ad65bd llvm::sys::RunSignalHandlers() /tmp/llvm/lib/Support/Signals.cpp:71:0
#3 0x00007f37d5ad81b9 SignalHandler(int) /tmp/llvm/lib/Support/Unix/Signals.inc:407:0
#4 0x00007f37d4c26040 (/lib/x86_64-linux-gnu/libc.so.6+0x3f040)
#5 0x00007f37d4c25fb7 raise /build/glibc-S9d2JN/glibc-2.27/signal/../sysdeps/unix/sysv/linux/raise.c:51:0
#6 0x00007f37d4c27921 abort /build/glibc-S9d2JN/glibc-2.27/stdlib/abort.c:81:0
#7 0x00007f37d4c1748a __assert_fail_base /build/glibc-S9d2JN/glibc-2.27/assert/assert.c:89:0
#8 0x00007f37d4c17502 (/lib/x86_64-linux-gnu/libc.so.6+0x30502)
#9 0x00007f37d7576b81 llvm::optional_detail::OptionalStorage<unsigned long, true>::getValue() & /tmp/llvm/include/llvm/ADT/Optional.h:198:0
#10 0x00007f37d75726ac llvm::Optional<unsigned long>::operator*() && /tmp/llvm/include/llvm/ADT/Optional.h:309:0
#11 0x00007f37d7582968 llvm::DWARFCompileUnit::dump(llvm::raw_ostream&, llvm::DIDumpOptions) /tmp/llvm/lib/DebugInfo/DWARF/DWARFCompileUnit.cpp:30:0
--------------
Patch by: @jini.susan
Reviewed By: @probinson
Differential Revision: https://reviews.llvm.org/D101255
Lang Hames [Tue, 27 Apr 2021 04:44:26 +0000 (21:44 -0700)]
[ORC] Fix more missing LLVMConsumeError calls.
Lang Hames [Tue, 27 Apr 2021 04:37:57 +0000 (21:37 -0700)]
[ORC] Record target triple in C API testcase, print it on failure.
This will simplify identification of unsupported triples when we see builder
failures in this test case.
Lang Hames [Tue, 27 Apr 2021 04:30:21 +0000 (21:30 -0700)]
[ORC] Add missing LLVMConsumeError calls.
LLVM GN Syncbot [Tue, 27 Apr 2021 04:24:09 +0000 (04:24 +0000)]
[gn build] Port
d122d80b3d1c
Jessica Clarke [Tue, 27 Apr 2021 04:22:50 +0000 (05:22 +0100)]
[ORC] Fix build after
1798f2289aaa
Chen Zheng [Mon, 26 Apr 2021 05:31:23 +0000 (01:31 -0400)]
[XCOFF] make .file directive have directory info
The .file directive is changed to only have basename in D36018 for
ELF.
But on AIX, we require the .file directive to also contain the
directory info. This aligns with other AIX compiler like XLC and is
required by some AIX tool like DBX.
Reviewed By: hubert.reinterpretcast
Differential Revision: https://reviews.llvm.org/D99785
Lang Hames [Tue, 27 Apr 2021 04:10:11 +0000 (21:10 -0700)]
[ORC] Initialize the native asm printer and parser in Orc C-API unit test.
Lang Hames [Mon, 26 Apr 2021 22:37:07 +0000 (15:37 -0700)]
Reapply "[ORC] Add unit tests for parts of the ..." with fixes and improvements.
This reapplies
8740360093b, which was reverted in
bbddadd46e4 due to buildbot
errors.
This version checks that a JIT instance can be safely constructed, skipping
tests if it can not be. To enable this it introduces new C API to retrieve and
set the target triple for a JITTargetMachineBuilder.
Vitaly Buka [Tue, 27 Apr 2021 03:06:34 +0000 (20:06 -0700)]
[asan][NFC] Fix "not used" warning in test
River Riddle [Tue, 27 Apr 2021 02:33:50 +0000 (19:33 -0700)]
[mlir] Refactor the forward dataflow propagation in SCCP into a generic framework
This revision takes the forward value propagation engine in SCCP and refactors it into a more generalized forward dataflow analysis framework. This framework allows for propagating information about values across the various control flow constructs in MLIR, and removes the need for users to reinvent the traversal (often not as completely). There are a few aspects of the traversal, that were conservative for SCCP, that should be relaxed to support the needs of different value analyses. To keep this revision simple, these conservative behaviors will be left in (Note that this won't produce an incorrect result, but may produce more conservative results than necessary in certain edge cases. e.g. region entry arguments for non-region branch interface operations). The framework also only focuses on computing lattices for values, given the SCCP origins, but this is something to relax as needed in the future.
Given that this logic is already in SCCP, a majority of this commit is NFC. The more interesting parts are the interface glue that clients interact with.
Differential Revision: https://reviews.llvm.org/D100915
Wang, Pengfei [Tue, 27 Apr 2021 01:51:46 +0000 (09:51 +0800)]
Reapply "[X86][AMX] Try to hoist AMX shapes' def"
We request no intersections between AMX instructions and their shapes'
def when we insert ldtilecfg. However, this is not always ture resulting
from not only users don't follow AMX API model, but also optimizations.
This patch adds a mechanism that tries to hoist AMX shapes' def as well.
It only hoists shapes inside a BB, we can improve it for cases across
BBs in future. Currently, it only hoists shapes of which all sources' def
above the first AMX instruction. We can improve for the case that only
source that moves an immediate value to a register below AMX instruction.
Reviewed By: xiangzhangllvm
Differential Revision: https://reviews.llvm.org/D101067