platform/kernel/u-boot.git
7 years agoSECURE_BOOT: Update bootscript and its hdr addresses
Udit Agarwal [Fri, 6 Jan 2017 10:28:56 +0000 (15:58 +0530)]
SECURE_BOOT: Update bootscript and its hdr addresses

Update bootscript and its hdr addresses for Layerscape Chasis 3
based platforms instead of individual SoCs.

Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agoconfigs: ls1012a: enable driver model for eSDHC
Yangbo Lu [Wed, 7 Dec 2016 03:54:33 +0000 (11:54 +0800)]
configs: ls1012a: enable driver model for eSDHC

Enable driver model for eSDHC on ls1012a rdb and qds boards.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agoarmv8: ls1012a: add eSDHC nodes
Yangbo Lu [Wed, 7 Dec 2016 03:54:32 +0000 (11:54 +0800)]
armv8: ls1012a: add eSDHC nodes

This patch is to add eSDHC nodes for ls1012a.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agommc: fsl_esdhc: add 'fsl, esdhc' into of_match table
Yangbo Lu [Wed, 7 Dec 2016 03:54:31 +0000 (11:54 +0800)]
mmc: fsl_esdhc: add 'fsl, esdhc' into of_match table

This patch is to add 'fsl,esdhc' into of_match table to support
driver model for QorIQ eSDHC.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agommc: fsl_esdhc: make GPIO support optional
Yangbo Lu [Wed, 7 Dec 2016 03:54:30 +0000 (11:54 +0800)]
mmc: fsl_esdhc: make GPIO support optional

There would be compiling error as below when enable driver model for esdhc.
undefined reference to `dm_gpio_get_value'
undefined reference to `gpio_request_by_name_nodev'
This patch is to make GPIO support optional with CONFIG_DM_GPIO. Because
all boards of QorIQ platform don't need it and they just check register for
CD/WP status, only some boards of i.MX platform require this.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agoarmv8/fsl-lsch3: consolidate the clock system initialization
Hou Zhiqiang [Tue, 10 Jan 2017 08:44:16 +0000 (16:44 +0800)]
armv8/fsl-lsch3: consolidate the clock system initialization

This patch binds the sys_info->freq_systembus to Platform PLL, and
implements the IPs' clock function individually.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agoarmv8/fsl-lsch2: refactor the clock system initialization
Hou Zhiqiang [Tue, 10 Jan 2017 08:44:15 +0000 (16:44 +0800)]
armv8/fsl-lsch2: refactor the clock system initialization

Up to now, there are 3 kind of SoCs under Layerscape Chassis 2,
like LS1043A, LS1046A and LS1012A. But the clocks tree has a
lot of differences, for instance, the IP modules have different
dividers to derive its clock from Platform PLL. And the core
cluster PLL and platform PLL maybe have different reference
clocks, such as LS1012A. Another problem is which clock/PLL
should be described by sys_info->freq_systembus, it is confused
in Layerscape Chissis 2.

This patch is to bind the sys_info->freq_systembus to the Platform
PLL, and handle the different divider of IP modules separately
between different SoCs, and separate reference clocks of core
cluster PLL and platform PLL.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agoARMv8/fsl-layerscape: Enable data coherency between cores in cluster
Hou Zhiqiang [Fri, 6 Jan 2017 09:41:11 +0000 (17:41 +0800)]
ARMv8/fsl-layerscape: Enable data coherency between cores in cluster

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agoarmv8: Enable CPUECTLR.SMPEN for coherency
Mingkai Hu [Fri, 6 Jan 2017 09:41:10 +0000 (17:41 +0800)]
armv8: Enable CPUECTLR.SMPEN for coherency

For A53, data coherency is enabled only when the CPUECTLR.SMPEN bit is
set. The SMPEN bit should be set before enabling the data cache.
If not enabled, the cache is not coherent with other cores and
data corruption could occur.

For A57/A72, SMPEN bit enables the processor to receive instruction
cache and TLB maintenance operations broadcast from other processors
in the cluster. This bit should be set before enabling the caches and
MMU, or performing any cache and TLB maintenance operations.

Signed-off-by: Mingkai Hu <mingkai.hu@nxp.com>
Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com>
Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agoarm: layerscape: Enable UUID & GPT partition for NXP's ARM SoC
Prabhakar Kushwaha [Mon, 26 Dec 2016 06:45:08 +0000 (12:15 +0530)]
arm: layerscape: Enable UUID & GPT partition for NXP's ARM SoC

Enable UUID and GPT partition support for NXP's ARM based SoCs
i.e. LS1012A, LS1021A, LS1043A, LS1046A and LS2080A.

Also enable DOS partition for LS1012AFRDM boards.

Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agoarmv8: ls1012: Enable CONFIG_DM_USB in defconfigs
Tang Yuantian [Tue, 27 Dec 2016 02:24:45 +0000 (10:24 +0800)]
armv8: ls1012: Enable CONFIG_DM_USB in defconfigs

Enables driver model flag CONFIG_DM_USB for LS1012A platform
in defconfigs.

Signed-off-by: Tang Yuantian <yuantian.tang@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agoarmv8: ls1012: added usb nodes in dts
Tang Yuantian [Tue, 27 Dec 2016 02:24:44 +0000 (10:24 +0800)]
armv8: ls1012: added usb nodes in dts

The LS1012A processor has two integrated USB controllers.
One is USB2.0 controller, the other is USB3.0 controller that
allow direct connection to the USB ports with appropriate
protection circuitry and power supplies.

Signed-off-by: Tang Yuantian <yuantian.tang@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agoarmv8/fsl_lsch2: Add the OCRAM initialization
Hou Zhiqiang [Fri, 16 Dec 2016 09:15:46 +0000 (17:15 +0800)]
armv8/fsl_lsch2: Add the OCRAM initialization

Clear the content to zero and the ECC error bit of OCRAM1/2.

The OCRAM must be initialized to ZERO by the unit of 8-Byte before
accessing it, or else it will generate ECC error. And the IBR has
accessed the OCRAM before this initialization, so the ECC error
status bit should to be cleared.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: Pratiyush Srivastava <pratiyush.srivastava@nxp.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agoARMv8/fsl-layerscape: Correct the OCRAM size
Hou Zhiqiang [Fri, 16 Dec 2016 09:15:45 +0000 (17:15 +0800)]
ARMv8/fsl-layerscape: Correct the OCRAM size

The real size of OCRAM is 128KiB, so correct the size of OCRAM.
And OCRAM reserved 2MiB space, then add a new macro to describe
it, which is used for MMU setup.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agokconfig: move FSL_PCIE_COMPAT to platform Kconfig
Hou Zhiqiang [Tue, 13 Dec 2016 06:54:24 +0000 (14:54 +0800)]
kconfig: move FSL_PCIE_COMPAT to platform Kconfig

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agopci: layerscape: remove unnecessary legacy code
Minghuan Lian [Tue, 13 Dec 2016 06:54:23 +0000 (14:54 +0800)]
pci: layerscape: remove unnecessary legacy code

All Layerscape SoCs have supported new PCIe driver based on DM.
The lagecy PCIe driver code is unused and can be removed.

Signed-off-by: Minghuan Lian <Minghuan.Lian@nxp.com>
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agoarmv8: ls2080a: Enable PCIe in defconfigs
Minghuan Lian [Tue, 13 Dec 2016 06:54:22 +0000 (14:54 +0800)]
armv8: ls2080a: Enable PCIe in defconfigs

The patch enables PCIe in ls2080a defconfigs and
removes unused PCIe related macro defines.

Signed-off-by: Minghuan Lian <Minghuan.Lian@nxp.com>
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agoarmv8: ls1046a: Enable PCIe and E1000 in defconfigs
Minghuan Lian [Tue, 13 Dec 2016 06:54:21 +0000 (14:54 +0800)]
armv8: ls1046a: Enable PCIe and E1000 in defconfigs

The patch enables PCIe and E1000 in ls1046a related defconfigs.

Signed-off-by: Minghuan Lian <Minghuan.Lian@nxp.com>
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agoarmv8: ls1043a: Enable PCIe and E1000 in defconfigs
Minghuan Lian [Tue, 13 Dec 2016 06:54:20 +0000 (14:54 +0800)]
armv8: ls1043a: Enable PCIe and E1000 in defconfigs

The patch enables PCIe and E1000 in ls1043a defconfigs and
removes unused PCIe related macro defines.

Signed-off-by: Minghuan Lian <Minghuan.Lian@nxp.com>
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agoarm: ls1012a: Enable PCIe and E1000 in defconfigs
Minghuan Lian [Tue, 13 Dec 2016 06:54:19 +0000 (14:54 +0800)]
arm: ls1012a: Enable PCIe and E1000 in defconfigs

The patch enables PCIe and E1000 in ls1012a defconfigs and
removes unused PCIe related macro defines

Signed-off-by: Minghuan Lian <Minghuan.Lian@nxp.com>
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agoarm: ls1021a: Enable PCIe in defconfigs
Minghuan Lian [Tue, 13 Dec 2016 06:54:18 +0000 (14:54 +0800)]
arm: ls1021a: Enable PCIe in defconfigs

The patch enables PCIe in ls1021a defconfigs and
removes unused PCIe related macro defines.

Signed-off-by: Minghuan Lian <Minghuan.Lian@nxp.com>
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agopci: layerscape: add pci driver based on DM
Minghuan Lian [Tue, 13 Dec 2016 06:54:17 +0000 (14:54 +0800)]
pci: layerscape: add pci driver based on DM

There are more than five kinds of Layerscape SoCs. unfortunately,
PCIe controller of each SoC is a little bit different. In order
to avoid too many macro definitions, the patch addes a new
implementation of PCIe driver based on DM. PCIe dts node is
used to describe the difference.

Signed-off-by: Minghuan Lian <Minghuan.Lian@nxp.com>
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agopci: layerscape: move kernel DT fixup to a separate file
Hou Zhiqiang [Tue, 13 Dec 2016 06:54:16 +0000 (14:54 +0800)]
pci: layerscape: move kernel DT fixup to a separate file

To make the layerscape pcie driver clear, move the kernel DT fixup
code from pcie_layerscape.c to pcie_layerscape_fixup.c.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agoarmv8: ls2080a: add PCIe dts node
Minghuan Lian [Tue, 13 Dec 2016 06:54:15 +0000 (14:54 +0800)]
armv8: ls2080a: add PCIe dts node

Signed-off-by: Minghuan Lian <Minghuan.Lian@nxp.com>
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agoarmv8: ls1046a: add PCIe dts node
Minghuan Lian [Tue, 13 Dec 2016 06:54:14 +0000 (14:54 +0800)]
armv8: ls1046a: add PCIe dts node

Signed-off-by: Minghuan Lian <Minghuan.Lian@nxp.com>
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agoarmv8: ls1043a: add PCIe dts node
Minghuan Lian [Tue, 13 Dec 2016 06:54:13 +0000 (14:54 +0800)]
armv8: ls1043a: add PCIe dts node

Signed-off-by: Minghuan Lian <Minghuan.Lian@nxp.com>
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agoarm: ls1012a: add PCIe dts node
Minghuan Lian [Tue, 13 Dec 2016 06:54:12 +0000 (14:54 +0800)]
arm: ls1012a: add PCIe dts node

Signed-off-by: Minghuan Lian <Minghuan.Lian@nxp.com>
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agoarm: ls1021a: add PCIe dts node
Minghuan Lian [Tue, 13 Dec 2016 06:54:11 +0000 (14:54 +0800)]
arm: ls1021a: add PCIe dts node

Signed-off-by: Minghuan Lian <Minghuan.Lian@nxp.com>
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agodm: pci: remove pci_bus_to_hose(0) calling
Minghuan Lian [Tue, 13 Dec 2016 06:54:10 +0000 (14:54 +0800)]
dm: pci: remove pci_bus_to_hose(0) calling

There may be multiple PCIe controllers in a SoC.
It is not correct that always calling pci_bus_to_hose(0) to get
the first PCIe controller for the PCIe device connected other
controllers. We just remove this calling because hose always point
the correct PCIe controller.

Signed-off-by: Minghuan Lian <Minghuan.Lian@nxp.com>
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agodm: pci: return the real controller in pci_bus_to_hose()
Minghuan Lian [Tue, 13 Dec 2016 06:54:09 +0000 (14:54 +0800)]
dm: pci: return the real controller in pci_bus_to_hose()

for the legacy PCI driver, the function pci_bus_to_hose() returns
the real PCIe controller. To keep consistency, this function is
changed to return the PCIe controller pointer of the root bus
instead of the current PCIe bus.

Signed-off-by: Minghuan Lian <Minghuan.Lian@nxp.com>
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agoconfigs: ls1021a: enable DT and DM support
Hou Zhiqiang [Tue, 13 Dec 2016 06:54:08 +0000 (14:54 +0800)]
configs: ls1021a: enable DT and DM support

Enable DT to support Driver Model.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agoarmv8/layerscape: remove unnecessary function declares
Minghuan Lian [Tue, 15 Nov 2016 09:35:24 +0000 (17:35 +0800)]
armv8/layerscape: remove unnecessary function declares

For the function alloc_stream_ids() append_mmu_masters() and
fdt_fixup_smmu_pcie() there are no related definitions and they
are never called. So the patch removes the unnecessary declares.

Signed-off-by: Minghuan Lian <Minghuan.Lian@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agoarmv8: fsl-layerscape, ccn504: Set forced-order mode in RNI-6, RNI-20
Priyanka Jain [Wed, 9 Nov 2016 06:57:54 +0000 (12:27 +0530)]
armv8: fsl-layerscape, ccn504: Set forced-order mode in RNI-6, RNI-20

It is recommended to set forced-order mode in RNI-6,
RNI-20 for performance optimization in LS2088A.

Both LS2080A, LS2088A families has CONFIG_LS2080A define.
As above update is required only for LS2088A, skip this
for LS2080A SoC family.

Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agofsl/usb: enable usb feature for ls1046ardb
jerry.huang@nxp.com [Tue, 15 Nov 2016 02:47:52 +0000 (10:47 +0800)]
fsl/usb: enable usb feature for ls1046ardb

Enable usb feature for ls1046ardb

Signed-off-by: Changming Huang <jerry.huang@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agoMerge branch 'master' of git://git.denx.de/u-boot-i2c
Tom Rini [Wed, 18 Jan 2017 12:21:33 +0000 (07:21 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-i2c

7 years agoMerge git://git.denx.de/u-boot-samsung
Tom Rini [Wed, 18 Jan 2017 12:21:12 +0000 (07:21 -0500)]
Merge git://git.denx.de/u-boot-samsung

7 years agoi2c: i2c-cdns: No need for dedicated probe function
Moritz Fischer [Mon, 16 Jan 2017 17:50:47 +0000 (09:50 -0800)]
i2c: i2c-cdns: No need for dedicated probe function

The generic probe code in dm works, so get rid of the leftover cruft.

Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: u-boot@lists.denx.de
7 years agoi2c: i2c-cdns: Implement workaround for hold quirk of the rev 1.0
Moritz Fischer [Mon, 16 Jan 2017 17:50:46 +0000 (09:50 -0800)]
i2c: i2c-cdns: Implement workaround for hold quirk of the rev 1.0

Revision 1.0 of this IP has a quirk where if during a long read transfer
the transfer_size register will go to 0, the master will send a NACK to
the slave prematurely.
The way to work around this is to reprogram the transfer_size register
mid-transfer when the only the receive fifo is known full, i.e. the I2C
bus is known non-active.
The workaround is based on the implementation in the linux-kernel.

Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: u-boot@lists.denx.de
7 years agoi2c: i2c-cdns: Reorder timeout loop for interrupt waiting
Moritz Fischer [Mon, 16 Jan 2017 17:50:45 +0000 (09:50 -0800)]
i2c: i2c-cdns: Reorder timeout loop for interrupt waiting

Reorder the timeout loop such that we first check if the
condition is already true, and then call udelay() so if
the condition is already true, break early.

Reviewed-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: u-boot@lists.denx.de
7 years agoi2c: i2c-cdns: Detect unsupported sequences for rev 1.0
Moritz Fischer [Mon, 16 Jan 2017 17:50:44 +0000 (09:50 -0800)]
i2c: i2c-cdns: Detect unsupported sequences for rev 1.0

Revision 1.0 of this IP has a couple of issues, such as not supporting
repeated start conditions for read transfers.

So scan through the list of i2c messages for these conditions
and report an error if they are attempted.

This has been fixed for revision 1.4 of the IP, so only report the error
when the IP can really not do it.

Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: u-boot@lists.denx.de
7 years agoi2c: mux: Allow muxes to work as children of i2c bus without i2c-parent
Moritz Fischer [Mon, 16 Jan 2017 17:46:06 +0000 (09:46 -0800)]
i2c: mux: Allow muxes to work as children of i2c bus without i2c-parent

For mux check if the parent is already a device of UCLASS_I2C and if yes
just use that. Otherwise see if someone specified an i2c-parent phandle.
This mimics the behavior found in the Kernel, as it removes the
requirement to explicitly specify a i2c-parent phandle.

Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: u-boot@lists.denx.de
7 years agoexynos: video: Enable stdout env var backward compatibility for LCD
Javier Martinez Canillas [Mon, 16 Jan 2017 17:15:23 +0000 (14:15 -0300)]
exynos: video: Enable stdout env var backward compatibility for LCD

Commit bb5930d5c97f ("exynos: video: Convert several boards to driver
model for video") converted the Exynos Chromebooks machines to use DM
for video, but this breaks backward compatibility with the stdout env
var since now stdout is expected to be "vidconsole" instead of "lcd".

This causes display to not work when updating u-boot on these boards
if the old stdout env var is used. Since these are consumer devices,
there's no easy way to have a serial console so users may be confused
thinking that u-boot failed to boot, or in the best case will need to
update the stdout env var blindly to make the display to work again.

There's a CONFIG_VIDCONSOLE_AS_LCD config option to workaround this,
so enable it in the Chromebooks' default configuration files to allow
users to change their stdout env var before the workaround is removed.

Suggested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
7 years agoexynos: Enable XHCI on exynos5250 boards
Sjoerd Simons [Tue, 10 Jan 2017 13:36:17 +0000 (14:36 +0100)]
exynos: Enable XHCI on exynos5250 boards

Once upon a time u-boot didn't support building with two usb host
controller types, these days it does. Enable XHCI in addition to the
existing EHCI support so user can plug usb devices in all available
ports regardless of the controller type.

Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
7 years agoexynos5: Don't potentially undervoltage the CPU
Sjoerd Simons [Tue, 10 Jan 2017 11:28:57 +0000 (12:28 +0100)]
exynos5: Don't potentially undervoltage the CPU

For snow when chainloading u-boot the CPU seems to be running at full
speed. The lower CPU voltage seems to be ok for u-boot, but when booting
linux (bringing up all cores) I'm seeing random crashes.

Bump the voltage up to a level that's safe for all cpu frequencies.

Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
7 years agoboard: samsung: universal_c210: remove the codes relevant to soft_i2c
Jaehoon Chung [Mon, 9 Jan 2017 05:47:53 +0000 (14:47 +0900)]
board: samsung: universal_c210: remove the codes relevant to soft_i2c

Removes the codes of soft_i2c.
There is no usasge for universal_c210, also didn't define
CONFIG_SOFT_I2C_GPIO_SCL.
This code seems a dead code.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
7 years agoi2c: Kconfig: Add SYS_I2C_S3C24X0 entry
Jaehoon Chung [Mon, 9 Jan 2017 05:47:52 +0000 (14:47 +0900)]
i2c: Kconfig: Add SYS_I2C_S3C24X0 entry

Adding Kconfig for SYS_I2C_S3C24X0.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
7 years agoi2c: s3c24x0: fix the compiler error for exynos4
Jaehoon Chung [Mon, 9 Jan 2017 05:47:51 +0000 (14:47 +0900)]
i2c: s3c24x0: fix the compiler error for exynos4

If CONFIG_SYS_I2C_S3C24X0_SLAVE isn't defined, then complie error should
be occurred.
This patch is for preventing it.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
7 years agoboard: samsung: universal_210: use the driver model for max8998
Jaehoon Chung [Mon, 9 Jan 2017 05:47:50 +0000 (14:47 +0900)]
board: samsung: universal_210: use the driver model for max8998

Revmoe the "ifndef CONFIG_DM_I2C".
Intead, use the driver model for max8998.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
7 years agoconfigs: s5pc210_universal: enable the DM_PMIC and MAX8998
Jaehoon Chung [Mon, 9 Jan 2017 05:47:49 +0000 (14:47 +0900)]
configs: s5pc210_universal: enable the DM_PMIC and MAX8998

Enable the CONFIG_DM_PMIC and CONFIG_DM_PMIC_MAX8998.
s5pc210_universal board is using max8998 pmic.
To use the i2c/pmic driver model, enable these configurations.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
7 years agoARM: dts: exnyos4210-universl_c210: add i2c_5 and pmic nodes
Jaehoon Chung [Mon, 9 Jan 2017 05:47:48 +0000 (14:47 +0900)]
ARM: dts: exnyos4210-universl_c210: add i2c_5 and pmic nodes

Add the i2c_5 node and pmic as its child node.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
7 years agoARM: dts: exynos4: use the node's name for i2c
Jaehoon Chung [Mon, 9 Jan 2017 05:47:47 +0000 (14:47 +0900)]
ARM: dts: exynos4: use the node's name for i2c

Use the node's name for i2c.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
7 years agoboard: samsung: goni: fix the pmic's name for getting
Jaehoon Chung [Thu, 5 Jan 2017 07:55:14 +0000 (16:55 +0900)]
board: samsung: goni: fix the pmic's name for getting

For Getting from uclass, use the "max8998-pmic" as name.
It also needs to change the dt-node's name as "max8998-pmic".
Otherwise, it doesn't find the pmic device.
Because it's only searching for 'max8998_pmic'.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
7 years agoMerge branch 'master' of git://git.denx.de/u-boot-uniphier
Tom Rini [Tue, 17 Jan 2017 16:39:43 +0000 (11:39 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-uniphier

  - Enable eMMC driver for LD11/LD20 SoCs
  - Refactoring of SoC init code
  - Bug fix of pinctrl driver

7 years agopinctrl: uniphier: fix Ethernet (RMII) pin-mux setting for LD20
Masahiro Yamada [Tue, 17 Jan 2017 12:07:35 +0000 (21:07 +0900)]
pinctrl: uniphier: fix Ethernet (RMII) pin-mux setting for LD20

Fix the pin-mux values for the MDC, MDIO, MDIO_INTL, PHYRSTL pins.

Fixes: fc9da85c6059 ("pinctrl: uniphier: add Ethernet pin-mux settings")
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
7 years agoARM: uniphier: move SBC and Support Card init code to U-Boot proper
Masahiro Yamada [Sun, 15 Jan 2017 05:59:10 +0000 (14:59 +0900)]
ARM: uniphier: move SBC and Support Card init code to U-Boot proper

Initialize SBC and Support Card in U-Boot proper instead of SPL.

We may run different firmware (ex. ARM Trusted Firmware) before
U-Boot, and basic SoC initialization may be done there.  In that
case, SPL may not be used.

The motivation for preparing SBC and Support Card in SPL was to use
LED for early debugging, but this is not mandatory to boot SoCs.
With this commit, LED will be unavailable in SPL, but we can use a
debug serial instead.  So, this change will not be a big deal.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
7 years agoARM: uniphier: refactor spl_init_board()
Masahiro Yamada [Sun, 15 Jan 2017 05:59:09 +0000 (14:59 +0900)]
ARM: uniphier: refactor spl_init_board()

Merge init-*.c into a single file using a table of callbacks because
the initialization flow is almost common among SoCs.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
7 years agoARM: uniphier: refactor board_init()
Masahiro Yamada [Sun, 15 Jan 2017 05:59:08 +0000 (14:59 +0900)]
ARM: uniphier: refactor board_init()

The code here is cluttered due to the switch statement.  Introduce a
table of callbacks to clean up the initialization code across SoCs.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
7 years agoMerge branch 'master' of git://git.denx.de/u-boot-usb
Tom Rini [Tue, 17 Jan 2017 15:26:03 +0000 (10:26 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-usb

7 years agodrivers: usb: gadget: ether: Fix compiler warning
Lokesh Vutla [Tue, 17 Jan 2017 03:21:22 +0000 (08:51 +0530)]
drivers: usb: gadget: ether: Fix compiler warning

Latest gcc 6.2 compiler is throwing the below warning for am335x_baltos_defconfig
drivers/usb/gadget/ether.c:501:17: warning: 'mdlm_detail_desc' defined but not used [-Wunused-const-variable=]
 static const u8 mdlm_detail_desc[] = {

Guard mdlm_detail_desc with CONFIG_USB_ETH_SUBSET to avoid the warning

Reported-by: Dan Murphy <dmurphy@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
7 years agoimx: mx6sllevk: add usb support
Peng Fan [Thu, 22 Dec 2016 09:06:44 +0000 (17:06 +0800)]
imx: mx6sllevk: add usb support

Add usb support for mx6sllevk board.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
7 years agousb: ehci-mx6: handle vbus-supply
Peng Fan [Thu, 22 Dec 2016 09:06:43 +0000 (17:06 +0800)]
usb: ehci-mx6: handle vbus-supply

Drop board_ehci_power when dm usb used and switch to use
regulator api to handle vbus.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefano Babic <sbabic@denx.de>
7 years agousb: ehci-mx6: implement ofdata_to_platdata
Peng Fan [Thu, 22 Dec 2016 09:06:42 +0000 (17:06 +0800)]
usb: ehci-mx6: implement ofdata_to_platdata

Implement ofdata_to_platdata to set the type to host or device.
 - Check "dr-mode" property.
 - If there is no "dr-mode", check phy_ctrl for i.MX6
   and phy_status for i.MX7

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefano Babic <sbabic@denx.de>
7 years agodrivers: usb: Add USB_XHCI_ZYNQMP to Kconfig
Michal Simek [Wed, 21 Dec 2016 13:18:31 +0000 (14:18 +0100)]
drivers: usb: Add USB_XHCI_ZYNQMP to Kconfig

Move symbol to Kconfig to cleanup configuration file.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
7 years agousb: storage: Show number of storage devices detected for DM_USB
Michal Simek [Wed, 21 Dec 2016 08:35:08 +0000 (09:35 +0100)]
usb: storage: Show number of storage devices detected for DM_USB

By enabling DM_USB information about number of storage devices
was lost.
Get this information back simply by printing number of devices detected
via BLK uclass.

For example:
scanning bus 0 for devices... 7 USB Device(s) found
       scanning usb for storage devices... 3 Storage Device(s) found
       scanning usb for ethernet devices... 0 Ethernet Device(s) found

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
7 years agousb: dwc2-otg: remove unused variable
Masahiro Yamada [Wed, 14 Dec 2016 05:30:12 +0000 (14:30 +0900)]
usb: dwc2-otg: remove unused variable

GCC 6.1 complains about this.

drivers/usb/gadget/dwc2_udc_otg.c:72:19: warning: 'driver_desc'
defined but not used [-Wunused-const-variable=]
 static const char driver_desc[] = DRIVER_DESC;
                   ^~~~~~~~~~~

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
7 years agoMerge branch 'master' of git://git.denx.de/u-boot-video
Tom Rini [Tue, 17 Jan 2017 01:23:14 +0000 (20:23 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-video

7 years agoARM: uniphier: make BCU init into void function
Masahiro Yamada [Sun, 15 Jan 2017 05:59:07 +0000 (14:59 +0900)]
ARM: uniphier: make BCU init into void function

These functions never fail, so no need to return a value.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
7 years agoARM: uniphier: refactor Support Card init code
Masahiro Yamada [Sun, 15 Jan 2017 05:59:06 +0000 (14:59 +0900)]
ARM: uniphier: refactor Support Card init code

Splitting reset assertion (support_card_reset) and deassertion
(support_card_init) is not adding much value any more.  Handle
all the initialization of Support Card in support_card_init(),
then remove support_card_reset().

Also, detect_num_flash_banks() can have a static qualifier.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
7 years agoARM: uniphier: refactor SBC init code
Masahiro Yamada [Sun, 15 Jan 2017 05:59:05 +0000 (14:59 +0900)]
ARM: uniphier: refactor SBC init code

Merge sbc-admulti.c and sbc-savepin.c into a single file to avoid
code duplication.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
7 years agoARM: uniphier: refactor MEMCONF init code
Masahiro Yamada [Sun, 15 Jan 2017 05:59:04 +0000 (14:59 +0900)]
ARM: uniphier: refactor MEMCONF init code

Currently, memconf-sld3.c and memconf-pxs2.c duplicate the code.

There are 3 patterns in terms of MEMCONF init:
  - DRAM 2 channels: LD4, sLD8, Pro4, Pro5, LD11
  - DRAM 3 channels: sLD3
  - DRAM 3 channels (Ch2 is disable by MEMCONF[21]): Pxs2, LD20

All of them can be moved into a single file by a little more
refactoring.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
7 years agoARM: uniphier: split out UMC clock enable
Masahiro Yamada [Sun, 15 Jan 2017 05:59:03 +0000 (14:59 +0900)]
ARM: uniphier: split out UMC clock enable

The clock enable bits for UMC are more SoC-specific than for
the other hardware blocks.  Separate the UMC clocks and the other
clocks for better code reuse across SoCs.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
7 years agoARM: uniphier: remove unneeded argument of uniphier_ld20_pll_init()
Masahiro Yamada [Sun, 15 Jan 2017 05:59:02 +0000 (14:59 +0900)]
ARM: uniphier: remove unneeded argument of uniphier_ld20_pll_init()

At first, we thought the LD20 PLL setting would be board dependent,
but this argument turned out unneeded after all.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
7 years agoARM: dts: uniphier: add UniPhier specific compatible to eMMC node
Masahiro Yamada [Wed, 4 Jan 2017 11:08:37 +0000 (20:08 +0900)]
ARM: dts: uniphier: add UniPhier specific compatible to eMMC node

The "cdns,sd4hc" is a fallback of the IP.  Add the SoC-specific
compatible string.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
7 years agoARM: uniphier: enable Cadence eMMC controller for LD11/LD20
Masahiro Yamada [Wed, 4 Jan 2017 11:08:36 +0000 (20:08 +0900)]
ARM: uniphier: enable Cadence eMMC controller for LD11/LD20

Enable SDMA (Single Operation DMA) for LD11, but not for LD20.
The SDMA does not work for LD20 boards because they are generally
equipped with more memory than fits in the 32 bit physical address
space supported by the SDMA.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
7 years agoMerge branch 'master' of git://git.denx.de/u-boot-spi
Tom Rini [Sun, 15 Jan 2017 18:33:30 +0000 (13:33 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-spi

7 years agoMerge branch 'master' of git://git.denx.de/u-boot-sunxi
Tom Rini [Sun, 15 Jan 2017 18:33:16 +0000 (13:33 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-sunxi

7 years agospi: Zap cf_qspi driver and related code
Jagan Teki [Mon, 2 Jan 2017 22:29:04 +0000 (23:29 +0100)]
spi: Zap cf_qspi driver and related code

Dropped becuase
- driver not used any board.
- no dm conversion.

Cc: Angelo Dureghello <angelo@sysam.it>
Cc: Richard Retanubun <richardretanubun@ruggedcom.com>
Signed-off-by: Jagan Teki <jagan@openedev.com>
Acked-by: Angelo Dureghello <angelo@sysam.it>
7 years agosunxi: OrangePi Zero: defconfig: enable SPI flash
Andre Przywara [Sat, 14 Jan 2017 02:06:10 +0000 (02:06 +0000)]
sunxi: OrangePi Zero: defconfig: enable SPI flash

Newer OrangePi Zero boards all come with 16 Mib SPI flash soldered, from
which the board can actually boot from.
Enable the SPL support for the SPI controller and SPI flash to allow
putting the SPL, the DT and U-Boot proper into there. This will let
a board boot without an SD card inserted.
The flash chip can be written with a version of the sunxi-fel tool.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Tested-by: Priit Laes <plaes@plaes.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
7 years agosunxi: dts: OrangePi Zero: add Ethernet node
Andre Przywara [Sat, 14 Jan 2017 02:06:09 +0000 (02:06 +0000)]
sunxi: dts: OrangePi Zero: add Ethernet node

The OrangePi Zero can happily use the EMAC along with its integrated
PHY to use Ethernet (for TFTP booting, for instance).
Add the emac node to the board .dts by copying it from the OrangePi One
DT.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
7 years agosunxi: add orangepi zero defconfig
Icenowy Zheng [Fri, 16 Dec 2016 14:35:02 +0000 (22:35 +0800)]
sunxi: add orangepi zero defconfig

Orange Pi Zero is a board designed by Xunlong. It has an Allwinner H2+
SoC (similar to H3, which shares the same SoC ID), 256MB/512MB RAM,
Allwinner XR819 SDIO Wi-Fi, a MicroUSB port which is used to power the
board (also capable of OTG), a USB Type-A socket and a MicroSD slot.

Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Reviewed-by: Jagan Teki <jagan@openedev.com>
7 years agosunxi: add proper device tree for Orange Pi Zero boards
Icenowy Zheng [Fri, 16 Dec 2016 14:35:01 +0000 (22:35 +0800)]
sunxi: add proper device tree for Orange Pi Zero boards

Add a proper device tree file for Orange Pi Zero boards from Xunlong,
which come with a Allwinner H2+ SoC (similar to H3).

Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Reviewed-by: Jagan Teki <jagan@openedev.com>
7 years agosunxi: enable H3 EMAC for the nanopi neo
Jelle van der Waa [Mon, 5 Dec 2016 18:47:21 +0000 (19:47 +0100)]
sunxi: enable H3 EMAC for the nanopi neo

The nanopi already had the CONFIG_SUN8I_EMAC=y enabled in it's defconfig
file, but was missing the &emac the device tree entry.

Signed-off-by: Jelle van der Waa <jelle@vdwaa.nl>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
7 years agortc: pcf2127: Update Kconfig and code style
Meng Yi [Mon, 9 Jan 2017 18:24:51 +0000 (11:24 -0700)]
rtc: pcf2127: Update Kconfig and code style

Unfortunately version 2 of this patch was applied which was missing some
changes. Fix this.

Signed-off-by: Meng Yi <meng.yi@nxp.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agoigep00x0: Remove IGEP0020_NAND BOARD entry from MAINTAINERS
Ladislav Michl [Mon, 9 Jan 2017 10:31:43 +0000 (11:31 +0100)]
igep00x0: Remove IGEP0020_NAND BOARD entry from MAINTAINERS

Boards with NAND and OneNAND are supported by single configuration,
thus remove now obsolete IGEP0020_NAND BOARD entry.

Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
7 years agoigep00x0: enable CONFIG_FDT_FIXUP_PARTITIONS
Ladislav Michl [Mon, 9 Jan 2017 10:21:06 +0000 (11:21 +0100)]
igep00x0: enable CONFIG_FDT_FIXUP_PARTITIONS

SPL partition size depends on sector size and we want kernel to use
the same layout, so let U-Boot modify FDT accordingly.

Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
7 years agoomap-gpmc: use SECTOR_BYTES instead of hardcoded value
Ladislav Michl [Mon, 9 Jan 2017 10:15:14 +0000 (11:15 +0100)]
omap-gpmc: use SECTOR_BYTES instead of hardcoded value

Replace hardcoded value with defined constant SECTOR_BYTES.

Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agoomapl138_lcdk: remove empty ifdef block
Fabien Parent [Mon, 9 Jan 2017 10:06:38 +0000 (11:06 +0100)]
omapl138_lcdk: remove empty ifdef block

Small clean-up.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agoomapl138_lcdk: enable SPL MMC support
Fabien Parent [Mon, 9 Jan 2017 10:06:37 +0000 (11:06 +0100)]
omapl138_lcdk: enable SPL MMC support

Enable SPL MMC support in order to allow to build a single u-boot image
that is able to boot from MMC and NAND devices.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agodavinci: spl: use bootcfg to select boot device
Fabien Parent [Mon, 9 Jan 2017 10:06:36 +0000 (11:06 +0100)]
davinci: spl: use bootcfg to select boot device

Right now the SPL is trying to load u-boot based on defines, i.e. one
has to define CONFIG_SPL_NAND_SIMPLE to boot from NAND,
or CONFIG_SPL_SPI_LOAD to boot from SPI FLASH, etc...
This prevent us from having a single SPL image that is able to boot from
all media, and one need to build an image for each medium. This
commit is replacing the #ifdef that select the boot medium by reading
the value of the boot pins (via the BOOTCFG register).

Now a single SPL image will be able to read from the boot pin to know
which device should be used to load u-boot.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agoAvoid non-portable sed construct
Mark Kettenis [Sun, 8 Jan 2017 18:11:27 +0000 (19:11 +0100)]
Avoid non-portable sed construct

Using \n in a substitution is a GNU extension.  Use the 'G" command instead
to insert the desired line.

Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
7 years agoMakefile: Make EFI build quiet
Andrew F. Davis [Fri, 6 Jan 2017 22:23:59 +0000 (16:23 -0600)]
Makefile: Make EFI build quiet

Make building EFI example less noisy.

Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agomkimage: Add support for signing with pkcs11
George McCollister [Fri, 6 Jan 2017 19:14:17 +0000 (13:14 -0600)]
mkimage: Add support for signing with pkcs11

Add support for signing with the pkcs11 engine. This allows FIT images
to be signed with keys securely stored on a smartcard, hardware security
module, etc without exposing the keys.

Support for other engines can be added in the future by modifying
rsa_engine_get_pub_key() and rsa_engine_get_priv_key() to construct
correct key_id strings.

Signed-off-by: George McCollister <george.mccollister@gmail.com>
7 years agoti: am335x: mmc: Set CONFIG_SYS_MMC_MAX_DEVICE
Emmanuel Vadot [Thu, 5 Jan 2017 03:16:36 +0000 (04:16 +0100)]
ti: am335x: mmc: Set CONFIG_SYS_MMC_MAX_DEVICE

Set CONFIG_SYS_MMC_MAX_DEVICE to 2 for am335x SoC.
This define is needed in the API code.

Signed-off-by: Emmanuel Vadot <manu@bidouilliste.com>
7 years agoARM: omap3_logic: Use DEFAULT_LINUX_BOOT_ENV from ti_armv7_common
Adam Ford [Wed, 4 Jan 2017 15:26:43 +0000 (09:26 -0600)]
ARM: omap3_logic: Use DEFAULT_LINUX_BOOT_ENV from ti_armv7_common

Since we're including ti_armv7_common, let's pull in DEFAULT_LINUX_BOOT_ENV
and remove unnecessary duplicative definitions.  This patch also renames a
few environmental variables to match what is inside ti_armv7_common. This
should help future-proof any subsequent memory or memory location changes.

Signed-off-by: Adam Ford <aford173@gmail.com>
7 years agolib: net_utils: enforce '.' as octet separator in string_to_ip
Chris Packham [Wed, 4 Jan 2017 00:36:26 +0000 (13:36 +1300)]
lib: net_utils: enforce '.' as octet separator in string_to_ip

Ensure '.' is used to separate octets. If another character is seen
reject the string outright and return 0.0.0.0.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
7 years agolib: net_utils: make string_to_ip stricter
Chris Packham [Wed, 4 Jan 2017 00:36:25 +0000 (13:36 +1300)]
lib: net_utils: make string_to_ip stricter

Previously values greater than 255 were implicitly truncated. Add some
stricter checking to reject addresses with components >255.

With the input "1234192.168.1.1" the old behaviour would truncate the
address to 192.168.1.1. New behaviour rejects the string outright and
returns 0.0.0.0, which for the purposes of IP addresses can be
considered an error.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
7 years agoKconfig: Refactoring of top-level Kconfig file
Robert P. J. Day [Mon, 2 Jan 2017 21:32:13 +0000 (16:32 -0500)]
Kconfig: Refactoring of top-level Kconfig file

Some refactoring of the top-level Kconfig file which includes:

* using "if" to remove numerous identical dependency tests
* reordering config entries to group related ones
* spelling and grammar fixes

There should be no functional changes, only aesthetic ones.

Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
7 years agoarmv8: release slave cores from CPU_RELEASE_ADDR
Oded Gabbay [Wed, 28 Dec 2016 11:38:35 +0000 (13:38 +0200)]
armv8: release slave cores from CPU_RELEASE_ADDR

When using ARMv8 with ARMV8_SPIN_TABLE=y, we want the slave cores to
wait on spin_table_cpu_release_addr, until the Linux kernel will "wake" them
by writing to that location. The address of spin_table_cpu_release_addr is
transferred to the kernel using the device tree that is updated by
spin_table_update_dt().

However, if we also use SPL, then the slave cores are stuck at
CPU_RELEASE_ADDR instead and as a result, never wake up.

This patch releases the slave cores by writing spl_image->entry_point to
CPU_RELEASE_ADDR location before the end of the SPL code
(at jump_to_image_no_args()).

That way, the slave cores will start to execute the u-boot and will get to
the spin-table code and wait on the correct address
(spin_table_cpu_release_addr).

Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agoiopoll: import include/linux/iopoll.h from Linux 4.9
Masahiro Yamada [Tue, 27 Dec 2016 15:36:03 +0000 (00:36 +0900)]
iopoll: import include/linux/iopoll.h from Linux 4.9

This was imported from Linux 4.9 and adjusted for U-Boot.

 - Replace the license block with SPDX
 - Drop all *_atomic variants, which make no sense for U-Boot
 - Remove the sleep_us argument, which makes no sense for U-Boot

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
7 years agotime: import time_after, time_before and friends from Linux
Masahiro Yamada [Tue, 27 Dec 2016 15:36:02 +0000 (00:36 +0900)]
time: import time_after, time_before and friends from Linux

It is not safe to compare timer values directly.

On 32-bit systems, for example, timer_get_us() wraps around every
72 min. (2 ^ 32 / 1000000 =~ 4295 sec =~ 72 min).  Depending on
the get_ticks() implementation, it may wrap more frequently.
The 72 min might be possible on the use of U-Boot.

Let's borrow time_after, time_before, and friends to solve the
wrap-around problem.

These macros were copied from include/linux/jiffies.h of Linux 4.9.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>