Alyssa Rosenzweig [Fri, 11 Aug 2023 19:31:28 +0000 (15:31 -0400)]
asahi: Split out per-stage sysvals
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24847>
Alyssa Rosenzweig [Fri, 11 Aug 2023 19:24:55 +0000 (15:24 -0400)]
asahi: Add sysval tables for each shader stage
So we can model the descriptors of each shader stage independently, as required
for merged shaders.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24847>
Alyssa Rosenzweig [Fri, 11 Aug 2023 18:46:11 +0000 (14:46 -0400)]
asahi: Move UBO lowering into GL driver
In Vulkan, UBOs are lowered by nir_lower_explicit_io, and the ubo_base_agx
sysval is unused (since it doesn't handle descriptor sets). That makes the UBO
lowering GL-only and hence belongs with the GL driver rather than the compiler.
This lets us delete the ubo_base_agx sysval.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24847>
Alyssa Rosenzweig [Fri, 11 Aug 2023 18:29:10 +0000 (14:29 -0400)]
nir,asahi: Remove texture_base_agx
Doing a descriptor crawl with binding tables requires a real binding table in
the shader, which won't work for VK or merged shader stages in GL. Instead,
let's lower anything that needs a crawl to bindless in the driver, so the
compiler code doesn't need to know anything about descriptor binding models.
That gets rid of the texture_base_agx sysval, which is problematic when there
are multiple descriptor sets worth of textures.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24847>
Alyssa Rosenzweig [Thu, 17 Aug 2023 13:26:55 +0000 (09:26 -0400)]
agx: Add helper returning if a descriptor crawl is needed
For agx_nir_lower_texture to lower to a descriptor crawl, the driver needs to
make sure the address of the descriptor is available. This means a slightly
different code path should be used in the driver. Rather than the drivers
needing to know what exactly will be lowered, add a helper in the same file as
agx_nir_lower_texture that returns whether descriptor-based lowering will be
needed so the driver can act appropriately.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24847>
Alyssa Rosenzweig [Thu, 17 Aug 2023 13:49:07 +0000 (09:49 -0400)]
agx: Do some texture lowering early
We want to make the implicit txs in operations explicit before lower_bindings so
lower_bindings knows to force bindless.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24847>
Alyssa Rosenzweig [Thu, 17 Aug 2023 13:51:40 +0000 (09:51 -0400)]
asahi: Add missing LOD source for agx_meta's txfs
These would be inserted by nir_lower_tex anyway, but we shouldn't be relying on
that behaviour for the meta shaders when we can just create the correct thing
from the start.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24847>
Alyssa Rosenzweig [Sun, 20 Aug 2023 15:48:36 +0000 (11:48 -0400)]
agx: Do not fence write-only images
Reduces fencing significantly.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24847>
Alyssa Rosenzweig [Sun, 20 Aug 2023 15:37:03 +0000 (11:37 -0400)]
agx/fence_images: Use intrinsics_pass
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24847>
Alyssa Rosenzweig [Mon, 14 Aug 2023 19:37:25 +0000 (15:37 -0400)]
asahi: Add get_query_address helper
This is the counterpart of get_oq_index for non-occlusion hardware queries.
These are not tracked with occlusion queries, since occlusion query allocations
are limited, and they are not based on indexing but rather general
batch-allocated space.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24847>
Alyssa Rosenzweig [Mon, 14 Aug 2023 19:34:04 +0000 (15:34 -0400)]
asahi: Add non-occlusion query tracking
For other GPU queries, handled similarly.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24847>
Alyssa Rosenzweig [Mon, 14 Aug 2023 19:28:05 +0000 (15:28 -0400)]
asahi: Sync when beginning a query
Otherwise batch->writer might be non-null. Fixes Piglit occlusion_query_conform
(which I think regressed when we added proper syncing).
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24847>
Alyssa Rosenzweig [Mon, 14 Aug 2023 19:26:45 +0000 (15:26 -0400)]
asahi: Only touch batch->occlusion_queries for occlusion
We will soon have other types of queries with non-null writers.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24847>
Alyssa Rosenzweig [Mon, 14 Aug 2023 19:24:55 +0000 (15:24 -0400)]
asahi: Refactor agx_get_query_result
In preparation for other types of GPU queries.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24847>
Alyssa Rosenzweig [Mon, 14 Aug 2023 19:11:54 +0000 (15:11 -0400)]
asahi: Simplify occlusion query batch tracking
Yes, this means we now lie to the app. There's nothing more in the spirit of
dumb OpenGL features than lying!
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24847>
Alyssa Rosenzweig [Mon, 14 Aug 2023 18:44:16 +0000 (14:44 -0400)]
asahi: Generalize query logic
We will need to do the same flushing dance for non-occlusion GPU queries.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24847>
Alyssa Rosenzweig [Fri, 11 Aug 2023 18:01:02 +0000 (14:01 -0400)]
agx: Use 16-bit reg for pixel_coord
Mistake during IR translation, this is 16-bit in NIR.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24847>
Alyssa Rosenzweig [Sat, 12 Aug 2023 01:57:50 +0000 (21:57 -0400)]
asahi: Preserve atomic ops when rewriting image to bindless
Bug fix on its own, and prevents regressions from using bindless more.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24847>
Alyssa Rosenzweig [Wed, 16 Aug 2023 19:36:32 +0000 (15:36 -0400)]
agx: Clear image_array after lowering
We lower to access to a non-array 2D image, so we need to update the image_array
flag when we lower or otherwise we get an incorrect 2D Array store to a 2D image
which the hardware doesn't want.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24847>
Alyssa Rosenzweig [Wed, 16 Aug 2023 19:36:20 +0000 (15:36 -0400)]
agx: Clear sample count after lowering MSAA
Pedantic.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24847>
Alyssa Rosenzweig [Wed, 16 Aug 2023 19:35:02 +0000 (15:35 -0400)]
asahi: Pass layer stride in pixels, not elements
We do all the math in pixels and only multiply by the sample count at the end,
meaning the layer stride needs to be in terms of pixels (not samples) for
correct addressing of multisample array images in our texture lowering. This is
particularly used for lowering the multisample array stores we get from eMRT
with multisampled layered framebuffers.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24847>
Alyssa Rosenzweig [Sat, 12 Aug 2023 16:57:01 +0000 (12:57 -0400)]
asahi: Use local_size from compiler directly
This avoids an unnecessary trip through agx_uncompiled_shader.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24847>
Alyssa Rosenzweig [Tue, 1 Aug 2023 11:25:04 +0000 (07:25 -0400)]
asahi: Report local_size from compiler
So we can add more shared in the compiler.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24847>
Alyssa Rosenzweig [Tue, 15 Aug 2023 18:19:09 +0000 (14:19 -0400)]
asahi/decode: Turn assert into error
To allow us to debug broken fetches.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24847>
Alyssa Rosenzweig [Sat, 27 May 2023 17:09:01 +0000 (13:09 -0400)]
asahi: Advertise OpenGL ES 3.1!
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24847>
Alyssa Rosenzweig [Sun, 13 Aug 2023 20:08:39 +0000 (16:08 -0400)]
agx: Implement imul_high
Like umul_high. Fixes
dEQP-VK.spirv_assembly.instruction.compute.mul_extended.signed_16bit
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24847>
Alyssa Rosenzweig [Sun, 13 Aug 2023 20:04:51 +0000 (16:04 -0400)]
agx: Convert 8-bit comparisons
Fixes dEQP-VK.spirv_assembly.type.vec3.i8.slessthan_frag
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24847>
Alyssa Rosenzweig [Sun, 13 Aug 2023 20:01:59 +0000 (16:01 -0400)]
agx: Handle b2i8
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24847>
Alyssa Rosenzweig [Sun, 13 Aug 2023 19:53:23 +0000 (15:53 -0400)]
agx: Allow loop headers without later preds
These happen for loops that break after exactly 1 iteration, unconditionally.
Fixes validation splat in dEQP-VK.glsl.switch.conditional_fall_through_2_uniform_vertex
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24847>
Alyssa Rosenzweig [Sun, 13 Aug 2023 19:31:08 +0000 (15:31 -0400)]
agx/lower_vbo: Handle nonzero component
Fixes dEQP-VK.glsl.440.linkage.varying.component.vert_in.vec2.as_float_float
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24847>
Mary [Thu, 17 Aug 2023 15:34:38 +0000 (17:34 +0200)]
agx: Ensure to lower 1D image load/store to 2D
This was missing from lower_images.
This fix a good chunk of Vulkan deQP failures with 1D images.
Signed-off-by: Mary <mary@mary.zone>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24847>
Alyssa Rosenzweig [Fri, 11 Aug 2023 23:18:23 +0000 (19:18 -0400)]
agx: Don't blow up when lowering textures twice
Hard to avoid with GS.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24847>
Alyssa Rosenzweig [Mon, 31 Jul 2023 19:51:28 +0000 (15:51 -0400)]
asahi: Keep drawoverhead from OOMing itself
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24847>
Alyssa Rosenzweig [Wed, 26 Jul 2023 20:08:42 +0000 (16:08 -0400)]
agx: Assert vertex_id, instance_id are VS-only
We can get them in other shaders transiently due to merging shader stages, but
they need to be lowered since the hardware versions only exist in the hardware
VS. So the compiler should never see them outside VS.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24847>
Alyssa Rosenzweig [Mon, 14 Aug 2023 22:22:31 +0000 (18:22 -0400)]
asahi: Copy CSO stride
Fixes:
76725452239 ("gallium: move vertex stride to CSO")
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24847>
Alyssa Rosenzweig [Sun, 13 Aug 2023 13:59:10 +0000 (09:59 -0400)]
agx: Use more barriers
Fixes flakiness in
KHR-GLES31.core.texture_buffer.texture_buffer_atomic_functions.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24847>
Alyssa Rosenzweig [Sat, 12 Aug 2023 02:07:59 +0000 (22:07 -0400)]
agx: Fix extraneous bits with b2b32
From expanding mov_imm to take a 64-bit immediate. this worked by accident
before. Fixes brief regression in
dEQP-GLES31.functional.compute.shared_var.basic_type.bvec3.
Fixes:
dbd98aa24d1 ("agx: Fix 64-bit immediate moves")
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24847>
Alyssa Rosenzweig [Thu, 17 Aug 2023 14:34:47 +0000 (10:34 -0400)]
nir: Add load_sysval_agx intrinsic
For merging shader stages, it will be useful to express a load from an explicit
GL "descriptor set", so we can represent things like UBO loads with merged
shaders where UBOs can come from either stage. To do so, we add an intrinsic
representing a load from the driver's uniform tables, indexed like "descriptor
sets" with "bindings".
In principle, a layered GL-on-Vulkan implementation would use literal descriptor
sets for each stage, so I feel comfortable with the analogy here.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24847>
Chris Spencer [Mon, 21 Aug 2023 16:43:22 +0000 (17:43 +0100)]
anv: Advertise Vulkan 1.3 on Android 13
Older versions of Android rejected newer versions of Vulkan,[1] but Android
13 devices are 'strongly recommended' to support Vulkan 1.3.[2]
[1] https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4781
[2] https://source.android.com/docs/compatibility/13/android-13-cdd#7142_vulkan
Signed-off-by: Chris Spencer <spencercw@gmail.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24816>
Alyssa Rosenzweig [Wed, 23 Aug 2023 14:24:39 +0000 (10:24 -0400)]
panfrost/ci: Disable T720
Timing out and preventing merges. The lab needs to fix the devices and likely
add more coverage before this can be re-enabled.
The rest of the Panfrost/Collabora farm seems ok, it's just the T720 devices.
See https://gitlab.freedesktop.org/mesa/mesa/-/jobs/
47910575 which at the time
of pushing has been waiting for t720 job to start for 45 minutes. This will
allow us to merge code today.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Sviatoslav Peleshko [Sun, 20 Aug 2023 17:37:11 +0000 (20:37 +0300)]
anv: Do fast clear color initialization more delicately
Fixes:
b4198e79 ("anv/cmd_buffer: Initalize the clear color struct for CNL+")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9464
Signed-off-by: Sviatoslav Peleshko <sviatoslav.peleshko@globallogic.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24768>
Sviatoslav Peleshko [Thu, 17 Aug 2023 21:46:00 +0000 (00:46 +0300)]
intel/isl: Don't over-allocate CLEAR_COLOR size to use whole cache line
At the time this was added to fix some test failures. But it seems that
the failures were happening due to missing cache flushes, so
this extra space is no longer neccessary.
Fixes:
37b4eacc ("intel/isl: Resize clear color buffer to full cacheline")
Signed-off-by: Sviatoslav Peleshko <sviatoslav.peleshko@globallogic.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24768>
Georg Lehmann [Tue, 22 Aug 2023 13:15:40 +0000 (15:15 +0200)]
aco: fix u2f16 with 32bit input
The vulkan spec says all conversions are correctly rounded, so if the input
is larger than the largest fp16 value, we need to return MAX_FLOAT/inf
instead of cutting off the msbs.
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24826>
Rhys Perry [Wed, 23 Aug 2023 09:39:11 +0000 (10:39 +0100)]
aco: add adjust_bpermute_dst helper
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24693>
Rhys Perry [Tue, 15 Aug 2023 20:01:49 +0000 (21:01 +0100)]
aco: clarify bpermute pseudo opcode names
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24693>
Rhys Perry [Tue, 15 Aug 2023 10:45:01 +0000 (11:45 +0100)]
aco: fix p_bpermute_gfx6's exec save/restore with wave32
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24693>
Rhys Perry [Tue, 15 Aug 2023 10:23:26 +0000 (11:23 +0100)]
aco: fix p_bpermute_gfx6 with input at non-zero byte
Same as the other bpermute pseudo instructions.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24693>
Chris Spencer [Sun, 30 Jul 2023 08:23:05 +0000 (09:23 +0100)]
anv/android: Add support for AHARDWAREBUFFER_FORMAT_YV12
The default MediaCodec software video decoder returns frames in this
format.
Signed-off-by: Chris Spencer <spencercw@gmail.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24388>
Chris Spencer [Sun, 30 Jul 2023 08:20:52 +0000 (09:20 +0100)]
anv/android: Fix importing hardware buffers with planar formats
Currently, we try to fetch the color aspect of the format and convert that
to an ISL format, which is then used to convert the pixel stride to bytes.
This does not work with planar formats because they don't have a color
aspect, and the planes can be of different sizes anyway, so may not have
the same byte stride. Change to calculate the stride individually for each
plane.
Signed-off-by: Chris Spencer <spencercw@gmail.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24388>
Samuel Pitoiset [Mon, 21 Aug 2023 13:22:05 +0000 (15:22 +0200)]
aco: rework printing shader stages
To avoid printing "unknown" for shader object when eg. VS and TCS
are compiled separately.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24810>
Feng Jiang [Thu, 25 May 2023 03:11:00 +0000 (11:11 +0800)]
CODEOWNERS: Add @flynnjiang for VirGL video
Signed-off-by: Feng Jiang <jiangfeng@kylinos.cn>
Acked-by: Corentin Noël <corentin.noel@collabora.com>
Acked-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24570>
Samuel Pitoiset [Tue, 20 Jun 2023 06:41:01 +0000 (08:41 +0200)]
radv: advertise NV_device_generated_commands_compute
This extension introduces a token for implementing DGC compute, it's
only intended to be used by vkd3d-proton.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24275>
Samuel Pitoiset [Tue, 20 Jun 2023 06:40:17 +0000 (08:40 +0200)]
radv: allow DGC on the compute queue
DGC cmdbuf on ACE are executed as IB1 without chaining because IB2
isn't supported on ACE.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24275>
Samuel Pitoiset [Mon, 24 Jul 2023 07:48:43 +0000 (09:48 +0200)]
radv: implement NV_device_generated_commands_compute
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24275>
Samuel Pitoiset [Mon, 24 Jul 2023 07:26:10 +0000 (09:26 +0200)]
radv: prepare radv_prepare_dgc() for DGC compute
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24275>
Samuel Pitoiset [Tue, 20 Jun 2023 06:39:19 +0000 (08:39 +0200)]
radv: prepare radv_get_sequence_size() for DGC compute
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24275>
Samuel Pitoiset [Tue, 20 Jun 2023 06:38:57 +0000 (08:38 +0200)]
radv: track the pipeline bind point for indirect commands layout
This will be used to implement DGC compute.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24275>
Mike Blumenkrantz [Tue, 22 Aug 2023 16:43:00 +0000 (12:43 -0400)]
zink: sanitize optimal keys
shader keys represent pipeline states which trigger variants, but not
all shaders are affected by certain states
this adds some sanitizing for the optimal path to ignore shader variants
which won't have any effect for the currently bound shaders, thus reducing
the number of pipelines compiled (both unoptimized and optimized)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24831>
Mike Blumenkrantz [Tue, 22 Aug 2023 16:42:03 +0000 (12:42 -0400)]
zink: use the "set" optimal key for prog last_variant_hash for consistency
this is the key that has been set during program update for reuse
everywhere else, and everything else in the driver uses it
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24831>
Mike Blumenkrantz [Tue, 22 Aug 2023 16:14:27 +0000 (12:14 -0400)]
zink: don't start multiple cache jobs for the same program
if there's already a cache job in flight then starting a second one
is illegal
cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24831>
David Rosca [Thu, 17 Aug 2023 12:47:10 +0000 (14:47 +0200)]
frontends/va: Add BT.709 as supported postproc color standard
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24788>
David Rosca [Thu, 17 Aug 2023 12:26:56 +0000 (14:26 +0200)]
gallium/auxiliary/vl: Don't set csc matrix in video_buffer/rgb_to_yuv_layer
It's now handled in va frontend instead.
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24788>
David Rosca [Fri, 18 Aug 2023 10:33:04 +0000 (12:33 +0200)]
frontends/va: Set csc matrix in postproc
Set correct matrix according to format, color standard and range.
Change default value for color range when not explicitly specified.
Use limited range for YUV and full range for RGB.
This also adds support for converting from full range YUV to RGB.
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24788>
David Rosca [Fri, 18 Aug 2023 10:29:56 +0000 (12:29 +0200)]
gallium/auxiliary/vl: Add BT.709 full csc matrix
Used for converting from full range YUV.
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24788>
Sagar Ghuge [Tue, 22 Aug 2023 20:41:53 +0000 (13:41 -0700)]
blorp: Drop unnecessary assertions in blorp_can_hiz_clear_depth
We already checks for the alignment and the multislice surface, we don't
need to add assertions around those two.
fixes:
37fcbb375cb ("blorp: Disable unaligned partial HIZ fast clears for HIZ_CCS too")
closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9684
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Tested-by: Mark Janes <markjanes@swizzler.org>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24837>
Rob Clark [Thu, 10 Aug 2023 21:48:56 +0000 (14:48 -0700)]
util: Decouple disk cache from EGL_ANDROID_blob_cache
Just because the user / system-integrater doesn't want shader disk
cache, doesn't mean they don't want EGL_ANDROID_blob_cache to work.
We've kind of already solved this for the android case, so just
generalize that solution.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9520
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Dmitry Osipenko <dmitry.osipenko@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24636>
Emma Anholt [Wed, 14 Jun 2023 17:46:44 +0000 (10:46 -0700)]
intel/fs: Simplify compute_start_end().
Now that we have moved the screening up, we can simplify the code. No
change in shader-db steam performance, n=10.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24702>
Emma Anholt [Tue, 13 Jun 2023 23:18:09 +0000 (16:18 -0700)]
intel/fs: Move the defin[]/defout[] screening up to livein[]/liveout[] setup.
This keeps us from having to run the loop to propagate up quite so much.
steam shader-db time -1.86356% +/- 0.941498% (n=10). There's a small
scheduling effect, since previously the scheduler wasn't considering
defin/defout:
cycles helped: shaders/closed/steam/amnesia-the-dark-descent/high/241.shader_test FS SIMD16: 11428 -> 11422 (-0.05%) (scheduled: scheduled)
cycles helped: shaders/humus-volumetricfogging2/1.shader_test FS SIMD32: 13832 -> 13800 (-0.23%) (scheduled: scheduled)
cycles helped: shaders/tesseract/479.shader_test FS SIMD32: 9330 -> 8644 (-7.35%) (scheduled: scheduled)
cycles HURT: shaders/robclark-shaders/android/angle/aztec_ruins/36.shader_test FS SIMD32: 7870 -> 7940 (0.89%) (scheduled: scheduled)
cycles HURT: shaders/robclark-shaders/gfxbench5/gl_5_high_off/57.shader_test FS SIMD32: 7870 -> 7940 (0.89%) (scheduled: scheduled)
cycles HURT: shaders/robclark-shaders/gfxbench5/gl_5_normal_off/54.shader_test FS SIMD32: 7870 -> 7940 (0.89%) (scheduled: scheduled)
cycles HURT: shaders/robclark-shaders/android/angle/aztec_ruins/30.shader_test FS SIMD32: 8726 -> 8808 (0.94%) (scheduled: scheduled)
cycles HURT: shaders/robclark-shaders/gfxbench5/gl_5_high_off/51.shader_test FS SIMD32: 8726 -> 8808 (0.94%) (scheduled: scheduled)
cycles HURT: shaders/robclark-shaders/gfxbench5/gl_5_normal_off/48.shader_test FS SIMD32: 8726 -> 8808 (0.94%) (scheduled: scheduled)
cycles HURT: shaders/robclark-shaders/gfxbench5/gl_4_off/129.shader_test TCS SIMD8: 3911 -> 3979 (1.74%) (scheduled: scheduled)
cycles HURT: shaders/robclark-shaders/gfxbench5/gl_4_off/109.shader_test TCS SIMD8: 3911 -> 3979 (1.74%) (scheduled: scheduled)
total cycles in shared programs:
313096438 ->
313096306 (<.01%)
cycles in affected programs: 92200 -> 92068 (-0.14%)
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24702>
Emma Anholt [Tue, 13 Jun 2023 23:14:50 +0000 (16:14 -0700)]
intel/fs: Move defin/defout setup to the start of the loop.
Refactor for the next commit.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24702>
Daniel Schürmann [Tue, 15 Aug 2023 10:44:01 +0000 (12:44 +0200)]
nir/opt_move: fix handling of if-condition
By accident, this used the parent of the nir_src which is a nir_if
instead of the parent of the SSA value.
Totals from 10814 (8.10% of 133461) affected shaders: (GFX11)
Instrs:
21759185 ->
21757190 (-0.01%); split: -0.02%, +0.01%
CodeSize:
112320272 ->
112316008 (-0.00%); split: -0.02%, +0.01%
SpillSGPRs: 11220 -> 11212 (-0.07%)
SpillVGPRs: 911 -> 903 (-0.88%); split: -1.54%, +0.66%
Latency:
258334759 ->
258316073 (-0.01%); split: -0.02%, +0.01%
InvThroughput:
31428650 ->
31426394 (-0.01%); split: -0.02%, +0.01%
VClause: 309119 -> 309090 (-0.01%); split: -0.01%, +0.01%
SClause: 657028 -> 657150 (+0.02%); split: -0.03%, +0.04%
Copies: 1434209 -> 1432420 (-0.12%); split: -0.28%, +0.15%
Branches: 481804 -> 481801 (-0.00%)
PreSGPRs: 829995 -> 829966 (-0.00%)
PreVGPRs: 758249 -> 758253 (+0.00%)
Fixes:
8a78706643ecad8a1f303cc9358873abc29978b4 ('nir: refactor nir_opt_move')
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24695>
Alyssa Rosenzweig [Sun, 16 Jul 2023 13:06:06 +0000 (09:06 -0400)]
nir/lower_gs_intrinsics: Remove end primitive for points
EndPrimitive() for points is entirely pointless, so just remove it when lowering
EndPrimitive to simplify the IR. This is (maybe) an optimization everywhere, and
will be relied on for correctness on Asahi.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24798>
Alyssa Rosenzweig [Sun, 20 Aug 2023 15:30:06 +0000 (11:30 -0400)]
nir/print: Print access qualifiers for intrinsics
Instead of printing an opaque integer that needs to be manually decoded.
Example output:
32x4 %7 = @image_load (%4 (0x0), %6, %5 (0x0), %4 (0x0)) (image_dim=2D, image_array=false, format=r8g8b8a8_snorm, access=readonly|reorderable, range_base=0, dest_type=float32)
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24798>
Caio Oliveira [Sat, 27 May 2023 06:25:47 +0000 (23:25 -0700)]
compiler/types: Use smaller keys for explicit_matrix_types table
Instead of using the name as key, use a shorter struct type.
Only build a name string if we are adding a new entry to the table.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23281>
Caio Oliveira [Sat, 27 May 2023 04:23:57 +0000 (21:23 -0700)]
compiler/types: Extract get_explicit_matrix_instance() function
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23281>
Caio Oliveira [Fri, 26 May 2023 20:52:17 +0000 (13:52 -0700)]
compiler/types: Use smaller keys for array_types table
Instead of building a string, build a short struct type and use
that as key. The only caveat here is ensure there either there's
no internal padding or the internal padding is always the same.
Use a static assert to ensure we are in the former case.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23281>
Caio Oliveira [Sat, 27 May 2023 00:30:37 +0000 (17:30 -0700)]
compiler/types: Use ralloc for the key in array_types
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23281>
Eric Engestrom [Sun, 20 Aug 2023 13:10:58 +0000 (14:10 +0100)]
ci/deqp: backport fix for dEQP-EGL.functional.wide_color.*_888_colorspace_*
Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24808>
norablackcat [Wed, 17 May 2023 21:51:49 +0000 (15:51 -0600)]
rusticl: add cl_khr_expect_assume
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Tested-by: Andrey Alekseenko <al42and@gmail.com>
Tested-by: Yifeng Li <tomli@tomli.me>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23115>
norablackcat [Thu, 18 May 2023 21:42:19 +0000 (15:42 -0600)]
spirv/nir_to_spirv: add expect assume op codes
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23115>
Emma Anholt [Wed, 19 Jul 2023 00:05:41 +0000 (17:05 -0700)]
blorp: Disable unaligned partial HIZ fast clears for HIZ_CCS too.
Fixes MSAA scissored fast clears under zink and ANGLE.
Fixes:
e488773b29d9 ("anv: Fast clear depth/stencil surface in vkCmdClearAttachments")
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24225>
Konstantin Seurer [Sun, 6 Aug 2023 10:11:54 +0000 (12:11 +0200)]
radv: Stop updating the stack_size in insert_rt_case
There are two paths that call insert_rt_case:
- Traversal shader: The stack size is ignored.
- Monolithic raygen shader: The stack sizes of the inlined shaders are
accounted for in compute_rt_stack_size.
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24809>
Konstantin Seurer [Sun, 16 Jul 2023 10:16:38 +0000 (12:16 +0200)]
aco: Do not fixup registers if there are no shader calls
Frees up some registers when using monolithic compilation.
Quake II RTX and Control (with monolithic compilation):
Totals from 10 (29.41% of 34) affected shaders:
MaxWaves: 77 -> 98 (+27.27%)
Instrs: 49047 -> 48984 (-0.13%); split: -0.16%, +0.03%
CodeSize: 260420 -> 259880 (-0.21%); split: -0.25%, +0.04%
VGPRs: 1328 -> 1104 (-16.87%)
Latency: 477134 -> 479377 (+0.47%); split: -0.05%, +0.52%
InvThroughput: 137763 -> 114108 (-17.17%)
VClause: 1318 -> 1286 (-2.43%); split: -2.66%, +0.23%
SClause: 1295 -> 1293 (-0.15%); split: -0.54%, +0.39%
Copies: 7838 -> 7782 (-0.71%); split: -0.82%, +0.10%
Branches: 2592 -> 2589 (-0.12%)
PreSGPRs: 874 -> 796 (-8.92%)
PreVGPRs: 1283 -> 1013 (-21.04%)
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24809>
Konstantin Seurer [Sun, 25 Jun 2023 08:49:36 +0000 (10:49 +0200)]
radv/rt: Split stage initialization and hashing
The dependency chain is: init stages -> compute pipeline key -> hash
stages.
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24809>
Konstantin Seurer [Mon, 21 Aug 2023 11:30:12 +0000 (13:30 +0200)]
radv/rt: Insert rt_return_amd before lowering shader calls
Also skips running nir_lower_shader_calls for the traversal shader. This
will be used to skip the pass and the rt_return_amd insertion for
monolithic raygen shaders.
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24809>
Konstantin Seurer [Sat, 24 Jun 2023 14:04:52 +0000 (16:04 +0200)]
radv/rt: Add and use radv_build_traversal
Moves most of the build code to a helper which will be useful for adding
inline traversal.
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24809>
Konstantin Seurer [Sat, 24 Jun 2023 14:00:55 +0000 (16:00 +0200)]
radv/rt: Do not apply stack_ptr for non-recursive stages
stack_ptr is set to 0.
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24809>
Konstantin Seurer [Sat, 24 Jun 2023 13:55:33 +0000 (15:55 +0200)]
radv/rt: Remove some dead code
- call_idx_base was used for resume shaders in the shader call loop
- hit attribs are lowered elsewhere
- stack_size is set in radv_pipeline_rt.c
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24809>
M Henning [Sat, 19 Aug 2023 17:18:39 +0000 (13:18 -0400)]
nv/codegen: Remove Function::buildDefSets
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24791>
M Henning [Sat, 19 Aug 2023 16:48:02 +0000 (12:48 -0400)]
nv/codegen: Delete periodicMask32
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24791>
M Henning [Sat, 19 Aug 2023 16:39:56 +0000 (12:39 -0400)]
nv/codegen: Delete unused OP_CONSTRAINT
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24791>
M Henning [Sat, 19 Aug 2023 16:22:07 +0000 (12:22 -0400)]
nv50_ir_ra: Delete unused functions
Wrap the file in an anonymous namespace and delete any code that
gcc warns is unused.
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24791>
M Henning [Sat, 19 Aug 2023 16:09:59 +0000 (12:09 -0400)]
nv/codegen: Remove unused clipVertexOutput var
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24791>
M Henning [Sat, 19 Aug 2023 16:08:01 +0000 (12:08 -0400)]
nv/codegen: Merge from_common into from_nir
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24791>
M Henning [Sat, 19 Aug 2023 15:51:53 +0000 (11:51 -0400)]
nv/codegen: Remove fragCoord variable.
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24791>
M Henning [Fri, 4 Aug 2023 03:22:14 +0000 (23:22 -0400)]
nv/codegen: Delete OP_EXP, OP_LOG
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24791>
M Henning [Fri, 4 Aug 2023 02:58:22 +0000 (22:58 -0400)]
nv/codegen: Delete OP_WRSV
It's never generated by anything.
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24791>
M Henning [Tue, 22 Aug 2023 02:36:24 +0000 (22:36 -0400)]
nv/codegen: Fix an uninitialized variable warning
The warning was actually a false positibe, but CI failed with:
error: 'nvirOp' may be used uninitialized [-Werror=maybe-uninitialized]
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24791>
Friedrich Vock [Sat, 19 Aug 2023 09:00:45 +0000 (11:00 +0200)]
nir/load_store_vectorize: Handle intrinsics with constant base
This includes nir_load_stack and nir_store_stack, which are vectorized
in nir_lower_shader_calls. If not adjusted, we end up loading from
the wrong base.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9596
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9587
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24789>
Tapani Pälli [Tue, 15 Aug 2023 07:37:25 +0000 (10:37 +0300)]
iris: implement a dummy depth flush for Wa_14016712196
Emit depth flush after state that sends implicit depth flush. These
states are:
3DSTATE_HIER_DEPTH_BUFFER
3DSTATE_STENCIL_BUFFER
3DSTATE_DEPTH_BUFFER
3DSTATE_CPSIZE_CONTROL_BUFFER
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24689>
Tapani Pälli [Tue, 15 Aug 2023 07:37:00 +0000 (10:37 +0300)]
anv: implement a dummy depth flush for Wa_14016712196
Emit depth flush after state that sends implicit depth flush. These
states are:
3DSTATE_HIER_DEPTH_BUFFER
3DSTATE_STENCIL_BUFFER
3DSTATE_DEPTH_BUFFER
3DSTATE_CPSIZE_CONTROL_BUFFER
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24689>
projects / platform / upstream / mesa.git / log