Graeme Russ [Fri, 20 Jan 2012 14:22:48 +0000 (01:22 +1100)]
Merge branch 'staging'
Andreas Müller [Wed, 4 Jan 2012 15:26:25 +0000 (15:26 +0000)]
overo: add SPL support
* implementation based on ti beagleboard/omap3evm
* timing data and i2c workaround for revision 0 boards taken from x-loader
* run-tested with overo revision 0 and 1 / boot from NAND and SDcard
* run-tested with x-loader
Signed-off-by: Andreas Müller <schnitzeltony@gmx.de>
Signed-off-by: Tom Rini <trini@ti.com>
Andreas Müller [Wed, 4 Jan 2012 15:26:24 +0000 (15:26 +0000)]
omap_rev_string: output to stdout
* avoid potential buffer overflows
* allow SPL-build not to output "Texas Instruments Revision detection unimplemented"
Signed-off-by: Andreas Müller <schnitzeltony@gmx.de>
Signed-off-by: Tom Rini <trini@ti.com>
Andreas Müller [Wed, 4 Jan 2012 15:26:23 +0000 (15:26 +0000)]
OMAP SPL: call timer_init in s_init to make udelay work earlier
Signed-off-by: Andreas Müller <schnitzeltony@gmx.de>
Andreas Müller [Wed, 4 Jan 2012 15:26:22 +0000 (15:26 +0000)]
drivers/i2c/omap24xx_i2c.c: move all local variables to SRAM
At old overo boards TWL4030 RTC irq is connected to gpio112. Unfortunately
this pin is also used for revision detection. Therefore we need to send
shut-up to TWL4030 to avoid reading wrong revision. In SPL this must
be done before SDRAM is set up because the type of SDRAM is revision dependent.
By this patch it is ensured that all variables used by omap24xx_i2c.c are
located in SRAM.
Signed-off-by: Andreas Müller <schnitzeltony@gmx.de>
Acked-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Tom Rini <trini@ti.com>
Andreas Müller [Wed, 4 Jan 2012 15:26:21 +0000 (15:26 +0000)]
include/configs/omap3_overo.h: several cleanups
* remove unused macros
* remove unused macro values
* align tabs
* remove Free Software Foundation address
Signed-off-by: Andreas Müller <schnitzeltony@gmx.de>
Andreas Müller [Wed, 4 Jan 2012 15:26:20 +0000 (15:26 +0000)]
board/overo/overo.c: replace printf with one argument by puts
Signed-off-by: Andreas Müller <schnitzeltony@gmx.de>
Andreas Müller [Wed, 4 Jan 2012 15:26:19 +0000 (15:26 +0000)]
drivers/i2c/omap24xx_i2c.c: replace printf with one argument by puts
Signed-off-by: Andreas Müller <schnitzeltony@gmx.de>
Acked-by: Heiko Schocher <hs@denx.de>
Chandan Nath [Mon, 9 Jan 2012 20:38:59 +0000 (20:38 +0000)]
ARM:AM33XX: Add SPL support for AM335X EVM
This patch is added to support SPL feature on AM335X
platform. In this patch, MMC1 is configured as boot
device for SPL and support for other devices will be
added in the next patch series.
Signed-off-by: Chandan Nath <chandan.nath@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Chandan Nath [Mon, 9 Jan 2012 20:38:58 +0000 (20:38 +0000)]
ARM:AM33XX: Add mmc/sd support
This patch add supports for mmc/sd driver on AM335X platform.
PLL and pinmux configurations for mmc/sd are configured in this
patch.
Signed-off-by: Chandan Nath <chandan.nath@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
Chandan Nath [Mon, 9 Jan 2012 20:38:57 +0000 (20:38 +0000)]
ARM:AM33XX: Fixing AM335X config parameters
This patch is added to correct some of the AM335X config
parameters which were incorrect along with some cleanup
like removing unused code.
Signed-off-by: Chandan Nath <chandan.nath@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
Chandan Nath [Mon, 9 Jan 2012 20:38:56 +0000 (20:38 +0000)]
ARM:AM33XX: Fix ddr and timer register offset
This patch is added to update incorrect ddr and timer
register offset.
Signed-off-by: Chandan Nath <chandan.nath@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
Chandan Nath [Mon, 9 Jan 2012 20:38:55 +0000 (20:38 +0000)]
ARM:AM33XX: Replace CONFIG_AM335X with CONFIG_AM33XX
This patch is added to replace CONFIG_AM335X symbol
with CONFIG_AM333XX for AM33XX platforms.
Signed-off-by: Chandan Nath <chandan.nath@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
Tested-by: Thomas Weber <weber@corscience.de>
Nikita Kiryanov [Thu, 12 Jan 2012 03:28:09 +0000 (03:28 +0000)]
cm-t35: use the new EEPROM module to read the MAC address
Switch to the new EEPROM module and fix the problem of MAC address
being read from the wrong offset due to lack of distinction between
EEPROM layouts.
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Nikita Kiryanov [Mon, 2 Jan 2012 04:01:34 +0000 (04:01 +0000)]
cm-t35: pass correct revision information to Linux
Read revision from EEPROM and pass it to Linux.
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Nikita Kiryanov [Thu, 5 Jan 2012 02:03:22 +0000 (02:03 +0000)]
omap3: make get_board_rev() function weak
Current get_board_rev() function returns a hard coded value which is
obviously incorrect for the majority of boards.
Allow boards to provide a correct implementation by making this function
weak.
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Nikita Kiryanov [Thu, 12 Jan 2012 03:26:30 +0000 (03:26 +0000)]
cm-t35: add EEPROM module and pass Linux a serial number
Add board specific EEPROM handling module,
read the serial number from the EEPROM and pass it to Linux.
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Nikita Kiryanov [Mon, 2 Jan 2012 04:01:31 +0000 (04:01 +0000)]
cm-t35: various cleanups
Move #ifdef CONFIG_SMC911X out of board_eth_init() function,
simplify the board_mmc_init() function, and enclose handle_mac_address()
in the CONFIG_SMC911X.
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Nikita Kiryanov [Mon, 2 Jan 2012 04:01:30 +0000 (04:01 +0000)]
cm-t35: cleanup the config file
Remove values from boolean defines, fix indentation, etc..
No functional changes.
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Aneesh V [Thu, 29 Dec 2011 08:47:17 +0000 (08:47 +0000)]
omap4: fix boot issue on ES2.0 Panda
Fix boot issue on ES2.0 Panda by tuning some
IO settings. The CONTROL_EFUSE_2 register has
to be over-ridden in software for 4430 boards.
Commit
23e9f0723e48615332119de4f4ec7a833a282628
wrongly did this for CONTROL_EFUSE_1. Reverting
this and doing it for CONTROL_EFUSE_2.
Signed-off-by: Aneesh V <aneesh@ti.com>
Tested-by: Raúl Porcel <armin76@gentoo.org>
Peter Meerwald [Tue, 3 Jan 2012 04:14:35 +0000 (04:14 +0000)]
beagle: add eeprom expansion board info for bct brettl3
this is for a prototyping board
vendor/product ids have been added to
http://elinux.org/BeagleBoardPinMux#List_of_Vendor_and_Device_IDs
Peter Barada [Mon, 19 Dec 2011 19:54:51 +0000 (19:54 +0000)]
ARMV7: Add support For Logic OMAP35x/DM37x modules
This patch adds basic support for OMAP35x/DM37x SOM LV/Torpedo
reference boards. It assumes U-boot is loaded to SDRAM with the
help of another small bootloader (x-load) running from SRAM.
Signed-off-by: Peter Barada <peter.barada@logicpd.com>
Cc: Tom Rini <tom.rini@gmail.com>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Cc: Wolfgang Denk <wd@denx.de>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Christian Riesch [Wed, 21 Dec 2011 04:49:18 +0000 (04:49 +0000)]
arm, davinci: Change byte order of RTC kick register values
Now the values in the defines agree with those in the manuals.
Signed-off-by: Christian Riesch <christian.riesch@omicron.at>
Cc: Tom Rini <trini@ti.com>
Cc: Heiko Schocher <hs@denx.de>
Thomas Weber [Thu, 15 Dec 2011 23:00:19 +0000 (23:00 +0000)]
OMAP3: Remove unused define CONFIG_OMAP3_*_DDR
This patch removes the unused definitions:
CONFIG_OMAP3_MICRON_DDR
CONFIG_OMAP3_NUMONYX_DDR
CONFIG_OMAP3_INFINEON_DDR
Signed-off-by: Thomas Weber <weber@corscience.de>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Acked-by: Luca Ceresoli <luca.ceresoli@comelit.it>
Christian Riesch [Thu, 15 Dec 2011 00:33:21 +0000 (00:33 +0000)]
da850evm: Remove CONFIG_SYS_xxCACHE_OFF defines
This patch removes the defines CONFIG_SYS_ICACHE_OFF,
CONFIG_SYS_DCACHE_OFF, and CONFIG_SYS_L2CACHE_OFF from the board
configuration. These defines are useless since cache is
anyway disabled for the entire architecture since commit
cba4b1809f043bf85c806e5a4e342f62bd5ded45.
Signed-off-by: Christian Riesch <christian.riesch@omicron.at>
Cc: Tom Rini <trini@ti.com>
Christian Riesch [Thu, 15 Dec 2011 06:21:55 +0000 (06:21 +0000)]
arm, davinci: Use a common configuration file for da850evm and da850_am18xxevm
In commit
06194b6b65f701a9d6ef2d9b4123c4afe57d8783 a separate header
file was introduced for the AM1808 EVM, include/configs/da850_am18xxevm.h.
Before this commit, the da850evm.h configuration file was used for both
the AM1808 and the OMAP-L138 EVMs. The only substantial difference
between the da850evm and the da850_am18xxevm configuration is a single
bit in the hardware revision that is passed to the Linux kernel.
This patch removes include/configs/da850_am18xxevm.h. Instead the
include/configs/da850evm.h configuration is used for AM18xx EVMs and
CONFIG_DA850_AM18X_EVM is defined in boards.cfg.
Signed-off-by: Christian Riesch <christian.riesch@omicron.at>
Cc: Tom Rini <trini@ti.com>
Jason Liu [Thu, 29 Dec 2011 06:34:19 +0000 (06:34 +0000)]
i.mx: i.mx6q: add the initial support for i.mx6q Sabre Lite board
Add the initial support for Freescale i.MX6Q Sabre Lite board
Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com>
Signed-off-by: Jason Liu <jason.hui@linaro.org>
CC: Eric Nelson <eric.nelson@boundarydevices.com>
Jason Liu [Tue, 10 Jan 2012 00:52:59 +0000 (00:52 +0000)]
imx: mx6q: add aipstz init for off platform periph
Init peripheral access control register of AIPSTZ OPACRx:
Buffer Writes(BW): 0 -> not bufferable,
Supervisor Protect(SP): 0 -> not require supervisor privilege level for accesses.
Write Protect(WP): 0 -> allows write accesses.
Trusted Protect(TP): 0 -> allows unstrusted master
Signed-off-by: Jason Liu <jason.hui@linaro.org>
Cc: Stefano Babic <sbabic@denx.de>
Zach Sadecki [Mon, 9 Jan 2012 10:22:54 +0000 (10:22 +0000)]
mx28: fix clearing of IRQs in power init
There are 2 locations in the power init code for the mx28 where IRQs are not being cleared because incorrect methods to clear those bits were being used. This was causing my board to get stuck waiting for POWER_CTRL_VDD5V_DROOP_IRQ to clear. Using the correct method to clear the IRQs fixes it.
Signed-off-by: Zach Sadecki <zach@itwatchdogs.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Acked-by: Marek Vasut <marek.vasut@gmail.com>
Marek Vasut [Sat, 31 Dec 2011 18:28:22 +0000 (18:28 +0000)]
M28EVK: Fix build if CONFIG_CMD_NAND not selected
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Fabio Estevam [Thu, 29 Dec 2011 03:34:13 +0000 (03:34 +0000)]
m28evk: Remove 'all' target from Makefile
Remove 'all' target from Makefile, as this is unused code.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Marek Vasut <marek.vasut@gmail.com>
Fabio Estevam [Thu, 29 Dec 2011 03:35:38 +0000 (03:35 +0000)]
m28evk: Use GENERATED_GBL_DATA_SIZE
Use GENERATED_GBL_DATA_SIZE for calculating CONFIG_SYS_INIT_SP_OFFSET.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Fabio Estevam [Thu, 29 Dec 2011 03:34:12 +0000 (03:34 +0000)]
mx28evk: Remove 'all' target from Makefile
Remove 'all' target from Makefile, as this is unused code.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Marek Vasut <marek.vasut@gmail.com>
Marek Vasut [Thu, 22 Dec 2011 09:55:08 +0000 (09:55 +0000)]
MX28: Fix MXSBOOT segfault if no params specified
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Jason Liu [Mon, 19 Dec 2011 02:38:13 +0000 (02:38 +0000)]
i.mx6:imx6q: allign MAC address with burned-in ordering
For the i.mx6q, the burned-in MAC address will be the following odering,
fuse: 0x620[7:0] MAC_ADDR[7:0] ---> mac[5]
fuse: 0x620[15:8] MAC_ADDR[15:8] ---> mac[4]
fuse: 0x620[23:16] MAC_ADDR[23:16] ---> mac[3]
fuse: 0x620[31:24] MAC_ADDR[31:24] ---> mac[2]
fuse: 0x630[7:0] MAC_ADDR[39:32] ---> mac[1]
fuse: 0x630[15:8] MAC_ADDR[47:40] ---> mac[0]
This patch also fix the error caculation for the fuse bank[0] address
Signed-off-by: Jason Liu <jason.hui@linaro.org>
Cc: Stefano Babic <sbabic@denx.de>
Fabio Estevam [Tue, 20 Dec 2011 05:46:34 +0000 (05:46 +0000)]
mx28evk: Add initial support for MX28EVK board
Add initial support for Freescale MX28EVK board.
Tested boot via SD card and by loading a kernel via TFTP through
the FEC interface.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Marek Vasut <marek.vasut@gmail.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Fabio Estevam [Tue, 20 Dec 2011 05:46:33 +0000 (05:46 +0000)]
mx28: Let dram_init be common for mx28
Let dram_init function be a common function, so that other mx28 boards
can reuse it.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Marek Vasut <marek.vasut@gmail.com>
Fabio Estevam [Tue, 20 Dec 2011 06:42:29 +0000 (06:42 +0000)]
mx28: Let imx_get_mac_from_fuse be common for mx28
Let imx_get_mac_from_fuse function be a common function, so that other
mx28 boards can reuse it.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Marek Vasut <marek.vasut@gmail.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Fabio Estevam [Tue, 20 Dec 2011 05:46:31 +0000 (05:46 +0000)]
net: imx: Add multi-FEC support for imx_get_mac_from_fuse
Add multi-FEC support for imx_get_mac_from_fuse by passing dev_id as a parameter.
This feature is important on mx28 SoC for example that has two FEC ports.
Cc: Ben Warren <biggerbadderben@gmail.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Eric Nelson [Sun, 25 Dec 2011 21:00:47 +0000 (21:00 +0000)]
i.mx6q: mx6qarm2: Enable the usboh3 clock
Bits 0 and 1 of CCM_CCGR7 are the usboh3 clock enable bits. Enabling this
clock is necessary for the USB download.
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
CC: Jason Hui <jason.hui@linaro.org>
Acked-by: Jason Hui <jason.hui@linaro.org>
Veli-Pekka Peltola [Tue, 20 Dec 2011 02:00:11 +0000 (02:00 +0000)]
mx28: remove omap specific config options
Config options for OMAP are not used with i.MX28 so remove dead code.
Signed-off-by: Veli-Pekka Peltola <veli-pekka.peltola@bluegiga.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Jason Liu [Fri, 16 Dec 2011 05:17:08 +0000 (05:17 +0000)]
i.mx6q: arm2: Add the enet function support
This enable the network function on the i.mx6q armadillo2
board(arm2), thus we can use tftp to load image from network.
Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Jason Liu <jason.hui@linaro.org>
Tested-by: Dirk Behme <dirk.behme@de.bosch.com>
Jason Liu [Fri, 16 Dec 2011 05:17:07 +0000 (05:17 +0000)]
fec: add the i.mx6q enet driver support
Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Jason Liu <jason.hui@linaro.org>
Acked-by: Stefano Babic <sbabic@denx.de>
Jason Liu [Fri, 16 Dec 2011 05:17:06 +0000 (05:17 +0000)]
i.mx: i.mx6q: Add the enet clock function
Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Jason Liu <jason.hui@linaro.org>
Acked-by: Stefano Babic <sbabic@denx.de>
Stefan Kristiansson [Fri, 18 Nov 2011 19:21:38 +0000 (19:21 +0000)]
openrisc: Add MAINTAINERS entry
Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
Stefan Kristiansson [Fri, 18 Nov 2011 19:21:37 +0000 (19:21 +0000)]
openrisc: Add architecture to MAKEALL
Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
Stefan Kristiansson [Sat, 26 Nov 2011 19:04:55 +0000 (19:04 +0000)]
openrisc: Add openrisc-generic example board
Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
Stefan Kristiansson [Fri, 18 Nov 2011 19:21:35 +0000 (19:21 +0000)]
openrisc: Add support for standalone programs
Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
Stefan Kristiansson [Fri, 18 Nov 2011 19:21:34 +0000 (19:21 +0000)]
openrisc: Add board info printout to cmd_bdinfo
Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
Stefan Kristiansson [Sat, 26 Nov 2011 19:04:52 +0000 (19:04 +0000)]
openrisc: Add library functions
Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
Stefan Kristiansson [Sat, 26 Nov 2011 19:04:51 +0000 (19:04 +0000)]
openrisc: Add cpu files
Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
Stefan Kristiansson [Sat, 26 Nov 2011 19:04:50 +0000 (19:04 +0000)]
openrisc: Add architecture image support
Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
Stefan Kristiansson [Sat, 26 Nov 2011 19:04:49 +0000 (19:04 +0000)]
openrisc: Add architecture header files
Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
David Wagner [Wed, 23 Nov 2011 10:28:10 +0000 (10:28 +0000)]
Strip mkenvimage
Signed-off-by: David Wagner <david.wagner@free-electrons.com>
Kumar Gala [Thu, 12 Jan 2012 09:30:41 +0000 (09:30 +0000)]
post/Makefile: Only build FP post tests if enabled via CONFIG_SYS_POST_FPU
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Wolfgang Denk [Fri, 13 Jan 2012 19:39:33 +0000 (20:39 +0100)]
Merge branch 'master' of /home/wd/git/u-boot/custodians
* 'master' of /home/wd/git/u-boot/custodians:
fsl_lbc: add printout of LCRR and LBCR to local bus regs
sbc8548: Fix up local bus init to be frequency aware
sbc8548: enable support for hardware SPD errata workaround
sbc8548: relocate fixed ddr init code to ddr.c file
sbc8548: Make enabling SPD RAM configuration work
sbc8548: Fix LBC SDRAM initialization settings
sbc8548: enable ability to boot from alternate flash
sbc8548: relocate 64MB user flash to sane boundary
Revert "SBC8548: fix address mask to allow 64M flash"
MPC85xxCDS: Fix missing LCRR_DBYP bits for 66-133MHz LBC
eXMeritus HWW-1U-1A: Add support for the AT24C128N I2C EEPROM
eXMeritus HWW-1U-1A: Minor environment variable tweaks
Wolfgang Denk [Fri, 13 Jan 2012 19:38:49 +0000 (20:38 +0100)]
Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx
* 'master' of git://git.denx.de/u-boot-mpc85xx:
fsl_lbc: add printout of LCRR and LBCR to local bus regs
sbc8548: Fix up local bus init to be frequency aware
sbc8548: enable support for hardware SPD errata workaround
sbc8548: relocate fixed ddr init code to ddr.c file
sbc8548: Make enabling SPD RAM configuration work
sbc8548: Fix LBC SDRAM initialization settings
sbc8548: enable ability to boot from alternate flash
sbc8548: relocate 64MB user flash to sane boundary
Revert "SBC8548: fix address mask to allow 64M flash"
MPC85xxCDS: Fix missing LCRR_DBYP bits for 66-133MHz LBC
eXMeritus HWW-1U-1A: Add support for the AT24C128N I2C EEPROM
eXMeritus HWW-1U-1A: Minor environment variable tweaks
Wolfgang Denk [Fri, 13 Jan 2012 19:13:26 +0000 (20:13 +0100)]
Merge branch 'master' of /home/wd/git/u-boot/custodians
* 'master' of /home/wd/git/u-boot/custodians:
fix: error ATMEL_FIO_BASE undeclared, if use I2C_Soft on AT91
Wolfgang Denk [Fri, 13 Jan 2012 19:13:20 +0000 (20:13 +0100)]
Merge branch 'master' of git://git.denx.de/u-boot-i2c
* 'master' of git://git.denx.de/u-boot-i2c:
fix: error ATMEL_FIO_BASE undeclared, if use I2C_Soft on AT91
Wolfgang Denk [Fri, 13 Jan 2012 19:11:25 +0000 (20:11 +0100)]
Merge branch 'master' of /home/wd/git/u-boot/custodians
* 'master' of /home/wd/git/u-boot/custodians:
board/mpl/pati: use the CFI driver for the PATI board
board/mpl/mip405: use the CFI driver for the MIP405/MIP405T board
board/mpl/pip405: use the CFI driver for the PIP405 board
board/mpl/common: remove the old legacy flash
ppc4xx: Setup HICB on Io64
Wolfgang Denk [Fri, 13 Jan 2012 19:11:22 +0000 (20:11 +0100)]
Merge branch 'master' of git://git.denx.de/u-boot-ppc4xx
* 'master' of git://git.denx.de/u-boot-ppc4xx:
board/mpl/pati: use the CFI driver for the PATI board
board/mpl/mip405: use the CFI driver for the MIP405/MIP405T board
board/mpl/pip405: use the CFI driver for the PIP405 board
board/mpl/common: remove the old legacy flash
ppc4xx: Setup HICB on Io64
Wolfgang Denk [Fri, 13 Jan 2012 19:10:56 +0000 (20:10 +0100)]
Merge branch 'master' of /home/wd/git/u-boot/custodians
* 'master' of /home/wd/git/u-boot/custodians:
mpc8313erdb: fix mtdparts address
powerpc/83xx/km: add support for 8321 based tuge1 board
powerpc/83xx/km: merge tuxa and tuda1 boards to tuxx1
powerpc/83xx/km: remove obsolete defines for tuda1
powerpc/83xx/km: update SDRAM parameters for km8321 boards
mpc8313erdb: Enable GPIO support on the MPC8313E RDB
mpc83xx: Add a GPIO driver for the MPC83XX family
gpio: Replace ARM gpio.h with the common API in include/asm-generic
gpio: Modify common gpio.h to more closely match Linux
Wolfgang Denk [Fri, 13 Jan 2012 19:07:40 +0000 (20:07 +0100)]
Merge branch 'master' of git://git.denx.de/u-boot-mpc83xx
* 'master' of git://git.denx.de/u-boot-mpc83xx:
mpc8313erdb: fix mtdparts address
powerpc/83xx/km: add support for 8321 based tuge1 board
powerpc/83xx/km: merge tuxa and tuda1 boards to tuxx1
powerpc/83xx/km: remove obsolete defines for tuda1
powerpc/83xx/km: update SDRAM parameters for km8321 boards
mpc8313erdb: Enable GPIO support on the MPC8313E RDB
mpc83xx: Add a GPIO driver for the MPC83XX family
gpio: Replace ARM gpio.h with the common API in include/asm-generic
gpio: Modify common gpio.h to more closely match Linux
Wolfgang Denk [Fri, 13 Jan 2012 19:05:47 +0000 (20:05 +0100)]
Merge branch 'master' of /home/wd/git/u-boot/custodians
* 'master' of /home/wd/git/u-boot/custodians:
fsl_esdhc: fix PIO mode transfers
mmc: tegra2: Implement card-detect hook.
mmc: fsl_esdhc: Implement card-detect hook.
mmc: Implement card detection.
mmc: Change board_mmc_getcd() function prototype.
drivers/mmc/mv_sdhci.c: Fix build warning
ftsdc010: improve performance and capability
mmc: add host_caps checking avoid switch card improperly
i.mx: fsl_esdhc: add the i.mx6q support
Paul Gortmaker [Thu, 15 Dec 2011 15:22:07 +0000 (10:22 -0500)]
fsl_lbc: add printout of LCRR and LBCR to local bus regs
It can be handy to have these in the output when trying to
debug odd behaviour.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Paul Gortmaker [Sat, 31 Dec 2011 04:53:13 +0000 (23:53 -0500)]
sbc8548: Fix up local bus init to be frequency aware
The code here was copied from the mpc8548cds support, and it
wasn't using the CONFIG_SYS_LBC_LCRR define, and was just
unconditionally setting the LCRR_EADC bit. Snooping with a
hardware debugger also showed we had LCRR_DBYP set, since we were
setting it based on a read of an uninitialized lcrr read via
clkdiv. Borrow from the code in the tqm85xx.c support to add
LBC frequency aware masking of these bits.
This change will correct reliability issues associated with trying
to use the 128MB of LBC 100MHz SDRAM on this board. Thanks to
Keith Savage for assistance in diagnosing the root cause of this.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Paul Gortmaker [Sat, 31 Dec 2011 04:53:12 +0000 (23:53 -0500)]
sbc8548: enable support for hardware SPD errata workaround
Existing boards by default have an issue where the LBC SDRAM
SPD EEPROM and the DDR2 SDRAM SPD EEPROM both land at 0x51.
After the hardware modification listed in the README is made,
then the DDR2 SPD EEPROM appears at 0x53. So this implements
a board specific get_spd() by taking advantage of the existing
weak linkage, that 1st tries reading at 0x53 and then if that
fails, it falls back to the old 0x51.
Since the old dependency issue of "SPD implies no LBC SDRAM"
gets removed with the hardware errata fix, remove that restriction
in the code, so both LBC SDRAM and SPD can be selected.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Paul Gortmaker [Sat, 31 Dec 2011 04:53:11 +0000 (23:53 -0500)]
sbc8548: relocate fixed ddr init code to ddr.c file
Nothing to see here, just a relocation of the fixed ddr init
sequence to live in the actual ddr.c file itself.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Paul Gortmaker [Sat, 31 Dec 2011 04:53:10 +0000 (23:53 -0500)]
sbc8548: Make enabling SPD RAM configuration work
Previously, SPD configuration of RAM was non functional on
this board. Now that the root cause is known (an i2c address
conflict), there is a simple end-user workaround - remove the
old slower local bus 128MB module and then SPD detection on the
main DDR2 memory module works fine.
We make the enablement of the LBC SDRAM support conditional on
being not SPD enabled. We can revisit this dependency as the
hardware workaround becomes available.
Turning off LBC SDRAM support revealed a couple implict dependencies
in the tlb/law code that always expected an LBC SDRAM address.
This has been tested with the default 256MB module, a 512MB
a 1GB and a 2GB, of varying speeds, and the SPD autoconfiguration
worked fine in all cases.
The default configuration remains to go with the hard coded
DDR config, so the default build will continue to work on boards
where people don't bother to read the docs. But the advantage
of going to the SPD config is that even the small default module
gets configured for CL3 instead of CL4.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Paul Gortmaker [Sat, 31 Dec 2011 04:53:09 +0000 (23:53 -0500)]
sbc8548: Fix LBC SDRAM initialization settings
These were cloned from the mpc8548cds platform which has
a different memory layout (1/2 the size). Set the values
by comparing to the register file for the board used during
JTAG init sequence:
LSDMR1 0x2863B727 /* PCHALL */
LSDMR2 0x0863B727 /* NORMAL */
LSDMR3 0x1863B727 /* MRW */
LSDMR4 0x4063B727 /* RFEN */
This differs from what was there already in that the RFEN is
not bundled in all four steps implicitly, but issued once
as the final step.
The other difference seen when comparing vs. the register file init,
is that since the memory is split across /CS3 and /CS4, the dummy
writes need to go to 0xf000_0000 _and_ to 0xf400_0000.
We also rewrite the final LBC SDRAM inits as macros, as there is
no real need for them to be a local variable that is modified
on the fly at runtime.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Paul Gortmaker [Sat, 31 Dec 2011 04:53:08 +0000 (23:53 -0500)]
sbc8548: enable ability to boot from alternate flash
This board has an 8MB soldered on flash, and a 64MB SODIMM
flash module. Normally the board boots from the 8MB flash,
but the hardware can be configured for booting from the 64MB
flash as well by swapping CS0 and CS6. This can be handy
for recovery purposes, or for supporting u-boot and VxBoot
at the same time.
To support this in u-boot, we need to have different BR0/OR0
and BR6/OR6 settings in place for when the board is configured
in this way, and a different TEXT_BASE needs to be used due
to the larger sector size of the 64MB flash module.
We introduce the suffix _8M and _64M for the BR0/BR6 and the
OR0/OR6 values so it is clear which is being used to map what
specific device.
The larger sector size (512k) of the alternate flash needs
a larger malloc pool, otherwise you'll get failures when
running saveenv, so bump it up accordingly.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Paul Gortmaker [Sat, 31 Dec 2011 04:53:07 +0000 (23:53 -0500)]
sbc8548: relocate 64MB user flash to sane boundary
The current situation has the 64MB user flash at an awkward
alignment; shifted back from 0xfc00_0000 by 8M, to leave an 8MB hole
for the soldered on boot flash @ EOM. But to switch to optionally
supporting booting off the 64MB flash, the 64MB will then be mapped
at the sane address of 0xfc00_0000.
This leads to awkward things when programming the 64MB flash prior
to transitioning to it -- i.e. even though the chip spans from
0xfb80_0000 to 0xff7f_ffff, you would have to program a u-boot image
into the two sectors from 0xfbf0_0000 --> 0xfbff_ffff so that it was
in the right place when JP12/SW2.8 were switched to make the 64MB on
/CS0. (i.e. the chip is only looking at the bits in mask 0x3ff_ffff)
We also have to have three TLB entries responsible for dealing with
mapping the 64MB flash due to this 8MB of misalignment.
In the end, there is address space from 0xec00_0000 to 0xefff_ffff
where we can map it, and then the transition from booting from one
config to the other will be a simple 0xec --> 0xfc mapping. Plus we
can toss out a TLB entry.
Note that TLB0 is kept at 64MB and not shrunk down to the 8MB boot
flash; this means we won't have to change it when the alternate
config uses the full 64MB for booting, in TLB0.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Paul Gortmaker [Sat, 31 Dec 2011 04:53:06 +0000 (23:53 -0500)]
Revert "SBC8548: fix address mask to allow 64M flash"
This reverts commit
ccf1ad535ae1c0dc2d466235c668adbdfe3a55b7.
The commit "SBC8548: fix address mask to allow 64M flash"
essentially made this change:
* OR6:
- * Addr Mask = 64M = OR6[0:16] = 1111 1100 0000 0000 0
+ * Addr Mask = 64M = OR6[0:16] = 1111 1000 0000 0000 0
But this makes no sense, as section 13.3.1.2.1 in the
MPC8548ERM v2 clearly indicates the masks:
1111_1111_1000_0000_0 8 Mbytes
1111_1100_0000_0000_0 64 Mbytes
1111_1000_0000_0000_0 128 Mbytes
So the original value was correct, and the commit was invalid,
causing a 128MB mapping for a 64MB flash device. The problem
rears its head when trying to configure u-boot to have access
to both flash, since the default memory map is:
FB80_0000 – FF7F_FFFF 32-bits 64MB FLASH SODIMM
FF80_0000 – FFFF_FFFF 8-bits 8MB FLASH
By extending the mapping of the 64MB flash to 128MB, it now
conflicts with the normal 8MB boot flash, causing issues.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Paul Gortmaker [Fri, 16 Dec 2011 22:31:53 +0000 (17:31 -0500)]
MPC85xxCDS: Fix missing LCRR_DBYP bits for 66-133MHz LBC
These boards were meaning to deploy this value:
#define LCRR_DBYP 0x80000000
but were missing a zero, and hence toggling a bit that
lands in an area marked as reserved in the 8548 reference
manual.
According to the documentation, LCRR_DBYP should be used as:
PLL bypass. This bit should be set when using low bus
clock frequencies if the PLL is unable to lock. When in
PLL bypass mode, incoming data is captured in the middle
of the bus clock cycle. It is recommended that PLL bypass
mode be used at frequencies of 83 MHz or less.
So the impact would most likely be undefined behaviour for
LBC peripherals on boards that were running below 83MHz LBC.
Looking at the actual u-boot code, the missing DBYP bit was
meant to be deployed as follows:
Between 66 and 133, the DLL is enabled with an
override workaround.
In the future, we'll convert all boards to use the symbolic
DBYP constant to avoid these "count the zeros" problems, but
for now, just fix the impacted boards.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Kyle Moffett [Fri, 16 Dec 2011 03:26:52 +0000 (22:26 -0500)]
eXMeritus HWW-1U-1A: Add support for the AT24C128N I2C EEPROM
This EEPROM is hardware-write-protected and used to persist key
information such as the serial number and MAC addresses even if the
primary environment sector in NOR FLASH is overwritten.
During manufacturing, the environment is initialized from Linux and then
the key parameters copied to the EEPROM via U-Boot:
env export -c -s 0x2000 $loadaddr serial# macaddr mac1addr mac2addr
eeprom write $loadaddr 0x0000 0x2000
The chip is then locked via hardware for delivery.
When doing a field U-Boot upgrade, the environment is erased and reset
to the defaults to avoid problems with "hwconfig" changes, etc. After
loading the new U-Boot image, the hardware data is reloaded:
i2c dev 0
eeprom read $loadaddr 0x0000 0x2000
env import -c $loadaddr 0x2000
saveenv
The first three commands are saved in the "restore_eeprom" variable for
user convenience. (EG: "run restore_eeprom && saveenv")
Signed-off-by: Kyle Moffett <Kyle.D.Moffett@boeing.com>
Cc: Andy Fleming <afleming@gmail.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Kyle Moffett [Fri, 16 Dec 2011 03:26:53 +0000 (22:26 -0500)]
eXMeritus HWW-1U-1A: Minor environment variable tweaks
Most of the ethernet connections are internal links with specialized
hardware and are not useful for "dhcp" or general-purpose networking;
U-Boot should not be cycling through them. Force the primary external
network interface in "ethprime" and disable the interface cycling with
"ethrotate=no".
Additionally, the environment variable "preboot" has its own config
option and means something entirely different from what the HWW-1U-1A
variable was intended for. Rename the board variable to "setbootargs"
to avoid potential confusion.
Finally, fix an incorrect address for the kernel in FLASH memory.
Signed-off-by: Kyle Moffett <Kyle.D.Moffett@boeing.com>
Cc: Andy Fleming <afleming@gmail.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
esw@bus-elektronik.de [Tue, 20 Dec 2011 06:05:30 +0000 (06:05 +0000)]
fix: error ATMEL_FIO_BASE undeclared, if use I2C_Soft on AT91
* Since AT91 name schema was changed to ATMEL_BASE_xxx, I2C_SOFT
on AT91 devices fails with 'error: ATMEL_FIO_BASE undeclared'
* change ATMEL_PIO_BASE to ATMEL_BASE_PIOA will fix this
Signed-off-by: Jens Scharsig <esw@bus-elektronik.de>
Scott Wood [Wed, 4 Jan 2012 22:48:26 +0000 (16:48 -0600)]
mpc8313erdb: fix mtdparts address
Fix a copy-and-paste error when adapting mpc8315erdb mtdparts
to mpc8313erdb. mtdids was already using the proper address
on mpc8313erdb.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Holger Brunck [Wed, 14 Dec 2011 15:21:45 +0000 (16:21 +0100)]
powerpc/83xx/km: add support for 8321 based tuge1 board
This board is similar to our tuxx1 target. But on this board there
is only one application specific chip select configured.
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
cc: Valentin Longchamp <valentin.longchamp@keymile.com>
Acked-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Holger Brunck [Wed, 14 Dec 2011 15:21:44 +0000 (16:21 +0100)]
powerpc/83xx/km: merge tuxa and tuda1 boards to tuxx1
These boards are from a u-boot point of view identical. So collect
the two headerfiles to one, to decrease maintenance.
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
cc: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Heiko Schocher <hs@denx.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Holger Brunck [Wed, 14 Dec 2011 15:21:43 +0000 (16:21 +0100)]
powerpc/83xx/km: remove obsolete defines for tuda1
CONFIG_SYS_LCRR is unused and CONFIG_SYS_LBC_LBCR is already
defined in the common header file, so remove them.
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
cc: Valentin Longchamp <valentin.longchamp@keymile.com>
Acked-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Marco Schmid [Wed, 14 Dec 2011 15:21:42 +0000 (16:21 +0100)]
powerpc/83xx/km: update SDRAM parameters for km8321 boards
Measurements during HW basic test showed, that the SDRAM timing
has to be optimized. This patch adapted these timings accordingly.
Signed-off-by: Marco Schmid <marco.schmid@keymile.com>
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
cc: Valentin Longchamp <valentin.longchamp@keymile.com>
Acked-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Joe Hershberger [Fri, 11 Nov 2011 21:55:38 +0000 (15:55 -0600)]
mpc8313erdb: Enable GPIO support on the MPC8313E RDB
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Joe Hershberger [Fri, 11 Nov 2011 21:55:37 +0000 (15:55 -0600)]
mpc83xx: Add a GPIO driver for the MPC83XX family
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Joe Hershberger [Fri, 11 Nov 2011 21:55:36 +0000 (15:55 -0600)]
gpio: Replace ARM gpio.h with the common API in include/asm-generic
ARM boards should use the generic GPIO API
This means changing gpio to unsigned type
Remove the unused gpio_toggle() function which is not part of the API
Comment that free should not modify pin state
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
fixed merge conflict in da8xx_gpio.c, tegra2_gpio.c, and
extended to the new mxs_gpio.c.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Joe Hershberger [Fri, 11 Nov 2011 21:55:35 +0000 (15:55 -0600)]
gpio: Modify common gpio.h to more closely match Linux
Change "int gp" to "unsigned gpio"
Add request and free entry-points
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
David Müller [Thu, 22 Dec 2011 12:38:22 +0000 (13:38 +0100)]
board/mpl/pati: use the CFI driver for the PATI board
Signed-off-by: David Mueller <d.mueller@elsoft.ch>
Signed-off-by: Stefan Roese <sr@denx.de>
David Müller [Thu, 22 Dec 2011 12:38:21 +0000 (13:38 +0100)]
board/mpl/mip405: use the CFI driver for the MIP405/MIP405T board
Signed-off-by: David Mueller <d.mueller@elsoft.ch>
Signed-off-by: Stefan Roese <sr@denx.de>
David Müller [Thu, 22 Dec 2011 12:38:20 +0000 (13:38 +0100)]
board/mpl/pip405: use the CFI driver for the PIP405 board
Signed-off-by: David Mueller <d.mueller@elsoft.ch>
Signed-off-by: Stefan Roese <sr@denx.de>
David Müller [Thu, 22 Dec 2011 12:38:19 +0000 (13:38 +0100)]
board/mpl/common: remove the old legacy flash
Signed-off-by: David Mueller <d.mueller@elsoft.ch>
Signed-off-by: Stefan Roese <sr@denx.de>
Dirk Eibach [Mon, 2 Jan 2012 10:02:46 +0000 (11:02 +0100)]
ppc4xx: Setup HICB on Io64
The FPGA High-Speed Interconnect Bus (HICB) is now setup by u-boot.
Signed-off-by: Dirk Eibach <eibach@gdsys.de>
Signed-off-by: Stefan Roese <sr@denx.de>
Ira Snyder [Fri, 23 Dec 2011 08:30:40 +0000 (08:30 +0000)]
fsl_esdhc: fix PIO mode transfers
The pointer to the registers used to control the Freescale ESDHC MMC
controller is not initialized correctly when using PIO mode. This is
fixed by initializing the pointer in the same way as all other sites
within the driver.
Examining the commit history shows that this was broken at introduction
due to a code change in upstream U-Boot to support the mx51 processor
family.
Reported-by: Jim Lentz <JLentz@zhone.com>
Cc: Andy Fleming <afleming@freescale.com>
Cc: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu>
Thierry Reding [Mon, 2 Jan 2012 01:15:39 +0000 (01:15 +0000)]
mmc: tegra2: Implement card-detect hook.
On Tegra2, card-detection is implemented by passing the card-detection
GPIOs to the MMC driver at initialization time. Instead of implementing
the board_mmc_getcd() function, use the card-detect hook and allow
boards to override it by providing their own board_mmc_getcd()
implementation.
Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Thierry Reding [Mon, 2 Jan 2012 01:15:38 +0000 (01:15 +0000)]
mmc: fsl_esdhc: Implement card-detect hook.
This card-detect hook probably doesn't work. Perhaps somebody with more
knowledge about the hardware can comment on this. I think that perhaps
even the complete code from esdhc_init() could go into the getcd()
function instead or mmc_getcd() needs to be called at some later time
after mmc_init(), which, however, would require many other drivers to
change.
In addition to implementing the hook, this patch also removes the call
to the board_mmc_getcd() function which is now called from the MMC
framework and is no longer required here.
Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Tested-by: Jason Liu <jason.hui@linaro.org>
Thierry Reding [Mon, 2 Jan 2012 01:15:37 +0000 (01:15 +0000)]
mmc: Implement card detection.
Check for card detect each time an MMC/SD device is initialized. If card
detection is not implemented, this code behaves as before and continues
assuming a card is present. If no card is detected, has_init is reset
for the MMC/SD device (to force initialization next time) and an error
is returned.
Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Tested-by: Jason Liu <jason.hui@linaro.org>
Thierry Reding [Mon, 2 Jan 2012 01:15:36 +0000 (01:15 +0000)]
mmc: Change board_mmc_getcd() function prototype.
The new API no longer uses the extra cd parameter that was used to store
the card presence state. Instead, this information is returned via the
function's return value. board_mmc_getcd() returns -1 to indicate that
no card-detection mechanism is implemented; 0 indicates that no card is
present and 1 is returned if it was detected that a card is present.
The rationale for this change can be found in the following email
thread:
http://lists.denx.de/pipermail/u-boot/2011-November/110180.html
In summary, the old API was not consistent with the rest of the MMC API
which always passes a struct mmc as the first parameter. Furthermore the
cd parameter was used to mean "card absence" in some implementations and
"card presence" in others.
Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Tested-by: Jason Liu <jason.hui@linaro.org>
Anatolij Gustschin [Wed, 7 Dec 2011 11:47:48 +0000 (11:47 +0000)]
drivers/mmc/mv_sdhci.c: Fix build warning
Fix:
mv_sdhci.c: In function 'mv_sdh_init':
mv_sdhci.c:47:22: warning: the comparison will always
evaluate as 'true' for the address of 'mv_sdhci_writeb'
will never be NULL [-Waddress]
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Lei Wen <leiwen@marvell.com>
Cc: Andy Fleming <afleming@freescale.com>
Acked-by: Lei Wen <leiwen@marvell.com>
Macpaul Lin [Mon, 28 Nov 2011 17:30:17 +0000 (17:30 +0000)]
ftsdc010: improve performance and capability
This patch improve the performance by spliting flag examination code
in ftsdc010_send_cmd() into 3 functions.
This patch also reordered the function which made better capability to
some high performance cards against to the next version of ftsdc010
hardware.
Signed-off-by: Macpaul Lin <macpaul@andestech.com>
Macpaul Lin [Mon, 28 Nov 2011 16:31:09 +0000 (16:31 +0000)]
mmc: add host_caps checking avoid switch card improperly
Add a host capability checking to avoid the mmc stack
switch the card to HIGHSPEED mode when the card supports
HIGHSPEED while the host doesn't.
This patch avoid furthur transaction problem when the
mmc/sd card runs different mode to the host.
Signed-off-by: Macpaul Lin <macpaul@andestech.com>
Jason Liu [Fri, 25 Nov 2011 00:18:04 +0000 (00:18 +0000)]
i.mx: fsl_esdhc: add the i.mx6q support
The mmc host controller on the i.mx6q is called usdhc which
is redesigned based on the freescale esdhc controller.
The usdhc controller is almost compatible with esdhc except
it adds one mix register to support debug/SD3.0 and move
the low bit 0-6 of XFERTYP register to the mix control reg
low bit 0-6. Thus on i.mx6q, we have the following compared
with the previous soc: (can refer to RM of chapter 56.3.3)
i.mx6q:
mix control:
bit 31 - bit 7: Added for debug/SD3.0 support
bit 6 - bit 0: move in the XFERTYP register bit 6-0 on previous soc
XFERTYP register:
bit 31 - bit 7: the same as before,
bit 6 - bit 0: no-use
previous soc
mix control: no
XFERTYP register:
bit 31 - bit 0: xfertype information
Signed-off-by: Jason Liu <jason.hui@linaro.org>
Cc: Andy Fleming <afleming@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
projects / platform / kernel / u-boot.git / log