Heiko Schocher [Tue, 24 Jan 2023 17:07:00 +0000 (18:07 +0100)]
powerpc/mpc85xx: socrates: enable signed fitImages
allow only to boot signed fitimages (and signed u-boot
scripts).
Signed-off-by: Heiko Schocher <hs@denx.de>
Heiko Schocher [Tue, 24 Jan 2023 17:06:59 +0000 (18:06 +0100)]
powerpc/mpc85xx: socrates: enable protected Environment
enable protected Environment on socrates board.
Signed-off-by: Heiko Schocher <hs@denx.de>
Heiko Schocher [Tue, 24 Jan 2023 17:06:58 +0000 (18:06 +0100)]
powerpc/mpc85xx: socrates: add autoboot delay string
add autoboot delay string for socrates board.
use sha256 for abort autoboot, use "ao" to abort.
Signed-off-by: Heiko Schocher <hs@denx.de>
Heiko Schocher [Tue, 24 Jan 2023 17:06:57 +0000 (18:06 +0100)]
powerpc/mpc85xx: socrates: add support for i2c eeprom at 0x51
add support for i2c eeprom on address 0x51.
Signed-off-by: Heiko Schocher <hs@denx.de>
Heiko Schocher [Tue, 24 Jan 2023 17:06:56 +0000 (18:06 +0100)]
powerpc/mpc85xx: socrates: Add boot retry feature
add boot retry feature and reboot after 120 seconds.
Signed-off-by: Heiko Schocher <hs@denx.de>
Heiko Schocher [Tue, 24 Jan 2023 17:06:55 +0000 (18:06 +0100)]
powerpc/mpc85xx: socrates: drop second flash bank
drop second flash bank, as not used anymore.
Signed-off-by: Heiko Schocher <hs@denx.de>
Heiko Schocher [Tue, 24 Jan 2023 17:06:54 +0000 (18:06 +0100)]
powerpc/mpc85xx: socrates: add initrd_high default environment variable
we need to set initrd_high to get fitimage booting.
Without, U-Boot drops when booting fitimage:
ERROR: Failed to allocate 0x59a0b6 bytes below 0x800000.
ramdisk - allocation error
bootm - boot application image from memory
Signed-off-by: Heiko Schocher <hs@denx.de>
Heiko Schocher [Tue, 24 Jan 2023 17:06:53 +0000 (18:06 +0100)]
powerpc/mpc85xx: socrates: add MTD partitioning support
setup MTD partitioning through mtdparts variable
and set it to:
mtdparts=
fe0000000.nor:13312k(system1),13312k(system2),5120k(data),128k(env),128k(env-red),768k(u-boot)
and pass this to linux per kernel commandline.
Signed-off-by: Heiko Schocher <hs@denx.de>
Heiko Schocher [Tue, 24 Jan 2023 17:06:52 +0000 (18:06 +0100)]
powerpc: dts: updates socrates board
include common e500v2_power_isa.dtsi and rearrange
some nodes.
Signed-off-by: Heiko Schocher <hs@denx.de>
Heiko Schocher [Tue, 24 Jan 2023 17:06:51 +0000 (18:06 +0100)]
powerpc/mpc85xx: drop socrates specific image creation
convert socrates board to use MPC85XX_HAVE_RESET_VECTOR and
disable CONFIG_OF_BOARD and use common u-boot.dtsi for
creating u-boot-dtb.bin.
Signed-off-by: Heiko Schocher <hs@denx.de>
Heiko Schocher [Tue, 24 Jan 2023 17:06:50 +0000 (18:06 +0100)]
powerpc/mpc85xx: socrates: rework build process
U-Boot build process for socrates board produces final U-Boot binary in
file u-boot-socrates.bin (by binman) And as a bonus it produces two
unusable broken binaries u-boot-dtb.bin and u-boot.bin (by Makefile).
Clean this up, so final U-Boot binary is in u-boot-dtb.bin
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Heiko Schocher <hs@denx.de>
Heiko Schocher [Tue, 24 Jan 2023 17:06:49 +0000 (18:06 +0100)]
powerpc/mpc85xx: fixes and updates for socrates board
current mainline does not work on socrates board. To
get it back up working, there are some updates needed
in socrates_defconfig.
Signed-off-by: Heiko Schocher <hs@denx.de>
Fixes:
94633c36f9eb ("net: Make DM_ETH be selected by NETDEVICE")
Fixes:
2f8a6db5d83b ("Finish conversion of CONFIG_SYS_CLK_FREQ to Kconfig")
Simon Glass [Tue, 24 Jan 2023 10:55:10 +0000 (03:55 -0700)]
spl: Drop unwanted return in spl_fit_upload_fpga()
This was added by mistake and renders the function useless. Fix it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Fixes:
33c60a38bb9 ("trace: Use notrace for short")
Reported-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier-oss@weidmueller.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Roger Quadros [Tue, 24 Jan 2023 09:43:27 +0000 (11:43 +0200)]
arm: dts: k3-am64: Fix CPSW3G ethernet
As MDIO driver does not support Driver Model, the
pinctrl settings in the MDIO node will not
be applied resulting in PHY not being detected.
To workaround this we add the MDIO pinctrl in
the CPSW3G node in the -u-boot.dtsi file.
Add the missing MDIO and RGMII pinctrl nodes in
k3-am642-r5-evm.dts
Signed-off-by: Roger Quadros <rogerq@kernel.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Roger Quadros [Tue, 24 Jan 2023 09:43:26 +0000 (11:43 +0200)]
arm: dts: k3-am6: Fix "EEPROM not available" error
We need to enable i2c0 so u-boot can read from EEPROM.
Signed-off-by: Roger Quadros <rogerq@kernel.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Roger Quadros [Tue, 24 Jan 2023 09:43:25 +0000 (11:43 +0200)]
arm: dts: k3-am64: sync with Linux DT files
Sync AM64 DT files with Linux v6.2-rc4
Signed-off-by: Roger Quadros <rogerq@kernel.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Holger Brunck [Tue, 24 Jan 2023 08:42:41 +0000 (09:42 +0100)]
km/ppc832x: join config files
There are no differences for the different 832x targets we have in
the header defined with SYS_CONFIG_NAME. So we can join the five
headers to a single file.
Signed-off-by: Holger Brunck <holger.brunck@hitachienergy.com>
Holger Brunck [Tue, 24 Jan 2023 08:42:40 +0000 (09:42 +0100)]
km/ppc: remove km-mpc8360.h and km-mpc832x.h
Next step to get rid of the header files in icnlude/configs. Move
most of the defines to km83xx.c directly. Some remaining defines
which should go to Kconfig are moved to km-mpc83xx.h for now.
Also remove some unused defines and move one define to powerpc.env
as we only need it there.
Signed-off-by: Holger Brunck <holger.brunck@hitachienergy.com>
Nikhil M Jain [Tue, 31 Jan 2023 10:05:18 +0000 (15:35 +0530)]
board: ti: am62x: am62x: Add splash screen env variables
Set splash screen related env variables. Default splash source is
set to mmc where user is expected to keep bmp in compressed format
with name ti.gz on first partition of mmc.
Splash file will be uncompressed to DDR at address 0x82000000 and
splash position is set to middle of screen.
Signed-off-by: Nikhil M Jain <n-jain1@ti.com>
Nikhil M Jain [Tue, 24 Jan 2023 05:16:02 +0000 (10:46 +0530)]
include: configs: am62x_evm: Add .env file for Am62x
Use .env file for setting board related environment variables,
in place of am62x_evm.h file. Except for BOOTENV settings, as
config_distro_boot.env file doesn't exist.
Signed-off-by: Nikhil M Jain <n-jain1@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Linus Walleij [Mon, 23 Jan 2023 22:07:21 +0000 (23:07 +0100)]
test: bootdev: Do not require USB to compile test
This test will block compilation of the entire test suite
on platforms without USB support. Make the extern
"usb_started" conditional on USB host or gadget and
define a dummy flag if neither is enabled.
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
KaDiWa [Sun, 22 Jan 2023 19:04:53 +0000 (20:04 +0100)]
elf: add Elf64_Sym
Required as Elf_Sym in tools/prelink-riscv.inc. I assume people have
been using an OS-supplied elf.h, but macOS doesn't have that.
Taken from
https://github.com/torvalds/linux/blob/v6.1/include/uapi/linux/elf.h
Signed-off-by: KaDiWa <kalle.wachsmuth@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Christian Marangi [Sun, 22 Jan 2023 00:42:10 +0000 (01:42 +0100)]
Makefile: fix shell error for darwin major/minor version check
Fix shell error:
/bin/sh: line 0: [: too many arguments
for the darwin major/minor version check.
It seems for os_x_before for some reason DARWIN_MAJOR_VERSION and
DARWIN_MINOR_VERSION are empty. To fix this set DARWIN_MAJOR_VERSION
and DARWIN_MINOR_VERSION to be evaluated once so the value is retained.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Sjoerd Simons [Thu, 19 Jan 2023 08:38:18 +0000 (09:38 +0100)]
lmb: Set correct lmb flags for EFI memory map entries
When adding reserved memory areas from the EFI memory map set the NOMAP
flag when applicable. When this isn't done adding "no-map" flagged entries
from the fdt after receiving the same from the EFI memory map fails due
to non-matching flags.
Signed-off-by: Sjoerd Simons <sjoerd@collabora.com>
Tom Rini [Wed, 25 Jan 2023 23:08:23 +0000 (18:08 -0500)]
lmb: Default to not-LMB_USE_MAX_REGIONS
The LMB code allows for picking a hard limit on the number of regions it
can know of, or to dynamically allocate these regions. The reason for
this choice is to allow for the compiler to perform a size optimization
in the common case. This optimization however, is very small, ranging
from 196 bytes to 15 bytes saved, or in some cases, being larger. Now
that we also have more regions covered by LMB (in order to protect
various parts of our self at run time), the default of 8 is also much
easier to hit and leads to non-obvious error messages (which imply that
an area is protected, not that we're out of areas to add to the list).
Switch to the dynamic use as the default.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Sat, 4 Feb 2023 19:53:00 +0000 (14:53 -0500)]
Merge tag 'video-
20230204' of https://source.denx.de/u-boot/custodians/u-boot-video
- restore TI AM335x LCDC driver with DM support
- make simple panel independent of backlight
- add ofnode panel timing decode functions with test
- add TIDSS video driver and AM62x splash screen
- add TI logo
Nikhil M Jain [Tue, 31 Jan 2023 10:05:20 +0000 (15:35 +0530)]
tools: logos: Add TI logo files
The default splashfile name saved is ti.gz. User can use these
logo files and use it to test splash screen.
Signed-off-by: Nikhil M Jain <n-jain1@ti.com>
Nikhil M Jain [Tue, 31 Jan 2023 10:05:19 +0000 (15:35 +0530)]
board: ti: am62x: evm: Add splash screen support
Splash screen function needs splash source information
to load image and display it, splash_location provides
the necessary info, Set default_splash_location to MMC
at partition 1:1. Probe DSS for splash screen display.
Signed-off-by: Nikhil M Jain <n-jain1@ti.com>
Nikhil M Jain [Tue, 31 Jan 2023 10:05:17 +0000 (15:35 +0530)]
drivers: video: tidss: TIDSS video driver support for AM62x
Added tidss video driver support which enables display
on oldi panel using AM62x, it creates a simple pipeline
framebuffer==>vidl1==>ovr1==>vp1==>oldi_panel and
calculates clock rates for panel from panel node in
device tree.
To compile TIDSS when user sets CONFIG_VIDEO_TIDSS
add rule in Makefile. Include tidss folder location
in Kconfig.
TIDSS is ported from linux kernel version 5.10.145
Signed-off-by: Nikhil M Jain <n-jain1@ti.com>
Nikhil M Jain [Tue, 31 Jan 2023 10:05:16 +0000 (15:35 +0530)]
drivers: video: simple_panel: make simple panel independent of backlight
This patch updates the necessary Kconfigs to make simple panel
driver independent of backlight driver and compiling backlight
related code in simple-panel driver conditionally to when user
has set CONFIG_BACKLIGHT.
Signed-off-by: Nikhil M Jain <n-jain1@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Nikhil M Jain [Tue, 31 Jan 2023 10:05:15 +0000 (15:35 +0530)]
test: dm: test-fdt: Add decode_panel_timing test
To test decode_panel_timing add a panel-timings node
and a DM test for decode panel timingd by matching
the panel timing node parameters.
Signed-off-by: Nikhil M Jain <n-jain1@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Nikhil M Jain [Tue, 31 Jan 2023 10:05:14 +0000 (15:35 +0530)]
drivers: core: ofnode: Add panel timing decode.
ofnode_decode_display_timing supports reading timing parameters from
subnode of display-timings node, for displays supporting multiple
resolution, in case if a display supports single resolution, it fails
reading directly from display-timings node, to support it
ofnode_decode_panel_timing is added.
Signed-off-by: Nikhil M Jain <n-jain1@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Dario Binacchi [Sat, 28 Jan 2023 15:55:31 +0000 (16:55 +0100)]
video: ti: am335x: restore driver-model code
The commit
82f7b869f5d7a ("video: Drop CONFIG_AM335X_LCD") removed not
only the LCD legacy implementation but also the code with driver model
support. The patch restores the code with driver model support.
Fixes:
82f7b869f5d7a ("video: Drop CONFIG_AM335X_LCD")
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tom Rini [Fri, 3 Feb 2023 15:30:45 +0000 (10:30 -0500)]
Merge tag 'u-boot-imx-
20230203' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx
For 2023.04
-----------
CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/15028
- Boards:
- UDoo
- MX53 Menlo
Tom Rini [Fri, 3 Feb 2023 15:27:27 +0000 (10:27 -0500)]
Merge branch '2023-02-02-assorted-networking-updates'
- DSA driver for the MV88E6xxx, assorted IPv6 fixes, TFTP fix, fsl-mc
cleanup coding style and fsl_ls_mdio bugfix
Peter Robinson [Mon, 14 Nov 2022 20:53:48 +0000 (20:53 +0000)]
udoo_neo: Select DM_SERIAL and drop iomux board level init
Convert to DM_SERIAL and drop the iomux board file
level init as it's handled as part of the DM serial
layer instead.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Peter Robinson [Mon, 14 Nov 2022 20:53:47 +0000 (20:53 +0000)]
udoo_neo: Move to DM for REGULATOR/PMIC/I2C drivers
This moves over the PMIC power init to DM and the associated i2c and
regulator bits.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Marek Vasut [Wed, 7 Dec 2022 20:39:04 +0000 (21:39 +0100)]
ARM: imx: mx5: Convert MX53 Menlo board to DM SERIAL
Convert the board from legacy serial code to DM SERIAL.
Signed-off-by: Marek Vasut <marex@denx.de>
Sergei Antonov [Wed, 18 Jan 2023 17:52:18 +0000 (20:52 +0300)]
net: ipv6: fix alignment errors on ARM
Commands "ping6" and "tftpboot ... -ipv6" did not work on ARM because
machine code expects 4-byte alignment and some structures from net6.h
are not aligned in memory.
Fix by adding __packed, since it is already used in this file.
Signed-off-by: Sergei Antonov <saproj@gmail.com>
Reviewed-by: Viacheslav Mitrofanov <v.v.mitrofanov@yadro.com>
Ehsan Mohandesi [Fri, 13 Jan 2023 17:27:41 +0000 (09:27 -0800)]
net: ipv6: Fixed IPv6 string to address conversion off-by-one error
One extra character was being checked in the IPv6 string which caused the
last character of the address to be neither '\0' nor ':'. This raises an
error condition and causes the function to always return an error. This
issue was resolved by this fix.
Signed-off-by: Ehsan Mohandesi <emohandesi@microsoft.com>
Reviewed-by: Viacheslav Mitrofanov <v.v.mitrofanov@yadro.com>
Sean Edmond [Fri, 6 Jan 2023 22:22:55 +0000 (14:22 -0800)]
net: ipv6: Fix IPv6 netmask parsing
It should be possible to specify a netmask when
setting a static IPv6 address. For example:
setenv ip6addr 2001:cafe:cafe:cafe::100/64
The net_prefix_length and net_ip6 should be updated
properly.
Signed-off-by: Sean Edmond <seanedmond@microsoft.com>
Reviewed-by: Viacheslav Mitrofanov <v.v.mitrofanov@yadro.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Ioana Ciornei [Thu, 5 Jan 2023 15:09:48 +0000 (17:09 +0200)]
drivers: net: fsl_ls_mdio: prevent a NULL pointer dereference
Prevent a NULL pointer dereference in the probe path by checking the
return valud of dev_read_addr_ptr() against NULL.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Ioana Ciornei [Thu, 5 Jan 2023 15:03:21 +0000 (17:03 +0200)]
drivers: net: fsl-mc: do not use multiple blank lines
Remove the instances in which we have multiple blank lines.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Ioana Ciornei [Thu, 5 Jan 2023 15:03:20 +0000 (17:03 +0200)]
drivers: net: fsl-mc: align parameters to the open paranthesis
There were some cases in which the function parameters were not aligned
to the open paranthesis. Fix those instances.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Ioana Ciornei [Thu, 5 Jan 2023 15:03:19 +0000 (17:03 +0200)]
drivers: net: fsl-mc: remove explicit cast
Remove all the explicit casts from the void* returned by calloc.
With this we also improve a bit the length of those lines and there is
no need to split the assignment.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Ioana Ciornei [Thu, 5 Jan 2023 15:03:17 +0000 (17:03 +0200)]
drivers: net: fsl-mc: do not prefix decimal values with 0x
The fsl-mc driver printed debug information which used the 0x prefix for
decimal values. This only confuses anyone looking through the log.
Because of this, just remove the prefix and use the "DPXY.<id>" notation
which is the standard one for the DPAA2 objects.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Ioana Ciornei [Thu, 5 Jan 2023 15:03:16 +0000 (17:03 +0200)]
drivers: net: fsl-mc: remove an useless break statement
The break statement is just after a goto statement, thus it will not get
executed. Just remove it.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Ioana Ciornei [Thu, 5 Jan 2023 15:03:15 +0000 (17:03 +0200)]
drivers: net: fsl-mc: remove useless assignment of variable
The cur_ptr variable is set to the start of the log buffer but then it's
not used. Just remove the assignment altogether.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Sean Edmond [Thu, 5 Jan 2023 02:16:26 +0000 (18:16 -0800)]
net: tftp: Fix for DATA ACK for block count out of order
In rfc7440, if an ACK is not received by the server or if the
last data block in a window is dropped, the server will timeout and
retransmit the window. In this case, the block count received will be
less than the internal block count. In this case, the client
should not ACK. ACK should only be sent if the received block
count is greater than the expected block count.
Signed-off-by: Sean Edmond <seanedmond@linux.microsoft.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Tim Harvey [Wed, 30 Nov 2022 17:42:51 +0000 (09:42 -0800)]
board: gw_ventana: enable MV88E61XX DSA support
Add MV88E61XX DSA support:
- update dt to provide internal MDIO bus and port handles.
U-Boot requires a more restrictive subset of the dt bindings
required by Linux for the sake of simplifying code
- update defconfig to remove old driver and enable new one
- replace mv88e61xx_hw_reset weak override with board_phy_config support
for register configuration that is outside the scope of the DSA driver
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Tim Harvey [Wed, 30 Nov 2022 17:42:50 +0000 (09:42 -0800)]
net: add MV88E6xxx DSA driver
Add a DSA driver for the MV88E6xxx compatible Ethernet switches.
Cc: Marek Behún <marek.behun@nic.cz>
Cc: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Tim Harvey [Wed, 30 Nov 2022 17:42:49 +0000 (09:42 -0800)]
net: fec: add support for DM_MDIO
Add support for DM_MDIO by registering a UCLASS_MDIO driver and
attempting to use it. This is necessary if wanting to use a DSA
driver for example hanging off of the FEC MAC.
Care is taken to fallback to non DM_MDIO mii bus as several boards define
DM_MDIO without having the proper device-tree configuration necessary
such as an mdio subnode, a phy-mode prop, and either a valid phy-handle
prop or fixed-phy subnode which will cause dm_eth_phy_connect() to fail.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Tim Harvey [Wed, 30 Nov 2022 17:42:48 +0000 (09:42 -0800)]
net: ksz9477: remove unnecessary xmit and recv functions
Remove the unnecessary xmit and recv functions.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Tim Harvey [Wed, 30 Nov 2022 17:42:47 +0000 (09:42 -0800)]
net: dsa: allow rcv() and xmit() to be optional
Allow rcv() and xmit() dsa driver ops to be optional in case a driver
does not care to mangle a packet as in U-Boot only one network port is
enabled at a time and thus no packet mangling is necessary.
Suggested-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Tim Harvey [Wed, 30 Nov 2022 17:42:46 +0000 (09:42 -0800)]
net: dsa: ensure dsa driver has proper ops
Add a function to sanity check a dsa driver having proper ops.
Suggested-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Tim Harvey [Wed, 30 Nov 2022 17:42:45 +0000 (09:42 -0800)]
net: dsa: move cpu port probe to dsa_post_probe
In order to ensure that a DSA driver probe gets called before
dsa_ops->port_probe move the port_probe of the cpu_port to
a post-probe function.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Tim Harvey [Wed, 30 Nov 2022 17:42:44 +0000 (09:42 -0800)]
net: mdio-uclass: scan for dm mdio children on post-bind
If a DM_MDIO driver is used we need to scan the subnodes as well.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Tom Rini [Thu, 2 Feb 2023 17:44:12 +0000 (12:44 -0500)]
Merge commit 'refs/pipelines/15015' of https://source.denx.de/u-boot/custodians/u-boot-tegra
Svyatoslav Ryhel [Wed, 1 Feb 2023 08:53:03 +0000 (10:53 +0200)]
ARM: tegra: include timer as default option
Enable TIMER and TEGRA_TIMER for TEGRA_ARMV7_COMMON and TEGRA210.
Additionally enable SPL_TIMER if build as SPL part and drop
deprecated configs from common header.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom <twarren@nvidia.com>
Svyatoslav Ryhel [Wed, 1 Feb 2023 08:53:02 +0000 (10:53 +0200)]
drivers: timer: add driver for ARMv7 based Tegra devices and T210
Add timer support for T20/T30/T114/T124 and T210 based devices.
Driver is based on DM, has device tree support and can be
used on SPL and early boot stage.
Arm64 Tegra (apart T210) according to comment in tegra-common.h use
architected timer.
Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # ASUS TF600T T30
Tested-by: Jonas Schwöbel <jonasschwoebel@yahoo.de> # Surface RT T30
Tested-by: Robert Eckelmann <longnoserob@gmail.com> # ASUS TF101 T20
Tested-by: Agneli <poczt@protonmail.ch> # Toshiba AC100 T20
Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # LG P895 T30
Co-developed-by: Jonas Schwöbel <jonasschwoebel@yahoo.de>
Signed-off-by: Jonas Schwöbel <jonasschwoebel@yahoo.de>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom <twarren@nvidia.com>
Svyatoslav Ryhel [Wed, 1 Feb 2023 08:53:01 +0000 (10:53 +0200)]
ARM: tegra: remap clock_osc_freq for all Tegra family
Enum clock_osc_freq was designed to use only with T20.
This patch remaps it to use additional frequencies, added in
T30+ SoC while maintaining backwards compatibility with T20.
Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # ASUS TF600T T30
Tested-by: Jonas Schwöbel <jonasschwoebel@yahoo.de> # Surface RT T30
Tested-by: Robert Eckelmann <longnoserob@gmail.com> # ASUS TF101 T20
Tested-by: Agneli <poczt@protonmail.ch> # Toshiba AC100 T20
Tested-by: Thierry Reding <treding@nvidia.com> # T30, T124, T210
Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # LG P895 T30
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom <twarren@nvidia.com>
Tom Rini [Thu, 2 Feb 2023 14:25:59 +0000 (09:25 -0500)]
Merge https://source.denx.de/u-boot/custodians/u-boot-riscv
Tom Rini [Thu, 2 Feb 2023 01:47:32 +0000 (20:47 -0500)]
Merge https://source.denx.de/u-boot/custodians/u-boot-sh
Marek Vasut [Thu, 26 Jan 2023 20:10:48 +0000 (21:10 +0100)]
net: ravb: Drop SoC-specific compatible support
The current set of U-Boot upstream R-Car Gen3 DTs all contain generic
"renesas,etheravb-rcar-gen3" compatible strings, drop the SoC specific
compatible string support from U-Boot to reduce size and duplication.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Hai Pham [Mon, 23 Jan 2023 00:24:09 +0000 (01:24 +0100)]
configs: draak: Enable I2C support for R-Car D3
Enable I2C support on D3 Draak.
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Hai Pham [Thu, 26 Jan 2023 20:06:07 +0000 (21:06 +0100)]
clk: renesas: rcar-gen3: Factor out CPG library
R-Car V3U has a CPG different enough to not be a generic Gen3 CPG but
similar enough to reuse code. Introduce a new CPG library, factor out
the SD clock and RPC clock handling and hook them to the generic Gen3
CPG driver so we have an equal state.
Based on Linux commit [1] and [2] by Wolfram Sang
[1]
8bb67d87346a ("clk: renesas: rcar-gen3: Factor out CPG library")
[2]
6f21d145b90f ("clk: renesas: cpg-lib: Move RPC clock registration to
the library")
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek: - Add rcar_clk_* prefix to all functions
- Rebase on changes to
clk: renesas: Introduce and use rcar_clk_get_rate64_div_table function
- Use u32_encode_bits/GENMASK bitfield ops
Hai Pham [Thu, 26 Jan 2023 20:06:06 +0000 (21:06 +0100)]
clk: renesas: Add R8A77970 SD0H/SD0 clocks for SDHI
On R-Car V3M (AKA R8A77970), the SD0CKCR is laid out differently than on
the other R-Car gen3 SoCs. Hence, new clock types are introduced
respectively.
Based on Linux commit
381081ffc294 ("clk: renesas: r8a77970: Add SD0H/SD0
clocks for SDHI") by Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek: - Fix missing ~ in GENMASK(a, b), use clrsetbits_le32 instead
- Do not modify r8a77970-cpg-mssr.c much, drop enum r8a77970_clk_types
which is now part of common clock types in rcar-gen3-cpg.h instead
Hai Pham [Sun, 29 Jan 2023 01:50:22 +0000 (02:50 +0100)]
clk: renesas: Switch to new SD clock handling
The old SD handling code was huge and could not handle all the details
which showed up on R-Car Gen3 SoCs meanwhile. It is time to switch to
another design. Have SDnH a separate clock, use the existing divider
clocks and move the errata handling from the clock driver to the SDHI
driver where it belongs.
Based on Linux series by Wolfram Sang, commit
bb6d3fa98a41 ("clk:
renesas: rcar-gen3: Switch to new SD clock handling") and commit
e5f7e81ee430a ("mmc: renesas_sdhi: Parse DT for SDnH")
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek: - Add rcar_clk_* prefix to all functions
- Fix missing ~ in GENMASK(a, b), use clrsetbits_le32 instead
- Use DIV_ROUND_CLOSEST, else if parent clock =
199999992 and
rate =
200000000, the divider would be 0 and table lookup
would fail.
- Turn rcar_clk_get_table_val into signed integer, so it can
return 0 as a valid value and negative values as errors.
- Make the code operate on correct clock and add comment
which explains the reasoning behind it.
- Rebase on changes to
clk: renesas: Introduce and use rcar_clk_get_rate64_div_table function
Hai Pham [Thu, 26 Jan 2023 20:06:04 +0000 (21:06 +0100)]
clk: renesas: Handle E3/D3 RPCSRC clock
The RPCSRC clock divider on R-Car D3 is very similar to the one on R-Car
E3, but uses a different pre-divider for the PLL0 parent. Add a new
macro to describe it, reusing the existing clock type for R-Car E3.
As both E3/D3 RPCSRC clock divider are different from the rest of R-Car
Gen3, keep the original implementation from Linux.
Based on Linux commit
40745482eec8 ("clk: renesas: r8a774c0: Add RPC
clocks") by Lad Prabhakar and
9d18f81b3535 ("clk: renesas: r8a77995: Add
RPC clocks") by Geert Uytterhoeven.
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> # Add D3 tweaks
Hai Pham [Thu, 26 Jan 2023 20:06:03 +0000 (21:06 +0100)]
clk: renesas: Introduce and use rcar_clk_get_rate64_div_table function
Introduce new helper function to handle clock type that uses
clk_div_table struct. Based vaguely on Linux code. Make use
of clk_div_table in RPC clocks handling.
The E3/D3 RPCSRC need to be handled differently and will be addressed in
subsequence patch.
Based on Linux commit
db4a0073cc82 ("clk: renesas: rcar-gen3: Add RPC
clocks") by Sergei Shtylyov.
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek: - Squash patches to avoid adding unused code:
clk: renesas: Make use of clk_div_table in RPC clocks handling
clk: renesas: Introduce rcar_clk_get_rate64_div_table function
- Move the new code to the beginning of clk-rcar-gen3 to avoid
tables mixed with code
- Use rcar_ prefix for get_table_div function
- Get rid of custom macros, use GENMASK. Use custom field_get
implementation as the generic FIELD_GET does not support
constant mask and u32_get_bits requires higher optimization level
- Pass in the register bit mask instead of width/shift combination
- Turn rcar_clk_get_rate64_div_table into s64, as it can return -EINVAL
Marek Vasut [Thu, 26 Jan 2023 20:06:02 +0000 (21:06 +0100)]
clk: renesas: Convert Gen2/Gen3 clock tables to clk-provider struct clk_div_table
Replace custom local structure with matching one from clk-provider.h .
No functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Hai Pham [Thu, 26 Jan 2023 20:06:01 +0000 (21:06 +0100)]
mmc: renesas-sdhi: Flag non-standard SDnH handling for V3M
V3M handles SDnH differently than other Gen3 SoCs, so let's add a
separate entry for that. This will allow better SDnH handling in the
future.
Based on Linux commit
627151b4966f ("mmc: renesas_sdhi: Flag
non-standard SDnH handling for V3M") by Wolfram Sang
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Hai Pham [Thu, 26 Jan 2023 20:06:00 +0000 (21:06 +0100)]
mmc: renesas-sdhi: Drop R-Car H3 ES3.0 HS400 calibration table
It is unnecessary, so clean it up.
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> # update commit message, mention ES3.0
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Hai Pham [Thu, 26 Jan 2023 20:05:59 +0000 (21:05 +0100)]
mmc: renesas-sdhi: Add R8A77961 M3-W+ support
Support R8A77961 M3-W+ SoC.
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Hai Pham [Thu, 26 Jan 2023 20:05:58 +0000 (21:05 +0100)]
mmc: renesas-sdhi: Adjust HS400 calibration offsets for M3-W r1.3
Still uses 0x3 for now, adjust the offset value to TMPPORT3 accordingly
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Hai Pham [Thu, 26 Jan 2023 20:05:57 +0000 (21:05 +0100)]
mmc: renesas-sdhi: Adjust HS400 calibration tables
Adjust HS400 calibration tables based on Linux settings
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Hai Pham [Thu, 26 Jan 2023 20:05:56 +0000 (21:05 +0100)]
mmc: renesas-sdhi: Filter out HS400 on M3-W r1.2, V3M, V3H r1.x, D3
Further filter out HS400 support on certain SoCs.
Since M3-W r1.2 does not support HS400, drop the calibration table and
rename the one for M3-W r1.3 to r8a7796_rev13_calib_table
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Hai Pham [Thu, 26 Jan 2023 20:05:55 +0000 (21:05 +0100)]
mmc: renesas-sdhi: R-Car M3 r1.3 also uses 4 tuning taps
Early ES revisions of M3-W SoCs requires 4-tap HS400. Reflect the status
from datasheet.
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Thu, 26 Jan 2023 20:02:05 +0000 (21:02 +0100)]
clk: renesas: Drop core param from gen3_clk_get_rate64_pll_mul_reg
Drop 'core' parameter from gen3_clk_get_rate64_pll_mul_reg() function
as it is only used in debug print. No functional change except for the
debug print, which is disabled by default.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Hai Pham [Thu, 26 Jan 2023 20:02:04 +0000 (21:02 +0100)]
clk: renesas: Use pre-defined offset for RPC clocks
Since commit
f7b4e4c0949f ("clk: renesas: Synchronize R-Car Gen3 tables
with Linux 5.12"), the custom macros for RPC clocks were dropped.
Use pre-defined offset for RPC clocks, same as what Linux does, instead
of retrieving it from the macros
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Thu, 26 Jan 2023 20:02:03 +0000 (21:02 +0100)]
clk: renesas: Add and enable CPG reset driver
Add trivial reset driver extension to the CPG clock driver. The change
turns current CPG UCLASS_CLK driver instance into an UCLASS_NOP proxy
driver, which in turn binds both generic rcar3_clk UCLASS_CLK clock
driver as well as generic rcar_rst UCLASS_RESET reset driver to the
CPG DT node. This way, any other drivers which use the 'reset' DT
property can now obtain valid reset handle backed by a reset driver.
The clock tables have been updated to represent the CPG driver and only
implement the generic CPG proxy driver bind call, which binds the clock
and reset drivers.
The DM_RESET is now enabled for all R-Car Gen3 platforms.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Hai Pham [Thu, 26 Jan 2023 20:02:02 +0000 (21:02 +0100)]
clk: renesas: r8a7796: Add R8A77961 CPG/MSSR support
Add support for the R-Car M3-W+ (R8A77961) SoC.
R-Car M3-W+ is very similar to R-Car M3-W (R8A77960), which allows for
both SoCs to share a driver.
Based on Linux commit
2ba738d56db4 ("clk: renesas: r8a7796: Add R8A77961
CPG/MSSR support")
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Hai Pham [Thu, 26 Jan 2023 20:02:01 +0000 (21:02 +0100)]
clk: renesas: Rename CLK_R8A7796 to CLK_R8A77960
Rename CONFIG_CLK_R8A7796 for R-Car M3-W (R8A77960) to
CONFIG_CLK_R8A77960, to avoid confusion with R-Car M3-W+ (R8A77961),
which will use CONFIG_CLK_R8A77961.
Based on Linux commit
92d1ebae9abf ("clk: renesas: Rename CLK_R8A7796
to CLK_R8A77960")
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 29 Jan 2023 01:37:50 +0000 (02:37 +0100)]
clk: renesas: Synchronize R8A774E1 RZ/G2H clock tables with Linux 6.1.7
Synchronize R8A774E1 RZ/G2H clock tables with Linux 6.1.7,
commit
21e996306a6afaae88295858de0ffb8955173a15 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Thu, 26 Jan 2023 20:01:59 +0000 (21:01 +0100)]
clk: renesas: Synchronize R8A774C0 RZ/G2E clock tables with Linux 6.1.7
Synchronize R8A774C0 RZ/G2E clock tables with Linux 6.1.7,
commit
21e996306a6afaae88295858de0ffb8955173a15 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Thu, 26 Jan 2023 20:01:58 +0000 (21:01 +0100)]
clk: renesas: Synchronize R8A774B1 RZ/G2N clock tables with Linux 6.1.7
Synchronize R8A774B1 RZ/G2N clock tables with Linux 6.1.7,
commit
21e996306a6afaae88295858de0ffb8955173a15 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Thu, 26 Jan 2023 20:01:57 +0000 (21:01 +0100)]
clk: renesas: Synchronize R8A774A1 RZ/G2M clock tables with Linux 6.1.7
Synchronize R8A774A1 RZ/G2M clock tables with Linux 6.1.7,
commit
21e996306a6afaae88295858de0ffb8955173a15 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Thu, 26 Jan 2023 20:01:56 +0000 (21:01 +0100)]
clk: renesas: Synchronize R8A779A0 V3U clock tables with Linux 6.1.7
Synchronize R-Car R8A779A0 V3U clock tables with Linux 6.1.7,
commit
21e996306a6afaae88295858de0ffb8955173a15 .
Rename CLK_TYPE_R8A779A0_ to CLK_TYPE_GEN4_ to match the new
clock tables. Add CLK_TYPE_GEN4_SD, CLK_TYPE_GEN4_RPC and
CLK_TYPE_GEN4_RPCD2 macros and handling into Gen3 CPG core.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Thu, 26 Jan 2023 20:01:55 +0000 (21:01 +0100)]
clk: renesas: Synchronize R8A77995 D3 clock tables with Linux 6.1.7
Synchronize R-Car R8A77995 D3 clock tables with Linux 6.1.7,
commit
21e996306a6afaae88295858de0ffb8955173a15 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Thu, 26 Jan 2023 20:01:54 +0000 (21:01 +0100)]
clk: renesas: Synchronize R8A77990 E3 clock tables with Linux 6.1.7
Synchronize R-Car R8A77990 E3 clock tables with Linux 6.1.7,
commit
21e996306a6afaae88295858de0ffb8955173a15 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Thu, 26 Jan 2023 20:01:53 +0000 (21:01 +0100)]
clk: renesas: Synchronize R8A77980 V3H clock tables with Linux 6.1.7
Synchronize R-Car R8A77980 V3H clock tables with Linux 6.1.7,
commit
21e996306a6afaae88295858de0ffb8955173a15 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Thu, 26 Jan 2023 20:01:52 +0000 (21:01 +0100)]
clk: renesas: Synchronize R8A77965 M3-N clock tables with Linux 6.1.7
Synchronize R-Car R8A77965 M3-N clock tables with Linux 6.1.7,
commit
21e996306a6afaae88295858de0ffb8955173a15 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Thu, 26 Jan 2023 20:01:51 +0000 (21:01 +0100)]
clk: renesas: Synchronize R8A77960 M3-W and R8A77961 M3-W+ clock tables with Linux 6.1.7
Synchronize R-Car R8A77960 M3-W and R8A77961 M3-W+ clock tables with Linux 6.1.7,
commit
21e996306a6afaae88295858de0ffb8955173a15 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Thu, 26 Jan 2023 20:01:50 +0000 (21:01 +0100)]
clk: renesas: Synchronize R8A7795 H3 clock tables with Linux 6.1.7
Synchronize R-Car R8A7795 H3 clock tables with Linux 6.1.7,
commit
21e996306a6afaae88295858de0ffb8955173a15 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Hai Pham [Thu, 26 Jan 2023 20:01:49 +0000 (21:01 +0100)]
clk: renesas: Add dummy SDnH clock
Currently, SDnH is handled together with SDn. This caused lots of
problems, so we want SDnH as a separate clock. Introduce a dummy SDnH
type here which creates a fixed-factor clock with factor 1. That allows
us to convert the per-SoC CPG drivers while keeping the old behaviour
for now. A later patch then will add the proper functionality.
Based on Linux series by Wolfram Sang:
commit
a31cf51bf6b4b ("clk: renesas: rcar-gen3: Add dummy SDnH clock"),
commit
1abd04480866c ("clk: renesas: rcar-gen3: Add SDnH clock"),
commit
63494b6f98f26 ("clk: renesas: r8a779a0: Add SDnH clock to V3U")
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> # Switch to gen3_clk_get_rate64
Hai Pham [Thu, 26 Jan 2023 20:01:48 +0000 (21:01 +0100)]
pinctrl: renesas: r8a7796: Add R8A77961 PFC support
R-Car M3-W+ (R8A77961) is pin compatible with R-Car M3-W (R8A77960),
which allows for both SoCs to share a driver.
Based on Linux commit
708c69e9eacc ("pinctrl: sh-pfc: r8a7796: Add
R8A77961 PFC support") and
74ce7a8044b0 ("pinctrl: renesas: r8a7796:
Optimize pinctrl image size for R8A774A1")
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Marek Vasut [Thu, 26 Jan 2023 20:01:47 +0000 (21:01 +0100)]
pinctrl: renesas: Synchronize R8A779A0 V3U PFC tables with Linux 6.1.7
Synchronize R-Car R8A779A0 V3U PFC tables with Linux 6.1.7,
commit
21e996306a6afaae88295858de0ffb8955173a15 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Thu, 26 Jan 2023 20:01:46 +0000 (21:01 +0100)]
pinctrl: renesas: Synchronize R8A77995 D3 PFC tables with Linux 6.1.7
Synchronize R-Car R8A77995 D3 PFC tables with Linux 6.1.7,
commit
21e996306a6afaae88295858de0ffb8955173a15 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Thu, 26 Jan 2023 20:01:45 +0000 (21:01 +0100)]
pinctrl: renesas: Synchronize R8A77990 E3 PFC tables with Linux 6.1.7
Synchronize R-Car R8A77990 E3 PFC tables with Linux 6.1.7,
commit
21e996306a6afaae88295858de0ffb8955173a15 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Thu, 26 Jan 2023 20:01:44 +0000 (21:01 +0100)]
pinctrl: renesas: Synchronize R8A77980 V3H PFC tables with Linux 6.1.7
Synchronize R-Car R8A77980 V3H PFC tables with Linux 6.1.7,
commit
21e996306a6afaae88295858de0ffb8955173a15 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>