Michał Górny [Tue, 7 Jun 2022 15:04:01 +0000 (17:04 +0200)]
[lldb] [llgs] Refactor SendStopReplyPacketForThread for multiprocess
Refactor SendStopReplyPacketForThread() to accept process instance
as a parameter rather than use m_current_process. This future-proofs
it for multiprocess support.
Sponsored by: The FreeBSD Foundation
Differential Revision: https://reviews.llvm.org/D127289
Philip Reames [Mon, 20 Jun 2022 17:36:53 +0000 (10:36 -0700)]
[BasicTTI] Allow generic handling of scalable vector fshr/fshl
This change removes an explicit scalable vector bailout for fshl and fshr. This bailout was added in
60e4698b9aba8, when sinking a unconditional bailout for all intrinsics into selected cases. Its not clear if the bailout was originally unneeded, or if our cost model infrastructure has simply matured in the meantime. Either way, the generic code appears to handle scalable vectors without issue.
Note that the RISC-V cost model changes here aren't particularly interesting. They do probably better match the current lowering, but the main point is to have coverage of the BasicTTI path and simply show lack of crashing.
AArch64 costing was changed to preserve legacy behavior. There will most likely be an upcoming change to use the generic costs there too, but I didn't want to make that change not being particularly familiar with the target.
Differential Revision: https://reviews.llvm.org/D127680
Kazu Hirata [Mon, 20 Jun 2022 17:38:12 +0000 (10:38 -0700)]
[llvm] Don't use Optional::hasValue (NFC)
Stanislav Gatev [Mon, 20 Jun 2022 11:02:51 +0000 (11:02 +0000)]
[clang][dataflow] Extend flow condition in the body of a do/while loop
Extend flow condition in the body of a do/while loop.
Differential Revision: https://reviews.llvm.org/D128183
Reviewed-by: gribozavr2, xazax.hun
Arthur Eubanks [Mon, 20 Jun 2022 17:26:47 +0000 (10:26 -0700)]
Revert "[GlobalOpt] Perform store->dominated load forwarding for stored once globals"
This reverts commit
6f348b146b69a50d5fb1b9fbfd14bc1d204e45c4.
Am seeing internal test failures plus a linux kernel breakage reported due to this.
Arthur Eubanks [Mon, 20 Jun 2022 17:25:10 +0000 (10:25 -0700)]
Revert "[GlobalOpt] Preserve CFG analyses"
This reverts commit
cc65f3e167144c39ef9ca3a69c3148b71dcab496.
Causes crashes: https://github.com/llvm/llvm-project/issues/56131
Philip Reames [Mon, 20 Jun 2022 17:11:06 +0000 (10:11 -0700)]
[RISCV] Delete unexercised VL=0 vsetvli compatibility logic
The code being removed is technically correct; if we end up with two VL=0 instructions next to each other, we can avoid a state transition if the second is a scalar move. However, since both ops are also nops, we should simply delete them instead. As such, this compatibility rule simply complicates the code for no purpose.
David Candler [Mon, 20 Jun 2022 15:03:59 +0000 (16:03 +0100)]
[ConstantFolding] Respect denormal handling mode attributes when folding instructions
Depending on the environment, a floating point instruction should
treat denormal inputs as zero, and/or flush a denormal output to zero.
Denormals are not currently accounted for when an instruction gets
folded to a constant, which can lead to differences in output between
a folded and a unfolded instruction when running on the target. The
denormal handling mode can be set by the function level attribute
denormal-fp-math, which this patch uses to determine whether any
denormal inputs to or outputs from folding should be zero, and that
the sign is set appropriately.
Reviewed By: spatel
Differential Revision: https://reviews.llvm.org/D116952
Fraser Cormack [Mon, 20 Jun 2022 10:03:19 +0000 (11:03 +0100)]
Update usage comments in Printable.h. NFC.
The example wouldn't compile, and used an invalid case style for a
function.
Reviewed By: MatzeB
Differential Revision: https://reviews.llvm.org/D128176
Guillaume Chatelet [Mon, 20 Jun 2022 15:02:59 +0000 (15:02 +0000)]
[Alignment] Remove alignTo version taking a MaybeAlign
Guillaume Chatelet [Mon, 20 Jun 2022 15:01:41 +0000 (15:01 +0000)]
[NFC] Simplify alignment code in MemorySanitizer
Guillaume Chatelet [Mon, 20 Jun 2022 15:00:45 +0000 (15:00 +0000)]
[NFC] Simplify alignment code in CoroFrame
Guillaume Chatelet [Mon, 20 Jun 2022 14:48:53 +0000 (14:48 +0000)]
[NFC] Simplify code
Florian Hahn [Mon, 20 Jun 2022 15:08:35 +0000 (17:08 +0200)]
[ConstraintElimination] Move logic to add constraint to helper (NFC).
Krzysztof Drewniak [Fri, 17 Jun 2022 18:31:05 +0000 (18:31 +0000)]
[mlir][ROCDL] Define MLIR wrappers around new MFMA intrinsics
In order to support newer hardware, define wrappers around MFMA
intrinsics that have not previously been exposed in the ROCDL dialect.
A `amdgpu.mfma` wrapper around these instructions is in development
and will provide a more user-friendly interface to them.
Reviewed By: ThomasRaoux
Differential Revision: https://reviews.llvm.org/D128079
Krzysztof Drewniak [Fri, 17 Jun 2022 20:39:59 +0000 (20:39 +0000)]
[mlir][Arith] Make --unsigned-when-equivalent use dialect conversion
Reviewed By: Mogball
Differential Revision: https://reviews.llvm.org/D128096
Philip Reames [Mon, 20 Jun 2022 14:46:46 +0000 (07:46 -0700)]
[RISCV] Fold prepass back into InsertVSETVLI data flow [nfc-ish]
When working through correctness issues in this pass, I moved a number of transforms which were phrased as mutating prior vsetvli instructions out of the main data flow because mutating prior instructions can invalidate the running dataflow results in subtle ways. We ended up creating both a prepass and a post-pass.
After consideration, I believe the prepass to be redundant, and this change removes it by folding it back into the data flow via a key conceptual change. Instead of phrasing the mutations on instructions, we can phrase them on abstract states. This avoids the dataflow inconsistency problem mentioned above by simply propagating the potential change forward, and thus reflecting its results in the dataflow. Critically, we do so without modifying existing VSETVLI instructions; some of the data flow steps include non-local IR analysis.
Compile time wise, this removes a linear pass, but has the potential to increase the number of iterations for the data flow to converge. That's not a algorithmic complexity change, the needVSETVLI mechanism has the same effect. In practice, I don't see this triggering more iterations, so I think it's likely to be a net win overall. (I didn't do any careful analysis here; just an impression from glancing at a couple tests.)
This has the potential to produce better results, so this isn't strictly speaking NFC.
Differential Revision: https://reviews.llvm.org/D127870
Jan Svoboda [Mon, 20 Jun 2022 14:56:03 +0000 (16:56 +0200)]
[support][ci] Fix modular build on GreenDragon
This is to fix the following error on https://green.lab.llvm.org/green/job/clang-stage2-Rthinlto:
BranchProbability.h:236:34: error: declaration of 'distance' must be imported from module 'std.iterator.__iterator.distance' before it is required
Philip Reames [Mon, 20 Jun 2022 14:41:18 +0000 (07:41 -0700)]
[RISCV] Assert initial load/store SEW is the EEW
In D127983, I had flipped from using the computed EEW to using the SEW value pulled from the VSETVLI when checking compatibility. This wasn't intentional, though thankfully it appears to be a non-functional difference. The new code does make a unchecked assumption that the initial SEW operand on the load/store is the EEW. This patch clarifies the assumption, and adds an assert to make sure this remains true.
Differential Revision: https://reviews.llvm.org/D128085
Kadir Cetinkaya [Mon, 20 Jun 2022 13:23:32 +0000 (15:23 +0200)]
[clangd] Handle initializers that contain =
Differential Revision: https://reviews.llvm.org/D128197
Florian Hahn [Mon, 20 Jun 2022 14:25:53 +0000 (16:25 +0200)]
[ConstraintElimination] Move StackEntry up, to allow use earlier (NFC).
David Candler [Mon, 20 Jun 2022 14:24:27 +0000 (15:24 +0100)]
[ConstantFolding] Pre-commit tests showing denormal handling during folding
These tests demonstrate cases where the constant produced by folding
a floating point instruction should differ based on the denormal
handling mode set in function attributes.
Reviewed By: spatel
Differential Revision: https://reviews.llvm.org/D125807
Guillaume Chatelet [Mon, 20 Jun 2022 14:09:55 +0000 (14:09 +0000)]
[NFC] Implement alignTo with skew in terms of alignTo
Valentin Clement [Mon, 20 Jun 2022 13:43:44 +0000 (15:43 +0200)]
[flang][NFC] Unify todo messages
This patch is part of the upstreaming effort from fir-dev branch.
Reviewed By: jeanPerier
Differential Revision: https://reviews.llvm.org/D128186
Co-authored-by: Peter Steinfeld <psteinfeld@nvidia.com>
Jay Foad [Mon, 20 Jun 2022 13:30:02 +0000 (14:30 +0100)]
[AMDGPU] Reorder cases. NFC.
Ye Luo [Mon, 20 Jun 2022 13:29:08 +0000 (08:29 -0500)]
[libomptarget] Make libomptarget.devicertl.a built in all cases.
Make libomptarget.device.a built when using -DLLVM_ENABLE_PROJECTS=openmp
Use add_custom_command.
Reviewed By: jhuber6
Differential Revision: https://reviews.llvm.org/D128130
David Sherwood [Tue, 14 Jun 2022 15:59:40 +0000 (16:59 +0100)]
[AArch64][SME] Add the zero intrinsic
The SME zero instruction takes a mask as an input declaring which
64-bit element tiles should be zeroed. There is a 1:1 mapping
between the zero intrinsic and the instruction, however we also
want to make the register allocator aware that some tile
registers are being written to.
We can actually just use the custom inserter for a pseudo instruction
to correctly mark all the appropriate registers in the mask as
implicitly defined by the operation.
Differential Revision: https://reviews.llvm.org/D127843
Jay Foad [Wed, 10 Mar 2021 09:13:43 +0000 (09:13 +0000)]
[AMDGPU] Increase instruction cache line size to 128 bytes for GFX11
Differential Revision: https://reviews.llvm.org/D128189
Jay Foad [Mon, 20 Jun 2022 13:08:38 +0000 (14:08 +0100)]
[AMDGPU] Remove a duplicate atomic fadd pattern
This was left over after D124538.
Jonas Paulsson [Mon, 20 Jun 2022 12:20:03 +0000 (14:20 +0200)]
[SystemZ] Remove unnecessary casts to SystemZInstrInfo (NFC).
Review: Ulrich Weigand
Jonas Paulsson [Mon, 20 Jun 2022 12:16:42 +0000 (14:16 +0200)]
[SystemZ] Remove stray enum value in SystemZInstrInfo.h (NFC).
Review: Ulrich Weigand
Nabeel Omer [Mon, 20 Jun 2022 10:24:13 +0000 (10:24 +0000)]
[SLP] Add a test for llvm.powi.*
This patch introduces a test for the issue discovered in #53887.
Differential Revision: https://reviews.llvm.org/D128178
Joachim Priesner [Mon, 20 Jun 2022 12:30:02 +0000 (13:30 +0100)]
[clang-tidy] bugprone-argument-comment: Ignore calls to user-defined literals
Without this change, code such as "f(/*param=*/1_op)" will check the
comment twice, once for the parameter of f (correct) and once for
the parameter of operator""_op (likely incorrect). The change removes
only the second check.
Reviewed By: njames93, LegalizeAdulthood
Differential Revision: https://reviews.llvm.org/D125885
Jay Foad [Mon, 20 Jun 2022 12:13:45 +0000 (13:13 +0100)]
[AMDGPU] Add GFX11 coverage to one more test
Kristof Beyls [Fri, 3 Jun 2022 09:31:16 +0000 (11:31 +0200)]
[docs] More clearly document that the CoC applies to online sync-ups and office hours.
* Also removes the code of conduct document listed as a "proposal".
Fixes #55430
Differential Revision: https://reviews.llvm.org/D126954
Michał Górny [Mon, 6 Jun 2022 16:17:59 +0000 (18:17 +0200)]
[lldb] [llgs] Include process ID in stop responses
Include the process identifier in the `T` stop responses when
multiprocess extension is enabled (i.e. prepend it to the thread
identifier). Use the exposed identifier to simplify the fork-and-follow
tests.
The LLDB client accounts for the possible PID since the multiprocess
extension support was added in
b601c6719226fb83c43dae62a581e5ee08bfb169.
Sponsored by: The FreeBSD Foundation
Differential Revision: https://reviews.llvm.org/D127192
Michał Górny [Mon, 6 Jun 2022 13:21:12 +0000 (15:21 +0200)]
[lldb] [llgs] Include process id in W/X stop reasons
Include the process identifier in W/X stop reasons when multiprocess
extensions are enabled.
The LLDB client does not support process identifiers there at the moment
but it parses packets in such a way that their presence does not cause
any problems.
Sponsored by: The FreeBSD Foundation
Differential Revision: https://reviews.llvm.org/D127191
Ben Dunbobbin [Mon, 20 Jun 2022 10:43:38 +0000 (11:43 +0100)]
[windows][support] Improve backtrace emitted in crash report without llvm-symbolizer
Currently the backtrace emitted on windows when llvm-symbolizer is not
available includes addresses which cannot be easily decoded because
the addresses have the containing module's run-time base address added
into them, but we don't know what those base addresses are. This
change emits a module offset rather than an address.
There are a couple of related changes which were included as a result
of the review discussion for this patch:
- I have also removed the parameter printing as it adds noise to the
dump and doesn't seem useful.
- I have added the exception code to the backtrace.
Differential Review: https://reviews.llvm.org/D127915
Dmitry Preobrazhensky [Mon, 20 Jun 2022 11:21:25 +0000 (14:21 +0300)]
[AMDGPU][MC][GFX11] Correct disassembly of DPP variants of VOPC64 opcodes
Fix bugs https://github.com/llvm/llvm-project/issues/56091, https://github.com/llvm/llvm-project/issues/56065.
Differential Revision: https://reviews.llvm.org/D128075
Florian Hahn [Mon, 20 Jun 2022 11:19:27 +0000 (13:19 +0200)]
[LoopPeel] Forget SCEV for updated exit phi values.
LoopPeel add new incoming values to exit phi nodes which can change the
SCEV for the phi after
20d798bd47ec51.
Forget SCEVs for such phis.
Fixes #56044.
Reviewed By: nikic
Differential Revision: https://reviews.llvm.org/D128164
Guillaume Chatelet [Mon, 20 Jun 2022 09:33:09 +0000 (09:33 +0000)]
[Alignment] Use 'previous()' method instead of scalar division
This is in preparation of integration with D128052.
Differential Revision: https://reviews.llvm.org/D128169
Pavel Labath [Mon, 20 Jun 2022 10:58:27 +0000 (12:58 +0200)]
[lldb] Relax backtrace checks in TestDyldLaunchLinux
Newer versions of glibc (2.34) have an extra frame inside the `raise`
function.
Valentin Clement [Mon, 20 Jun 2022 10:32:23 +0000 (12:32 +0200)]
[flang][NFC] Fix file name typos
Mirko Brkusanin [Mon, 20 Jun 2022 09:57:07 +0000 (11:57 +0200)]
[AMDGPU][GlobalISel] Legalize G_FSUB for s16
Differential Revision: https://reviews.llvm.org/D128066
Alex Bradbury [Mon, 20 Jun 2022 09:56:55 +0000 (10:56 +0100)]
[WebAssembly][NFC] Update reftype and table tests to use opaque pointers
Differential Revision: https://reviews.llvm.org/D126535
Guillaume Chatelet [Mon, 20 Jun 2022 09:47:18 +0000 (09:47 +0000)]
[NFC][Alignment] Remove dead code
David Green [Mon, 20 Jun 2022 09:08:21 +0000 (10:08 +0100)]
[ARM] Allow distributing postinc with PHI uses
Although this doesn't usually come up, we can have uses of the
BaseAccess of a distributed postinc being a PHI. This doesn't need the
usual dominance check as we will dominate along the phi edge, allowing
us to still create a postinc load/store.
Differential Revision: https://reviews.llvm.org/D127676
Sven van Haastregt [Mon, 20 Jun 2022 09:07:34 +0000 (10:07 +0100)]
[OpenCL][TableGen] Fix type extension guard emission
For certain cases (such as for the double subtype of AGenType), the
OpenCLBuiltinFileEmitterBase would not emit the extension #if-guard.
Fix that by looking at the extension of the actual type instead of the
argument type (which could be a GenType that does not carry any
extension information).
Alex Richardson [Mon, 20 Jun 2022 08:57:12 +0000 (08:57 +0000)]
[libunwind] Ensure test/libunwind_01.pass is not completely inlined
By adding noinline and calling fprintf before returning we ensure that
every function will have a distinct call frame and that the return address
will always be saved instead of saving the target in main as the result.
Before this change all backtraces were always backtrace -> main -> _start,
i.e. always exactly three entries. This happenend because all calls were
inlined in main() and the test just happenend to pass because there is at
least _start before main.
I found this while fixing some bugs in libunwind for CHERI and noticed that
the test was passing even though the code was completely broken.
Obtained from: https://github.com/CTSRD-CHERI/llvm-project
Reviewed By: #libunwind, ldionne, MaskRay
Differential Revision: https://reviews.llvm.org/D126611
Jan Svoboda [Wed, 8 Jun 2022 11:40:14 +0000 (13:40 +0200)]
[clang][sema] Generate builtin operator overloads for (volatile) _Atomic types
We observed a failed assert in overloaded compound-assignment operator resolution:
```
Assertion failed: (Result.isInvalid() && "C++ binary operator overloading is missing candidates!"), function CreateOverloadedBinOp, file SemaOverload.cpp, line 13944.
...
frame #4: clang` clang::Sema::CreateOverloadedBinOp(..., Opc=BO_OrAssign, ..., PerformADL=true, AllowRewrittenCandidates=false, ...) at SemaOverload.cpp:13943
frame #5: clang` BuildOverloadedBinOp(..., Opc=BO_OrAssign, ...) at SemaExpr.cpp:15228
frame #6: clang` clang::Sema::BuildBinOp(..., Opc=BO_OrAssign, ...) at SemaExpr.cpp:15330
frame #7: clang` clang::Sema::ActOnBinOp(..., Kind=pipeequal, ...) at SemaExpr.cpp:15187
frame #8: clang` clang::Parser::ParseRHSOfBinaryExpression(..., MinPrec=Assignment) at ParseExpr.cpp:629
frame #9: clang` clang::Parser::ParseAssignmentExpression(..., isTypeCast=NotTypeCast) at ParseExpr.cpp:176
frame #10: clang` clang::Parser::ParseExpression(... isTypeCast=NotTypeCast) at ParseExpr.cpp:124
frame #11: clang` clang::Parser::ParseExprStatement(...) at ParseStmt.cpp:464
```
A simple reproducer is:
```
_Atomic unsigned an_atomic_uint;
enum { an_enum_value = 1 };
void enum1() { an_atomic_uint += an_enum_value; }
```
This patch fixes the issue by generating builtin operator overloads for (volatile) _Atomic types.
Reviewed By: aaron.ballman
Differential Revision: https://reviews.llvm.org/D125349
Guillaume Chatelet [Sat, 18 Jun 2022 14:34:11 +0000 (14:34 +0000)]
[NFC][Alignment] Remove max functions between Align and MaybeAlign
`llvm::max(Align, MaybeAlign)` and `llvm::max(MaybeAlign, Align)` are
not used often enough to be required. They also make the code more opaque.
Differential Revision: https://reviews.llvm.org/D128121
Guillaume Chatelet [Mon, 20 Jun 2022 08:02:09 +0000 (08:02 +0000)]
[Alignment] Remove multiply by MaybeAlign
Nikita Popov [Tue, 7 Jun 2022 13:09:04 +0000 (15:09 +0200)]
[SimplifyCFG] Try to merge edge block when threading (PR55765)
When threading, we always create a new block for the threaded edge
(even if the edge is not critical), which will later get folded back
into the predecessor if possible. Depending on precise processing
order, this separate block may break the detection of trivial
cycles in the threading code, which normally avoids infinite
threading of loops. Explicitly merge the created edge block into
the predecessor to avoid this.
Fixes https://github.com/llvm/llvm-project/issues/55765.
Differential Revision: https://reviews.llvm.org/D127216
LLVM GN Syncbot [Mon, 20 Jun 2022 08:23:18 +0000 (08:23 +0000)]
[gn build] Port
60f3b071185b
Chuanqi Xu [Mon, 20 Jun 2022 07:54:23 +0000 (15:54 +0800)]
[Coroutines] Only do symmetric transfer if optimization is on
Symmetric transfer is not a part of C++ standards. So the vendors is not
forced to implement it any way. Given the symmetric transfer nowadays is
an optimization. It makes more sense to enable it only if the
optimization is enabled. It is also helpful for the compilation speed in
O0.
Alex Zinenko [Fri, 17 Jun 2022 13:47:15 +0000 (15:47 +0200)]
[mlir] move SCF headers to SCF/{IR,Transforms} respectively
This aligns the SCF dialect file layout with the majority of the dialects.
Reviewed By: jpienaar
Differential Revision: https://reviews.llvm.org/D128049
Daniil Dudkin [Mon, 20 Jun 2022 08:08:21 +0000 (11:08 +0300)]
[flang][NFC] Small refactor for `IsProcedurePointer`
Instead of manually checking for procedure-like details in Symbol,
defer it to IsProcedure function.
Differential Revision: https://reviews.llvm.org/D127967
Balázs Kéri [Mon, 20 Jun 2022 07:42:19 +0000 (09:42 +0200)]
[clang][analyzer] Add checker for bad use of 'errno'.
Extend checker 'ErrnoModeling' with a state of 'errno' to indicate
the importance of the 'errno' value and how it should be used.
Add a new checker 'ErrnoChecker' that observes use of 'errno' and
finds possible wrong uses, based on the "errno state".
The "errno state" should be set (together with value of 'errno')
by other checkers (that perform modeling of the given function)
in the future. Currently only a test function can set this value.
The new checker has no user-observable effect yet.
Reviewed By: martong, steakhal
Differential Revision: https://reviews.llvm.org/D122150
Marco Antognini [Tue, 3 May 2022 14:07:06 +0000 (16:07 +0200)]
[analyzer] SATest: Weaken assumption about HTML files
Instead of assuming there is an HTML file for each diagnostics, consider
the HTML files only when they exist, individually of each other.
After generating the reference data, running
python /scripts/SATest.py build --projects simbody
was resulting in this error:
File "/scripts/CmpRuns.py", line 250, in read_single_file
assert len(d['HTMLDiagnostics_files']) == 1
KeyError: 'HTMLDiagnostics_files'
Reviewed By: steakhal
Differential Revision: https://reviews.llvm.org/D126197
Marco Antognini [Tue, 3 May 2022 13:07:35 +0000 (15:07 +0200)]
[analyzer] SATest: Ensure Docker image can be built
Solve build issues occurring when running `docker build`.
Fix the version of cmake-data to solve the following issue:
The following packages have unmet dependencies:
cmake : Depends: cmake-data (= 3.20.5-0kitware1) but 3.23.1-0kitware1ubuntu18.04.1 is to be installed
Install libjpeg to solve this issue when installing Python
requirements:
The headers or library files could not be found for jpeg,
a required dependency when compiling Pillow from source.
Reviewed By: steakhal
Differential Revision: https://reviews.llvm.org/D126196
Simon Pilgrim [Mon, 20 Jun 2022 07:37:25 +0000 (08:37 +0100)]
[DAG] Fold (srl (shl x, c1), c2) -> and(shl/srl(x, c3), m)
Similar to the existing (shl (srl x, c1), c2) fold
Part of the work to fix the regressions in D77804
Differential Revision: https://reviews.llvm.org/D125836
Diana Picus [Fri, 10 Dec 2021 22:02:32 +0000 (22:02 +0000)]
Update link job for flang on windows
When linking a Fortran program, we need to add the runtime libraries to
the command line. This is exactly what we do for Linux/Darwin, but the
MSVC interface is slightly different (e.g. -libpath instead of -L).
We also remove oldnames and libcmt, since they're not needed at the
moment and they bring in more dependencies.
We also pass `/subsystem:console` to the linker so it can figure out the
right entry point. This is only needed for MSVC's `link.exe`. For LLD it
is redundant but doesn't hurt.
Differential Revision: https://reviews.llvm.org/D126291
Co-authored-by: Markus Mützel <markus.muetzel@gmx.de>
Jay Foad [Thu, 17 Feb 2022 17:49:45 +0000 (17:49 +0000)]
[AMDGPU] Limit GFX11 to using 128 VGPRs
This is a temporary measure to avoid generating incorrect code until the
compiler understands the new way that GFX11 encodes 16-bit operands in
VOP instructions.
Differential Revision: https://reviews.llvm.org/D128054
Adrian Kuegel [Mon, 20 Jun 2022 06:47:00 +0000 (08:47 +0200)]
[mlir] Fix ClangTidy performance finding (NFC)
Lian Wang [Tue, 14 Jun 2022 02:45:44 +0000 (02:45 +0000)]
[SelectionDAG] Enable WidenVecOp_VECREDUCE_SEQ for scalable vector
Reviewed By: sdesmalen
Differential Revision: https://reviews.llvm.org/D127710
Stanislav Gatev [Fri, 17 Jun 2022 13:51:05 +0000 (13:51 +0000)]
[clang][dataflow] Extend flow condition in the body of a for loop
Extend flow condition in the body of a for loop.
Differential Revision: https://reviews.llvm.org/D128060
chenglin.bi [Mon, 20 Jun 2022 03:49:16 +0000 (11:49 +0800)]
[InstCombine] Update icmp-and-shift check-next name; NFC
Chenbing Zheng [Mon, 20 Jun 2022 02:55:47 +0000 (10:55 +0800)]
[InstCombine] add vector support for (A >> C) == (B >> C) --> (A^B) u< (1 << C)
Reviewed By: spatel, RKSimon
Differential Revision: https://reviews.llvm.org/D127398
Craig Topper [Mon, 20 Jun 2022 02:31:14 +0000 (19:31 -0700)]
[RISCV] Merge two similar asserts from different if/else blocks. NFC
Weining Lu [Mon, 20 Jun 2022 01:46:37 +0000 (09:46 +0800)]
[LoongArch] Add codegen support for part of conversion operations
These operations include `sext`, `zext` and `trunc`.
Reference:
https://llvm.org/docs/LangRef.html#conversion-operations
Differential Revision: https://reviews.llvm.org/D127204
Kazu Hirata [Mon, 20 Jun 2022 01:59:56 +0000 (18:59 -0700)]
[Basic] Use has_value (NFC)
Weining Lu [Mon, 20 Jun 2022 01:46:31 +0000 (09:46 +0800)]
[LoongArch] Perform `and` combination with a shifted mask
Differential Revision: https://reviews.llvm.org/D127206
Weining Lu [Mon, 20 Jun 2022 01:46:24 +0000 (09:46 +0800)]
[LoongArch] Add codegen support for the bitwise binary operations and part of other operations
Reference:
https://llvm.org/docs/LangRef.html#bitwise-binary-operations
https://llvm.org/docs/LangRef.html#other-operations
The reason why other operations are implemented here is that some
bitwise binary operations depend on them. For example, on loongarch32,
`shl` over i64 data requires `select`.
Differential Revision: https://reviews.llvm.org/D127203
Weining Lu [Mon, 20 Jun 2022 01:44:38 +0000 (09:44 +0800)]
[LoongArch] Add codegen support for fneg
Reference:
https://llvm.org/docs/LangRef.html#fneg-instruction
Differential Revision: https://reviews.llvm.org/D127200
Weining Lu [Mon, 20 Jun 2022 01:22:42 +0000 (09:22 +0800)]
[LoongArch] Add codegen support for the binary operations
These binary operations include sub/fadd/fsub/fmul/fdiv. Others ops
like mul/udiv/sdiv/urem/srem would be added later since they depend on
`shift` and `truncate` that have not been supported.
Note `add` has been added in a previous patch.
Reference:
https://llvm.org/docs/LangRef.html#binary-operations
Differential Revision: https://reviews.llvm.org/D127199
Nico Weber [Sun, 19 Jun 2022 22:20:52 +0000 (18:20 -0400)]
[lld] Remove lld/include/lld/Core
This is all dead code that we forgot to delete in
https://reviews.llvm.org/D114842
Differential Revision: https://reviews.llvm.org/D128147
Kazu Hirata [Mon, 20 Jun 2022 01:34:33 +0000 (18:34 -0700)]
[ADT] Use value instead of getValue() (NFC)
Since Optional<clang::FileEntryRef> uses a custom storage class, this
patch adds value to MapEntryOptionalStorage.
Kazu Hirata [Mon, 20 Jun 2022 01:10:12 +0000 (18:10 -0700)]
[ADT] Use has_value (NFC)
This patch switches to has_value within Optional.
Since Optional<clang::FileEntryRef> uses custom storage class, this
patch adds has_entry to MapEntryOptionalStorage.
lewuathe [Mon, 20 Jun 2022 00:38:31 +0000 (09:38 +0900)]
[mlir][complex] Convert complex.conj to libm
Add conversion for complex.conj to libm call
Reviewed By: bixia
Differential Revision: https://reviews.llvm.org/D127473
Maksim Panchenko [Thu, 10 Mar 2022 20:08:57 +0000 (12:08 -0800)]
[BOLT] Split functions with exceptions in shared objects and PIEs
Add functionality to allow splitting code with C++ exceptions in shared
libraries and PIEs. To overcome a limitation in exception ranges format,
for functions with fragments spanning multiple sections, add trampoline
landing pads in the same section as the corresponding throwing range.
Reviewed By: Amir
Differential Revision: https://reviews.llvm.org/D127936
Arthur Eubanks [Sun, 19 Jun 2022 19:20:11 +0000 (12:20 -0700)]
[GlobalOpt] Preserve CFG analyses
The only place we modify the CFG is when calling
removeUnreachableBlocks(), so insert a callback there which invalidates
analyses for that function (or recomputes DT in the legacy PM).
Small compile time wins across the board:
https://llvm-compile-time-tracker.com/compare.php?from=
f444ea8ce0aaaa5ec1a4129809389da15cc41396&to=
698f41f4fc26cbf1006ed5d88e9d658edfc5b749&stat=instructions
Reviewed By: nikic
Differential Revision: https://reviews.llvm.org/D128145
Craig Topper [Sun, 19 Jun 2022 21:34:03 +0000 (14:34 -0700)]
[DAGCombiner][ARM][RISCV] Teach ShrinkLoadReplaceStoreWithStore to use truncstore.
The VT we want to shrink to may not be legal especially after type
legalization.
Fixes PR56110.
Reviewed By: RKSimon
Differential Revision: https://reviews.llvm.org/D128135
Nico Weber [Sun, 19 Jun 2022 22:34:12 +0000 (18:34 -0400)]
fix comment typos to cycle bots
Nico Weber [Sun, 19 Jun 2022 22:24:52 +0000 (18:24 -0400)]
[lld] Wrap rst file to 80 cols and fix "precense" typo
Nico Weber [Sun, 19 Jun 2022 16:30:06 +0000 (12:30 -0400)]
Rename parallelForEachN to just parallelFor
Patch created by running:
rg -l parallelForEachN | xargs sed -i '' -c 's/parallelForEachN/parallelFor/'
No behavior change.
Differential Revision: https://reviews.llvm.org/D128140
Siva Chandra Reddy [Sun, 19 Jun 2022 21:38:16 +0000 (21:38 +0000)]
[libc] Revert: Temporary disable environment tests for PATH variable.
This reverts commit
2846c2bb4fa4e50b2eb4ff4231825d73840c8c1c. The reason
for the disable is not relevant anymore.
Eric Gullufsen [Sun, 19 Jun 2022 20:12:57 +0000 (16:12 -0400)]
[InstCombine] Optimize test for same-sign of values
(icmp slt (X & Y), 0) | (icmp sgt (X | Y), -1) -> (icmp sgt (X ^ Y), -1)
(icmp slt (X | Y), 0) & (icmp sgt (X & Y), -1) -> (icmp slt (X ^ Y), 0)
[[ https://alive2.llvm.org/ce/z/qXxEFP | alive2 example ]]
[[ https://godbolt.org/z/aWf9c6j74 | godbolt ]]
[[ https://godbolt.org/z/5Ydn5TehY | godbolt for inverted form ]]
[[ https://alive2.llvm.org/ce/z/93AODr | alive2 for inverted form ]]
[[ https://github.com/llvm/llvm-project/issues/55988 | issue #55988 ]]
Differential Revision: https://reviews.llvm.org/D127903
Arthur Eubanks [Sun, 19 Jun 2022 19:10:45 +0000 (12:10 -0700)]
[CallGraph] Don't preserve CallGraph when function CFG analyses are preserved
The call graph has nothing to with function CFGs.
Fixes a crash in a future change that exposes this bug.
Sanjay Patel [Sun, 19 Jun 2022 18:13:27 +0000 (14:13 -0400)]
[ValueTracking] recognize sub X, (X -nuw Y) as not overflowing
This extends a similar pattern from D125500 and D127754.
If we know that operand 1 (RHS) of a subtract is itself a
non-overflowing subtract from operand 0 (LHS), then the
final/outer subtract is also non-overflowing:
https://alive2.llvm.org/ce/z/Bqan8v
InstCombine uses this analysis to trigger a narrowing
optimization, so that is what the first changed test shows.
The last test models a motivating case from issue #48013.
In that example, we determine 'nuw' on the first sub from
the urem, then we determine that the 2nd sub can be narrowed,
and that leads to eliminating both subtracts.
here are still several missing subtract narrowing optimizations
demonstrated in the tests above the diffs shown here - those
should be handled in InstCombine with another set of patches.
Sanjay Patel [Sun, 19 Jun 2022 18:10:03 +0000 (14:10 -0400)]
[InstCombine] add tests for 'sub nuw' with zext; NFC
Kazu Hirata [Sun, 19 Jun 2022 19:00:03 +0000 (12:00 -0700)]
[ADT] Rename value to alt (NFC)
This patch renames value to alt so that the parameter won't collide
with member function value().
Haojian Wu [Sun, 19 Jun 2022 18:52:00 +0000 (20:52 +0200)]
Fix an unused-variable warning in release build, NFC.
Amir Ayupov [Sun, 19 Jun 2022 18:46:35 +0000 (11:46 -0700)]
[TableGen][X86] Add Size field to X86MemOperand class
Set Size appropriately in operand definitions and query it for dumping memory
operand size table `getMemOperandSize` (follow-up use D126116) and
`X86Disassembler::getMemOperandSize`.
Excerpt from a produced `getMemOperandSize` table for X86:
```
static int getMemOperandSize(int OpType) {
switch (OpType) {
default: return 0;
case OpTypes::i8mem:
case OpTypes::i8mem_NOREX:
return 8;
case OpTypes::f16mem:
case OpTypes::i16mem:
return 16;
case OpTypes::f32mem:
case OpTypes::i32mem:
return 32;
...
```
Reviewed By: skan, pengfei
Differential Revision: https://reviews.llvm.org/D127787
Amir Ayupov [Mon, 13 Jun 2022 21:31:06 +0000 (14:31 -0700)]
[BOLT] Use 32-bit MOV to zero 64-bit register in instrumentation code
Instead of `movabsq $0x0, %rax` emit shorter equivalent `movl $0x0, %eax`.
Intel SDM, 3.4.1.1 General-Purpose Registers in 64-Bit Mode:
>32-bit operands generate a 32-bit result, zero-extended to a 64-bit result in
> the destination general-purpose register.
Reviewed By: rafauler
Differential Revision: https://reviews.llvm.org/D127045
David Green [Sun, 19 Jun 2022 17:55:19 +0000 (18:55 +0100)]
[MachinePipeliner] Handle failing constrainRegClass
The included test hits a verifier problems as one of the instructions:
```
%113:tgpreven, %114:tgprodd = MVE_VMLSLDAVas16 %12:tgpreven(tied-def 0), %11:tgprodd(tied-def 1), %7:mqpr, %8:mqpr, 0, $noreg, $noreg
```
Has two inputs that come from different PHIs with the same base reg, but
conflicting regclasses:
```
%11:tgprodd = PHI %103:gpr, %bb.1, %16:gpr, %bb.2
%12:tgpreven = PHI %103:gpr, %bb.1, %17:gpr, %bb.2
```
The MachinePipeliner would attempt to use %103 for both the %11 and %12
operands in the prolog, constraining the register class to the common
subset of both. Unfortunately there are no registers that are both odd
and even, so the second constrainRegClass fails. Fix this situation by
inserting a COPY for the second if the call to constrainRegClass fails.
The register allocation can then fold that extra copy away. The register
allocation of Q regs changed with this test, but the R regs were the
same and no new instructions are needed in the final assembly.
Differential Revision: https://reviews.llvm.org/D127971
Kazu Hirata [Sun, 19 Jun 2022 17:34:41 +0000 (10:34 -0700)]
Use value_or instead of getValueOr (NFC)
Arthur Eubanks [Sat, 18 Jun 2022 21:14:04 +0000 (14:14 -0700)]
[GlobalOpt] Perform store->dominated load forwarding for stored once globals
Compile time tracker:
https://llvm-compile-time-tracker.com/compare.php?from=
1e556f459b44dd0ca4073e932f66ecb6f40fe31a&to=
6d7bed4e1e72c6a8592748626091274209740a40&stat=instructions
Reviewed By: nikic
Differential Revision: https://reviews.llvm.org/D128128
Simon Pilgrim [Sun, 19 Jun 2022 17:21:56 +0000 (18:21 +0100)]
[X86] Add common CHECK prefix to nontemporal-3.ll tests
Nimish Mishra [Wed, 15 Jun 2022 09:01:41 +0000 (14:31 +0530)]
[flang][OpenMP][NFC] Refactor code related to OpenMP atomic memory order clause semantics
Reviewed By: peixin
Differential Revision: https://reviews.llvm.org/D127822
Simon Pilgrim [Sun, 19 Jun 2022 16:56:17 +0000 (17:56 +0100)]
[DAG] Add MaskedVectorIsZero helper
Equivalent to MaskedValueIsZero, except its checking if all of the demanded vectors elements are known to be zero