Hyunjun Ko [Fri, 7 Sep 2018 08:11:45 +0000 (17:11 +0900)]
freedreno/ir3: fix the param order of cmpxchg
According to the following definition,
int AtomicCompSwap(inout int mem, uint compare, uint data);
the preceding one in atomic_comp_swap of NIR is compare and data is
followed, while src0 for cmpxchg needs vec2(data, compare)
So for ssbo/image deref comp_swap, that should be reversed.
Fixes: dEQP-GLES31.functional.image_load_store.*.atomic.comp_swap*
Rob Clark [Wed, 12 Sep 2018 19:54:47 +0000 (15:54 -0400)]
freedreno/a6xx: fix shaders w/ >= 24 regs
Possibly these bits mean something else now. Blob always seems to use
FOUR_QUADS, and changing to TWO_QUADS seems to cause different threads
to overlap registers.
Signed-off-by: Rob Clark <robdclark@gmail.com>
Rob Clark [Thu, 13 Sep 2018 22:35:22 +0000 (18:35 -0400)]
freedreno/a6xx: fix gl_FragCoord.w
Signed-off-by: Rob Clark <robdclark@gmail.com>
Rob Clark [Tue, 11 Sep 2018 20:21:29 +0000 (16:21 -0400)]
freedreno: handle invalidated buffers harder
Do a better job of skipping mem2gmem/gmem2mem..
Signed-off-by: Rob Clark <robdclark@gmail.com>
Rob Clark [Wed, 26 Sep 2018 20:29:46 +0000 (16:29 -0400)]
freedreno/a6xx: fix constlen
Fix a few bits of confusion, as with previous gen's constlen is aligned
to 4, and value in bitfield is left-shifted by 2 (ie. divided by 4).
But this is done by the CONSTLEN() accessor/builder fxn, so don't do it
twice. Also HLSQ_FS_CNTL.CONSTLEN is not special.
Signed-off-by: Rob Clark <robdclark@gmail.com>
Rob Clark [Tue, 25 Sep 2018 16:15:58 +0000 (12:15 -0400)]
freedreno: fix inorder rendering case
Signed-off-by: Rob Clark <robdclark@gmail.com>
Rob Clark [Fri, 14 Sep 2018 20:44:32 +0000 (16:44 -0400)]
freedreno/a6xx: backface stencil state
Signed-off-by: Rob Clark <robdclark@gmail.com>
Rob Clark [Fri, 14 Sep 2018 14:35:11 +0000 (10:35 -0400)]
freedreno/a6xx: fix gpu crash with separate-stencil
Fixes a crash in (of all things) dEQP-GLES2.info.vendor with
--deqp-surface-type=fbo..
Signed-off-by: Rob Clark <robdclark@gmail.com>
Rob Clark [Wed, 12 Sep 2018 18:48:44 +0000 (14:48 -0400)]
freedreno/a6xx: fix MRT config
Signed-off-by: Rob Clark <robdclark@gmail.com>
Rob Clark [Tue, 11 Sep 2018 18:04:57 +0000 (14:04 -0400)]
freedreno: fix potential hang when destroying batch
batch_flush_reset_dependencies() expects to be called unlocked, and can
call fd_batch_reference() which can try to aquire the screen lock again.
Signed-off-by: Rob Clark <robdclark@gmail.com>
Rob Clark [Mon, 10 Sep 2018 14:58:28 +0000 (10:58 -0400)]
freedreno: fix corrupted fb state
In
c3d9f29b we allowed ctx->batch to be null, and started tracking the
current framebuffer state in fd_context. But the existing logic in
fd_blitter_pipe_begin() would, if !ctx->batch, set null fb state to be
restored after blit. Which broke the world of deqp (and probably other
things)
Fixes:
c3d9f29b781 freedreno: allocate ctx's batch on demand
Signed-off-by: Rob Clark <robdclark@gmail.com>
Rob Clark [Thu, 6 Sep 2018 12:44:52 +0000 (08:44 -0400)]
freedreno: simplify pctx->clear()
This is defined to always clear the entire surface(s) specified,
regardless of scissor state.. mesa/st will turn scissored clears
into a draw. So rip about a bunch of unnecessary machinery.
Also remove a comment that was obsolete since using u_blitter to
turn clear into draw (for the cases where there isn't a hw blitter
fast-path).
Signed-off-by: Rob Clark <robdclark@gmail.com>
Rob Clark [Thu, 6 Sep 2018 11:52:01 +0000 (07:52 -0400)]
freedreno: fix FD_MESA_DEBUG=flush
The logic to force a flush every draw was short-circuited with newer
kernels. Also it should apply to clears as well.
Signed-off-by: Rob Clark <robdclark@gmail.com>
Rob Clark [Thu, 6 Sep 2018 11:50:50 +0000 (07:50 -0400)]
freedreno: fix scissor state emit
The effective scissor changes based on rasterizer->scissor flag, so we
need to re-emit scissor state when rasterizer state changes.
Signed-off-by: Rob Clark <robdclark@gmail.com>
Rob Clark [Fri, 14 Sep 2018 13:07:09 +0000 (09:07 -0400)]
freedreno: update generated headers
Signed-off-by: Rob Clark <robdclark@gmail.com>
Erik Faye-Lund [Thu, 20 Sep 2018 08:21:38 +0000 (09:21 +0100)]
st/mesa: do not call update_framebuffer_size with NULL pointer
In st_renderbuffer_alloc_storage, we avoid allocating storage for
zero-sized buffers, leading to this pointer being NULL. We already
take care to avoid dereferencing these pointers for color-buffers,
but not for depth/stencil-buffers.
So let's thread a bit more carefully here.
This avoids a crash while running Piglit's glx/glx-visuals-stencil
test, both on virgl and r600g.
Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Guillaume Charifi <guillaume.charifi@sfr.fr>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Maxime [Sun, 23 Sep 2018 22:46:22 +0000 (08:46 +1000)]
vulkan: Disable randr lease for libxcb < 1.13
Since the Randr lease code was added, compiling against libxcb 1.12 no
longer works.
CC: mesa-stable@lists.freedesktop.org
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108024
Fixes:
7ab1fffcd2a504024b16e408de329f7a94553ecc
Tested-By: Maxime <berillions@gmail.com>
Fixes:
7ab1fffcd2a504024b16 "vulkan: Add EXT_acquire_xlib_display [v5]"
Bas Nieuwenhuizen [Tue, 25 Sep 2018 10:06:46 +0000 (12:06 +0200)]
radv: Remove garbage comment.
Trivial.
Bas Nieuwenhuizen [Tue, 25 Sep 2018 10:00:41 +0000 (12:00 +0200)]
radv: Do not use multiple draws for multisample copies.
Use sample rate shading instead, should give better locality.
Makes Nier with 8x msaa on a Raven go 5 fps -> 7 fps in the menu.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Jordan Justen [Tue, 1 May 2018 23:14:06 +0000 (16:14 -0700)]
anv: If softpin is supported, use it with the hiz clear value bo
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Jordan Justen [Tue, 25 Sep 2018 23:04:33 +0000 (16:04 -0700)]
anv: s/batch/value_bo/ on anv_device_init_hiz_clear_batch
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Dylan Baker [Wed, 26 Sep 2018 16:44:40 +0000 (09:44 -0700)]
docs: update calendar, add news and link release notes for 18.1.9
Dylan Baker [Wed, 26 Sep 2018 16:41:53 +0000 (09:41 -0700)]
docs: Add sha256 sums to 18.1.9
Dylan Baker [Mon, 24 Sep 2018 15:43:25 +0000 (08:43 -0700)]
docs: Add 18.1.9 release notes
Jason Ekstrand [Wed, 5 Sep 2018 19:02:12 +0000 (14:02 -0500)]
intel/isl: Add a unit suffixes to some struct fields and variables
I was about to make the claim to someone that every field in isl_surf
is either an enum or has explicit units. Then I looked at isl_surf and
discovered this claim was wrong. We should fix that. This commit does
a few refactors:
* Add _B suffixes to some struct fields
* Add _B to some variables and parameters
* Rename row_pitch_tiles -> row_pitch_tl
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Axel Davy [Sun, 23 Sep 2018 14:18:55 +0000 (16:18 +0200)]
radeonsi: NaN should pass kill_if
Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=105333
Fixes: https://github.com/iXit/Mesa-3D/issues/314
For this application, NaN is passed to KILL_IF and is expected to
pass.
v2: Explain in the code why UGE is used.
Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
CC: <mesa-stable@lists.freedesktop.org>
Axel Davy [Sat, 22 Sep 2018 09:09:11 +0000 (11:09 +0200)]
st/nine: Do not mark both ff vs and ps updated
Previously if only ff vs or only ff ps was used,
the constants for both were marked as updated,
while only the constants of the used ff shader
were updated.
Now that NINE_STATE_FF_VS and
NINE_STATE_FF_PS do not intersect anymore,
we can correctly mark the correct set of constant
as updated.
Fixes: https://github.com/iXit/Mesa-3D/issues/319
Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Axel Davy [Sat, 22 Sep 2018 09:05:19 +0000 (11:05 +0200)]
st/nine: Split NINE_STATE_FF_OTHER
NINE_STATE_FF_OTHER was mostly ff vs states.
Rename it to NINE_STATE_FF_VS_OTHER and
move common states with ps to
NINE_STATE_FF_PS_CONSTS (renamed from
NINE_STATE_FF_PSSTAGES).
Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Axel Davy [Sun, 23 Sep 2018 16:21:45 +0000 (18:21 +0200)]
st/nine: Add dummy ff shader state
Some states only affect the ff shader,
not its constants.
Currently we don't check anything and
always recompute the ff shader key.
However we do check for NINE_STATE_FF_OTHER
and if set we reupload some constants.
Thus for those states which had NINE_STATE_FF_OTHER
set but didn't need it,
replace by a dummy ff shader state (which is
easier to understand for an external reader than
just setting 0 and more future proof).
Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Axel Davy [Sun, 23 Sep 2018 16:20:59 +0000 (18:20 +0200)]
st/nine: Mark pointsize states as ff states
The pointsize states were missing the ff
NINE_STATE_FF_OTHER flag, and thus might
miss state updates when using ff.
Fixes some wine tests.
Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Axel Davy [Sun, 8 Apr 2018 12:33:45 +0000 (14:33 +0200)]
st/nine: Minor refactor of a few NINE_STATE_* flags
Rename NINE_STATE_FOG_SHADER,
NINE_STATE_POINTSIZE_SHADER and NINE_STATE_PS1X_SHADER
into
NINE_STATE_VS_PARAMS_MISC and NINE_STATE_PS_PARAMS_MISC.
The behaviour is unchanged, except one minor change:
D3DRS_FOGTABLEMODE doesn't need to affect VS.
Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Axel Davy [Sun, 23 Sep 2018 16:24:18 +0000 (18:24 +0200)]
st/nine: Increase maximum number of temp registers
With some test app I hit the limit.
As we allocate on demand (up to the maximum),
it is free to increase the limit.
Signed-off-by: Axel Davy <davyaxel0@gmail.com>
CC: <mesa-stable@lists.freedesktop.org>
Axel Davy [Sun, 16 Sep 2018 19:59:55 +0000 (21:59 +0200)]
st/nine: Lock the entire buffer in some cases.
Previously we had already found that for
MANAGED buffers the buffer started dirty
(which meant all writes out of bound
before the first draw call using the
buffer have to be taken into account).
Possibly it is the same for the other types of buffers.
For now always lock the entire buffer (starting from the offset)
for these (except for DYNAMIC buffers, which might hurt
performance too much).
Fixes: https://github.com/iXit/Mesa-3D/issues/301
Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Axel Davy [Sat, 15 Sep 2018 19:53:25 +0000 (21:53 +0200)]
st/nine: Don't call SetCursor until a cursor is set
The previous code was ignoring the input
until a cursor is set inside d3d
(with SetCursorProperties), as expected
by wine tests.
However it did still make a call to ID3DPresent_SetCursor,
which would result into a SetCursor(NULL) call, thus
hidding any cursor set outside d3d, which we shouldn't do.
Add comment about not avoiding redundant ID3DPresent_SetCursor
calls once a cursor has been set in d3d, as it has been tested to
cause regressions.
Fixes: https://github.com/iXit/Mesa-3D/issues/197
Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Axel Davy [Sat, 15 Sep 2018 19:32:53 +0000 (21:32 +0200)]
st/nine: Avoid redundant SetCursorPos calls
For some applications SetCursorPosition
is called when a cursor event is received.
Our SetCursorPosition was always calling
wine SetCursorPos which would trigger
a cursor event.
The infinite loop is avoided by not calling
SetCursorPos when the position hasn't changed.
Found thanks to wine tests.
Fixes irresponsive GUI for some applications.
Fixes: https://github.com/iXit/Mesa-3D/issues/173
Signed-off-by: Axel Davy <davyaxel0@gmail.com>
CC: <mesa-stable@lists.freedesktop.org>
Axel Davy [Sat, 15 Sep 2018 18:39:23 +0000 (20:39 +0200)]
st/nine: Init cursor position at device creation
This is only useful for software cursor,
but at least now we won't start it at (0, 0).
Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Axel Davy [Sat, 15 Sep 2018 18:15:12 +0000 (20:15 +0200)]
st/nine: Initialize manually cursor structure
Initialize manually the cursor structure fields
for more clarity on its content.
Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Axel Davy [Thu, 13 Sep 2018 18:56:55 +0000 (20:56 +0200)]
st/nine: Check if format is DS before retrieving flags
d3d9_get_pipe_depth_format_bindings assumes the input format
is a depth stencil format.
Previously the user could hit this function with an invalid format.
Protect the last non protected call with a depth_stencil_format check.
Another solution is to have d3d9_get_pipe_depth_format_bindings
support non depth stencil format, but we don't want the user
to create depth buffers with d3d formats that can't be one,
it's better to check if the format can be depth buffer with d3d.
Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Axel Davy [Wed, 12 Sep 2018 21:06:37 +0000 (23:06 +0200)]
st/nine: Remove clamping when mul_zero_wins
Tests show the clamping can be removed
when mul_zero_wins is supported.
Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Axel Davy [Mon, 10 Sep 2018 19:39:28 +0000 (21:39 +0200)]
st/nine: Implement predicated instructions
Most of the work was already there, just not implemented.
Fixes: https://github.com/iXit/Mesa-3D/issues/318
Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Axel Davy [Sat, 15 Sep 2018 12:00:09 +0000 (14:00 +0200)]
st/nine: Fix aliased read in ff
Fix aliasing of colorarg_b4 with
colorarg_b5.
Fixes: https://github.com/iXit/Mesa-3D/issues/302
Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Axel Davy [Sat, 15 Sep 2018 11:51:55 +0000 (13:51 +0200)]
st/nine: Fix ff assignment with aliasing
"tex_stage[s][D3DTSS_COLORARG0] >> 4" could be a two bit
number, thus colorarg_b4 was incorrectly set.
Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Axel Davy [Sat, 15 Sep 2018 11:48:45 +0000 (13:48 +0200)]
st/nine: Clarify some ff assignments
colorarg0, etc are 3 bits wide.
Make the code more readable by adding an & 0x7
to further indicate we only remember the first 3 bits only.
The 4th bit is always 0,
and colorarg_b4, colorarg_b5, etc are used to store
the 5th and 6th bits.
Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Axel Davy [Sat, 22 Sep 2018 08:51:20 +0000 (10:51 +0200)]
st/nine: Print transform matrices in debug
This is useful to see the matrices content
in the log to debug.
Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Axel Davy [Sat, 15 Sep 2018 11:47:59 +0000 (13:47 +0200)]
st/nine: Add ff key hash to help debug
This is very useful to find in the log
the ff shader shource of a given call.
Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Axel Davy [Sun, 9 Sep 2018 10:47:16 +0000 (12:47 +0200)]
st/nine: Avoid RefToBind calls in ff
When using csmt, ff shader creation happens on the csmt
thread. Creating the shaders, then calling RefToBind causes
the device ref to be increased then decreased.
However the device dtor assumes than no work pending on the
csmt thread could increase the device ref, leading to hang.
The issue is avoided by creating the shaders with a bind
count directly.
Fixes: https://github.com/iXit/Mesa-3D/issues/295
Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Axel Davy [Sun, 9 Sep 2018 10:39:10 +0000 (12:39 +0200)]
st/nine: Add new helper for object creation with bind
Add a new helper to create objects starting with a bind
count instead of a ref count.
Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Axel Davy [Sun, 9 Sep 2018 10:36:28 +0000 (12:36 +0200)]
st/nine: Add parameter to start with bind
Add a parameter to start new object with a bind
instead of a refcount.
Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Axel Davy [Thu, 16 Aug 2018 14:29:31 +0000 (16:29 +0200)]
st/nine: Use perspective correction for ps depth fog
Emulate perspective interpolation of depth for programmable ps fog
ff ps fog uses position z, or 1/w depending on the ff
projection matrix set. This is according to public documents
found describing the algorithm and tests we made.
In the case of programmable ps, we used position's z,
which was sufficient to pass wine tests (which test shaders
don't set w).
Issue https://github.com/iXit/Mesa-3D/issues/315 showed
that this calculation was wrong.
Using perspective interpolation on z, that is using z * 1/w
seems to satisfy both this application and wine tests.
Fixes: https://github.com/iXit/Mesa-3D/issues/315
Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Axel Davy [Fri, 27 Jan 2017 22:13:29 +0000 (23:13 +0100)]
st/nine: Clamp RCP when 0*inf!=0
Tests done on several devices of all 3 vendors and
of different generations showed that there are several
ways of handling infs and NaN for d3d9.
Tests showed Intel on windows does always clamp
RCP, RSQ and LOG (thus preventing inf/nan generation),
for all shader versions (some vendor behaviours vary
with shader versions).
Doing this in nine avoids 0*inf issues for drivers
that can't generate 0*inf=0 (which is controled by
TGSI's MUL_ZERO_WINS).
For now clamp for all drivers. An ulterior optimization
would be to avoid clamping for drivers with MUL_ZERO_WINS
for the specific shader versions where NV or AMD don't
clamp.
LOG and RSQ being already clamped, this patch only
clamps RCP.
Fixes: https://github.com/iXit/Mesa-3D/issues/316
Signed-off-by: Axel Davy <davyaxel0@gmail.com>
CC: <mesa-stable@lists.freedesktop.org>
Jan Vesely [Wed, 12 Sep 2018 22:18:24 +0000 (18:18 -0400)]
.travis: Drop note about Clover builds being slow
SWR takes 17+ minutes to build. Clover builds take ~6-7 minutes.
Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Jan Vesely [Wed, 12 Sep 2018 21:52:18 +0000 (17:52 -0400)]
.travis: Add LLVM-7 Clover build
Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Caio Marcelo de Oliveira Filho [Fri, 21 Sep 2018 20:26:03 +0000 (13:26 -0700)]
intel/compiler: Export TCS passthrough creation
Move create_passthrough_tcs() from i965 so can be used in other
contexts.
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Gert Wollny [Thu, 13 Sep 2018 08:06:45 +0000 (10:06 +0200)]
mesa/st: In the precense of integer buffers enable per buffer blending
Since blending will be disabled later for integer formats we have to
consider that in the case of a mixed set of integer/non-integer format
buffers blending must be handled on a per buffer basis.
Fixes on r600:
dEQP-GLES31.functional.draw_buffers_indexed.random.
max_required_draw_buffers.13
Fixes:
8fb966688bc1053a48e8ee7f7394ce030bcfd345
st/mesa: Disable blending for integer formats.
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Eric Engestrom [Fri, 21 Sep 2018 10:42:38 +0000 (11:42 +0100)]
meson+autotools: get rid of spammy GCC warning -Wformat-truncation
That warning fires every time a string function takes an argument that
could possibly be longer than its max output, which triggers all over
the place, especially when working with file paths ("what if every file
path is MAX_PATH long?" is what GCC is saying, which is really annoying
when we *know* that "/dev/dri/cardN" is not gonna be 4096 char long and
it's safe to store it in a 32-char array).
Anyway, we either add a ton of dead code all over the place to make GCC
happy, or we get rid of its spam. I chose the latter.
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Eric Engestrom [Fri, 21 Sep 2018 10:37:53 +0000 (11:37 +0100)]
meson: make it trivial to add other -Wno-foo CFLAGS
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Eric Engestrom [Fri, 21 Sep 2018 11:00:33 +0000 (12:00 +0100)]
gallivm: ensure string is null-terminated instead of assert()ing
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Topi Pohjolainen [Thu, 20 Sep 2018 10:46:04 +0000 (06:46 -0400)]
intel/compiler/icl: Use barrier id bits 24:30 instead of 24:27,31
Fixes gpu hangs with Carchase and Manhattan.
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Andres Rodriguez [Tue, 25 Sep 2018 06:30:34 +0000 (02:30 -0400)]
radv: only emit ZPASS_DONE for timestamp queries on gfx queues
A ZPASS_DONE packet doesn't make sense for the compute queue. It will
result in a gpu hang.
This change resolves a gpu hang for SteamVR+Vega.
Cc: mesa-stable@lists.freedesktop.org
Fixes:
1f616a840eac02241c585d28e9dac8f19a297f39 "radv: emit a dummy ..."
Signed-off-by: Andres Rodriguez <andresx7@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Timothy Arceri [Mon, 24 Sep 2018 08:18:48 +0000 (18:18 +1000)]
radv: make use of nir_lower_load_const_to_scalar()
This allows NIR to CSE more operations. LLVM does this also so the
impact is limited, however doing this in NIR allows other opts to
make progress. For example in radeonsi more loops are unrolled in
Civilization Beyond Earth.
The actual pipeline-db stats are not overwhelming but even in the
negatively affected shaders the NIR is clearly better. It just
happens that the code shuffling and in some cases calls to max
rather than a flt result in the final output from LLVM not
giving as good numbers.
However this is an incremental opt that further passes build off
so the change should be made IMO.
Totals from affected shaders:
SGPRS: 20192 -> 20184 (-0.04 %)
VGPRS: 19516 -> 19524 (0.04 %)
Spilled SGPRs: 437 -> 444 (1.60 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Private memory VGPRs: 0 -> 0 (0.00 %)
Scratch size: 0 -> 0 (0.00 %) dwords per thread
Code Size: 1527444 -> 1522276 (-0.34 %) bytes
LDS: 6 -> 6 (0.00 %) blocks
Max Waves: 1018 -> 1016 (-0.20 %)
Wait states: 0 -> 0 (0.00 %)
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Dylan Baker [Mon, 24 Sep 2018 16:32:56 +0000 (09:32 -0700)]
meson: de-duplicate LLVM check
By adding `_llvm == 'true'` to the required argument we can check the
'auto' and 'true' case in one path.
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Eric Engestrom [Fri, 14 Sep 2018 13:43:57 +0000 (14:43 +0100)]
vulkan/wsi/display: wsi_display_select_crtc() doesn' need to modify the connector
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Eric Engestrom [Thu, 13 Sep 2018 19:36:15 +0000 (20:36 +0100)]
vulkan/wsi/display: check if wsi_swapchain_init() succeeded
Fixes:
da997ebec929421939553 "vulkan: Add KHR_display extension using DRM [v10]"
Cc: Keith Packard <keithp@keithp.com>
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Leo Liu [Tue, 18 Sep 2018 20:19:57 +0000 (16:19 -0400)]
radeon/uvd: use bitstream coded number for symbols of Huffman tables
Signed-off-by: Leo Liu <leo.liu@amd.com>
Fixes:
130d1f456(radeon/uvd: reconstruct MJPEG bitstream)
Cc: "18.2" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Boyuan Zhang <boyuan.zhang@amd.com>
Rhys Perry [Sun, 23 Sep 2018 16:57:08 +0000 (17:57 +0100)]
nv50/ir: fix link-time build failure
Seems this fixes linking problems that occur in some situations.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Rhys Perry [Fri, 20 Jul 2018 14:56:21 +0000 (15:56 +0100)]
nvc0: fix bindless multisampled images on Maxwell+
NVC0_CB_AUX_BINDLESS_INFO isn't written to on Maxwell+ and it's too small
anyway.
With these changes, TXQ is used to determine the number of samples and
the coordinate adjustment information looked up in a small array in the
driver constant buffer.
v2: rework to use TXQ and a small array instead of a larger array with an
entry for each texture
v3: get rid of the small array and calculate the adjustments in the shader
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Fixes:
c2ae9b40527 ('nvc0: implement multisampled images on Maxwell+')
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Eric Engestrom [Fri, 21 Sep 2018 13:41:00 +0000 (14:41 +0100)]
docs: fix couple typos/outdated info
`git-branch` doesn't exist, and mesa3d-dev hasn't been used in a great
many years :)
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Eric Engestrom [Fri, 21 Sep 2018 13:39:53 +0000 (14:39 +0100)]
docs: update repo URLs after GitLab move
I also updated the developer instructions; presumably someone who's been
given commit rights already knows how to clone a repository :)
A more useful thing is to show how to update the pushurl, and how to use
access tokens to push over HTTPS (especially for us at Intel, where
non-http traffic is a pain).
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Stuart Young [Thu, 20 Sep 2018 07:12:43 +0000 (17:12 +1000)]
docs: Update FAQ with respect to s3tc support
It's just over 10 months since 17.3.0 was released with s3tc support enabled.
Probably a good idea to update the FAQ page.
v2: Incorporate feedback from Adam Jackson <ajax@redhat.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Fixes:
04396a134f0 ("mesa: Import libtxc_dxtn sources")
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Rhys Perry [Thu, 20 Sep 2018 17:39:06 +0000 (18:39 +0100)]
nvc0: warn about changing NVC0_CB_AUX_MP_INFO and NVC0_CB_AUX_DRAW_INFO
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Rhys Perry [Thu, 20 Sep 2018 17:06:27 +0000 (18:06 +0100)]
nvc0: Update counter reading shaders to new NVC0_CB_AUX_MP_INFO
Fixes:
66ca7e400b8 ('nvc0: add support for programmable sample locations')
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Eric Anholt [Fri, 21 Sep 2018 22:00:21 +0000 (15:00 -0700)]
vc4: Remove dead i == 0 code from the cos() implementation.
The loop starts at 1.
Eric Anholt [Fri, 21 Sep 2018 21:11:12 +0000 (14:11 -0700)]
vc4: Fix sin(0.0) and cos(0.0) accuracy to fix SDL rendering rotation.
SDL has some shaders that compute sin(angle) and cos(angle) for a rotation
matrix in the VS, and angle is usually 0.0. Our previous implementation
had quite a bit of error around 0.0, causing single-pixel rotations at
typical window sizes. SDL2 has changed as of August 28th (commit
12156:
e5a666405750) to not need sin/cos in the VS, but we should still fix
this for existing implementations or similar patterns that other programs
may have.
glsl-cos goes from 32 instructions to 36, but 9 uniforms to 7.
glsl-sin goes from 32 instructions to 34, but 8 uniforms to 7.
This seems like a fine impact to have for the bugfix.
Cc: 18.1 18.2 <mesa-stable@lists.freedesktop.org>
Fixes: https://github.com/anholt/mesa/issues/110
Anuj Phogat [Mon, 10 Sep 2018 23:23:31 +0000 (16:23 -0700)]
intel/icl: Fix URB size for different SKUs
Different ICL SKUs have different URB sizes.
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Anuj Phogat [Mon, 27 Aug 2018 18:23:08 +0000 (11:23 -0700)]
i965/icl: Set Enabled Texel Offset Precision Fix bit
h/w specification requires this bit to be always set.
V2: Fix bit mask (Chris Wilson)
Suggested-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Anuj Phogat [Mon, 27 Aug 2018 23:16:58 +0000 (16:16 -0700)]
anv/icl: Set Enabled Texel Offset Precision Fix bit
h/w specification requires this bit to be always set.
Suggested-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Alex Deucher [Wed, 19 Sep 2018 15:24:30 +0000 (10:24 -0500)]
pci_ids: add new polaris pci id
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: mesa-stable@lists.freedesktop.org
Marek Olšák [Tue, 11 Sep 2018 22:02:22 +0000 (18:02 -0400)]
glsl_to_tgsi: invert gl_SamplePosition.y for the default framebuffer
Fixes dEQP-GLES31.functional.shaders.sample_variables.sample_pos.correctness.default_framebuffer
with --deqp-gl-config-name=rgba8888d24s8ms4
Cc: 18.1 18.2 <mesa-stable@lists.freedesktop.org>
Caio Marcelo de Oliveira Filho [Wed, 12 Sep 2018 22:21:20 +0000 (15:21 -0700)]
util: Add macro to get number of elements in dynarray
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Dylan Baker [Tue, 18 Sep 2018 16:09:47 +0000 (09:09 -0700)]
docs/meson: Add note about llvm-config$version and llvm-config-$version
v2: - fix typo
These are how FreeBSD and Debian handle multiple versions of LLVM
installed at the same time, respectively.
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Dylan Baker [Tue, 18 Sep 2018 16:07:25 +0000 (09:07 -0700)]
docs/meson: Update notes on using CFLAGS and -Dc_args
v2: - Use ${} to denote variables instead of just $
- fix spelling error
bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107313
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Dylan Baker [Tue, 18 Sep 2018 16:01:45 +0000 (09:01 -0700)]
docs: update meson docs to reflect the current status
v2: - minor grammar changes
- fix typo
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Dylan Baker [Tue, 18 Sep 2018 15:45:57 +0000 (08:45 -0700)]
meson: Don't force libva to required from auto
We already correctly handle va being auto, but we force it to being
true, which is bad.
Fixes
94cf3970925ec87d913a1549a42cdb03713fc4bb
("meson: Fix auto option for va")
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Dylan Baker [Mon, 17 Sep 2018 15:56:51 +0000 (08:56 -0700)]
meson: Don't compile pipe loader with dri support when not using dri
Corrects building glx as gallium-xlib without any dri targets.
v2: - fix ugly formatting
Fixes:
66c94b9313a697ce8f2b222f4ba353035e4b8726
("meson: build gallium winsys for dri, null, and wrapper")
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Samuel Pitoiset [Fri, 21 Sep 2018 09:36:17 +0000 (11:36 +0200)]
radv: use the resolve compute path if dest uses multiple layers
The hardware path doesn't support resolving layers, for both
source and destination images.
This fixes a reflection issue when MSAA is enabled which
affects GTA V and probably DIRT3.
CC: <mesa-stable@lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107786
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Gregor Münch <gr.muench_at_gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Jason Ekstrand [Thu, 20 Sep 2018 10:30:03 +0000 (05:30 -0500)]
anv,radv: Implement vkAcquireNextImage2
This was added as part of 1.1 but it's very hard to track exactly what
extension added it. In any case, we should implement it.
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Dave Airlie <Airlied@redhat.com>
Juan A. Suarez Romero [Fri, 21 Sep 2018 11:09:21 +0000 (13:09 +0200)]
docs: update calendar, add news and link release notes to 18.2.1
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Juan A. Suarez Romero [Fri, 21 Sep 2018 11:05:44 +0000 (13:05 +0200)]
docs: add sha256 checksums for 18.2.1
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
(cherry picked from commit
686eab66420eec742338c1b75e499367e103e82b)
Juan A. Suarez Romero [Fri, 21 Sep 2018 10:38:01 +0000 (12:38 +0200)]
docs: add release notes for 18.2.1
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
(cherry picked from commit
3c8c851fe46b1924d84b04c49c60885452c4fbe2)
Samuel Pitoiset [Thu, 20 Sep 2018 20:17:03 +0000 (22:17 +0200)]
radv: only enable shaderInt16 on GFX9+ and LLVM7+
The throughput is similar to 32-bit integers on GFX8 and
AMDVLK does not expose 16-bit integers on pre Vega as well.
On GFX9+, only LLVM 7+ has support.
This fixes a bunch of CTS crashes on GFX9/LLVM 6.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Marek Olšák [Tue, 18 Sep 2018 03:30:32 +0000 (23:30 -0400)]
docs/features: add EXT_direct_state_access features
Acked-by: Timothy Arceri <tarceri@itsqueeze.com>
Bas Nieuwenhuizen [Thu, 20 Sep 2018 17:15:58 +0000 (19:15 +0200)]
radv: Fix driver UUID SHA1 init.
Was missing the init, found by Emil.
Fixes:
d17443a4593 "radv: Use build ID if available for cache UUID."
CC: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Charmaine Lee [Thu, 13 Sep 2018 20:14:39 +0000 (13:14 -0700)]
svga: fix uninitialized fields in DefineDepthStencilView/DefineStreamOutput
This patch fixes uninitialized fields in DefineDepthStencilView and
DefineStreamOutput commands that are not relevant in SM4 device.
Reviewed-by: Brian Paul <brianp@vmware.com>
Brian Paul [Tue, 18 Sep 2018 03:07:58 +0000 (21:07 -0600)]
r300g: add PIPE_SHADER_CAP_SCALAR_ISA switch case to silence warning
Reviewed-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Brian Paul [Tue, 18 Sep 2018 03:08:19 +0000 (21:08 -0600)]
st/mesa: silenced unhanded enum warning in st_glsl_to_tgsi.cpp
Add ir_intrinsic_begin_fragment_shader_ordering switch case to
silence warning
Reviewed-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Brian Paul [Tue, 18 Sep 2018 03:05:04 +0000 (21:05 -0600)]
mesa: use GLsizeiptrARB, GLintptrARB in bufferobj.c
The function pointer declarations in dd.h for the BufferData() and
BufferSubData() use the ARB-suffixed datatypes. This patch changes
the buffer_data_fallback() and buffer_sub_data_fallback() functions
to use those datatypes too.
This fixes a build warning when building 32-bit libraries. Evidently,
GLsizeiptrARB and GLsizeiptr are defined differently in that situation.
All all implementations of these driver hooks use the ARB-suffixed
types.
Reviewed-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Neha Bhende [Tue, 11 Sep 2018 19:27:54 +0000 (13:27 -0600)]
svga: Enable Opengl 3.3 compatibility profile
With this patch, svga driver will start advertising OpenGL 3.3
compatibility profile.
Tested with some mesa demos, piglit and glretrace.
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Neha Bhende [Thu, 30 Aug 2018 21:46:56 +0000 (14:46 -0700)]
svga: Apply texcoord scale factors only if there is sampler view
We need to convert unnormalized texcoords to normalized texcoords
when we are sampling from texture. We don't need this conversion
if there is no sampler view.
Tested with piglit, glretrace
Fixes vmware bug 2101970
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Charmaine Lee [Mon, 27 Aug 2018 19:07:42 +0000 (12:07 -0700)]
svga: fix texture array layer index in transfer map
In gallium, the layer index of a texture array to be mapped
is specified in the z component, whereas in svga device, the
index is specified in a separate argument.
Currently in svga_texture_transfer_map(), we explicitly modify
the z value in the base transfer map to 0 so the layer offset will not be
applied twice, but this causes problem when state tracker later
refers to the base transfer map and expects the slice index to be
specified in z (commit
463b0ea1f6762b7e0536cfadc4e384840af3e8e0).
To fix the problem, this patch makes a local copy of the box in
svga_transfer and modifies the z value in this copy instead.
Fixes spec@khr_texture_compression-astc piglit test crashes.
Fixes regression in the dma path with commit
1fdd3dd94a.
Tested with mtt glretrace, piglit on Windows VM and Linux VM.
Reviewed-by: Brian Paul <brianp@vmware.com>
Dylan Baker [Thu, 20 Sep 2018 17:36:33 +0000 (10:36 -0700)]
Revert "utils/u_math: break dependency on gallium/utils"
This reverts commit
0abce6d7700ee42eb00c787732ec1fdefe250d03.
Which broke the windows build.