Frederic Riss [Tue, 28 Aug 2018 22:50:01 +0000 (22:50 +0000)]
Allow IRInterpreter to deal with non-power-of-2 sized types to support some bitfield accesses.
Summary:
For some bitfield patterns (like the one added by this commit), Clang will
generate non-regular data types like i24 or i48. This patch follows a
pretty naive approach of just bumping the type size to the next power of 2.
DataExtractor know how to deal with weird sizes. The operations on Scalar
do not know how to deal with those types though, so we have to legalize the
size when creating a Scalar.
Reviewers: jingham, clayborg
Subscribers: lldb-commits
Differential Revision: https://reviews.llvm.org/D51245
llvm-svn: 340880
Craig Topper [Tue, 28 Aug 2018 22:32:14 +0000 (22:32 +0000)]
[X86] Add kadd intrinsics to match gcc and icc.
This adds the following intrinsics:
_kadd_mask64
_kadd_mask32
_kadd_mask16
_kadd_mask8
These are missing from the Intel Intrinsics Guide, but are implemented by both gcc and icc.
llvm-svn: 340879
Reid Kleckner [Tue, 28 Aug 2018 22:29:12 +0000 (22:29 +0000)]
[codeview] Emit labels for .cv_loc immediately
Previously we followed the DWARF implementation, which waits until the
next instruction or data to emit the label to use in the .debug_loc
section. We might want to consider re-evaluating that design choice as
well, since it means the .loc skips alignment padding, for better or
worse.
This was the most minimal fix I could come up with, but we should be
able to do a lot of cleanups now that we don't need to save a pending CV
location on the CodeViewContext. I plan to do those next, but this
immediately fixes an assertion for some of our users.
llvm-svn: 340878
Jason Molenda [Tue, 28 Aug 2018 22:28:34 +0000 (22:28 +0000)]
Remove unnecessary entitlement in debugserver for iOS.
<rdar://problem/
43631901>
llvm-svn: 340877
Raphael Isemann [Tue, 28 Aug 2018 22:17:28 +0000 (22:17 +0000)]
[lldb] Fix lldb build on musl
Summary: limits.h is needed for getting PATH_MAX definition, this comes to fore
with musl libc where limits.h is not included indirectly via other system headers.
Patch by Khem Raj, thanks!
Reviewers: compnerd
Reviewed By: compnerd
Subscribers: llvm-commits
Tags: #lldb
Differential Revision: https://reviews.llvm.org/D31275
llvm-svn: 340876
Craig Topper [Tue, 28 Aug 2018 22:05:55 +0000 (22:05 +0000)]
[X86] Remove GCCBuiltin from kadd intrinsics.
We need to custom handle it in clang so we can bit cast to the mask type.
llvm-svn: 340875
Lang Hames [Tue, 28 Aug 2018 21:18:05 +0000 (21:18 +0000)]
[ORC] Replace lookupFlags in JITSymbolResolver with getResponsibilitySet.
The new method name/behavior more closely models the way it was being used.
It also fixes an assertion that can occur when using the new ORC Core APIs,
where flags alone don't necessarily provide enough context to decide whether
the caller is responsible for materializing a given symbol (which was always
the reason this API existed).
The default implementation of getResponsibilitySet uses lookupFlags to determine
responsibility as before, so existing JITSymbolResolvers should continue to
work.
llvm-svn: 340874
Yaxun Liu [Tue, 28 Aug 2018 21:09:09 +0000 (21:09 +0000)]
[HIP] Fix output file extension
OffloadBundlingJobAction constructor accepts a list of JobAction as inputs.
The host JobAction is the last one. The file type of OffloadBundlingJobAction
should be determined by the host JobAction (the last one) instead of the first
one.
Since HIP emits LLVM bitcode for device compilation, device JobAction has
different file type as host Job Action. This bug causes incorrect output file
extension for HIP.
This patch fixes it by using the last input JobAction (host JobAction) to determine
file type of OffloadBundlingJobAction.
Differential Revision: https://reviews.llvm.org/D51336
llvm-svn: 340873
Fedor Sergeev [Tue, 28 Aug 2018 21:06:51 +0000 (21:06 +0000)]
[NFC][PassTiming] factor out generic PassTimingInfo
Moving PassTimingInfo from legacy pass manager code into a separate header.
Making it suitable for both legacy and new pass manager.
Adding a test on -time-passes main functionality.
llvm-svn: 340872
Alina Sbirlea [Tue, 28 Aug 2018 20:41:05 +0000 (20:41 +0000)]
[SimpleLoopUnswitch] Form dedicated exits after trivial unswitches.
Summary:
Form dedicated exits after trivial unswitches.
Fixes PR38737, PR38283.
Reviewers: chandlerc, fedor.sergeev
Subscribers: sanjoy, jlebar, uabelho, llvm-commits
Differential Revision: https://reviews.llvm.org/D51375
llvm-svn: 340871
Lang Hames [Tue, 28 Aug 2018 20:20:31 +0000 (20:20 +0000)]
[ORC] Add an addObjectFile method to LLJIT.
The addObjectFile method adds the given object file to the JIT session, making
its code available for execution.
Support for the -extra-object flag is added to lli when operating in
-jit-kind=orc-lazy mode to support testing of this feature.
llvm-svn: 340870
Craig Topper [Tue, 28 Aug 2018 19:22:55 +0000 (19:22 +0000)]
[X86] Add intrinsics for KADD instructions
These are intrinsics for supporting kadd builtins in clang. These builtins are already in gcc to implement intrinsics from icc. Though they are missing from the Intel Intrinsics Guide.
This instruction adds two mask registers together as if they were scalar rather than a vXi1. We might be able to get away with a bitcast to scalar and a normal add instruction, but that would require DAG combine smarts in the backend to recoqnize add+bitcast. For now I'd prefer to go with the easiest implementation so we can get these builtins in to clang with good codegen.
Differential Revision: https://reviews.llvm.org/D51370
llvm-svn: 340869
Fangrui Song [Tue, 28 Aug 2018 19:19:03 +0000 (19:19 +0000)]
[AMDGPU] Fix -Wunused-variable when -DLLVM_ENABLE_ASSERTIONS=off
llvm-svn: 340868
Matt Morehouse [Tue, 28 Aug 2018 19:07:24 +0000 (19:07 +0000)]
Revert "[libFuzzer] Port to Windows"
This reverts commit r340860 due to failing tests.
llvm-svn: 340867
Matt Arsenault [Tue, 28 Aug 2018 18:55:55 +0000 (18:55 +0000)]
AMDGPU: Don't delete instructions if S_ENDPGM has implicit uses
This can leave behind the uses with the defs removed.
Since this should only really happen in tests, it's not worth the
effort of trying to handle this.
llvm-svn: 340866
Aditya Nandakumar [Tue, 28 Aug 2018 18:54:10 +0000 (18:54 +0000)]
[GISel]: Add missing opcodes for overflow intrinsics
https://reviews.llvm.org/D51197
Currently, IRTranslator (and GISel) seems to be arbitrarily picking
which overflow intrinsics get mapped into opcodes which either have a
carry as an input or not.
For intrinsics such as Intrinsic::uadd_with_overflow, translate it to an
opcode (G_UADDO) which doesn't have any carry inputs (similar to LLVM
IR).
This patch adds 4 missing opcodes for completeness - G_UADDO, G_USUBO,
G_SSUBE and G_SADDE.
llvm-svn: 340865
Thomas Lively [Tue, 28 Aug 2018 18:49:47 +0000 (18:49 +0000)]
[WebAssembly][NFC] Document stackifier tablegen backend
Summary:
Add comments to help readers avoid having to read tablegen backends to
understand the code. Also remove unecessary breaks from the output.
Reviewers: dschuff, aheejin
Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits
Differential Revision: https://reviews.llvm.org/D51371
llvm-svn: 340864
Andrea Di Biagio [Tue, 28 Aug 2018 18:49:04 +0000 (18:49 +0000)]
[llvm-mca] use llvm::any_of instead of std::any_of. NFC
llvm-svn: 340863
Matt Arsenault [Tue, 28 Aug 2018 18:44:16 +0000 (18:44 +0000)]
AMDGPU: Force shrinking of add/sub even if the carry is used
The original motivating example uses a 64-bit add, so the carry
is used. Insert a copy from VCC. This may allow shrinking of
the used carry instruction. At worst, we are replacing a
mov to materialize the constant with a copy of vcc.
llvm-svn: 340862
Thomas Lively [Tue, 28 Aug 2018 18:34:33 +0000 (18:34 +0000)]
[WebAssembly][NFC] Fix formatting from rL340781
Reviewers: aheejin
Subscribers: dschuff, sbc100, jgravelle-google, sunfish, llvm-commits
Differential Revision: https://reviews.llvm.org/D51367
llvm-svn: 340861
Matt Morehouse [Tue, 28 Aug 2018 18:34:32 +0000 (18:34 +0000)]
[libFuzzer] Port to Windows
Summary:
Port libFuzzer to windows-msvc.
This patch allows libFuzzer targets to be built and run on Windows, using -fsanitize=fuzzer and/or fsanitize=fuzzer-no-link. It allows these forms of coverage instrumentation to work on Windows as well.
It does not fix all issues, such as those with -fsanitize-coverage=stack-depth, which is not usable on Windows as of this patch.
It also does not fix any libFuzzer integration tests. Nearly all of them fail to compile, fixing them will come in a later patch, so libFuzzer tests are disabled on Windows until them.
Patch By: metzman
Reviewers: morehouse, rnk
Reviewed By: morehouse, rnk
Subscribers: morehouse, kcc, eraman
Differential Revision: https://reviews.llvm.org/D51022
llvm-svn: 340860
Matt Arsenault [Tue, 28 Aug 2018 18:34:24 +0000 (18:34 +0000)]
AMDGPU: Shrink insts to fold immediates
This needs to be done in the SSA fold operands
pass to be effective, so there is a bit of overlap
with SIShrinkInstructions but I don't think this
is practically avoidable.
llvm-svn: 340859
Thomas Lively [Tue, 28 Aug 2018 18:33:31 +0000 (18:33 +0000)]
[WebAssembly][NFC] Fix up SIMD bitwise tests
Summary:
The updated tests were previously infallible because the SIMD bitwise
operations do not contain vector types in their names.
Reviewers: aheejin, dschuff
Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits
Differential Revision: https://reviews.llvm.org/D51369
llvm-svn: 340858
Thomas Lively [Tue, 28 Aug 2018 18:31:15 +0000 (18:31 +0000)]
[WebAssembly] v128.not
Implementation and tests.
llvm-svn: 340857
Vlad Tsyrklevich [Tue, 28 Aug 2018 18:30:03 +0000 (18:30 +0000)]
SafeStack: Fix thread liveness check on *BSD
Summary:
The Linux/BSD system call interfaces report errors differently, use the
internal_iserror() function to correctly check errors on either.
Reviewers: eugenis
Reviewed By: eugenis
Subscribers: delcypher, llvm-commits, #sanitizers, krytarowski, kcc, devnexen
Differential Revision: https://reviews.llvm.org/D51368
llvm-svn: 340856
Matt Arsenault [Tue, 28 Aug 2018 18:22:34 +0000 (18:22 +0000)]
AMDGPU: Move canShrink into TII
llvm-svn: 340855
Akira Hatanaka [Tue, 28 Aug 2018 18:18:01 +0000 (18:18 +0000)]
Define variables in test case rather than using values from functions
emitted ealier.
llvm-svn: 340854
Nirav Dave [Tue, 28 Aug 2018 18:13:26 +0000 (18:13 +0000)]
[DAGCombine] Rework MERGE_VALUES to inline in single pass. NFCI.
Avoid hyperlinear cost of inlining MERGE_VALUE node by constructing
temporary vector and doing a single replacement.
llvm-svn: 340853
Nirav Dave [Tue, 28 Aug 2018 18:13:00 +0000 (18:13 +0000)]
[DAG] Avoid recomputing Divergence checks. NFCI.
When making multiple updates to the same SDNode, recompute node
divergence only once after all changes have been made.
llvm-svn: 340852
Nirav Dave [Tue, 28 Aug 2018 18:12:35 +0000 (18:12 +0000)]
[DAG] Fix updateDivergence calculation
Check correct SDNode when deciding if we should update the divergence
property.
llvm-svn: 340851
Matt Arsenault [Tue, 28 Aug 2018 18:10:02 +0000 (18:10 +0000)]
AMDGPU: Remove nan tests in class if src is nnan
llvm-svn: 340850
Vedant Kumar [Tue, 28 Aug 2018 18:01:42 +0000 (18:01 +0000)]
[ubsan] Enable -fsanitize=vptr on Apple devices and simulators
It seems like an oversight that this check was not always enabled for
on-device or device simulator targets.
Differential Revision: https://reviews.llvm.org/D51239
llvm-svn: 340849
Heejin Ahn [Tue, 28 Aug 2018 17:49:39 +0000 (17:49 +0000)]
[WebAssembly] Use getCalleeOpNo utility function (NFC)
Reviewers: tlively
Subscribers: dschuff, sbc100, jgravelle-google, sunfish, llvm-commits
Differential Revision: https://reviews.llvm.org/D51366
llvm-svn: 340848
Dean Michael Berris [Tue, 28 Aug 2018 17:36:30 +0000 (17:36 +0000)]
[XRay][docs] Chrome Trace Viewer Instructions
This patch adds an example on how to generate a Chrome Trace Viewer
loadable trace from an XRay trace.
llvm-svn: 340847
Sanjay Patel [Tue, 28 Aug 2018 17:23:20 +0000 (17:23 +0000)]
[InstCombine] fix baseline assertions
rL340842 contained the wrong version of the check lines.
llvm-svn: 340846
Fangrui Song [Tue, 28 Aug 2018 17:20:28 +0000 (17:20 +0000)]
[Driver] Delete last reference of lld -flavor old-gnu
This is dead code because lld -flavor old-gnu was removed in 2016 by rLLD262158.
llvm-svn: 340845
Craig Topper [Tue, 28 Aug 2018 17:17:13 +0000 (17:17 +0000)]
[X86] Mark the FUCOMI instructions as requiring CMOV to be enabled. NFCI
These instructions were added on the PentiumPro along with CMOV.
This was already comprehended by the lowering process which should emit an alternate sequence using FCOM and FNSTW. This just makes it an explicit error if that doesn't work for some reason.
llvm-svn: 340844
Dean Michael Berris [Tue, 28 Aug 2018 16:46:27 +0000 (16:46 +0000)]
[XRay][docs] Update instructions
Add `xray_mode=xray-basic` to the list of options in the "further
exploration" section of the doc.
llvm-svn: 340843
Sanjay Patel [Tue, 28 Aug 2018 16:45:00 +0000 (16:45 +0000)]
[InstCombine] add tests for select narrowing (PR38691); NFC
llvm-svn: 340842
Pavel Labath [Tue, 28 Aug 2018 16:32:46 +0000 (16:32 +0000)]
Respect platform sysroot when loading core files
Patch by Eugene Birukov <eugenebi@microsoft.com>
Differential Revision: https://reviews.llvm.org/D49685
llvm-svn: 340841
Stella Stamenova [Tue, 28 Aug 2018 16:24:55 +0000 (16:24 +0000)]
[lit, shtest-timeout] Always use an internal shell for the shtest-timeout to diagnose buildbot failures
Summary:
Right now this test is failing on the builtbots on Windows but we have a very similar setup where the test passes. The test is meant to test that specifying a timeout works correctly by running an infnite loop and having it timeout - on the buildbot, the infinite loop doesn't actually execute. This change runs all of the tests in the set using an internal shell rather than an external shell. I expect this will make the test pass which means that either the way the external shell is invoked or the external shell setup on the buildbots is not correct. Regardless of whether the test passes with this change, we'll need to undo this change and have a real fix.
@gkistanova was able to get logs from the buildbot to rule out a number of theories as to why this test is failing, but they didn't have enough information to confirm exactly what the issue is. The purpose of this change is to narrow it down, but if someone has a local repro and can aid in debugging, that would make it much speedier (and less prone to making the bots fail).
Reviewers: gkistanova, asmith, zturner, modocache, rnk, delcypher
Reviewed By: rnk
Subscribers: delcypher, llvm-commits, gkistanova
Differential Revision: https://reviews.llvm.org/D51326
llvm-svn: 340840
Brian Cain [Tue, 28 Aug 2018 16:23:39 +0000 (16:23 +0000)]
[debuginfo] generate debug info with asm+.file
Summary:
For assembly input files, generate debug info even when the .file
directive is present, provided it does not include a file-number
argument. Fixes PR38695.
Reviewers: probinson, sidneym
Subscribers: aprantl, hiraditya, JDevlieghere, llvm-commits
Differential Revision: https://reviews.llvm.org/D51315
llvm-svn: 340839
Ilya Biryukov [Tue, 28 Aug 2018 16:15:56 +0000 (16:15 +0000)]
Parse compile commands lazily in InterpolatingCompilationDatabase
Summary:
This greatly reduces the time to read 'compile_commands.json'.
For Chromium on my machine it's now 0.7 seconds vs 30 seconds before the
change.
Reviewers: sammccall, jfb
Reviewed By: sammccall
Subscribers: mgrang, jfb, cfe-commits
Differential Revision: https://reviews.llvm.org/D51314
llvm-svn: 340838
Simon Pilgrim [Tue, 28 Aug 2018 15:42:08 +0000 (15:42 +0000)]
[TableGen] CodeGenDAGPatterns::GenerateVariants - basic caching of matching predicates
CodeGenDAGPatterns::GenerateVariants is a costly function in many tblgen commands (33.87% of the total runtime of x86 -gen-dag-isel), and due to the O(N^2) nature of the function, there are a high number of repeated comparisons of the pattern's vector<Predicate>.
This initial patch at least avoids repeating these comparisons for every Variant in a pattern. I began investigating caching all the matches before entering the loop but hit issues with how best to store the data and how to update the cache as patterns were added.
Saves around 15secs in debug builds of x86 -gen-dag-isel.
Differential Revision: https://reviews.llvm.org/D51035
llvm-svn: 340837
Kirill Bobyrev [Tue, 28 Aug 2018 15:36:50 +0000 (15:36 +0000)]
[benchmark] Stop building benchmarks by default
Although the benchmark regex-related build issue seems to be
fixed, it appears that benchmark library triggers some stage 2 clang-cl
bugs:
http://lab.llvm.org:8011/builders/clang-x86-windows-msvc2015/builds/13495/steps/build%20stage%202/logs/stdio
The only sensible option now is to prevent benchmark library from
building in the default configuration.
llvm-svn: 340836
Raphael Isemann [Tue, 28 Aug 2018 15:31:01 +0000 (15:31 +0000)]
Use a RAII guard to control access to DisassemblerLLVMC.
Summary:
This patch replaces the manual lock/unlock calls for gaining exclusive access to the disassembler with
a RAII-powered access scope. This should prevent that we somehow skip over these trailing Unlock calls
(e.g. with early returns).
We also have a second `GetDisasmToUse` method now that takes an already constructed access scope to
prevent deadlocks when we call this from other methods.
Reviewers: #lldb, davide, vsk
Reviewed By: #lldb, davide, vsk
Subscribers: davide, vsk, lldb-commits
Differential Revision: https://reviews.llvm.org/D51319
llvm-svn: 340835
David Bolvansky [Tue, 28 Aug 2018 15:27:25 +0000 (15:27 +0000)]
[Inliner] Attribute callsites with inline remarks
Summary:
Sometimes reading an output *.ll file it is not easy to understand why some callsites are not inlined. We can read output of inline remarks (option --pass-remarks-missed=inline) and try correlating its messages with the callsites.
An easier way proposed by this patch is to add to every callsite processed by Inliner an attribute with the latest message that describes the cause of not inlining this callsite. The attribute is called //inline-remark//. By default this feature is off. It can be switched on by the option //-inline-remark-attribute//.
For example in the provided test the result method //@test1// has two callsites //@bar// and inline remarks report different inlining missed reasons:
remark: <unknown>:0:0: bar not inlined into test1 because too costly to inline (cost=-5, threshold=-6)
remark: <unknown>:0:0: bar not inlined into test1 because it should never be inlined (cost=never): recursive
It is not clear which remark correspond to which callsite. With the inline remark attribute enabled we get the reasons attached to their callsites:
define void @test1() {
call void @bar(i1 true) #0
call void @bar(i1 false) #2
ret void
}
attributes #0 = { "inline-remark"="(cost=-5, threshold=-6)" }
..
attributes #2 = { "inline-remark"="(cost=never): recursive" }
Patch by: yrouban (Yevgeny Rouban)
Reviewers: xbolva00, tejohnson, apilipenko
Reviewed By: xbolva00, tejohnson
Subscribers: eraman, llvm-commits
Differential Revision: https://reviews.llvm.org/D50435
llvm-svn: 340834
Craig Topper [Tue, 28 Aug 2018 15:24:12 +0000 (15:24 +0000)]
[X86] Fix copy paste mistake in vector-idiv-v2i32.ll. Add missing test case.
Some of the test cases contained the same load twice instead of a different load.
llvm-svn: 340833
Sean Fertile [Tue, 28 Aug 2018 15:16:01 +0000 (15:16 +0000)]
[PPC64] Fix DQ-form instruction handling and emit error for misalignment.
Relanding r340564, original commit message:
Fixes the handling of *_DS relocations used on DQ-form instructions where we
were overwriting some of the extended opcode bits. Also adds an alignment check
so that the user will receive a diagnostic error if the value we are writing
is not properly aligned.
Differential Revision: https://reviews.llvm.org/D51124
llvm-svn: 340832
Ryan Taylor [Tue, 28 Aug 2018 15:07:30 +0000 (15:07 +0000)]
[AMDGPU] Add support for a16 modifiear for gfx9
Summary:
Adding support for a16 for gfx9. A16 bit replaces r128 bit for gfx9.
Change-Id: Ie8b881e4e6d2f023fb5e0150420893513e5f4841
Subscribers: arsenm, kzhuravl, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, jfb, llvm-commits
Differential Revision: https://reviews.llvm.org/D50575
llvm-svn: 340831
Andrea Di Biagio [Tue, 28 Aug 2018 15:07:11 +0000 (15:07 +0000)]
[llvm-mca] Initialize each element in vector TimelineView::UsedBuffers to a default invalid buffer descriptor. NFCI
Also change the default buffer size for UsedBuffer entries to -1 (i.e. "unknown
size"). No functional change intended.
llvm-svn: 340830
Kirill Bobyrev [Tue, 28 Aug 2018 14:55:05 +0000 (14:55 +0000)]
[clangd] Switch to Dex by default for the static index
Dex is now mature enough to be used as the default static index. This
patch performs the switch but introduces a hidden flag to allow users
fallback to Mem in case something happens.
Reviewed by: ioeric
Differential Revision: https://reviews.llvm.org/D51352
llvm-svn: 340828
Kirill Bobyrev [Tue, 28 Aug 2018 14:51:09 +0000 (14:51 +0000)]
[benchmark] Fix buildbots failing to identify regex support
This is cleanup after newly introduced google/benchmark library
(rL340809). Many buildbots fail to identify regex engine support, so
this should presumably fix the issue.
llvm-svn: 340827
Pavel Labath [Tue, 28 Aug 2018 14:46:29 +0000 (14:46 +0000)]
Clarify comment in the string-offsets-table-order.ll test
llvm-svn: 340826
Andrea Di Biagio [Tue, 28 Aug 2018 14:27:01 +0000 (14:27 +0000)]
[llvm-mca][TimelineView] Force the same number of executions for every entry in the 'wait-times' table.
This patch also uses colors to highlight problematic wait-time entries.
A problematic entry is an entry with an high wait time that tends to match (or
exceed) the size of the scheduler's buffer.
Color RED is used if an instruction had to wait an average number of cycles
which is bigger than (or equal to) the size of the underlying scheduler's
buffer.
Color YELLOW is used if the time (in cycles) spend waiting for the
operands or pipeline resources is bigger than half the size of the underlying
scheduler's buffer.
Color MAGENTA is used if an instruction does not consume buffer resources
according to the scheduling model.
llvm-svn: 340825
Kristof Umann [Tue, 28 Aug 2018 14:17:51 +0000 (14:17 +0000)]
[ADT] ImmutableList no longer requires elements to be copy constructible
ImmutableList used to require elements to have a copy constructor for no
good reason, this patch aims to fix this.
It also required but did not enforce its elements to be trivially
destructible, so a new static_assert is added to guard against misuse.
Differential Revision: https://reviews.llvm.org/D49985
llvm-svn: 340824
Marshall Clow [Tue, 28 Aug 2018 13:29:30 +0000 (13:29 +0000)]
Use addressof instead of operator& in make_shared. Fixes PR38729. As a drive-by, make the same change in raw_storage_iterator (twice).
llvm-svn: 340823
Eric Liu [Tue, 28 Aug 2018 13:15:50 +0000 (13:15 +0000)]
[clangd] Use buffered llvm::errs() in the clangd binary.
Summary: Unbuffered stream can cause significant (non-deterministic) latency for the logger.
Reviewers: sammccall
Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, kadircet, cfe-commits
Differential Revision: https://reviews.llvm.org/D51349
llvm-svn: 340822
Andrea Di Biagio [Tue, 28 Aug 2018 13:14:42 +0000 (13:14 +0000)]
[llvm-mca] Pass an instruction reference when notifying event listeners about reserved/released buffer resources. NFC
llvm-svn: 340821
Mikael Holmen [Tue, 28 Aug 2018 12:40:11 +0000 (12:40 +0000)]
[CloneFunction] Constant fold terminators before checking single predecessor
Summary:
This fixes PR31105.
There is code trying to delete dead code that does so by e.g. checking if
the single predecessor of a block is the block itself.
That check fails on a block like this
bb:
br i1 undef, label %bb, label %bb
since that has two (identical) predecessors.
However, after the check for dead blocks there is a call to
ConstantFoldTerminator on the basic block, and that call simplifies the
block to
bb:
br label %bb
Therefore we now do the call to ConstantFoldTerminator before the check if
the block is dead, so it can realize that it really is.
The original behavior lead to the block not being removed, but it was
simplified as above, and then we did a call to
Dest->replaceAllUsesWith(&*I);
with old and new being equal, and an assertion triggered.
Reviewers: chandlerc, fhahn
Reviewed By: fhahn
Subscribers: eraman, llvm-commits
Differential Revision: https://reviews.llvm.org/D51280
llvm-svn: 340820
Simon Pilgrim [Tue, 28 Aug 2018 11:10:27 +0000 (11:10 +0000)]
[TableGen] Use std::move where possible in InstructionMemo constructor. NFCI.
Requested in post-commit review for rL339670
llvm-svn: 340819
Alexandros Lamprineas [Tue, 28 Aug 2018 11:07:54 +0000 (11:07 +0000)]
[GVNHoist] Prune out useless CHI insertions
Fix for the out-of-memory error when compiling SemaChecking.cpp
with GVNHoist and ubsan enabled. I've used a cache for inserted
CHIs to avoid excessive memory usage.
Differential Revision: https://reviews.llvm.org/D50323
llvm-svn: 340818
Kirill Bobyrev [Tue, 28 Aug 2018 11:05:09 +0000 (11:05 +0000)]
[NFC] Apply another commit to comply with old CMake
llvm-svn: 340817
Ilya Biryukov [Tue, 28 Aug 2018 11:04:07 +0000 (11:04 +0000)]
[clangd] Remove unused parameter. NFC
llvm-svn: 340816
Ilya Biryukov [Tue, 28 Aug 2018 10:57:45 +0000 (10:57 +0000)]
[clangd] Add some trace::Spans. NFC
llvm-svn: 340815
Dean Michael Berris [Tue, 28 Aug 2018 10:41:10 +0000 (10:41 +0000)]
[XRay][compiler-rt] Remove uses of internal allocator in profiling mode
Summary:
This change removes further cases where the profiling mode
implementation relied on dynamic memory allocation. We're using
thread-local aligned (uninitialized) memory instead, which we initialize
appropriately with placement new.
Addresses llvm.org/PR38577.
Reviewers: eizan, kpw
Subscribers: jfb, llvm-commits
Differential Revision: https://reviews.llvm.org/D51278
llvm-svn: 340814
Simon Pilgrim [Tue, 28 Aug 2018 10:37:29 +0000 (10:37 +0000)]
[X86][SSE] Improve variable scalar shift of vXi8 vectors (PR34694)
This patch creates the shift mask and actual shift using the vXi16 vector shift ops.
Differential Revision: https://reviews.llvm.org/D51263
llvm-svn: 340813
Dean Michael Berris [Tue, 28 Aug 2018 10:32:50 +0000 (10:32 +0000)]
[XRay][compiler-rt] Stash flags as well in x86_64 trampoline
Summary:
This change saves and restores the full flags register in x86_64 mode.
This makes running instrumented signal handlers safer, and avoids flags
set during the execution of the event handlers from polluting the
instrumented call's flags state.
Reviewers: kpw, eizan, jfb
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D51277
llvm-svn: 340812
Kirill Bobyrev [Tue, 28 Aug 2018 10:27:49 +0000 (10:27 +0000)]
[benchmark] Silence warning by applying upstream patch
ompiling benchmark library (introduced in D50894) with the latest
bootstrapped Clang produces a lot of warnings, this issue was addressed
in the upstream patch I pushed earlier.
Upstream patch:
https://github.com/google/benchmark/commit/
f85304e4e3a0e4e1bf15b91720df4a19e90b589f
`README.LLVM` notes were updated to reflect the latest changes.
Reviewed by: lebedev.ri
Differential Revision: https://reviews.llvm.org/D51342
llvm-svn: 340811
Simon Pilgrim [Tue, 28 Aug 2018 10:14:09 +0000 (10:14 +0000)]
[X86][SSE] Avoid vector extraction/insertion for non-constant uniform shifts
As discussed on D51263, we're better off using byte shifts to clear the upper bits on pre-SSE41 hardware.
llvm-svn: 340810
Kirill Bobyrev [Tue, 28 Aug 2018 09:42:41 +0000 (09:42 +0000)]
Pull google/benchmark library to the LLVM tree
This patch pulls google/benchmark v1.4.1 into the LLVM tree so that any
project could use it for benchmark generation. A dummy benchmark is
added to `llvm/benchmarks/DummyYAML.cpp` to validate the correctness of
the build process.
The current version does not utilize LLVM LNT and LLVM CMake
infrastructure, but that might be sufficient for most users. Two
introduced CMake variables:
* `LLVM_INCLUDE_BENCHMARKS` (`ON` by default) generates benchmark
targets
* `LLVM_BUILD_BENCHMARKS` (`OFF` by default) adds generated
benchmark targets to the list of default LLVM targets (i.e. if `ON`
benchmarks will be built upon standard build invocation, e.g. `ninja` or
`make` with no specific targets)
List of modifications:
* `BENCHMARK_ENABLE_TESTING` is disabled
* `BENCHMARK_ENABLE_EXCEPTIONS` is disabled
* `BENCHMARK_ENABLE_INSTALL` is disabled
* `BENCHMARK_ENABLE_GTEST_TESTS` is disabled
* `BENCHMARK_DOWNLOAD_DEPENDENCIES` is disabled
Original discussion can be found here:
http://lists.llvm.org/pipermail/llvm-dev/2018-August/125023.html
Reviewed by: dberris, lebedev.ri
Subscribers: ilya-biryukov, ioeric, EricWF, lebedev.ri, srhines,
dschuff, mgorny, krytarowski, fedor.sergeev, mgrang, jfb, llvm-commits
Differential Revision: https://reviews.llvm.org/D50894
llvm-svn: 340809
Max Kazantsev [Tue, 28 Aug 2018 09:26:28 +0000 (09:26 +0000)]
[NFC] A loop can never contain Ret instruction
llvm-svn: 340808
David Chisnall [Tue, 28 Aug 2018 08:59:06 +0000 (08:59 +0000)]
Fix in getAllocationDataForFunction
Summary:
Correct to use set like behaviour of AllocType. Should check for
subset, not precise value.
Reviewers: theraven
Reviewed By: theraven
Subscribers: hiraditya, llvm-commits
Differential Revision: https://reviews.llvm.org/D50959
llvm-svn: 340807
George Rimar [Tue, 28 Aug 2018 08:49:40 +0000 (08:49 +0000)]
[LLD][ELF] - Simplify Call-Chain Clustering implementation a bit.
Looking at the current implementation and algorithm description,
it does not seem we need to keep vector with all edges for
each cluster and can just remember the best one. This is NFC change.
Differential revision: https://reviews.llvm.org/D50609
llvm-svn: 340806
Adam Balogh [Tue, 28 Aug 2018 08:41:15 +0000 (08:41 +0000)]
[Analyzer] Iterator Checker - Part 3: Invalidation check, first for (copy) assignments
We add check for invalidation of iterators. The only operation we handle here
is the (copy) assignment.
Differential Revision: https://reviews.llvm.org/D32747
llvm-svn: 340805
George Rimar [Tue, 28 Aug 2018 08:39:21 +0000 (08:39 +0000)]
[LLD][ELD] - Do not reject INFO output section type when used with a start address.
This is https://bugs.llvm.org/show_bug.cgi?id=38625
LLD accept this:
".stack (INFO) : {",
but not this:
".stack address_expression (INFO) :"
The patch fixes it.
Differential revision: https://reviews.llvm.org/D51027
llvm-svn: 340804
George Rimar [Tue, 28 Aug 2018 08:24:34 +0000 (08:24 +0000)]
[LLF][ELF] - Support -z global.
-z global is a flag used on Android (see D49198).
Differential revision: https://reviews.llvm.org/D49374
llvm-svn: 340802
Haojian Wu [Tue, 28 Aug 2018 07:48:28 +0000 (07:48 +0000)]
[clang-tidy] Abseil: no namepsace check
This check ensures that users of Abseil do not open namespace absl in their code, as that violates our compatibility guidelines.
AbseilMatcher.h written by Hugo Gonzalez.
Patch by Deanna Garcia!
llvm-svn: 340800
Craig Topper [Tue, 28 Aug 2018 06:39:35 +0000 (06:39 +0000)]
[X86] Fix some comments to refer to KORTEST not KTEST. NFC
KTEST is a different instruction. All of this code uses KORTEST.
llvm-svn: 340799
Craig Topper [Tue, 28 Aug 2018 06:28:25 +0000 (06:28 +0000)]
[X86] Add kortest intrinsics for 8, 32, and 64 bit masks. Add new intrinsic names for 16 bit masks.
This matches gcc and icc despite not being documented in the Intel Intrinsics Guide.
llvm-svn: 340798
Craig Topper [Tue, 28 Aug 2018 03:47:20 +0000 (03:47 +0000)]
[DAGCombiner][AMDGPU][Mips] Fold bitcast with volatile loads if the resulting load is legal for the target.
Summary:
I'm not sure if this patch is correct or if it needs more qualifying somehow. Bitcast shouldn't change the size of the load so it should be ok? We already do something similar for stores. We'll change the type of a volatile store if the resulting store is Legal or Custom. I'm not sure we should be allowing Custom there...
I was playing around with converting X86 atomic loads/stores(except seq_cst) into regular volatile loads and stores during lowering. This would allow some special RMW isel patterns in X86InstrCompiler.td to be removed. But there's some floating point patterns in there that didn't work because we don't fold (f64 (bitconvert (i64 volatile load))) or (f32 (bitconvert (i32 volatile load))).
Reviewers: efriedma, atanasyan, arsenm
Reviewed By: efriedma
Subscribers: jvesely, arsenm, sdardis, kzhuravl, wdng, yaxunl, dstuttard, tpr, t-tye, arichardson, jrtc27, atanasyan, jfb, llvm-commits
Differential Revision: https://reviews.llvm.org/D50491
llvm-svn: 340797
Craig Topper [Tue, 28 Aug 2018 02:02:29 +0000 (02:02 +0000)]
[InstCombine] Extend (add (sext x), cst) --> (sext (add x, cst')) and (add (zext x), cst) --> (zext (add x, cst')) to work for vectors
Differential Revision: https://reviews.llvm.org/D51236
llvm-svn: 340796
Kit Barton [Tue, 28 Aug 2018 01:18:29 +0000 (01:18 +0000)]
[PPC] Remove Darwin support from POWER backend.
This patch issues an error message if Darwin ABI is attempted with the PPC
backend. It also cleans up existing test cases, either converting the test to
use an alternative triple or removing the test if the coverage is no longer
needed.
Updated Tests
-------------
The majority of test cases were updated to use a different triple that does not
include the Darwin ABI. Many tests were also updated to use FileCheck, in place
of grep.
Deleted Tests
-------------
llvm/test/tools/dsymutil/PowerPC/sibling.test was originally added to test
specific functionality of dsymutil using an object file created with an old
version of llvm-gcc for a Powerbook G4. After a discussion with @JDevlieghere he
suggested removing the test.
llvm/test/CodeGen/PowerPC/combine_loads_from_build_pair.ll was converted from a
PPC test to a SystemZ test, as the behavior is also reproducible there.
All other tests that were deleted were specific to the darwin/ppc ABI and no
longer necessary.
Phabricator Review: https://reviews.llvm.org/D50988
llvm-svn: 340795
David Blaikie [Tue, 28 Aug 2018 00:55:19 +0000 (00:55 +0000)]
Revert "[CodeGenPrepare] Scan past debug intrinsics to find select candidates (NFC)"
This causes crashes due to the interleaved dbg.value intrinsics being
left at the end of basic blocks, causing the actual terminators (br,
etc) to be not where they should be (not at the end of the block),
leading to later crashes.
Further discussion on the original commit thread.
This reverts commit r340368.
llvm-svn: 340794
George Burgess IV [Tue, 28 Aug 2018 00:32:32 +0000 (00:32 +0000)]
[MemorySSA] Add NDEBUG checks to verifiers; NFC
verify*() methods are intended to have no side-effects (unless we detect
broken MSSA, in which case they assert()), and all of the other verify
methods are wrapped by `#ifndef NDEBUG`.
llvm-svn: 340793
Adrian Prantl [Mon, 27 Aug 2018 23:06:38 +0000 (23:06 +0000)]
Make the DYLD_INSERT_LIBRARIES workaround for SIP more robut for the various configurations that bots are running
llvm-svn: 340792
Adrian Prantl [Mon, 27 Aug 2018 23:06:37 +0000 (23:06 +0000)]
Add a mkdir -p to builddir into lldbtest.py
Based on how it is executed, it may not have been yet created.
llvm-svn: 340791
Sanjay Patel [Mon, 27 Aug 2018 23:01:10 +0000 (23:01 +0000)]
[InstCombine] fix formatting; NFC
llvm-svn: 340790
Craig Topper [Mon, 27 Aug 2018 22:55:49 +0000 (22:55 +0000)]
[InstCombine] Add test cases for D51236. NFC
llvm-svn: 340789
Lang Hames [Mon, 27 Aug 2018 22:48:01 +0000 (22:48 +0000)]
[RuntimeDyld] Add test case that was accidentally left out of r340125.
llvm-svn: 340788
Sanjay Patel [Mon, 27 Aug 2018 22:41:44 +0000 (22:41 +0000)]
[InstCombine] allow shuffle+binop canonicalization with widening shuffles
This lines up with the behavior of an existing transform where if both
operands of the binop are shuffled, we allow moving the binop before the
shuffle regardless of whether the shuffle changes the size of the vector.
llvm-svn: 340787
Lang Hames [Mon, 27 Aug 2018 22:30:57 +0000 (22:30 +0000)]
[ORC] Add unit tests for the new RTDyldObjectLinkingLayer2 class.
The new unit tests match the old ones, which will remain in tree until the
old RTDyldObjectLinkingLayer is removed.
llvm-svn: 340786
Sanjay Patel [Mon, 27 Aug 2018 22:29:06 +0000 (22:29 +0000)]
[x86] add AVX runs to show more potential scalar->vector mov opportunities; NFC
llvm-svn: 340785
Evandro Menezes [Mon, 27 Aug 2018 22:11:15 +0000 (22:11 +0000)]
[PATCH] [InstCombine] Fix issue in the simplification of pow() with nested exp{,2}()
Fix the issue of duplicating the call to `exp{,2}()` when it's nested in
`pow()`, as exposed by rL340462.
Differential revision: https://reviews.llvm.org/D51194
llvm-svn: 340784
George Burgess IV [Mon, 27 Aug 2018 22:10:59 +0000 (22:10 +0000)]
s/std::set/DenseSet/; NFC
We only use this set for `insert` and `count`, so a hashing container
seems better here.
llvm-svn: 340783
Brendon Cahoon [Mon, 27 Aug 2018 22:04:50 +0000 (22:04 +0000)]
[Pipeliner] Fix incorrect phi values in the epilog and kernel
The code that generates the loop definition operand for phis
in the epilog and kernel is incorrect in some cases.
In the kernel, when a phi refers to another phi, the code that
updates PhiOp2 needs to include the stage difference between
the two phis.
In the epilog, the check for using the loop definition instead
of the phi definition uses the StageDiffAdj value (the difference
between the phi stage and the loop definition stage), but the
adjustment is not needed to determine if the current stage
contains an iteration with the loop definition.
Differential Revision: https://reviews.llvm.org/D51167
llvm-svn: 340782
Thomas Lively [Mon, 27 Aug 2018 22:02:09 +0000 (22:02 +0000)]
[WebAssembly] TableGen backend for stackifying instructions
Summary:
The new stackification backend generates the giant switch statement
used to translate instructions to their stackified forms. I did this
because it was more interesting than adding all the different vector
versions of the various SIMD instructions to the switch statment
manually.
Reviewers: aardappel, aheejin, dschuff
Subscribers: mgorny, sbc100, jgravelle-google, sunfish, jfb, llvm-commits
Differential Revision: https://reviews.llvm.org/D51318
llvm-svn: 340781
Zachary Turner [Mon, 27 Aug 2018 21:53:36 +0000 (21:53 +0000)]
Update the Visual Studio Integration from user feedback.
This patch removes the MSBuild warnings about options that
clang-cl ignores. It also adds several additional fields to
the LLVM Configuration options page. The first is that it
adds support for LLD! To give the user flexibility though,
we don't want to force LLD to always-on, and if we're not
forcing LLD then we might as well not force clang-cl either.
So we add options that can enable or disable lld, clang-cl,
or any combination of the two. Whenever one is disabled,
it falls back to the Microsoft equivalent.
Additionally, for each of clang-cl and lld-link, we add a new
configuration setting that allows Additional Options to be
passed for that specific tool only. This is similar to the
C/C++ > Command Line > Additional Options entry box, but
it serves the use case where a user switches back and forth
between the toolsets in their vcxproj, but where cl.exe
won't accept some options that clang-cl will. In this case
you can pass those options in the clang-cl additional options
and whenever clang-cl is disabled (or the other toolset is
selected entirely), those options won't get passed at all.
llvm-svn: 340780
Adrian Prantl [Mon, 27 Aug 2018 21:46:18 +0000 (21:46 +0000)]
Fix typo
llvm-svn: 340779
Richard Smith [Mon, 27 Aug 2018 21:41:50 +0000 (21:41 +0000)]
Fix ODR violation: namespace-scope helpers should not be declared 'static'.
llvm-svn: 340778