re PR rtl-optimization/78526 (ICE: in decompose, at rtl.h:2117 with -g -mavx512bw)

PR rtl-optimization/78526
* simplify-rtx.c (simplify_immed_subreg): Don't use wi::extract_uhwi
beyond val's precision.

* gcc.dg/pr78526.c: New test.

From-SVN: r242882

re PR rtl-optimization/77541 (wrong code with 512bit vectors of int128 @ -O1)

2016-11-25  Vladimir Makarov  <vmakarov@redhat.com>

PR rtl-optimization/77541
* gcc.target/i386/pr77541.c: Change target to int128.

From-SVN: r242881

re PR fortran/60853 ([OOP] Failure to disambiguate generic with unlimited polymorphic)

2016-11-25  Janus Weil  <janus@gcc.gnu.org>

PR fortran/60853
* interface.c (gfc_compare_interfaces): Remove bad special case for
unlimited polymorphism. Refactor for loop.

2016-11-25  Janus Weil  <janus@gcc.gnu.org>

PR fortran/60853
* gfortran.dg/typebound_assignment_8.f90: New test case.

From-SVN: r242880

re PR rtl-optimization/78527 (ice on valid C code at -O3 in both 32-bit and 64-bit modes on x86_64-linux-gnu (internal compiler error: in smallest_mode_for_size, at stor-layout.c:364))

PR rtl-optimization/78527
* combine.c (make_compound_operation_int): Ignore LSHIFTRT with
out of bounds shift count.

* gcc.c-torture/compile/pr78527.c: New test.

From-SVN: r242879

Fix documentation reference (PR web/71666)

PR web/71666
* doc/invoke.texi (-fprofile-use): Fix reference to a section
where -fprofile-generate is documented.

From-SVN: r242878

Don't use priority {cd}tors if not supported by a target (PR

PR gcov-profile/78086
* g++.dg/gcov/pr16855.C: Clean up the test case.
* g++.dg/gcov/pr16855-priority.C: New test.
* coverage.c (build_init_ctor): Don't use priority {cd}tors if
not supported by a target.  Set priority to 100 if possible.
(build_gcov_exit_decl): Likewise.

From-SVN: r242877

re PR ipa/78515 (ICE: in fold_binary_loc, at fold-const.c:8999 with -Os -mavx512bw)

2016-11-25  Richard Biener  <rguenther@suse.de>

PR ipa/78515
* ipa-prop.c (compute_complex_assign_jump_func): Properly identify
unary, binary and single RHSs.
* tree.def (BIT_INSERT_EXPR): Adjust tree code name.

* gcc.dg/torture/pr78515.c: New testcase.

From-SVN: r242876

[multiple changes]

2016-11-25  Andre Vehreschild  <vehre@gcc.gnu.org>
Paul Thomas  <pault@gcc.gnu.org>

PR fortran/78293
* trans-expr.c (gfc_conv_procedure_call): Prepend deallocation
of alloctable components to post, rather than adding to
se->post.
* trans-stmt.c (gfc_trans_allocate): Move deallocation of expr3
allocatable components so that all expr3s are visited.

2016-11-25  Paul Thomas  <pault@gcc.gnu.org>

PR fortran/78293
* gfortran.dg/allocatable_function_10.f90: New test.
* gfortran.dg/class_array_15.f03: Increase builtin_free count
from 11 to 12.

From-SVN: r242875

re PR middle-end/78507 (ICE: tree check: expected integer_type or enumeral_type or boolean_type or real_type or fixed_point_type, have pointer_type in int_fits_type_p, at tree.c:9153)

PR middle-end/78507
PR middle-end/78510
PR middle-end/78517
* match.pd ((cond (cmp (convert1? @1) @3) (convert2? @1) @2)): Use
cmp directly, rather than cmp_code.  Initialize code to ERROR_MARK
and set it to result code if transformation is valid.  Use code EQ
directly in last simplification case.

gcc/testsuite
PR middle-end/78507
PR middle-end/78510
PR middle-end/78517
* g++.dg/torture/pr78507.C: New test.
* gcc.dg/torture/pr78510.c: New test.
* gcc.dg/torture/pr78517.c: New test.

From-SVN: r242874

gimple-fold.c (fold_stmt_1): Check may_propagate_copy before valueizing return stmts.

2016-11-25  Richard Biener  <rguenther@suse.de>

* gimple-fold.c (fold_stmt_1): Check may_propagate_copy
before valueizing return stmts.

From-SVN: r242873

re PR tree-optimization/78343 (Loop is not eliminated)

2016-11-24  Richard Biener  <rguenther@suse.de>

PR tree-optimization/78343
* passes.def: Add CD-DCE pass after loop splitting.
* tree-ssa-dce.c (find_obviously_necessary_stmts): Move
SCEV init/finalize ...
(perform_tree_ssa_dce): ... here.  Deal with being
executed inside the loop pipeline in aggressive mode.

* gcc.dg/tree-ssa/sccp-2.c: New testcase.
* gcc.dg/autopar/uns-outer-6.c: Adjust.
* gcc.dg/tree-ssa/20030808-1.c: Likewise.
* gcc.dg/tree-ssa/20040305-1.c: Likewise.
* gcc.dg/vect/pr38529.c: Likewise.

From-SVN: r242872

Remove conflict marker

From-SVN: r242871

Improve comment for struct symbolic_number in bswap pass

2016-11-25  Thomas Preud'homme  <thomas.preudhomme@arm.com>

    gcc/
    * tree-ssa-math-opts.c (struct symbolic_number): Improve comment.

From-SVN: r242870

Fix PR77673: bswap loads passed end of object

2016-11-25  Thomas Preud'homme  <thomas.preudhomme@arm.com>

    gcc/
    PR tree-optimization/77673
    * tree-ssa-math-opts.c (struct symbolic_number): Add new src field.
    (init_symbolic_number): Initialize src field from src parameter.
    (perform_symbolic_merge): Select most dominated statement as the
    source statement.  Set src field of resulting n structure from the
    input src with the lowest address.
    (find_bswap_or_nop): Rename source_stmt into ins_stmt.
    (bswap_replace): Rename src_stmt into ins_stmt.  Initially get source
    of load from src field rather than insertion statement.  Cancel
    optimization if statement analyzed is not dominated by the insertion
    statement.
    (pass_optimize_bswap::execute): Rename src_stmt to ins_stmt.  Compute
    dominance information.

    gcc/testsuite/
    PR tree-optimization/77673
    * gcc.dg/pr77673.c: New test.

From-SVN: r242869

re PR ada/67205 (eliminate No_Implicit_Dynamic_Code restriction violations)

PR ada/67205
* config/mips/mips.c (TARGET_CUSTOM_FUNCTION_DESCRIPTORS): Define.

From-SVN: r242868

[PR 70965] Schedule extra rebuild_cgraph_edges

2016-11-25  Martin Jambor  <mjambor@suse.cz>

PR tree-optimization/70965
* passes.def (pass_build_ssa_passes): Add pass_rebuild_cgraph_edges.

gcc/testsuite/
* g++.dg/pr70965.C: New test.

From-SVN: r242867

[Patch i386] PR78509 - TARGET_C_EXCESS_PRECISION should not return
 "unpredictable" for EXCESS_PRECISION_TYPE_STANDARD

gcc/

PR target/78509
* config/i386/i386.c (i386_excess_precision): Do not return
FLT_EVAL_METHOD_UNPREDICTABLE when "type" is
EXCESS_PRECISION_TYPE_STANDARD.
* target.def (excess_precision): Document that targets should
not return FLT_EVAL_METHOD_UNPREDICTABLE when "type" is
EXCESS_PRECISION_TYPE_STANDARD or EXCESS_PRECISION_TYPE_FAST.
Fix typo in first sentence.
* doc/tm.texi: Regenerate.

From-SVN: r242866

re PR tree-optimization/78396 (gcc.dg/vect/bb-slp-cond-1.c FAILs after fix for PR77848)

2016-11-25  Richard Biener  <rguenther@suse.de>

PR tree-optimization/78396
* tree-vectorizer.c (vectorize_loops): When the if-converted
body contains masked loads or stores do not attempt to
basic-block-vectorize it.

From-SVN: r242865

re PR gcov-profile/78467 (gcc.dg/tree-prof/comp-goto-1.c FAILs)

PR gcov-profile/78467
* gcc.dg/tree-prof/comp-goto-1.c (insn_t): Change offset to
signed int.

Co-Authored-By: Andreas Schwab <schwab@linux-m68k.org>
From-SVN: r242864

Tweak LRA handling of shared spill slots

The previous code processed the users of a stack slot in order of
decreasing size and allocated the slot based on the first user.
This seems a bit dangerous, since the ordering is based on the
mode of the biggest reference while the allocation is based also
on the size of the register itself (which I think could be larger).

That scheme doesn't scale well to polynomial sizes, since there's
no guarantee that the order of the sizes is known at compile time.
This patch instead records an upper bound on the size required
by all users of a slot.  It also records the maximum alignment
requirement.

gcc/
2016-11-15  Richard Sandiford  <richard.sandiford@arm.com>
    Alan Hayward  <alan.hayward@arm.com>
    David Sherwood  <david.sherwood@arm.com>

* function.h (spill_slot_alignment): Declare.
* function.c (spill_slot_alignment): New function.
* lra-spills.c (slot): Add align and size fields.
(assign_mem_slot): Use them in the call to assign_stack_local.
(add_pseudo_to_slot): Update the fields.
(assign_stack_slot_num_and_sort_pseudos): Initialise the fields.

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r242863

Set mode of decimal floats before calling layout_type

Previously decimal floating-point types were created and laid
out as binary floating-point types, then the caller changed
the mode to a decimal mode later.  The problem with that
approach is that not all targets support an equivalent binary
floating-point mode.  When they didn't, we would give the
type BLKmode and lay it out as a zero-sized type.

This probably had no effect in practice.  If a target doesn't
support a binary mode then it's unlikely to support the decimal
equivalent either.  However, with the stricter mode checking
added by later patches, we would assert if a scalar floating-
point type didn't have a scalar floating-point mode.

gcc/
2016-11-16  Richard Sandiford  <richard.sandiford@arm.com>
    Alan Hayward  <alan.hayward@arm.com>
    David Sherwood  <david.sherwood@arm.com>

* stor-layout.c (layout_type): Allow the caller to set the mode of
a float type.  Only choose one here if the mode is still VOIDmode.
* tree.c (build_common_tree_nodes): Set the type mode of decimal
floats before calling layout_type.
* config/rs6000/rs6000.c (rs6000_init_builtins): Likewise.

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r242862

Add run tests for recent sibcall patches

gcc/testsuite/
* gcc.dg/tree-ssa/tailcall-7-run.c: New test.
* gcc.dg/tree-ssa/tailcall-8-run.c: Likewise.

From-SVN: r242861

Tighten check for whether sibcall references local variables

This loop:

      /* Make sure the tail invocation of this function does not refer
         to local variables.  */
      FOR_EACH_LOCAL_DECL (cfun, idx, var)
        {
          if (TREE_CODE (var) != PARM_DECL
              && auto_var_in_fn_p (var, cfun->decl)
              && (ref_maybe_used_by_stmt_p (call, var)
                  || call_may_clobber_ref_p (call, var)))
            return;
        }

triggered even for local variables that are passed by value.
This meant that we didn't allow local aggregates to be passed
to a sibling call but did (for example) allow global aggregates
to be passed.

I think the loop is really checking for indirect references,
so should be able to skip any variables that never have their
address taken.

gcc/
* tree-tailcall.c (find_tail_calls): Allow calls to reference
local variables if all references are known to be direct.

gcc/testsuite/
* gcc.dg/tree-ssa/tailcall-8.c: New test.

From-SVN: r242860

Fix bogus pr64277.c failure for avr

The smaller int size for the avr target breaks the test's
expectation on the number of iterations. The failure goes
away if 32 bit ints are used in place of a plain int.

Fix by conditionally typedef int32_t to __INT32_TYPE__ for targets
with int size < 4,  and then use int32_t everywhere.

gcc/testsuite
016-11-25  Senthil Kumar Selvaraj  <senthil_kumar.selvaraj@atmel.com>

* gcc.dg/pr64277.c: Use __INT32_TYPE__ for targets
with sizeof(int) < 4.

From-SVN: r242859

re PR middle-end/78501 (SEGV in vrp_val_max)

2016-11-25  Jakub Jelinek  <jakub@redhat.com>
    Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>

PR middle-end/78501
* tree-vrp.c (extract_range_basic): Check for ptrdiff_type_node to be
non null and it's precision matches precision of lhs's type.

Co-Authored-By: Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
From-SVN: r242858

Daily bump.

From-SVN: r242857

PR tree-optimization/78476 - snprintf(0, 0, ...) with known arguments not optimized away

gcc/testsuite/ChangeLog:

PR tree-optimization/78476
* gcc.dg/tree-ssa/builtin-sprintf-5.c: New test.

gcc/ChangeLog:

PR tree-optimization/78476
* gimple-ssa-sprintf.c (struct pass_sprintf_length::call_info):
Add a member.
(handle_gimple_call): Adjust signature.
(try_substitute_return_value): Remove calls to bounded functions
with zero buffer size whose result is known.
(pass_sprintf_length::execute): Adjust call to handle_gimple_call.

From-SVN: r242854

Fix bootstrap with !ASM_OUTPUT_MAX_SKIP_ALIGN

* varasm.c (assemble_start_function): Wrap align_log definition in
ASM_OUTPUT_MAX_SKIP_ALIGN.

From-SVN: r242853

i386.md (wide AND insn to QImode splitter): Use explicit mode macros.

* config/i386/i386.md (wide AND insn to QImode splitter): Use
explicit mode macros.
(wide OR insn to QImode splitter): Ditto.

From-SVN: r242852

config.guess: Import latest version.

* config.guess: Import latest version.
* config.sub: Likewise.

From-SVN: r242851

* config/i386/i386.md: Move some more patterns around.

From-SVN: r242850

re PR rtl-optimization/77541 (wrong code with 512bit vectors of int128 @ -O1)

2016-11-24  Vladimir Makarov  <vmakarov@redhat.com>

PR rtl-optimization/77541
* lra-constraints.c (struct input_reload): Add field match_p.
(get_reload_reg): Check modes of input reloads to generate unique
value reload pseudo.
(match_reload): Add input reload pseudo for the current insn.

2016-11-24  Vladimir Makarov  <vmakarov@redhat.com>

PR rtl-optimization/77541
* gcc.target/i386/pr77541.c: New.

From-SVN: r242848

re PR fortran/78500 (ICE in gfc_check_vardef_context, at fortran/expr.c:5289)

2016-11-24  Steven G. Kargl  <kargl@gcc.gnu.org>

PR fortran/78500
* expr.c (gfc_check_vardef_contextm): Fix NULL pointer dereference.
* interface.c (matching_typebound_op): Ditto.

2016-11-24  Steven G. Kargl  <kargl@gcc.gnu.org>

PR fortran/78500
* gfortran.dg/class_result_4.f90: New test.

From-SVN: r242846

[Patch AArch64 13/17] Enable _Float16 for AArch64

gcc/

* config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Update
__FLT_EVAL_METHOD__ and __FLT_EVAL_METHOD_C99__ when we switch
architecture levels.
* config/aarch64/aarch64.c (aarch64_promoted_type): Only promote
the aarch64_fp16_type_node, not all HFmode types.
(aarch64_libgcc_floating_mode_supported_p): Support HFmode.
(aarch64_scalar_mode_supported_p): Likewise.
(aarch64_excess_precision): New.
(TARGET_LIBGCC_FLOATING_MODE_SUPPORTED_P): Define.
(TARGET_SCALAR_MODE_SUPPORTED_P): Likewise.
(TARGET_C_EXCESS_PRECISION): Likewise.

gcc/testsuite/

* gcc.target/aarch64/_Float16_1.c: New.
* gcc.target/aarch64/_Float16_2.c: Likewise.
* gcc.target/aarch64/_Float16_3.c: Likewise.

From-SVN: r242845

[Patch libgcc AArch64 12/17] Enable hfmode soft-float conversions and truncations

gcc/

* config/aarch64/aarch64-c.c (aarch64_scalar_mode_supported_p): New.
(TARGET_SCALAR_MODE_SUPPORTED_P): Define.

libgcc/

* config/aarch64/sfp-machine.h (_FP_NANFRAC_H): Define.
(_FP_NANSIGN_H): Likewise.
* config/aarch64/t-softfp (softfp_extensions): Add hftf.
(softfp_truncations): Add tfhf.
(softfp_extras): Add required conversion functions.

From-SVN: r242844

[Patch AArch64 11/17] Add floatdihf2 and floatunsdihf2 patterns

gcc/

* config/aarch64/aarch64.md (<optab>sihf2): Convert to expand.
(<optab>dihf2): Likewise.
(aarch64_fp16_<optab><mode>hf2): New.

gcc/testsuite/

* gcc.target/aarch64/floatdihf2_1.c: New.

From-SVN: r242843

Allow -fopenmp in NVPTX mkoffload

PR target/67822
* config/nvptx/mkoffload.c (main): Allow -fopenmp.

From-SVN: r242842

sparc-common.c (sparc_option_optimization_table): Enable REE at -O2 and higher.

* common/config/sparc/sparc-common.c (sparc_option_optimization_table):
Enable REE at -O2 and higher.
* config/sparc/sparc.c (sparc_option_override): Disable it by default
in 32-bit mode.

From-SVN: r242841

[TER] PR target/48863 : Don't replace expressions across local register variable definitions

PR target/48863
PR inline-asm/70184
* tree-ssa-ter.c (temp_expr_table): Add reg_vars_cnt field.
(new_temp_expr_table): Initialise reg_vars_cnt.
(free_temp_expr_table): Release reg_vars_cnt.
(process_replaceable): Add reg_vars_cnt argument, set reg_vars_cnt
field of TAB.
(find_replaceable_in_bb): Use the above to record register variable
write occurrences and cancel replacement across them.

* gcc.target/arm/pr48863.c: New test.

From-SVN: r242840

re PR rtl-optimization/78437 (invalid sign-extend conversion in REE pass)

PR rtl-optimization/78437
* ree.c (get_uses): New function.
(combine_reaching_defs): When a copy is needed, return false if any
reaching use of the source register reads it in a mode larger than
the mode it is set in and WORD_REGISTER_OPERATIONS is true.

From-SVN: r242839

Dump probability for edges a frequency for BBs

* gimple-pretty-print.c (dump_edge_probability): New function.
(dump_gimple_switch): Dump label edge probabilities.
(dump_gimple_cond): Likewise.
(dump_gimple_label): Dump
(dump_gimple_bb_header): Dump basic block frequency.
(pp_cfg_jump): Replace e->dest argument with e.
(dump_implicit_edges): Likewise.
* tree-ssa-loop-ivopts.c (get_scaled_computation_cost_at):
Use gimple_bb (at) instead of at->bb.
* gcc.dg/builtin-unreachable-6.c: Update test to not to scan
parts for frequencies/probabilities.
* gcc.dg/pr34027-1.c: Likewise.
* gcc.dg/strict-overflow-2.c: Likewise.
* gcc.dg/tree-ssa/20040703-1.c: Likewise.
* gcc.dg/tree-ssa/builtin-sprintf-2.c: Likewise.
* gcc.dg/tree-ssa/pr32044.c: Likewise.
* gcc.dg/tree-ssa/vector-3.c: Likewise.
* gcc.dg/tree-ssa/vrp101.c: Likewise.
* gcc.dg/tree-ssa/dump-2.c: New test.

From-SVN: r242837

common.opt (flimit-function-alignment): New.

gcc/
* common.opt (flimit-function-alignment): New.
* doc/invoke.texi (-flimit-function-alignment): Document.
* emit-rtl.h (struct rtl_data): Add max_insn_address field.
* final.c (shorten_branches): Set it.
* varasm.c (assemble_start_function): Limit alignment if
requested.

gcc/testsuite/
* gcc.target/i386/align-limit.c: New test.

From-SVN: r242836

re PR tree-optimization/71595 (ICE on valid code at -O2 and -O3 on x86_64-linux-gnu: in check_loop_closed_ssa_use, at tree-ssa-loop-manip.c:704)

2016-11-24  Richard Biener  <rguenther@suse.de>

PR tree-optimization/71595
* cfgloopmanip.h (remove_path): Add irred_invalidated and
loop_closed_ssa_invalidated parameters, defaulted to NULL.
* cfgloopmanip.c (remove_path): Likewise, pass them along to
called functions.  Only fix irred flags if the caller didn't
request state.
* tree-ssa-loop-ivcanon.c (unloop_loops): Use add_bb_to_loop.
(unloop_loops): Pass irred_invalidated and loop_closed_ssa_invalidated
to remove_path.

* gcc.dg/torture/pr71595.c: New testcase.

From-SVN: r242835

re PR rtl-optimization/78120 (If conversion no longer performed)

PR rtl-optimization/78120
* ifcvt.c (noce_conversion_profitable_p): Check original cost in all
cases, and additionally test against max_seq_cost for speed
optimization.
(noce_process_if_block): Compute an estimate for the original cost when
optimizing for speed, using the minimum of then and else block costs.

testsuite/
PR rtl-optimization/78120
* gcc.target/i386/pr78120.c: New test.

From-SVN: r242834

re PR rtl-optimization/78120 (If conversion no longer performed)

PR rtl-optimization/78120
* rtlanal.c (insn_rtx_cost): Use set_rtx_cost.

From-SVN: r242833

re PR rtl-optimization/78120 (If conversion no longer performed)

PR rtl-optimization/78120
* config/i386/i386.c (ix86_rtx_costs): Fully handle SETs.

From-SVN: r242832

match.pd: Refine type conversion in result expr for below pattern: (cond (cmp (convert1?

* match.pd: Refine type conversion in result expr for below pattern:
(cond (cmp (convert1? x) c1) (convert2? x) c2) -> (minmax (x c)).

From-SVN: r242831

re PR middle-end/78429 (ICE in set_value_range, at tree-vrp.c on non-standard boolean)

PR middle-end/78429
* tree.h (wi::fits_to_boolean_p): New predicate.
(wi::fits_to_tree_p): Use it for boolean types.
* tree.c (int_fits_type_p): Likewise.

From-SVN: r242829

cp_parser_range_for: use safe_push instead of quick_push (PR

PR bootstrap/78493
* parser.c (cp_parser_range_for): Use safe_push instead of quick_push.
PR bootstrap/78493
* g++.dg/cpp1z/decomp18.C: New test.

From-SVN: r242828

ldp_stp_1.c: Add -mcpu=generic.

2016-11-23  Naveen H.S  <Naveen.Hurugalawadi@caviumnetworks.com>

* gcc.target/aarch64/ldp_stp_1.c : Add -mcpu=generic.
* gcc.target/aarch64/store-pair-1.c : Likewise.

From-SVN: r242827

re PR middle-end/71762 (~X & Y to X < Y doesn't work for uninitialized values)

2016-11-23  Richard Biener  <rguenther@suse.de>

PR middle-end/71762
* match.pd ((~X & Y) -> X < Y, (X & ~Y) -> Y < X,
(~X | Y) -> X <= Y, (X | ~Y) -> Y <= X): Remove.

* gcc.dg/torture/pr71762-1.c: New testcase.
* gcc.dg/torture/pr71762-2.c: Likewise.
* gcc.dg/torture/pr71762-3.c: Likewise.
* gcc.dg/tree-ssa/forwprop-28.c: XFAIL.

From-SVN: r242822

fmaxmin.c: Add -fno-vect-cost-model.

2016-11-23  Naveen H.S  <Naveen.Hurugalawadi@caviumnetworks.com>

* gcc.target/aarch64/fmaxmin.c : Add -fno-vect-cost-model.
* gcc.target/aarch64/fmul_fcvt_2.c : Likewise.
* gcc.target/aarch64/vect-abs-compile.c : Likewise.
* gcc.target/aarch64/vect-clz.c : Likewise.
* gcc.target/aarch64/vect-fcm-eq-d.c : Likewise.
* gcc.target/aarch64/vect-fcm-ge-d.c : Likewise.
* gcc.target/aarch64/vect-fcm-gt-d.c : Likewise.
* gcc.target/aarch64/vect-fmovd-zero.c : Likewise.
* gcc.target/aarch64/vect-fmovd.c : Likewise.
* gcc.target/aarch64/vect-fmovf-zero.c : Likewise.
* gcc.target/aarch64/vect-fmovf.c : Likewise.
* gcc.target/aarch64/vect_ctz_1.c : Likewise.

From-SVN: r242821

Fix print_node for CONSTRUCTORs

* print-tree.c (struct bucket): Remove.
(print_node): Add new argument which drives whether a tree node
is printed briefly or not.
(debug_tree): Replace a custom hash table with hash_set<T>.
* print-tree.h (print_node): Add the argument.

From-SVN: r242820

nios2.c (nios2_init_libfuncs): Add ATTRIBUTE_UNUSED.

2016-11-24  Chung-Lin Tang  <cltang@codesourcery.com>

* config/nios2/nios2.c (nios2_init_libfuncs): Add ATTRIBUTE_UNUSED.

From-SVN: r242819

re PR target/78458 (LRA ICE building libgcc for powerpc-linux-gnuspe e500v2)

gcc/
PR target/78458
* config/rs6000/rs6000.h (HARD_REGNO_CALLER_SAVE_MODE): Return MODE
if it is at least NREGS wide.

gcc/testsuite/
PR target/78458
* gcc.target/powerpc/pr78458.c: New.

From-SVN: r242818

Daily bump.

From-SVN: r242817

Fix e500 offset handling for TImode.

Given my previous fix for a missing insn pattern for e500, building
glibc runs into an assembler error "Error: operand out of range (256
is not between 0 and 248)".  This comes from an insn:

(insn 115 1209 1210 (set (reg:DF 27 27 [orig:294 _129 ] [294])
        (subreg:DF (mem/c:TI (plus:SI (reg/f:SI 1 1)
                    (const_int 256 [0x100])) [14 %sfp+256 S16 A128]) 0)) 1909 {*frob_df_ti}
     (nil))

This patch adjusts the offset handling for TImode - and TDmode and
PTImode in case such subregs can arise for them - to be the same as
for TFmode, so that proper SPE offset checks are made in the
TARGET_E500_DOUBLE case.

This allows the glibc build to complete.  Testing shows 372 FAILs
across the gcc, g++ and libstdc++ testsuites; more cleanup is
certainly needed, but this gets to the point where the toolchain at
least builds so it's possible to compare test results when fixing
bugs.

* config/rs6000/rs6000.c (rs6000_legitimate_offset_address_p): For
TARGET_E500_DOUBLE. handle TDmode, TImode and PTImode the same as
TFmode, IFmode and KFmode.

From-SVN: r242814

Add another e500 subreg pattern.

Building glibc for powerpc-linux-gnuspe --enable-e500-double, given
the patch <https://gcc.gnu.org/ml/gcc-patches/2016-11/msg02404.html>
applied, fails with errors such as:

../sysdeps/ieee754/ldbl-128ibm/s_modfl.c: In function '__modfl':
../sysdeps/ieee754/ldbl-128ibm/s_modfl.c:91:1: error: unrecognizable insn:
 }
 ^
(insn 31 30 32 2 (set (reg:DF 203)
        (subreg:DF (reg:TI 202) 8)) "../sysdeps/ieee754/ldbl-128ibm/s_modfl.c":44 -1
     (nil))
../sysdeps/ieee754/ldbl-128ibm/s_modfl.c:91:1: internal compiler error: in extract_insn, at recog.c:2311

This patch adds an insn pattern similar to various patterns already
present to handle extracting such a subreg.  This allows the glibc
build to get further, until it runs into an assembler error for which
I have another patch.

gcc:
* config/rs6000/spe.md (*frob_<SPE64:mode>_ti_8): New insn
pattern.

gcc/testsuite:
* gcc.c-torture/compile/20161123-1.c: New test.

From-SVN: r242813

combine: Query can_change_dest_mode before changing dest mode

As reported in https://gcc.gnu.org/ml/gcc-patches/2016-11/msg02388.html .

Changing the mode of a hard register can lead to problems, or at least
it can make worse code if the result will need reloads.

* combine.c (change_zero_ext): Only change the mode of a hard register
destination if can_change_dest_mode holds for that.

From-SVN: r242812

* varasm.c (assemble_name): Increase buffer size for name.

From-SVN: r242810

* config/i386/i386.md: Move some insn patterns around.

From-SVN: r242809

* config/spu/spu.md (floatunsdidf2): Remove unused local variable.

From-SVN: r242807

* doc/extend.texi: Constify first argument to __builtin_object_size.

From-SVN: r242804

opth-gen.awk: Use unsigned shifts for bit masks.

2016-11-07  Bernd Edlinger  <bernd.edlinger@hotmail.de>

* opth-gen.awk: Use unsigned shifts for bit masks.  Allow all bits
to be used.  Add brackets around macro argument.

From-SVN: r242803

re PR fortran/78297 (ICE in finish_equivalences, at fortran/trans-common.c:1246)

2016-11-23  Steven G. Kargl  <kargl@gcc.gnu.org>

PR fortran/78297
* trans-common.c (finish_equivalences): Do not dereference a NULL pointer.

2016-11-23  Steven G. Kargl  <kargl@gcc.gnu.org>

PR fortran/78297
* gfortran.dg/pr78297.f90: New test.

From-SVN: r242802

* gcc.target/powerpc/builtins-3.c: Add -maltivec and -mvsx options.

From-SVN: r242800

i386.md (*<any_or:code>hi_1): Fix operand 2 constraints.

* config/i386/i386.md (*<any_or:code>hi_1): Fix operand 2 constraints.

From-SVN: r242796

re PR sanitizer/69278 (Confusion option handling for -sanitize-recovery=alll)

PR sanitizer/69278
* opts.c (parse_sanitizer_options): For -fsanitize=undefined,
restore enabling also SANITIZE_UNREACHABLE and SANITIZE_RETURN.

* g++.dg/ubsan/return-7.C: New test.
* c-c++-common/ubsan/unreachable-4.c: New test.

From-SVN: r242795

re PR tree-optimization/78482 (wrong code at -O3 in both 32-bit and 64-bit modes on x86_64-linux-gnu)

PR tree-optimization/78482
* gcc.dg/torture/pr78482.c (c, d): Use signed char instead of char.
(bar): New function.
(main): Call bar instead of printf.

From-SVN: r242794

re PR middle-end/69183 (ICE when using OpenMP PRIVATE keyword in OMP DO loop not explicitly encapsulated in OMP PARALLEL region)

PR middle-end/69183
* omp-low.c (build_outer_var_ref): Change lastprivate argument
to code, pass it recursively, adjust uses.  For OMP_CLAUSE_PRIVATE
on worksharing constructs, treat it like clauses on simd construct.
Formatting fix.
(lower_rec_input_clauses): For OMP_CLAUSE_PRIVATE_OUTER_REF pass
OMP_CLAUSE_PRIVATE as last argument to build_outer_var_ref.
(lower_lastprivate_clauses): Pass OMP_CLAUSE_LASTPRIVATE instead
of true as last argument to build_outer_var_ref.

* gfortran.dg/gomp/pr69183.f90: New test.

From-SVN: r242793

re PR target/78230 (Compile pr66178.c fail for mips64el-elf with N64 abi)

PR target/78230
* gcc.dg/torture/pr66178.c (test): Use uintptr_t instead of int.
(test2) Ditto.

From-SVN: r242792

i386.md (*movqi_internal): Calculate mode attribute of alternatives 7,8,9 depending on TARGET_AVX512DQ.

* gcc.target/config/i386.md (*movqi_internal): Calculate mode
attribute of alternatives 7,8,9 depending on TARGET_AVX512DQ.
<TYPE_MSKMOV>: Emit kmovw for MODE_HI insn mode attribute.
(*k<logic><mode>): Calculate mode attribute depending on
TARGET_AVX512DQ.  Emit k<logic>w for MODE_HI insn mode attribute.
(*andqi_1): Calculate mode attribute of alternative 3 depending
on TARGET_AVX512DQ.  Emit kandw for MODE_HI insn mode attribute.
(kandn<mode>): Calculate mode attribute of alternative 2 depending
on TARGET_AVX512DQ.  Emit kandnw for MODE_HI insn mode attribute.
(kxnor<mode>): Merge insn patterns using SWI1248_AVX512BW mode
iterator.  Calculate mode attribute of alternative 1 depending
on TARGET_AVX512DQ.  Emit kxnorw for MODE_HI insn mode attribute.
(*one_cmplqi2_1): Calculate mode attribute of alternative 2 depending
on TARGET_AVX512DQ.  Emit knotw for MODE_HI insn mode attribute.

From-SVN: r242791

re PR c++/77907 (Add "const" to argument of constexpr constructor causes the object to be left in unconstructed state)

PR c++/77907
* cp-gimplify.c (cp_fold) <case CALL_EXPR>: When calling constructor
and maybe_constant_value returns non-CALL_EXPR, create INIT_EXPR
with the object on lhs and maybe_constant_value returned expr on rhs.

* g++.dg/cpp0x/pr77907.C: New test.

From-SVN: r242790

OpenMP offloading to NVPTX: libgomp changes

* Makefile.am (libgomp_la_SOURCES): Add atomic.c, icv.c, icv-device.c.
* Makefile.in. Regenerate.
* configure.ac [nvptx*-*-*] (libgomp_use_pthreads): Set and use it...
(LIBGOMP_USE_PTHREADS): ...here; new define.
* configure: Regenerate.
* config.h.in: Likewise.
* config/posix/affinity.c: Move to...
* affinity.c: ...here (new file).  Guard use of Pthreads-specific
interface by LIBGOMP_USE_PTHREADS.
* critical.c: Split out GOMP_atomic_{start,end} into...
* atomic.c: ...here (new file).
* env.c: Split out ICV definitions into...
* icv.c: ...here (new file) and...
* icv-device.c: ...here. New file.
* config/linux/lock.c (gomp_init_lock_30): Move to generic lock.c.
(gomp_destroy_lock_30): Ditto.
(gomp_set_lock_30): Ditto.
(gomp_unset_lock_30): Ditto.
(gomp_test_lock_30): Ditto.
(gomp_init_nest_lock_30): Ditto.
(gomp_destroy_nest_lock_30): Ditto.
(gomp_set_nest_lock_30): Ditto.
(gomp_unset_nest_lock_30): Ditto.
(gomp_test_nest_lock_30): Ditto.
* lock.c: New.
* config/nvptx/lock.c: New.
* config/nvptx/bar.c: New.
* config/nvptx/bar.h: New.
* config/nvptx/doacross.h: New.
* config/nvptx/error.c: New.
* config/nvptx/icv-device.c: New.
* config/nvptx/mutex.h: New.
* config/nvptx/pool.h: New.
* config/nvptx/proc.c: New.
* config/nvptx/ptrlock.h: New.
* config/nvptx/sem.h: New.
* config/nvptx/simple-bar.h: New.
* config/nvptx/target.c: New.
* config/nvptx/task.c: New.
* config/nvptx/team.c: New.
* config/nvptx/time.c: New.
* config/posix/simple-bar.h: New.
* libgomp.h: Guard pthread.h inclusion.  Include simple-bar.h.
(gomp_num_teams_var): Declare.
(struct gomp_thread_pool): Change threads_dock member to
gomp_simple_barrier_t.
[__nvptx__] (gomp_thread): New implementation.
(gomp_thread_attr): Guard by LIBGOMP_USE_PTHREADS.
(gomp_thread_destructor): Ditto.
(gomp_init_thread_affinity): Ditto.
* team.c: Guard uses of Pthreads-specific interfaces by
LIBGOMP_USE_PTHREADS.  Adjust all uses of threads_dock.
(gomp_free_thread) [__nvptx__]: Do not call 'free'.

* config/nvptx/alloc.c: Delete.
* config/nvptx/barrier.c: Ditto.
* config/nvptx/fortran.c: Ditto.
* config/nvptx/iter.c: Ditto.
* config/nvptx/iter_ull.c: Ditto.
* config/nvptx/loop.c: Ditto.
* config/nvptx/loop_ull.c: Ditto.
* config/nvptx/ordered.c: Ditto.
* config/nvptx/parallel.c: Ditto.
* config/nvptx/priority_queue.c: Ditto.
* config/nvptx/sections.c: Ditto.
* config/nvptx/single.c: Ditto.
* config/nvptx/splay-tree.c: Ditto.
* config/nvptx/work.c: Ditto.

* testsuite/libgomp.fortran/fortran.exp (lang_link_flags): Pass
-foffload=-lgfortran in addition to -lgfortran.
* testsuite/libgomp.oacc-fortran/fortran.exp (lang_link_flags): Ditto.

* plugin/plugin-nvptx.c: Include <limits.h>.
(struct targ_fn_descriptor): Add new fields.
(struct ptx_device): Ditto.  Set them...
(nvptx_open_device): ...here.
(nvptx_adjust_launch_bounds): New.
(nvptx_host2dev): Allow NULL 'nvthd'.
(nvptx_dev2host): Ditto.
(GOMP_OFFLOAD_get_caps): Add GOMP_OFFLOAD_CAP_OPENMP_400.
(link_ptx): Adjust log sizes.
(nvptx_host2dev): Allow NULL 'nvthd'.
(nvptx_dev2host): Ditto.
(nvptx_set_clocktick): New.  Use it...
(GOMP_OFFLOAD_load_image): ...here.  Set new targ_fn_descriptor
fields.
(GOMP_OFFLOAD_dev2dev): New.
(nvptx_adjust_launch_bounds): New.
(nvptx_stacks_size): New.
(nvptx_stacks_alloc): New.
(nvptx_stacks_free): New.
(GOMP_OFFLOAD_run): New.
(GOMP_OFFLOAD_async_run): New (stub).

Co-Authored-By: Dmitry Melnik <dm@ispras.ru>
Co-Authored-By: Jakub Jelinek <jakub@redhat.com>
From-SVN: r242789

* config/mcore/mcore.c (emit_new_cond_insn): Fix prototype.

From-SVN: r242788

iq2000.c (iq2000_rtx_costs): Avoid multiplication in boolean context warning.

* config/iq2000/iq2000.c (iq2000_rtx_costs): Avoid multiplication
in boolean context warning.

From-SVN: r242787

re PR middle-end/78153 (strlen return value can be assumed to be less than PTRDIFF_MAX)

2016-11-23  Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>

PR middle-end/78153
* gimple-fold.c (fold_stmt_1): Handle case for GIMPLE_RETURN.
* tree-vrp.c (extract_range_basic): Handle case for
CFN_BUILT_IN_STRLEN.

testsuite/
* gcc.dg/tree-ssa/pr78153-1.c: New test.
* gcc.dg/tree-ssa/pr78153-2.c: Likewise.

From-SVN: r242786

* config/ia64/ia64.c (ia64_emit_insn_before): Fix prototype.

From-SVN: r242785

[Patch ARM 17/17] Enable _Float16 for ARM and fix PR target/63250

gcc/

PR target/63250
* config/arm/arm-builtins.c (arm_simd_floatHF_type_node): Rename to...
(arm_fp16_type_node): ...This, make visibile.
(arm_simd_builtin_std_type): Rename arm_simd_floatHF_type_node to
arm_fp16_type_node.
(arm_init_simd_builtin_types): Likewise.
(arm_init_fp16_builtins): Likewise.
* config/arm/arm.c (arm_excess_precision): New.
(arm_floatn_mode): Likewise.
(TARGET_C_EXCESS_PRECISION): Likewise.
(TARGET_FLOATN_MODE): Likewise.
(arm_promoted_type): Only promote arm_fp16_type_node.
* config/arm/arm.h (arm_fp16_type_node): Declare.

gcc/testsuite/

PR target/63250
* lib/target-supports.exp (add_options_for_float16): Add
-mfp16-format=ieee when testign arm*-*-*.

From-SVN: r242784

[Patch 16/17 libgcc ARM] Half to double precision conversions

gcc/

* config/arm/arm.c (arm_convert_to_type): Delete.
(TARGET_CONVERT_TO_TYPE): Delete.
(arm_init_libfuncs): Enable trunc_optab from DFmode to HFmode.
(arm_libcall_uses_aapcs_base): Add trunc_optab from DF- to HFmode.
* config/arm/arm.h (TARGET_FP16_TO_DOUBLE): New.
* config/arm/arm.md (truncdfhf2): Only convert through SFmode if we
are in fast math mode, and have no single step hardware instruction.
(extendhfdf2): Only expand through SFmode if we don't have a
single-step hardware instruction.
* config/arm/vfp.md (*truncdfhf2): New.
(extendhfdf2): Likewise.

gcc/testsuite/

* gcc.target/arm/fp16-rounding-alt-1.c (ROUNDED): Change expected
result.
* gcc.target/arm/fp16-rounding-ieee-1.c (ROUNDED): Change expected
result.

From-SVN: r242783

[Patch 15/17 libgcc ARM] Add double to half conversions.

libgcc/

* config/arm/fp16.c (binary64): New.
(__gnu_d2h_internal): New.
(__gnu_d2h_ieee): New.
(__gnu_d2h_alternative): New.

Co-Authored-By: Matthew Wahab <matthew.wahab@arm.com>
From-SVN: r242782

[Patch 14/17] [libgcc, ARM] Generalise float-to-half conversion function.

libgcc/

* config/arm/fp16.c (struct format): New.
(binary32): New.
(__gnu_float2h_internal): New.  Body moved from
__gnu_f2h_internal and generalize.
(_gnu_f2h_internal): Move body to function __gnu_float2h_internal.
Call it with binary32.

Co-Authored-By: Matthew Wahab <matthew.wahab@arm.com>
From-SVN: r242781

[Patch testsuite patch 10/17] Add options for floatN when checking effective target for support

gcc/testsuite/

* lib/target-supports.exp (check_effective_target_float16): Add
options for _Float16.
(check_effective_target_float32): Add options for _Float32.
(check_effective_target_float64): Add options for _Float64.
(check_effective_target_float128): Add options for _Float128.
(check_effective_target_float32x): Add options for _Float32x.
(check_effective_target_float64x): Add options for _Float64x.
(check_effective_target_float128x): Add options for _Float128x.

From-SVN: r242780

[Patch libgcc 9/17] Update soft-fp from glibc

libgcc/

* soft-fp/extendhftf2.c: New.
* soft-fp/fixhfti.c: Likewise.
* soft-fp/fixunshfti.c: Likewise.
* soft-fp/floattihf.c: Likewise.
* soft-fp/floatuntihf.c: Likewise.
* soft-fp/half.h: Likewise.
* soft-fp/trunctfhf2.c: Likewise.

From-SVN: r242779

[Patch 8/17] Make _Float16 available if HFmode is available

gcc/

* targhooks.c (default_floatn_mode): Enable _Float16 if a target
provides HFmode.

From-SVN: r242778

[Patch 7/17] Delete TARGET_FLT_EVAL_METHOD and poison it.

gcc/

* config/s390/s390.h (TARGET_FLT_EVAL_METHOD): Delete.
* config/m68k/m68k.h (TARGET_FLT_EVAL_METHOD): Delete.
* config/i386/i386.h (TARGET_FLT_EVAL_METHOD): Delete.
* defaults.h (TARGET_FLT_EVAL_METHOD): Delete.
* doc/tm.texi.in (TARGET_FLT_EVAL_METHOD): Delete.
* doc/tm.texi: Regenerate.
* system.h (TARGET_FLT_EVAL_METHOD): Poison.

From-SVN: r242777

[Patch 6/17] Migrate excess precision logic to use TARGET_EXCESS_PRECISION

gcc/

* toplev.c (init_excess_precision): Delete most logic.
* tree.c (excess_precision_type): Rewrite to use
TARGET_EXCESS_PRECISION.
* doc/invoke.texi (-fexcess-precision): Document behaviour in a
more generic fashion.
* ginclude/float.h: Wrap definition of FLT_EVAL_METHOD in
__STDC_WANT_IEC_60559_TYPES_EXT__.

gcc/c-family/

* c-common.c (excess_precision_mode_join): New.
(c_ts18661_flt_eval_method): New.
(c_c11_flt_eval_method): Likewise.
(c_flt_eval_method): Likewise.
* c-common.h (excess_precision_mode_join): New.
(c_flt_eval_method): Likewise.
* c-cppbuiltin.c (c_cpp_flt_eval_method_iec_559): New.
(cpp_iec_559_value): Call it.
(c_cpp_builtins): Modify logic for __LIBGCC_*_EXCESS_PRECISION__,
call c_flt_eval_method to set __FLT_EVAL_METHOD__ and
__FLT_EVAL_METHOD_TS_18661_3__.

gcc/testsuite/

* gcc.dg/fpermitted-flt-eval-methods_3.c: New.
* gcc.dg/fpermitted-flt-eval-methods_4.c: Likewise.

From-SVN: r242776

[Patch 5/17] Add -fpermitted-flt-eval-methods=[c11|ts-18661-3]

gcc/c-family/

* c-opts.c (c_common_post_options): Add logic to handle the default
case for -fpermitted-flt-eval-methods.

gcc/

* common.opt (fpermitted-flt-eval-methods): New.
* doc/invoke.texi (-fpermitted-flt-eval-methods): Document it.
* flag_types.h (permitted_flt_eval_methods): New.

gcc/testsuite/

* gcc.dg/fpermitted-flt-eval-methods_1.c: New.
* gcc.dg/fpermitted-flt-eval-methods_2.c: New.

From-SVN: r242775

[Patch 4/17] Implement TARGET_C_EXCESS_PRECISION for m68k

gcc/

* config/m68k/m68k.c (m68k_excess_precision): New.
(TARGET_C_EXCESS_PRECISION): Define.

From-SVN: r242774

[Patch 3/17] Implement TARGET_C_EXCESS_PRECISION for s390

* config/s390/s390.c (s390_excess_precision): New.
(TARGET_C_EXCESS_PRECISION): Define.

From-SVN: r242773

[Patch 2/17] Implement TARGET_C_EXCESS_PRECISION for i386

gcc/
* config/i386/i386.c (ix86_excess_precision): New.
(TARGET_C_EXCESS_PRECISION): Define.

From-SVN: r242772

[Patch 1/17] Add a new target hook for describing excess precision intentions

gcc/

* target.def (excess_precision): New hook.
* target.h (flt_eval_method): New.
(excess_precision_type): Likewise.
* targhooks.c (default_excess_precision): New.
* targhooks.h (default_excess_precision): New.
* doc/tm.texi.in (TARGET_C_EXCESS_PRECISION): New.
* doc/tm.texi: Regenerate.

From-SVN: r242771

PR middle-end/78461 - [7 Regression] ICE: in operator+=

gcc/testsuite/ChangeLog:

PR middle-end/78461
* gcc.dg/tree-ssa/builtin-sprintf-4.c: New test.
* gcc.dg/tree-ssa/builtin-sprintf-warn-2.c: Adjust warning text.

gcc/ChangeLog:

PR middle-end/78461
* gimple-ssa-sprintf.c (format_string): Correct the maxima and
set the minimum number of bytes for an unknown string to zero.

From-SVN: r242769

re PR c++/71450 (ICE on invalid C++11 code on x86_64-linux-gnu: in tree check: expected record_type or union_type or qual_union_type, have template_type_parm in lookup_base, at cp/search.c:203)

PR c++/71450
* pt.c (tsubst_copy): Return error_mark_node when mark_used
fails, even when complain & tf_error.

* g++.dg/cpp0x/pr71450-1.C: New test.
* g++.dg/cpp0x/pr71450-2.C: New test.

From-SVN: r242767

re PR c++/77739 (internal compiler error: in create_tmp_var, at gimple-expr.c:524)

PR c++/77739
* cp-gimplify.c (cp_gimplify_tree) <case VEC_INIT_EXPR>: Pass
false as handle_invisiref_parm_p to cp_genericize_tree.
(struct cp_genericize_data): Add handle_invisiref_parm_p field.
(cp_genericize_r): Don't wrap is_invisiref_parm into references
if !wtd->handle_invisiref_parm_p.
(cp_genericize_tree): Add handle_invisiref_parm_p argument,
set wtd.handle_invisiref_parm_p to it.
(cp_genericize): Pass true as handle_invisiref_parm_p to
cp_genericize_tree.  Formatting fix.

* g++.dg/cpp1y/pr77739.C: New test.

From-SVN: r242766

Fix PR number in ChangeLog

From-SVN: r242765

backport: hsa-builtins.def: New file.

Merge from HSA branch to trunk

2016-11-23  Martin Jambor  <mjambor@suse.cz>
    Martin Liska  <mliska@suse.cz>

gcc/
* hsa-builtins.def: New file.
* Makefile.in (BUILTINS_DEF): Add hsa-builtins.def dependency.
* builtins.def: Include hsa-builtins.def.
(DEF_HSA_BUILTIN): New macro.
* dumpfile.h (OPTGROUP_OPENMP): Define.
* dumpfile.c (optgroup_options): Added OPTGROUP_OPENMP.
* gimple.h (gf_mask): Added elements GF_OMP_FOR_GRID_INTRA_GROUP and
GF_OMP_FOR_GRID_GROUP_ITER.
(gimple_omp_for_grid_phony): Added checking assert.
(gimple_omp_for_set_grid_phony): Likewise.
(gimple_omp_for_grid_intra_group): New function.
(gimple_omp_for_set_grid_intra_group): Likewise.
(gimple_omp_for_grid_group_iter): Likewise.
(gimple_omp_for_set_grid_group_iter): Likewise.
* omp-low.c (check_omp_nesting_restrictions): Allow GRID loop where
previosuly only distribute loop was permitted.
(lower_lastprivate_clauses): Allow non tcc_comparison predicates.
(grid_get_kernel_launch_attributes): Support multiple HSA grid
dimensions.
(grid_expand_omp_for_loop): Likewise and also support standalone
distribute constructs.  New parameter INTRA_GROUP, updated both users.
(grid_expand_target_grid_body): Support standalone distribute
constructs.
(pass_data_expand_omp): Changed optinfo_flags to OPTGROUP_OPENMP.
(pass_data_expand_omp_ssa): Likewise.
(pass_data_omp_device_lower): Likewsie.
(pass_data_lower_omp): Likewise.
(pass_data_diagnose_omp_blocks): Likewise.
(pass_data_oacc_device_lower): Likewise.
(pass_data_omp_target_link): Likewise.
(grid_lastprivate_predicate): New function.
(lower_omp_for_lastprivate): Call grid_lastprivate_predicate for
gridified loops.
(lower_omp_for): Support standalone distribute constructs.
(grid_prop): New type.
(grid_safe_assignment_p): Check for assignments to group_sizes, new
parameter GRID.
(grid_seq_only_contains_local_assignments): New parameter GRID, pass
it to callee.
(grid_find_single_omp_among_assignments_1): Likewise, improve missed
optimization info messages.
(grid_find_single_omp_among_assignments): Likewise.
(grid_find_ungridifiable_statement): Do not bail out for SIMDs.
(grid_parallel_clauses_gridifiable): New function.
(grid_inner_loop_gridifiable_p): Likewise.
(grid_dist_follows_simple_pattern): Likewise.
(grid_gfor_follows_tiling_pattern): Likewise.
(grid_call_permissible_in_distribute_p): Likewise.
(grid_handle_call_in_distribute): Likewise.
(grid_dist_follows_tiling_pattern): Likewise.
(grid_target_follows_gridifiable_pattern): Support standalone distribute
constructs.
(grid_var_segment): New enum.
(grid_mark_variable_segment): New function.
(grid_copy_leading_local_assignments): Call grid_mark_variable_segment
if a new argument says so.
(grid_process_grid_body): New function.
(grid_eliminate_combined_simd_part): Likewise.
(grid_mark_tiling_loops): Likewise.
(grid_mark_tiling_parallels_and_loops): Likewise.
(grid_process_kernel_body_copy): Support standalone distribute
constructs.
(grid_attempt_target_gridification): New grid variable holding overall
gridification state.  Support standalone distribute constructs and
collapse clauses.
* doc/optinfo.texi (Optimization groups): Document OPTGROUP_OPENMP.
* hsa.h (hsa_bb): Add method method append_phi.
(hsa_insn_br): Renamed to hsa_insn_cbr, renamed all
occurences in all files too.
(hsa_insn_br): New class, now the ancestor of hsa_incn_cbr.
(is_a_helper <hsa_insn_br *>::test): New function.
(is_a_helper <hsa_insn_cbr *>::test): Adjust to only cover conditional
branch instructions.
(hsa_insn_signal): Make a direct descendant of
hsa_insn_basic.  Add memorder constructor parameter and
m_memory_order and m_signalop member variables.
(hsa_insn_queue): Changed constructor parameters to common form.
Added m_segment and m_memory_order member variables.
(hsa_summary_t): Add private member function
process_gpu_implementation_attributes.
(hsa_function_summary): Rename m_binded_function to
m_bound_function.
(hsa_insn_basic_p): Remove typedef.
(hsa_op_with_type): Change hsa_insn_basic_p into plain pointers.
(hsa_op_reg_p): Remove typedef.
(hsa_function_representation): Change hsa_op_reg_p into plain
pointers.
(hsa_insn_phi): Removed new and delete operators.
(hsa_insn_br): Likewise.
(hsa_insn_cbr): Likewise.
(hsa_insn_sbr): Likewise.
(hsa_insn_cmp): Likewise.
(hsa_insn_mem): Likewise.
(hsa_insn_atomic): Likewise.
(hsa_insn_signal): Likewise.
(hsa_insn_seg): Likewise.
(hsa_insn_call): Likewise.
(hsa_insn_arg_block): Likewise.
(hsa_insn_comment): Likewise.
(hsa_insn_srctype): Likewise.
(hsa_insn_packed): Likewise.
(hsa_insn_cvt): Likewise.
(hsa_insn_alloca): Likewise.
* hsa.c (hsa_destroy_insn): Also handle instances of hsa_insn_br.
(process_gpu_implementation_attributes): New function.
(link_functions): Move some functionality into it.  Adjust after
renaming m_binded_functions to m_bound_functions.
(hsa_insn_basic::op_output_p): Add BRIG_OPCODE_DEBUGTRAP
to the list of instructions with no output registers.
(get_in_type): Return this if it is a register of
matching size.
(hsa_get_declaration_name): Moved to...
        * hsa-gen.c (hsa_get_declaration_name): ...here.  Allocate
temporary string on an obstack instead from ggc.
(query_hsa_grid): Renamed to query_hsa_grid_dim, reimplemented, cut
down to two overloads.
(hsa_allocp_operand_address): Removed.
(hsa_allocp_operand_immed): Likewise.
(hsa_allocp_operand_reg): Likewise.
(hsa_allocp_operand_code_list): Likewise.
(hsa_allocp_operand_operand_list): Likewise.
(hsa_allocp_inst_basic): Likewise.
(hsa_allocp_inst_phi): Likewise.
(hsa_allocp_inst_mem): Likewise.
(hsa_allocp_inst_atomic): Likewise.
(hsa_allocp_inst_signal): Likewise.
(hsa_allocp_inst_seg): Likewise.
(hsa_allocp_inst_cmp): Likewise.
(hsa_allocp_inst_br): Likewise.
(hsa_allocp_inst_sbr): Likewise.
(hsa_allocp_inst_call): Likewise.
(hsa_allocp_inst_arg_block): Likewise.
(hsa_allocp_inst_comment): Likewise.
(hsa_allocp_inst_queue): Likewise.
(hsa_allocp_inst_srctype): Likewise.
(hsa_allocp_inst_packed): Likewise.
(hsa_allocp_inst_cvt): Likewise.
(hsa_allocp_inst_alloca): Likewise.
(hsa_allocp_bb): Likewise.
(hsa_obstack): New.
(hsa_init_data_for_cfun): Initialize obstack.
(hsa_deinit_data_for_cfun): Release memory of the obstack.
(hsa_op_immed::operator new): Use obstack instead of object_allocator.
(hsa_op_reg::operator new): Likewise.
(hsa_op_address::operator new): Likewise.
(hsa_op_code_list::operator new): Likewise.
(hsa_op_operand_list::operator new): Likewise.
(hsa_insn_basic::operator new): Likewise.
(hsa_insn_phi::operator new): Likewise.
(hsa_insn_br::operator new): Likewise.
(hsa_insn_sbr::operator new): Likewise.
(hsa_insn_cmp::operator new): Likewise.
(hsa_insn_mem::operator new): Likewise.
(hsa_insn_atomic::operator new): Likewise.
(hsa_insn_signal::operator new): Likewise.
(hsa_insn_seg::operator new): Likewise.
(hsa_insn_call::operator new): Likewise.
(hsa_insn_arg_block::operator new): Likewise.
(hsa_insn_comment::operator new): Likewise.
(hsa_insn_srctype::operator new): Likewise.
(hsa_insn_packed::operator new): Likewise.
(hsa_insn_cvt::operator new): Likewise.
(hsa_insn_alloca::operator new): Likewise.
(hsa_init_new_bb): Likewise.
(hsa_bb::append_phi): New function.
(gen_hsa_phi_from_gimple_phi): Use it.
(get_symbol_for_decl): Fix dinstinguishing between
global and local functions.  Put local variables into a segment
according to their attribute or static flag, if there is one.
(hsa_insn_br::hsa_insn_br): New.
(hsa_insn_br::operator new): Likewise.
(hsa_insn_cbr::hsa_insn_cbr): Set width via ancestor constructor.
(query_hsa_grid_nodim): New function.
(multiply_grid_dim_characteristics): Likewise.
(gen_get_num_threads): Likewise.
(gen_get_num_teams): Reimplemented.
(gen_get_team_num): Likewise.
(gen_hsa_insns_for_known_library_call): Updated calls to the above
helper functions.
(get_memory_order_name): Removed.
(get_memory_order): Likewise.
(hsa_memorder_from_tree): New function.
(gen_hsa_ternary_atomic_for_builtin): Renamed to
gen_hsa_atomic_for_builtin, can also create signals.
(gen_hsa_insns_for_call): Handle many new builtins.  Adjust to use
hsa_memory_order_from_tree and gen_hsa_atomic_for_builtin.
(hsa_insn_atomic): Fix function comment.
(hsa_insn_signal::hsa_insn_signal): Fix comment.  Update call to
ancestor constructor and initialization of new member variables.
(hsa_insn_queue::hsa_insn_queue): Added initialization of new
member variables.
(hsa_get_host_function): Handle functions with no bound CPU
implementation.  Fix binded to bound.
(get_brig_function_name): Likewise.
(HSA_SORRY_ATV): Remove semicolon after macro.
(HSA_SORRY_AT): Likewise.
(omp_simple_builtin::generate): Add missing semicolons.
(hsa_insn_phi::operator new): Removed.
(hsa_insn_br::operator new): Likewise.
(hsa_insn_cbr::operator new): Likewise.
(hsa_insn_sbr::operator new): Likewise.
(hsa_insn_cmp::operator new): Likewise.
(hsa_insn_mem::operator new): Likewise.
(hsa_insn_atomic::operator new): Likewise.
(hsa_insn_signal::operator new): Likewise.
(hsa_insn_seg::operator new): Likewise.
(hsa_insn_call::operator new): Likewise.
(hsa_insn_arg_block::operator new): Likewise.
(hsa_insn_comment::operator new): Likewise.
(hsa_insn_srctype::operator new): Likewise.
(hsa_insn_packed::operator new): Likewise.
(hsa_insn_cvt::operator new): Likewise.
(hsa_insn_alloca::operator new): Likewise.
(get_symbol_for_decl): Accept CONST_DECLs, put them to
readonly segment.
(gen_hsa_addr): Also process CONST_DECLs.
(gen_hsa_addr_insns): Process CONST_DECLs by creating private
copies.
(gen_hsa_unary_operation): Make sure the function does
not use bittype source type for firstbit and lastbit operations.
(gen_hsa_popcount_to_dest): Make sure the function uses a bittype
source type.
* hsa-brig.c (emit_insn_operands): Cope with zero operands in an
instruction.
(emit_branch_insn): Renamed to emit_cond_branch_insn.
Emit the width stored in the class.
(emit_generic_branch_insn): New function.
(emit_insn): Call emit_generic_branch_insn.
(emit_signal_insn): Remove obsolete comment.  Update
member variable name, pick a type according to profile.
(emit_alloca_insn): Remove obsolete comment.
(emit_atomic_insn): Likewise.
(emit_queue_insn): Get segment and memory order from the IR object.
(hsa_brig_section): Make allocate_new_chunk, chunks
and cur_chunk provate, add a default NULL parameter to add method.
(hsa_brig_section::add): Added a new parameter, store pointer to
output data there if it is non-NULL.
(emit_function_directives): Use this new parameter instead of
calculating the pointer itself, fix function comment.
(hsa_brig_emit_function): Add forgotten endian conversion.
(hsa_output_kernels): Remove unnecessary building of
kernel_dependencies_vector_type.
(emit_immediate_operand): Declare.
(emit_directive_variable): Also emit initializers of CONST_DECLs.
(gen_hsa_insn_for_internal_fn_call): Also handle IFN_RSQRT.
(verify_function_arguments): Properly detect variadic
arguments.
* hsa-dump.c (hsa_width_specifier_name): New function.
(dump_hsa_insn_1): Dump generic branch instructions, update signal
member variable name.  Special dumping for queue objects.
* ipa-hsa.c (process_hsa_functions): Adjust after renaming
m_binded_functions to m_bound_functions.  Copy externally visible flag
to the node.
(ipa_hsa_write_summary): Likewise.
(ipa_hsa_read_section): Likewise.

gcc/fortran/
        * f95-lang.c (DEF_HSA_BUILTIN): New macro.

gcc/testsuite/
* c-c++-common/gomp/gridify-1.c: Update scan string.
* gfortran.dg/gomp/gridify-1.f90: Likewise.
* c-c++-common/gomp/gridify-2.c: New test.
* c-c++-common/gomp/gridify-3.c: Likewise.

libgomp/
* testsuite/libgomp.hsa.c/bits-insns.c: New test.
* testsuite/libgomp.hsa.c/tiling-1.c: Likewise.
* testsuite/libgomp.hsa.c/tiling-2.c: Likewise.

Co-Authored-By: Martin Liska <mliska@suse.cz>
From-SVN: r242761

PR78494 add missing returns to propagate_const

2016-11-23  Felix Morgner  <felix.morgner@gmail.com>
    Jonathan Wakely  <jwakely@redhat.com>

PR libstdc++/78494
* include/experimental/propagate_const (propagate_const::operator=):
Add missing return statements.
* testsuite/experimental/propagate_const/assignment/move_neg.cc:
Adjust dg-error line numbers.
* testsuite/experimental/propagate_const/requirements2.cc: Likewise.

Co-Authored-By: Jonathan Wakely <jwakely@redhat.com>
From-SVN: r242760

re PR tree-optimization/78396 (gcc.dg/vect/bb-slp-cond-1.c FAILs after fix for PR77848)

2016-11-23  Richard Biener  <rguenther@suse.de>

PR tree-optimization/78396
* tree-vectorizer.c (vectorize_loops): If an innermost loop didn't
vectorize try vectorizing an if-converted body using BB vectorization.

* gcc.dg/vect/bb-slp-cond-1.c: Adjust.

From-SVN: r242759

Rework subreg_get_info

This isn't intended to change the behaviour, just rewrite the
existing logic in a different (and hopefully clearer) way.
The new form -- particularly the part based on the "block"
concept -- is easier to convert to polynomial sizes.

gcc/
2016-11-15  Richard Sandiford  <richard.sandiford@arm.com>
    Alan Hayward  <alan.hayward@arm.com>
    David Sherwood  <david.sherwood@arm.com>

* rtlanal.c (subreg_get_info): Use more local variables.
Remark that for HARD_REGNO_NREGS_HAS_PADDING, each scalar unit
occupies at least one register.  Assume that full hard registers
have consistent endianness.  Share previously-duplicated if block.
Rework the main handling so that it operates on independently-
addressable YMODE-sized blocks.  Use subreg_size_lowpart_offset
to check lowpart offsets, without trying to find an equivalent
integer mode first.  Handle WORDS_BIG_ENDIAN != REG_WORDS_BIG_ENDIAN
as a final register-endianness correction.

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r242758