Kadir Cetinkaya [Thu, 9 Jan 2020 16:56:30 +0000 (17:56 +0100)]
[clangd] Fix markdown rendering in VSCode
Summary:
Eventough it is OK to have a new line without any preceding spaces in
some markdown specifications, VSCode requires two spaces before a new line to
break a line inside a paragraph.
Reviewers: sammccall, ilya-biryukov
Subscribers: MaskRay, jkorous, arphaman, usaxena95, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D72462
Kadir Cetinkaya [Tue, 7 Jan 2020 14:15:00 +0000 (15:15 +0100)]
[clangd] Improve type printing in hover
Summary:
Do not include tag keywords when printing types for symbol names, as it
will come from SymbolKind.
Also suppress them while printing definitions to prevent them occuring in
template arguments.
Make use of `getAsString`, instead of `print` in all places to have a consistent
style across the file.
Reviewers: sammccall
Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, usaxena95, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D72450
Qiu Chaofan [Fri, 10 Jan 2020 08:43:43 +0000 (16:43 +0800)]
[NFC] [PowerPC] Add isPredicable for basic instrs
PowerPC uses a dedicated method to check if the machine instr is
predicable by opcode. However, there's a bit `isPredicable` in instr
definition. This patch removes the method and set the bit only to
opcodes referenced in it.
Differential Revision: https://reviews.llvm.org/D71921
serge-sans-paille [Thu, 5 Dec 2019 16:08:10 +0000 (17:08 +0100)]
Allow system header to provide their own implementation of some builtin
If a system header provides an (inline) implementation of some of their
function, clang still matches on the function name and generate the appropriate
llvm builtin, e.g. memcpy. This behavior is in line with glibc recommendation «
users may not provide their own version of symbols » but doesn't account for the
fact that glibc itself can provide inline version of some functions.
It is the case for the memcpy function when -D_FORTIFY_SOURCE=1 is on. In that
case an inline version of memcpy calls __memcpy_chk, a function that performs
extra runtime checks. Clang currently ignores the inline version and thus
provides no runtime check.
This code fixes the issue by detecting functions whose name is a builtin name
but also have an inline implementation.
Differential Revision: https://reviews.llvm.org/D71082
Hans Wennborg [Fri, 10 Jan 2020 08:19:58 +0000 (09:19 +0100)]
Restore order in clang-tidy section of release notes
Major changes are introduction of subsubsections to prevent people
putting new entries in wrong places. I also polished line length and
highlighting.
Patch by Eugene Zelenko!
Gil Rapaport [Thu, 28 Nov 2019 11:54:38 +0000 (13:54 +0200)]
[LV] VPValues for memory operation pointers (NFCI)
Memory instruction widening recipes use the pointer operand of their load/store
ingredient for generating the needed GEPs, making it difficult to feed these
recipes with pointers based on other ingredients or none at all.
This patch modifies these recipes to use a VPValue for the pointer instead, in
order to reduce ingredient def-use usage by ILV as a step towards full
VPlan-based def-use relations. The recipes are constructed with VPValues bound
to these ingredients, maintaining current behavior.
Differential revision: https://reviews.llvm.org/D70865
Ilya Biryukov [Fri, 10 Jan 2020 07:14:11 +0000 (08:14 +0100)]
[Syntax] Update comment, remove stale FIXME. NFC
Sylvestre Ledru [Fri, 10 Jan 2020 07:11:05 +0000 (08:11 +0100)]
clang-tidy doc - remove the widths
Shoaib Meenai [Fri, 10 Jan 2020 06:02:57 +0000 (22:02 -0800)]
[xray] Remove cl::sub from alias options
Currently running the xray tools generates a number of errors:
$ ./bin/llvm-xray
: for the -k option: cl::alias must not have cl::sub(), aliased option's cl::sub() will be used!
: for the -d option: cl::alias must not have cl::sub(), aliased option's cl::sub() will be used!
: for the -o option: cl::alias must not have cl::sub(), aliased option's cl::sub() will be used!
: for the -f option: cl::alias must not have cl::sub(), aliased option's cl::sub() will be used!
: for the -s option: cl::alias must not have cl::sub(), aliased option's cl::sub() will be used!
: for the -r option: cl::alias must not have cl::sub(), aliased option's cl::sub() will be used!
: for the -p option: cl::alias must not have cl::sub(), aliased option's cl::sub() will be used!
: for the -m option: cl::alias must not have cl::sub(), aliased option's cl::sub() will be used!
<snip>
Patch by Ryan Mansfield.
Differential Revision: https://reviews.llvm.org/D69386
Wei Mi [Fri, 10 Jan 2020 04:58:31 +0000 (20:58 -0800)]
[ThinLTO] Pass CodeGenOpts like UnrollLoops/VectorizeLoop/VectorizeSLP
down to pass builder in ltobackend.
Currently CodeGenOpts like UnrollLoops/VectorizeLoop/VectorizeSLP in clang
are not passed down to pass builder in ltobackend when new pass manager is
used. This is inconsistent with the behavior when new pass manager is used
and thinlto is not used. Such inconsistency causes slp vectorization pass
not being enabled in ltobackend for O3 + thinlto right now. This patch
fixes that.
Differential Revision: https://reviews.llvm.org/D72386
Nico Weber [Fri, 10 Jan 2020 04:36:34 +0000 (23:36 -0500)]
fix another typo to cycle bots
Nico Weber [Fri, 10 Jan 2020 04:09:48 +0000 (23:09 -0500)]
fix a few typos to cycle the bots
Shengchen Kan [Fri, 10 Jan 2020 03:12:08 +0000 (11:12 +0800)]
[NFC] Style cleanup
Richard Smith [Thu, 9 Jan 2020 23:31:56 +0000 (15:31 -0800)]
CWG2352: Allow qualification conversions during reference binding.
The language wording change forgot to update overload resolution to rank
implicit conversion sequences based on qualification conversions in
reference bindings. The anticipated resolution for that oversight is
implemented here -- we order candidates based on qualification
conversion, not only on top-level cv-qualifiers, including ranking
reference bindings against non-reference bindings if they differ in
non-top-level qualification conversions.
For OpenCL/C++, this allows reference binding between pointers with
differing (nested) address spaces. This makes the behavior of reference
binding consistent with that of implicit pointer conversions, as is the
purpose of this change, but that pre-existing behavior for pointer
conversions is itself probably not correct. In any case, it's now
consistently the same behavior and implemented in only one place.
This reinstates commit
de21704ba96fa80d3e9402f12c6505917a3885f4,
reverted in commit
d8018233d1ea4234de68d5b4593abd773db79484, with
workarounds for some overload resolution ordering problems introduced by
CWG2352.
Douglas Yung [Fri, 10 Jan 2020 01:16:52 +0000 (17:16 -0800)]
Relax opcode checks in test for G_READCYCLECOUNTER to check for only a number instead of a specific number.
Matt Arsenault [Thu, 2 Jan 2020 21:45:33 +0000 (16:45 -0500)]
AMDGPU/GlobalISel: Select G_EXTRACT_VECTOR_ELT
Doesn't try to do the fold into the base register of an add of a
constant in the index like the DAG path does.
Matt Arsenault [Fri, 3 Jan 2020 00:01:55 +0000 (19:01 -0500)]
AMDGPU/GlobalISel: Fix G_EXTRACT_VECTOR_ELT mapping for s-v case
If an SGPR vector is indexed with a VGPR, the actual indexing will be
done on the SGPR and produce an SGPR. A copy needs to be inserted
inside the waterwall loop to the VGPR result.
Fangrui Song [Thu, 9 Jan 2020 23:53:52 +0000 (15:53 -0800)]
[ELF] Fix includeInDynsym() when an undefined weak is merged with a lazy definition
An undefined weak does not fetch the lazy definition. A lazy weak symbol
should be considered undefined, and thus preemptible if .dynsym exists.
D71795 is not quite an NFC. It errors on an R_X86_64_PLT32 referencing
an undefined weak symbol. isPreemptible is false (incorrect) => R_PLT_PC
is optimized to R_PC => in isStaticLinkTimeConstant, an error is emitted
when an R_PC is applied on an undefined weak (considered absolute).
Jason Molenda [Fri, 10 Jan 2020 00:05:38 +0000 (16:05 -0800)]
When reading Aux file in chunks, read consecutive byte ranges
qemu has a very small maximum packet size (4096) and it actually
only uses half of that buffer for some implementation reason,
so when lldb asks for the register target definitions, the x86_64
definition is larger than 4096/2 and we need to fetch it in two parts.
This patch and test is fixing a bug in
GDBRemoteCommunicationClient::ReadExtFeature when reading a target
file in multiple parts. lldb was assuming that it would always
get back the maximum packet size response (4096) instead of
using the actual size received and asking for the next group of
bytes.
We now have two tests in gdb_remote_client for unique features
of qemu - TestNestedRegDefinitions.py would test the ability
of lldb to follow multiple levels of xml includes; I opted to
create a separate TestRegDefinitionInParts.py test to test this
wrinkle in qemu's gdb remote serial protocol stub implementation.
Instead of combining both tests into a single test file.
<rdar://problem/
49537922>
Stanislav Mekhanoshin [Thu, 9 Jan 2020 22:28:49 +0000 (14:28 -0800)]
[AMDGPU] Fix bundle scheduling
Bundles coming to scheduler considered free, i.e. zero latency.
Fixed.
Differential Revision: https://reviews.llvm.org/D72487
Jonas Devlieghere [Thu, 9 Jan 2020 23:31:38 +0000 (15:31 -0800)]
[lldb] Remove spurious file
Matt Arsenault [Thu, 9 Jan 2020 23:27:07 +0000 (18:27 -0500)]
AVR: Update for getRegisterByName change
Richard Smith [Thu, 9 Jan 2020 20:27:48 +0000 (12:27 -0800)]
When diagnosing the lack of a viable conversion function, also list
explicit functions that are not candidates.
It's not always obvious that the reason a conversion was not possible is
because the function you wanted to call is 'explicit', so explicitly say
if that's the case.
It would be nice to rank the explicit candidates higher in the
diagnostic if an implicit conversion sequence exists for their
arguments, but unfortunately we can't determine that without potentially
triggering non-immediate-context errors that we're not permitted to
produce.
River Riddle [Thu, 9 Jan 2020 22:41:49 +0000 (14:41 -0800)]
[mlir] Use getDenseElementBitwidth instead of Type::getElementTypeBitWidth.
Summary: Some data values have a different storage width than the corresponding MLIR type, e.g. bfloat is currently stored as a double.
Reviewed By: nicolasvasilache
Differential Revision: https://reviews.llvm.org/D72478
Jonas Devlieghere [Thu, 9 Jan 2020 22:50:03 +0000 (14:50 -0800)]
[lldb/Lua] Add lua typemaps for INOUT params
Matt Arsenault [Wed, 8 Jan 2020 20:40:37 +0000 (15:40 -0500)]
TableGen/GlobalISel: Fix pattern matching of immarg literals
For arguments that are not expected to be materialized with
G_CONSTANT, this was emitting predicates which could never match. It
was first adding a meaningless LLT check, which would always fail due
to the operand not being a register.
Infer the cases where a literal should check for an immediate operand,
instead of a register This avoids needing to invent a special way of
representing timm literal values.
Also handle immediate arguments in GIM_CheckLiteralInt. The comments
stated it handled isImm() and isCImm(), but that wasn't really true.
This unblocks work on the selection of all of the complicated AMDGPU
intrinsics in future commits.
Matt Arsenault [Wed, 8 Jan 2020 17:53:15 +0000 (12:53 -0500)]
TableGen/GlobalISel: Add way for SDNodeXForm to work on timm
The current implementation assumes there is an instruction associated
with the transform, but this is not the case for
timm/TargetConstant/immarg values. These transforms should directly
operate on a specific MachineOperand in the source
instruction. TableGen would assert if you attempted to define an
equivalent GISDNodeXFormEquiv using timm when it failed to find the
instruction matcher.
Specially recognize SDNodeXForms on timm, and pass the operand index
to the render function.
Ideally this would be a separate render function type that looks like
void renderFoo(MachineInstrBuilder, const MachineOperand&), but this
proved to be somewhat mechanically painful. Add an optional operand
index which will only be passed if the transform should only look at
the one source operand.
Theoretically it would also be possible to only ever pass the
MachineOperand, and the existing renderers would check the parent. I
think that would be somewhat ugly for the standard usage which may
want to inspect other operands, and I also think MachineOperand should
eventually not carry a pointer to the parent instruction.
Use it in one sample pattern. This isn't a great example, since the
transform exists to satisfy DAG type constraints. This could also be
avoided by just changing the MachineInstr's arbitrary choice of
operand type from i16 to i32. Other patterns have nontrivial uses, but
this serves as the simplest example.
One flaw this still has is if you try to use an SDNodeXForm defined
for imm, but the source pattern uses timm, you still see the "Failed
to lookup instruction" assert. However, there is now a way to avoid
it.
Matt Arsenault [Sat, 28 Dec 2019 00:26:51 +0000 (19:26 -0500)]
GlobalISel: Handle llvm.read_register
Compared to the attempt in
bdcc6d3d2638b3a2c99ab3b9bfaa9c02e584993a,
this uses intermediate generic instructions.
Matt Arsenault [Thu, 9 Jan 2020 16:39:02 +0000 (11:39 -0500)]
DAG: Don't use unchecked dyn_cast
Matt Arsenault [Thu, 9 Jan 2020 16:03:17 +0000 (11:03 -0500)]
GlobalISel: Fix else after return
Matt Arsenault [Sat, 28 Dec 2019 14:18:56 +0000 (09:18 -0500)]
CodeGen: Use LLT instead of EVT in getRegisterByName
Only PPC seems to be using it, and only checks some simple cases and
doesn't distinguish between FP. Just switch to using LLT to simplify
use from GlobalISel.
Amara Emerson [Wed, 8 Jan 2020 23:16:55 +0000 (15:16 -0800)]
[AArch64][GlobalISel] Implement selection of <2 x float> vector splat.
Also requires making G_IMPLICIT_DEF of v2s32 legal.
Differential Revision: https://reviews.llvm.org/D72422
Eric Schweitz [Thu, 9 Jan 2020 21:59:51 +0000 (22:59 +0100)]
[mlir] add a missing dependency for Linalg conversion
We were seeing some occasional build failures that would come and go.
It appeared to be this missing dependence.
Differential Revision: https://reviews.llvm.org/D72419
Kern Handa [Thu, 9 Jan 2020 21:55:31 +0000 (22:55 +0100)]
[mlir] mlir-cpu-runner test's cblas_interface should export functions on Windows
This change fixes the build on Windows, so that cblas_interface.dll
exports functions correctly and an implib is created and installed
correctly.
Currently, LLVM cannot be consumed on Windows after it has been
installed in a location because cblas_interface.lib is not
created/installed, thus failing the import check in `LLVMExports.cmake`.
Differential Revision: https://reviews.llvm.org/D72384
Alex Richardson [Thu, 9 Jan 2020 20:48:06 +0000 (20:48 +0000)]
Add builtins for aligning and checking alignment of pointers and integers
This change introduces three new builtins (which work on both pointers
and integers) that can be used instead of common bitwise arithmetic:
__builtin_align_up(x, alignment), __builtin_align_down(x, alignment) and
__builtin_is_aligned(x, alignment).
I originally added these builtins to the CHERI fork of LLVM a few years ago
to handle the slightly different C semantics that we use for CHERI [1].
Until recently these builtins (or sequences of other builtins) were
required to generate correct code. I have since made changes to the default
C semantics so that they are no longer strictly necessary (but using them
does generate slightly more efficient code). However, based on our experience
using them in various projects over the past few years, I believe that adding
these builtins to clang would be useful.
These builtins have the following benefit over bit-manipulation and casts
via uintptr_t:
- The named builtins clearly convey the semantics of the operation. While
checking alignment using __builtin_is_aligned(x, 16) versus
((x & 15) == 0) is probably not a huge win in readably, I personally find
__builtin_align_up(x, N) a lot easier to read than (x+(N-1))&~(N-1).
- They preserve the type of the argument (including const qualifiers). When
using casts via uintptr_t, it is easy to cast to the wrong type or strip
qualifiers such as const.
- If the alignment argument is a constant value, clang can check that it is
a power-of-two and within the range of the type. Since the semantics of
these builtins is well defined compared to arbitrary bit-manipulation,
it is possible to add a UBSAN checker that the run-time value is a valid
power-of-two. I intend to add this as a follow-up to this change.
- The builtins avoids int-to-pointer casts both in C and LLVM IR.
In the future (i.e. once most optimizations handle it), we could use the new
llvm.ptrmask intrinsic to avoid the ptrtoint instruction that would normally
be generated.
- They can be used to round up/down to the next aligned value for both
integers and pointers without requiring two separate macros.
- In many projects the alignment operations are already wrapped in macros (e.g.
roundup2 and rounddown2 in FreeBSD), so by replacing the macro implementation
with a builtin call, we get improved diagnostics for many call-sites while
only having to change a few lines.
- Finally, the builtins also emit assume_aligned metadata when used on pointers.
This can improve code generation compared to the uintptr_t casts.
[1] In our CHERI compiler we have compilation mode where all pointers are
implemented as capabilities (essentially unforgeable 128-bit fat pointers).
In our original model, casts from uintptr_t (which is a 128-bit capability)
to an integer value returned the "offset" of the capability (i.e. the
difference between the virtual address and the base of the allocation).
This causes problems for cases such as checking the alignment: for example, the
expression `if ((uintptr_t)ptr & 63) == 0` is generally used to check if the
pointer is aligned to a multiple of 64 bytes. The problem with offsets is that
any pointer to the beginning of an allocation will have an offset of zero, so
this check always succeeds in that case (even if the address is not correctly
aligned). The same issues also exist when aligning up or down. Using the
alignment builtins ensures that the address is used instead of the offset. While
I have since changed the default C semantics to return the address instead of
the offset when casting, this offset compilation mode can still be used by
passing a command-line flag.
Reviewers: rsmith, aaron.ballman, theraven, fhahn, lebedev.ri, nlopes, aqjune
Reviewed By: aaron.ballman, lebedev.ri
Differential Revision: https://reviews.llvm.org/D71499
Christian Sigg [Tue, 7 Jan 2020 10:01:29 +0000 (11:01 +0100)]
Add gdb pretty printer for MutableArrayRef, remove ConstArrayRef.
Reviewers: dblaikie
Reviewed By: dblaikie
Subscribers: merge_guards_bot, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D72136
Matt Arsenault [Thu, 9 Jan 2020 15:56:35 +0000 (10:56 -0500)]
GlobalISel: Move getLLTForMVT/getMVTForLLT
As an intermediate step, some TLI functions can be converted to using
LLT instead of MVT. Move this somewhere out of GlobalISel so DAG
functions can use these.
Matt Arsenault [Thu, 9 Jan 2020 00:49:30 +0000 (19:49 -0500)]
TableGen/GlobalISel: Address fixme
Don't call computeAvailableFunctionFeatures for every instruction.
Matt Arsenault [Thu, 9 Jan 2020 17:54:16 +0000 (12:54 -0500)]
GlobalISel: Don't assert on MoreElements creating vectors
If the original type was a scalar, it should be valid to add elements
to turn it into a vector.
Tests included with following legalization change.
Matt Arsenault [Fri, 3 Jan 2020 18:33:36 +0000 (13:33 -0500)]
AMDGPU/GlobalISel: Fix argument lowering for vectors of pointers
When these arguments are broken down by the EVT based callbacks, the
pointer information is lost. Hack around this by coercing the register
types to be the expected pointer element type when building the
remerge operations.
Matt Arsenault [Thu, 9 Jan 2020 19:34:43 +0000 (14:34 -0500)]
AMDGPU/GlobalISel: Widen 16-bit shift amount sources
This should be legal, but will require future selection work. 16-bit
shift amounts were already removed from being legal, but this didn't
adjust the transformation rules.
Sylvestre Ledru [Thu, 9 Jan 2020 21:28:45 +0000 (22:28 +0100)]
phab doc: Replace or remove references to svn
Sylvestre Ledru [Thu, 9 Jan 2020 21:16:52 +0000 (22:16 +0100)]
phab doc: also document 'arc land'
Sylvestre Ledru [Thu, 9 Jan 2020 21:12:30 +0000 (22:12 +0100)]
phab doc: remove the svn section
Nathan Ridge [Thu, 2 Jan 2020 05:45:01 +0000 (00:45 -0500)]
[clangd] Handle DeducedTemplateSpecializationType in TargetFinder
Summary:
This is a workaround for https://bugs.llvm.org/show_bug.cgi?id=42914.
Once that is fixed, the handling in VisitDeducedTyped() should be sufficient.
Fixes https://github.com/clangd/clangd/issues/242
Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, kadircet, usaxena95, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D72119
Sylvestre Ledru [Wed, 8 Jan 2020 23:26:34 +0000 (00:26 +0100)]
[clang-tidy] Refresh the add_new_check.py now that we use a table + autofix
Reviewers: alexfh
Reviewed By: alexfh
Subscribers: njames93, xazax.hun, mgorny, cfe-commits
Tags: #clang, #clang-tools-extra
Differential Revision: https://reviews.llvm.org/D72421
Eric Fiselier [Thu, 9 Jan 2020 20:50:55 +0000 (15:50 -0500)]
[libc++] Explicitly enumerate std::string external instantiations.
The external instantiation of std::string is a problem for libc++.
Additions and removals of inline functions in string can cause ABI
breakages, including introducing new symbols.
This patch aims to:
(1) Make clear which functions are explicitly instatiated.
(2) Prevent new functions from being accidentally instantiated.
(3) Allow a migration path for adding or removing functions from the
explicit instantiation over time.
Although this new formulation is uglier, it is preferable from a
maintainability and readability standpoint because it explicitly
enumerates the functions we've chosen to expose in our ABI. Changing
this list is non-trivial and requires thought and planning.
(3) is achieved by making it possible to control the extern template declaration
separately from it's definition. Meaning we could add a new definition to
the dylib, wait for it to roll out, then add the extern template
declaration to the header. Similarly, we could remove existing extern
template declarations while still keeping the definition to prevent ABI
breakages.
River Riddle [Thu, 9 Jan 2020 20:39:26 +0000 (12:39 -0800)]
[mlir] NFC: Move the state for managing SSA value names out of OperationPrinter and into a new class SSANameState.
Summary:
This reduces the complexity of OperationPrinter and simplifies the code by quite a bit. The SSANameState is now held by ModuleState. This is in preparation for a future revision that molds ModuleState into something that can be used by users for caching the printer state, as well as for implementing printAsOperand style methods.
Depends On D72292
Reviewed By: antiagainst
Differential Revision: https://reviews.llvm.org/D72293
Alex Richardson [Tue, 7 Jan 2020 12:31:18 +0000 (12:31 +0000)]
MipsDelaySlotFiller: Update registers def-uses for BUNDLE instructions
Summary:
In commit
b91f239485fb7bb8d29be3e0b60660a2de7570a9 I updated the
MipsDelaySlotFiller to skip BUNDLE instructions.
However, in addition to not considering BUNDLE instructions for the delay
slot, we also need to ensure that the register def-use information is
updated. Not updating this information caused run-time crashes (when using
the out-of-tree CHERI backend) since later definitions could be overwritten
with earlier register values.
Reviewers: atanasyan
Reviewed By: atanasyan
Differential Revision: https://reviews.llvm.org/D72254
Alex Richardson [Tue, 7 Jan 2020 12:29:47 +0000 (12:29 +0000)]
Re-apply "[ELF] Allow getErrPlace() to work before Out::bufferStart is set"
This time with a fix for the UBSAN failure.
Differential Revision: https://reviews.llvm.org/D70659
Craig Topper [Thu, 9 Jan 2020 19:55:22 +0000 (11:55 -0800)]
[X86] Add ueq/one fp128 quiet compare tests. NFC
The ONE expansion calls OGT/OLT libcalls which will signal for QNAN.
The UEQ expansion uses unord and eq libcalls which won't signal.
We should probably use those libcalls for ONE with appropriate
logic.
Quiet OGT/OLT/OLE/OGE have similar issue, but not sure how to fix
those yet.
Jessica Paquette [Wed, 8 Jan 2020 18:57:44 +0000 (10:57 -0800)]
[GlobalISel][AArch64] Import + select LDR*roW and STR*roW patterns
This adds support for selecting a large chunk of the load/store *roW patterns.
This is pretty much a straight port of AArch64DAGToDAGISel::SelectAddrModeWRO
into GISel. The code is very similar to the XRO code. The main difference is
that in the *roW patterns, we want to try and fold in an extend, and *possibly*
a shift along with it. A good portion of this patch is refactoring the existing
XRO code.
- Add selectAddrModeWRO
- Factor out the code from selectAddrModeShiftedExtendXReg which is used by both
selectAddrModeXRO and selectAddrModeWRO into selectExtendedSHL.
This is similar to the function of the same name in AArch64DAGToDAGISel.
- Add support for extends to the factored out code in selectExtendedSHL.
- Teach getExtendTypeForInst how to handle AND masks that are intended to be
used in loads/stores (necessary for this addressing mode.)
- Make getExtendTypeForInst not static because moving it made an annoying diff
and I wanted to have the WRO/XRO functions close to each other while I was
writing the code.
Differential Revision: https://reviews.llvm.org/D72426
serge-sans-paille [Thu, 9 Jan 2020 20:01:29 +0000 (21:01 +0100)]
[clang] Enforce triple in mempcpy test
Fixes http://lab.llvm.org:8011/builders/llvm-clang-win-x-armv7l/builds/2597
Eric Astor [Thu, 9 Jan 2020 19:01:55 +0000 (14:01 -0500)]
[ms] [X86] Use "P" modifier on all branch-target operands in inline X86 assembly.
Summary:
Extend D71677 to apply to all branch-target operands, rather than special-casing call instructions.
Also add a regression test for llvm.org/PR44272, since this finishes fixing it.
Reviewers: thakis, rnk
Reviewed By: thakis
Subscribers: merge_guards_bot, hiraditya, cfe-commits, llvm-commits
Tags: #clang, #llvm
Differential Revision: https://reviews.llvm.org/D72417
Ganesh Gopalasubramanian [Thu, 9 Jan 2020 14:41:32 +0000 (20:11 +0530)]
[X86] AMD Znver2 (Rome) Scheduler enablement
The patch gives out the details of the znver2 scheduler model.
There are few improvements with respect to execution units, latencies and
throughput when compared with znver1.
The tests that were present for znver1 for llvm-mca tool were replicated.
The latencies, execution units, timeline and throughput information are updated for znver2.
Reviewers: craig.topper, Simon Pilgrim
Differential Revision: https://reviews.llvm.org/D66088
Sean Fertile [Wed, 8 Jan 2020 17:32:32 +0000 (12:32 -0500)]
[PowerPC] The VK_PLT symbolref modifier is only used on 32-bit ELF. [NFC]
Fix a conditional that guarded code for execution only on 32-bit ELF by
checking that the Subtarget was not 64-bit and not-Darwin. By adding a new
target ABI (AIX), the condition is no longer correct. This code is dead for
AIX, due to a 'report_fatal_error' for thread local storage usage earlier in the
pipeline, but needs to be modifed as part of Darwins removal from the
PowerPC backend.
Erik Pilkington [Thu, 9 Jan 2020 18:24:09 +0000 (10:24 -0800)]
[demangle] Copy back some NFC commits from LLVM
Craig Topper [Thu, 9 Jan 2020 00:12:31 +0000 (16:12 -0800)]
[TargetLowering][X86] TeachSimplifyDemandedBits to handle cases where only the sign bit is demanded from a SETCC and can be passed through
If we're doing a compare that only tests the sign bit and only the sign bit is demanded, we can just bypass the node. This removes one of the blend dependencies in our v2i64->v2f32 uint_to_fp codegen on pre-sse4.2 targets.
Differential Revision: https://reviews.llvm.org/D72356
Bruno Ricci [Thu, 9 Jan 2020 18:14:05 +0000 (18:14 +0000)]
[Support][NFC] Add an explicit unit test for Process::getPageSize()
It turns out that it was only tested indirectly. For now test only on Linux
X86-64 and aarch64.
Sanjay Patel [Thu, 9 Jan 2020 18:06:54 +0000 (13:06 -0500)]
[x86] add tests for 2-way splat copy; NFC
Based on code in PR42024:
https://bugs.llvm.org/show_bug.cgi?id=42024
Ulrich Weigand [Thu, 9 Jan 2020 18:03:16 +0000 (19:03 +0100)]
[SystemZ] Fix matching another pattern for nxgrk (PR44496)
SystemZDAGToDAGISel::Select will attempt to split logical instruction
with a large immediate constant. This must not happen if the result
matches one of the z15 combined operations, so the code checks for
those. However, one of them was missed, causing invalid code to
be generated in the test case for PR44496.
Jonas Devlieghere [Thu, 9 Jan 2020 17:54:46 +0000 (09:54 -0800)]
[lldb/SWIG] Undo incorrect substitution
The Python directory for the script interpreter is still capitalized.
Bruno Ricci [Thu, 9 Jan 2020 17:38:50 +0000 (17:38 +0000)]
[Support][NFC] Make some helper functions "static" in Memory.inc
Simon Moll [Thu, 9 Jan 2020 17:37:08 +0000 (18:37 +0100)]
[NFC,format] Sort switch cases alphabetically
This patch brings the switch cases of `llvm/lib/Support/Triple.cpp` back into alphabetical order.
This was noted during the the review of https://reviews.llvm.org/D69103
Reviewed By: arsenm
Differential Revision: https://reviews.llvm.org/D72452
Bruno Ricci [Thu, 9 Jan 2020 17:11:29 +0000 (17:11 +0000)]
[Support][NFC] Add a comment about the semantics of MF_HUGE_HINT flag
Simon Tatham [Thu, 9 Jan 2020 17:01:13 +0000 (17:01 +0000)]
[Clang] Handle target-specific builtins returning aggregates.
Summary:
A few of the ARM MVE builtins directly return a structure type. This
causes an assertion failure at code-gen time if you try to assign the
result of the builtin to a variable, because the `RValue` created in
`EmitBuiltinExpr` from the `llvm::Value` produced by codegen is always
made by `RValue::get()`, which creates a non-aggregate `RValue` that
will fail an assertion when `AggExprEmitter::withReturnValueSlot` calls
`Src.getAggregatePointer()`. A similar failure occurs if you try to use
the struct return value directly to extract one field, e.g.
`vld2q(address).val[0]`.
The existing code-gen tests for those MVE builtins pass the returned
structure type directly to the C `return` statement, which apparently
managed to avoid that particular code path, so we didn't notice the
crash.
Now `EmitBuiltinExpr` checks the evaluation kind of the builtin's return
value, and does the necessary handling for aggregate returns. I've added
two extra test cases, both of which crashed before this change.
Reviewers: dmgreen, rjmccall
Reviewed By: rjmccall
Subscribers: kristof.beyls, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D72271
Jonas Devlieghere [Thu, 9 Jan 2020 17:22:04 +0000 (09:22 -0800)]
[lldb/SWIG] Fix capitalization for case sensitive file systems.
When moving the Python directory I renamed it to python (lowercase) but
didn't update the python.swig file.
Kadir Cetinkaya [Thu, 9 Jan 2020 15:54:22 +0000 (16:54 +0100)]
[clangd] Adjust diagnostic range to be inside main file
Summary:
LSP requires diagnostics to lay inside main file. In clangd we keep
diagnostics in three different cases:
- already in main file
- adjusted to a header included in main file
- has a note covering some range in main file
In the last case, we were not adjusting the diagnostics range to be in main
file, therefore these diagnostics ended up pointing some arbitrary locations.
This patch fixes that issue by adjusting the range of diagnostics to be the
first note inside main file when converting to LSP.
Reviewers: ilya-biryukov
Subscribers: MaskRay, jkorous, arphaman, usaxena95, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D72458
Jonas Devlieghere [Thu, 9 Jan 2020 15:57:59 +0000 (07:57 -0800)]
[lldb/Bindings] Move bindings into their own subdirectory
All the code required to generate the language bindings for Python and
Lua lives under scripts, even though the majority of this code aren't
scripts at all, and surrounded by scripts that are totally unrelated.
I've reorganized these files and moved everything related to the
language bindings into a new top-level directory named bindings. This
makes the corresponding files self contained and much more discoverable.
Differential revision: https://reviews.llvm.org/D72437
Sven van Haastregt [Thu, 9 Jan 2020 16:31:45 +0000 (16:31 +0000)]
[OpenCL][Docs] Rename C++ for OpenCL label
To avoid potential confusion with OpenCL C++.
serge-sans-paille [Wed, 11 Dec 2019 20:30:10 +0000 (21:30 +0100)]
Improve support of GNU mempcpy
- Lower to the memcpy intrinsic
- Raise warnings when size/bounds are known
Differential Revision: https://reviews.llvm.org/D71374
Whitney Tsang [Thu, 9 Jan 2020 16:15:53 +0000 (16:15 +0000)]
[NFCI][LoopUnrollAndJam] Changing LoopUnrollAndJamPass to a function
pass.
Summary: This patch changes LoopUnrollAndJamPass to a function pass, and
keeps the loops traversal order same as defined in
FunctionToLoopPassAdaptor LoopPassManager.h.
The next patch will change the loop traversal to outer to inner order,
so more loops can be transform.
Discussion in llvm-dev mailing list:
https://groups.google.com/forum/#!topic/llvm-dev/LF4rUjkVI2g
Reviewer: dmgreen, jdoerfert, Meinersbur, kbarton, bmahjour, etiotto
Reviewed By: dmgreen
Subscribers: hiraditya, zzheng, llvm-commits
Tag: LLVM
Differential Revision: https://reviews.llvm.org/D72230
Jonas Devlieghere [Thu, 9 Jan 2020 16:15:01 +0000 (08:15 -0800)]
[lldb/Lua] Make lldb.debugger et al available to Lua
The Python script interpreter makes the current debugger, target,
process, thread and frame available to interactive scripting sessions
through convenience variables. This patch does the same for Lua.
Differential revision: https://reviews.llvm.org/D71801
Jonas Devlieghere [Thu, 9 Jan 2020 16:13:25 +0000 (08:13 -0800)]
[lldb/SWIG] Add missing '\' in macros again
Making the string conversion operator a macro unintentionally dropped
the backslash before '\n' and '\r' and was therefore incorrectly
stripping 'n' and 'r' from the object description.
David Goldman [Wed, 8 Jan 2020 22:01:59 +0000 (17:01 -0500)]
[clangd] Respect `--sysroot` argument if it is set
Summary:
- Since `--sysroot` is a superset of the `-isysroot` argument, we
shouldn't add the `-isysroot` if we detect a `--sysroot` flag.
Reviewers: sammccall
Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, kadircet, usaxena95, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D72415
Sergej Jaskiewicz [Thu, 26 Dec 2019 09:28:39 +0000 (12:28 +0300)]
[libcxxabi] Allow tests to link with static libc++abi/libc++ even if the shared version is present
Summary:
Right now the only way to force libc++abi tests to link with the static version of libc++abi is to set `LIBCXXABI_ENABLE_SHARED` to `OFF`. However, this doesn't work when libc++abi is built as standalone project because of [this](https://github.com/llvm/llvm-project/blob/
54c522420347e58aa7bae1892cf5c5672b57c875/libcxxabi/CMakeLists.txt#L503-L519).
This change allows specifying the version of the library for tests to link with.
This is useful for remote testing, for example, with `SSHExecutor`, where we _have_ to link with libc++abi statically.
Two new CMake options are introduced here: `LIBCXXABI_LINK_TESTS_WITH_SHARED_LIBCXXABI` and `LIBCXXABI_LINK_TESTS_WITH_SHARED_LIBCXX`. They can be set to `OFF` to tell the test utility to link tests with the static libraries.
It shouldn't break anything, because the default values of these options are set such that the test utility will behave the same way.
Reviewers: EricWF, mclow.lists, phosek, mehdi_amini, ldionne, jroelofs, bcraig
Subscribers: mgorny, christof, ldionne, libcxx-commits
Tags: #libc
Differential Revision: https://reviews.llvm.org/D71894
@raghesh (Raghesh Aloor) [Thu, 9 Jan 2020 15:52:39 +0000 (10:52 -0500)]
[InstCombine] Z / (1.0 / Y) => (Y * Z)
This is a special case of Z / (X / Y) => (Y * Z) / X, with X = 1.0.
The m_OneUse check is avoided because even in the case of the
multiple uses for 1.0/Y, the number of instructions remain the same
and a division is replaced by a multiplication.
Differential Revision: https://reviews.llvm.org/D72319
Sid Manning [Thu, 2 Jan 2020 18:54:59 +0000 (12:54 -0600)]
[ELF][Hexagon] Add support for IE relocations
Differential Revision: https://reviews.llvm.org/D71143
Matt Arsenault [Wed, 8 Jan 2020 15:53:22 +0000 (10:53 -0500)]
TableGen: Remove unused code
Matt Arsenault [Wed, 8 Jan 2020 01:22:06 +0000 (20:22 -0500)]
AMDGPU/GlobalISel: Fix import of integer med3
This isn't too useful now, since nothing is currently trying to form
min/max from cmp+select.
Matt Arsenault [Tue, 7 Jan 2020 23:52:18 +0000 (18:52 -0500)]
AMDGPU: Eliminate more legacy codepred address space PatFrags
These should now be limited to R600 code.
Matt Arsenault [Tue, 7 Jan 2020 22:46:52 +0000 (17:46 -0500)]
AMDGPU: Use new PatFrag system for d16 stores
Matt Arsenault [Tue, 7 Jan 2020 21:48:05 +0000 (16:48 -0500)]
AMDGPU: Use new PatFrag system for d16 load nodes
Matt Arsenault [Tue, 7 Jan 2020 18:10:08 +0000 (13:10 -0500)]
AMDGPU/GlobalISel: Fix import of zext of s16 op patterns
Matt Arsenault [Tue, 7 Jan 2020 17:38:35 +0000 (12:38 -0500)]
AMDGPU/GlobalISel: Add IMMPopCount xform
Partially fixes BFE pattern import.
Matt Arsenault [Tue, 7 Jan 2020 17:21:18 +0000 (12:21 -0500)]
AMDGPU/GlobalISel: Add selectVOP3Mods_nnan
This doesn't enable any new imports yet, but moves the fmed patterns
from failing on this to hitting the "complex suboperand referenced
more than once" limitation in tablegen.
Matt Arsenault [Tue, 7 Jan 2020 16:45:10 +0000 (11:45 -0500)]
AMDGPU/GlobalISel: Add equiv xform for bitcast_fpimm_to_i32
Only partially fixes one pattern import.
Matt Arsenault [Tue, 7 Jan 2020 16:29:05 +0000 (11:29 -0500)]
AMDGPU/GlobalISel: Fix add of neg inline constant pattern
Matt Arsenault [Wed, 8 Jan 2020 23:57:44 +0000 (18:57 -0500)]
TableGen/GlobalISel: Fix slightly wrong generated comment
Matt Arsenault [Wed, 8 Jan 2020 19:12:19 +0000 (14:12 -0500)]
AMDGPU: Add register class to DS_SWIZZLE_B32 pattern
Reduces diff for a future patch.
Simon Tatham [Thu, 9 Jan 2020 11:23:20 +0000 (11:23 +0000)]
[ARM,MVE] Add missing IntrNoMem flag on IR intrinsics.
A lot of the IR-level intrinsics we've been defining for MVE recently
accidentally had `props = []` instead of `props = [IntrNoMem]`, so
that optimization would have been overcautious about reordering them.
All the affected cases were due to instantiating the multiclasses
`MVEPredicated` and `MVEMXPredicated` without filling in the `props`
parameter, because I //thought// I remembered having set the defaults
in those multiclasses to `[IntrNoMem]`. In fact I hadn't done that.
Now I have.
(The IR intrinsics that //do// read and write memory are all
explicitly marked as `[IntrReadMem]` or `[IntrWriteMem]` already, so
they will override these defaults.)
Simon Tatham [Thu, 9 Jan 2020 10:49:41 +0000 (10:49 +0000)]
[ARM,MVE] Fix valid immediate range for vsliq_n.
In common with most MVE immediate shift instructions, the left shift
takes an immediate in the range [0,n-1], while the right shift takes
one in the range [1,n]. I had absent-mindedly made them both the
latter.
While I'm here, I've added a set of regression tests checking both
ends of the immediate range for a representative sample of the
immediate shifts.
Tim Northover [Thu, 9 Jan 2020 14:28:48 +0000 (14:28 +0000)]
IR: remove "else" after "return". NFCI.
Alexey Bataev [Thu, 9 Jan 2020 14:28:59 +0000 (09:28 -0500)]
[OPENMP]Remove unused code, NFC.
Sanjay Patel [Thu, 9 Jan 2020 14:36:22 +0000 (09:36 -0500)]
[DAGCombiner] reduce extract subvector of concat
If we are extracting a chunk of a vector that's a fraction of an
operand of the concatenated vector operand, we can extract directly
from one of those original operands.
This is another suggestion from PR42024:
https://bugs.llvm.org/show_bug.cgi?id=42024#c2
But I'm not sure yet if it will make any difference on those patterns.
It seems to help a few existing AVX512 tests though.
Differential Revision: https://reviews.llvm.org/D72361
Saar Raz [Thu, 9 Jan 2020 14:13:46 +0000 (16:13 +0200)]
[Concepts] Fix failing test on Windows
Fix test failed by D43357 on Windows.
Sanjay Patel [Thu, 9 Jan 2020 14:02:53 +0000 (09:02 -0500)]
[InstSimplify] select Cond, true, false --> Cond
This is step 1 of damage control assuming that we need to remove several
over-reaching folds for select-of-booleans because they can cause
miscompiles as shown in D72396.
The scalar case seems obviously safe:
https://rise4fun.com/Alive/jSj
And I don't think there's any danger for vectors either - if the
condition is poisoned, then the select must be poisoned too, so undef
elements don't make any difference.
Differential Revision: https://reviews.llvm.org/D72412
Momchil Velikov [Thu, 9 Jan 2020 13:47:52 +0000 (13:47 +0000)]
[ARM][MVE] MVE-I should not be disabled by -mfpu=none
Architecturally, it's allowed to have MVE-I without an FPU, thus
-mfpu=none should not disable MVE-I, or moves to/from FP-registers.
This patch removes `+/-fpregs` from features unconditionally added to
target feature list, depending on FPU and moves the logic to Clang
driver, where the negative form (`-fpregs`) is conditionally added to
the target features list for the cases of `-mfloat-abi=soft`, or
`-mfpu=none` without either `+mve` or `+mve.fp`. Only the negative
form is added by the driver, the positive one is derived from other
features in the backend.
Differential Revision: https://reviews.llvm.org/D71843
Sanjay Patel [Thu, 9 Jan 2020 13:20:24 +0000 (08:20 -0500)]
[InstCombine] Use minimal FMF in testcase for Z / (1.0 / Y) => (Y * Z); NFC
Patch by: @raghesh (Raghesh Aloor)
Differential Revision: https://reviews.llvm.org/D72431
Pavel Labath [Thu, 9 Jan 2020 13:14:54 +0000 (14:14 +0100)]
[lldb] Modernize OptionValue::SetValueChangedCallback
instead of a function pointer + void*, take a std::function. This
removes a bunch of repetitive, unsafe void* casts.