Alan Modra [Tue, 23 Oct 2018 07:59:24 +0000 (18:29 +1030)]
PR23804, buffer overflow in sec_merge_hash_lookup
PR 23804
* merge.c (_bfd_add_merge_section): Don't attempt to merge
sections where size is not a multiple of entsize.
Alan Modra [Tue, 23 Oct 2018 05:20:43 +0000 (15:50 +1030)]
alpha testsuite fixes
Fixes a couple of ERROR results due to .set difference on alpha.
* testsuite/ld-elf/shared.exp: Don't build pr19073 test on alpha.
* testsuite/ld-elf/pr18720b.c: Don't use .set on alpha.
Joel Brobecker [Tue, 23 Oct 2018 10:27:50 +0000 (11:27 +0100)]
gdb/riscv: expect h/w watchpoints to trigger before the memory is written
When using QEMU as a RISCV simulator, hardware watchpoint events are
reported to GDB before the target memory gets written. GDB currently
expects the event to be reported after it is written. As a result of
this mismatch, upon receiving the event, GDB sees that the target
memory region has not changed, and therefore decides to ignore the
event. It therefore resumes the program's execution with a continue,
which is the start of an infinite loop between QEMU repeatedly
reporting the same watchpoint event over and over, and GDB repeatedly
ignoring it.
This patch fixes the issue by telling GDB to expect the watchpoint
event to be reported ahead of the memory region being modified.
Upon receiving the event, GDB then single-steps the program before
checking the watched memory value.
gdb/ChangeLog:
* riscv-tdep.c (riscv_gdbarch_init): Set the gdbarch's
have_nonsteppable_watchpoint attribute to 1.
Andrew Burgess [Tue, 16 Oct 2018 21:40:09 +0000 (22:40 +0100)]
gdb/riscv: Fix register access for register aliases
Some confusion over how the register names and aliases are setup in
riscv means that we currently can't access registers through their
architectural name.
This commit fixes this issue, and moves some of the csr register
handling out of the alias handling code and deals with it separately.
This has the benefit that we can now directly access some arrays
rather than having to iterate over them.
A new test is added to ensure that register aliases now work
correctly.
gdb/ChangeLog:
* riscv-tdep.c (riscv_gdb_reg_names): Update comment, and all
register names.
(struct register_alias): Rename to...
(struct riscv_register_alias): ...this, and update comment.
(riscv_register_aliases): Update type, and alias names. Remove
CSR names from this list.
(riscv_register_name): Use riscv_gdb_reg_names for int and float
register names. Add an extra assertion.
(riscv_is_regnum_a_named_csr): New function.
(riscv_register_reggroup_p): Use riscv_is_regnum_a_named_csr.
gdb/testsuite/ChangeLog:
* gdb.arch/riscv-reg-aliases.c: New file.
* gdb.arch/riscv-reg-aliases.exp: New file.
GDB Administrator [Tue, 23 Oct 2018 00:00:53 +0000 (00:00 +0000)]
Automatic date update in version.in
Jim Wilson [Mon, 22 Oct 2018 21:11:55 +0000 (14:11 -0700)]
RISC-V: NaN-box FP values smaller than an FP register.
The hardware requires that values in FP registers be NaN-boxed, so we must
extend them with 1's instead of 0's as we do for integer values.
gdb/
* riscv-tdep.c (riscv_push_dummy_call) <in_reg>: Check for value in
FP reg smaller than FP reg size, and fill with -1 instead of 0.
Jim Wilson [Mon, 22 Oct 2018 21:10:13 +0000 (14:10 -0700)]
RISC-V: Print FP regs as union of float types.
A 64-bit FP register can hold either a single or double float value, so
print it as both types by using a union type for FP registers. Likewise
for 128-bit regs which can also hold long double.
gdb/
* riscv-tdep.c (riscv_fpreg_d_type, riscv_fpreg_q_type): New.
(riscv_register_type): Use them.
(riscv_print_one_register_info): Handle union of floats same as float.
* riscv-tdep.h (struct gdbarch_tdep): Add riscv_fpreg_d_type and
riscv_fpreg_q_type fields.
John Darrington [Mon, 22 Oct 2018 14:59:47 +0000 (16:59 +0200)]
S12Z: Disassembly: Fallback to show the address if the symbol table is empty.
* opcodes/s12z-dis.c (decode_possible_symbol): Add fallback case.
(rel_15_7): Likewise.
Alan Modra [Mon, 22 Oct 2018 03:19:21 +0000 (13:49 +1030)]
gas simple-forward test
Tests that target md_apply_fix can handle fixups that have resolved
down to a constant and thus do not need relocations.
Also a fix for eqv-dot xfails.
* testsuite/gas/all/simple-forward.d,
* testsuite/gas/all/simple-forward.s: New test.
* testsuite/gas/all/gas.exp: Run it.
* testsuite/gas/all/eqv-dot.d: xfail tic30 and tic54x.
Alan Modra [Mon, 22 Oct 2018 10:00:40 +0000 (20:30 +1030)]
Apply alpha BFD_RELOC_8 fixups
* config/tc-alpha.c (md_apply_fix): Handle BFD_RELOC_8 for fixups
without a symbol.
* testsuite/gas/all/gas.exp: Don't xfail forward test here..
* testsuite/gas/all/forward.d: ..do so here, removing alpha.
Alan Modra [Sat, 20 Oct 2018 11:52:37 +0000 (22:22 +1030)]
PR23040, .uleb128 directive doesn't accept some valid expressions
What a trip down a rabbit hole this bug has been.
First observation: You can't use deferred_expression in s_leb128.
deferred_expression implements the semantics of .eqv or '==', saving
an expression with minimal simplification for assignment to a symbol
so that the expression is evaluated at uses of the symbol. In
particular, the value of "dot" is not evaluated at the .eqv symbol
assignment, but later. When s_leb128 uses deferred_expression,
"later" is at the end of assembly, giving entirely the wrong value of
"dot". There is no way to fix this for the s_leb128 use without
breaking .equ (which incidentally was already somewhat broken, see
commit
e4c2619ad1). So, don't use deferred_expression in s_leb128.
But that leads to the gas test elf/dwarf2-17 failing, because view
symbols are calculated with a chain of expression symbols. In the
dwarf2-17 .L1 case there is a "temp_sym_1 > temp_sym_2" expression,
with temp_sym_1 and temp_sym_2 on either side of a ".balign". Since
".balign" and many other directives moving "dot" are not calculated on
the first (and only) pass over source, .L1 cannot be calculated until
final addresses are assigned to frags. However, ".uleb128 .L1" *is*
calculated immediately, resulting in the wrong value.
The reason why .L1 is calculated immediately is that code in
expr.c:operand after the comment
/* If we have an absolute symbol or a reg, then we know its
value now. */
does as it says and fixes the value of .L1, because .L1 is assigned
to absolute_section in dwarf2dbg.c:set_or_check_view. So, correct
that to expr_section.
Unfortunately that fix leads to failure of the elf/dwarf2-5 test with
../gas/elf/dwarf2-5.s: Error: attempt to get value of unresolved symbol `.L5'
../gas/elf/dwarf2-5.s: Error: attempt to get value of unresolved symbol `.L11'
../gas/elf/dwarf2-5.s: Error: attempt to get value of unresolved symbol `.L12'
So why is that? Well, it turns out that .L5 is defined in terms of
.L4, and apparently .L4 is undefined. But .L4 clearly is defined,
otherwise we would hit an error when trying to use .L4 a little
earlier. There are two copies of .L4! So, symbols are cloned when
that should not happen.
Symbol cloning is a technique used by gas to support saving the value
of symbols that change between uses, but that isn't the case with
.L4. Only one value is set and used for .L4, but indeed .L4 was being
cloned by symbol_clone_if_forward_ref. This despite no forward refs
being present. Also, .L4 is a local symbol and a cursory glance at
symbol_clone_if_forward_ref "if (symbolP && !LOCAL_SYMBOL_CHECK (symbolP))"
would seem to prevent cloning of local symbols. All is not as it
seems though, a curse of using macros. LOCAL_SYMBOL_CHECK modifies
its argument if a "struct local_symbol" is converted to the larger
"struct symbol", as happens when assigning a view symbol value.
That fact results in the recursive call to symbol_clone_if_forward_ref
returning a different address for "add_symbol". This problem could
have been fixed by using symbol_same_p rather than comparing symbol
pointers, but I thought it better to use the real symbol throughout.
Note that symbol_find_exact also returns the real symbol for a
converted local symbol.
Finally, this patch does expose lack of support for forward symbol
definitions in various targets. For example:
alpha-linux +ERROR: ../ld/testsuite/ld-elf/pr11138-2.c: compilation failed
This is caused by view symbol uses. On alpha-linux-gcc (GCC) 8.1.1
20180502 they happen to occur in .byte directives so were silently
broken in cases like elf/dwarf2-17 anyway.
/tmp/ccvtsMfU.s: Assembler messages:
/tmp/ccvtsMfU.s: Fatal error: unhandled relocation type BFD_RELOC_8
/tmp/ccvtsMfU.s: Fatal error: unhandled relocation type BFD_RELOC_8
md_apply_fix on those targets needs to handle fixups that resolve down
to a constant.
PR 23040
* symbols.c (get_real_sym): New function.
(symbol_same_p): Use get_real_sym.
(symbol_clone_if_forward_ref): Save real original add_symbol and
op_symbol for comparison against that returned from lookup or
recursive calls.
* dwarf2dbg.c (set_or_check_view): Use expr_section for
expression symbols, not absolute_section.
(dwarf2_directive_loc): Check symbol_equated_p and tidy cloning
of view symbols.
* read.c (s_leb128): Don't use deferred_expression.
Simon Marchi [Mon, 22 Oct 2018 02:29:21 +0000 (22:29 -0400)]
Introduce gdbarch_num_cooked_regs
The expression
gdbarch_num_regs (gdbarch) + gdbarch_num_pseudo_regs (gdbarch)
is used quite often to find the number of cooked registers (raw + pseudo
registers). This patch introduces gdbarch_num_cooked_regs, which does
the equivalent. It substantially reduces required wrapping in some
places, so should improve readability.
There is a for loop in m68hc11_frame_unwind_cache that had iterated
until (the equivalent of) gdbarch_num_cooked_regs (gdbarch) - 1. During
review, we concluded that this is most likely an off-by-one mistake, so
I replaced it with gdbarch_num_cooked_regs (gdbarch).
gdb/ChangeLog:
* gdbarch.sh (gdbarch_num_cooked_regs): New.
* gdbarch.h: Re-generate.
* ax-gdb.c (gen_expr): Use gdbarch_num_cooked_regs.
* dwarf2-frame.c (dwarf2_frame_cache): Likewise.
* eval.c (evaluate_subexp_standard): Likewise.
* findvar.c (value_of_register): Likewise.
(value_of_register_lazy): Likewise.
(address_from_register): Likewise.
* frame.c (get_frame_register_bytes): Likewise.
* gdbarch-selftests.c (register_to_value_test): Likewise.
* h8300-tdep.c (h8300_register_type): Likewise.
* i386-tdep.c (i386_dbx_reg_to_regnum): Likewise.
(i386_svr4_reg_to_regnum): Likewise.
* infcmd.c (default_print_registers_info): Likewise.
(registers_info): Likewise.
(print_vector_info): Likewise.
(default_print_float_info): Likewise.
* m68hc11-tdep.c (m68hc11_frame_unwind_cache): Likewise.
* mdebugread.c (mdebug_reg_to_regnum): Likewise.
* mi/mi-main.c (mi_cmd_data_list_register_names): Likewise.
(mi_cmd_data_list_changed_registers): Likewise.
(mi_cmd_data_list_register_values): Likewise.
(mi_cmd_data_write_register_values): Likewise.
(mi_cmd_trace_frame_collected): Likewise.
* mips-tdep.c (print_gp_register_row): Likewise.
(mips_print_registers_info): Likewise.
* nds32-tdep.c (nds32_gdbarch_init): Likewise.
* regcache.c (init_regcache_descr): Likewise.
(register_size): Likewise.
(register_dump::dump): Likewise.
(cooked_read_test): Likewise.
(cooked_write_test): Likewise.
* rs6000-tdep.c (rs6000_register_sim_regno): Likewise.
(rs6000_gdbarch_init): Likewise.
* stabsread.c (stab_reg_to_regnum): Likewise.
* stack.c (info_frame_command): Likewise.
* target-descriptions.c (tdesc_register_name): Likewise.
* trad-frame.c (trad_frame_alloc_saved_regs): Likewise.
* tui/tui-regs.c (tui_show_register_group): Likewise.
* user-regs.c (user_reg_map_name_to_regnum): Likewise.
(user_reg_map_regnum_to_name): Likewise.
(value_of_user_reg): Likewise.
(maintenance_print_user_registers): Likewise.
* xtensa-tdep.c (xtensa_find_register_by_name): Likewise.
(xtensa_register_name): Likewise.
(xtensa_register_type): Likewise.
(xtensa_reg_to_regnum): Likewise.
(xtensa_pseudo_register_read): Likewise.
(xtensa_pseudo_register_write): Likewise.
Simon Marchi [Mon, 22 Oct 2018 02:09:24 +0000 (22:09 -0400)]
Allocate buffer with proper size in amd64_pseudo_register_{read_value,write}
Running "maintenance selftest" on an amd64 build with AddressSanitizer
enabled, I get this:
==18126==ERROR: AddressSanitizer: dynamic-stack-buffer-overflow on address 0x7ffdf72397c1 at pc 0x7fb5f437b011 bp 0x7ffdf7239740 sp 0x7ffdf7238ee8
WRITE of size 8 at 0x7ffdf72397c1 thread T0
#0 0x7fb5f437b010 in __interceptor_memcpy /build/gcc/src/gcc/libsanitizer/sanitizer_common/sanitizer_common_interceptors.inc:737
#1 0x55a1f899c1b3 in readable_regcache::raw_read(int, unsigned char*) /home/simark/src/binutils-gdb/gdb/regcache.c:530
#2 0x55a1f7db241b in amd64_pseudo_register_read_value /home/simark/src/binutils-gdb/gdb/amd64-tdep.c:384
#3 0x55a1f8413a2e in gdbarch_pseudo_register_read_value(gdbarch*, readable_regcache*, int) /home/simark/src/binutils-gdb/gdb/gdbarch.c:1992
#4 0x55a1f899c9d1 in readable_regcache::cooked_read(int, unsigned char*) /home/simark/src/binutils-gdb/gdb/regcache.c:636
#5 0x55a1f89a2251 in cooked_read_test /home/simark/src/binutils-gdb/gdb/regcache.c:1649
In amd64_pseudo_register_read_value, when we try to read the al
register, for example, we need to read rax and extract al from it. We
allocate a buffer of the size of al (1 byte):
gdb_byte *raw_buf = (gdb_byte *) alloca (register_size (gdbarch, regnum));
but read in it the whole rax value (8 bytes):
status = regcache->raw_read (gpnum, raw_buf);
Fix it by allocating a buffer correctly sized for the full register from
which the smaller register is extracted. The
amd64_pseudo_register_write function had the same problem.
gdb/ChangeLog:
* amd64-tdep.c (amd64_pseudo_register_read_value): Use
correctly-sized buffer with raw_read.
(amd64_pseudo_register_write): Use correctly-sized buffer for
raw_read/raw_write.
GDB Administrator [Mon, 22 Oct 2018 00:00:58 +0000 (00:00 +0000)]
Automatic date update in version.in
GDB Administrator [Sun, 21 Oct 2018 00:01:05 +0000 (00:01 +0000)]
Automatic date update in version.in
Philippe Waroquiers [Sat, 20 Oct 2018 21:00:52 +0000 (23:00 +0200)]
[PUSHED/OBVIOUS] ensure help set print type gives the correct help.
Without this patch:
(gdb) help set print type
Generic command for setting how types print.
List of show print type subcommands:
show print type methods -- Set printing of methods defined in classes
...
With this patch:
(gdb) h set print type
Generic command for setting how types print.
List of set print type subcommands:
set print type methods -- Set printing of methods defined in classes
...
Tom Tromey [Sat, 20 Oct 2018 18:18:20 +0000 (12:18 -0600)]
Fix "make info" in gdb
"make info" in gdb was broken by my last patch. This fixes it.
Tested by rebuilding; committing as obvious.
gdb/doc/ChangeLog
2018-10-20 Tom Tromey <tom@tromey.com>
* gdb.texinfo (TUI Commands): Add @end table.
(TUI Configuration): Remove stray @end table.
John Darrington [Sat, 13 Oct 2018 18:07:34 +0000 (20:07 +0200)]
GDB: Documentation: Remove greengrocer's apostrophe.
gdb/doc/gdb.texinfo (gdbserver man): "it's symbol" --> its symbol.
Alan Modra [Sat, 20 Oct 2018 00:42:46 +0000 (11:12 +1030)]
PR23800, .eqv doesn't always defer expression evaluation
.eqv (and ==) ought not simplify expressions involving dot or other
symbols set by .eqv. If such simplification occurs, the value of dot
will be that at the assignment rather than at the place where the
symbol is used.
PR 23800
* expr.c (expr): Don't simplify expressions involving forward_ref
symbols when mode is expr_defer.
* config/tc-spu.c (spu_cons): Parse expression using normal
expression evaluation if @ppu is not detected.
* testsuite/gas/all/eqv-dot.d,
* testsuite/gas/all/eqv-dot.s: New test.
* testsuite/gas/all/gas.exp: Run it.
Alan Modra [Fri, 19 Oct 2018 13:32:17 +0000 (00:02 +1030)]
PR23788, objcopy: failed to find link section
Symbol tables can change when a number of objcopy options are used.
I figure string tables are similarly changeable.
PR 23788
* elf.c (section_match): Don't require a size match for SHT_SYMTAB
or SHT_STRTAB.
Alan Modra [Fri, 19 Oct 2018 13:29:11 +0000 (23:59 +1030)]
Relax a -r --gc-sections requirement
A symbol root is not needed if --gc-keep-exported is also given.
* ldlang.c (lang_end): Don't error if no --entry or --undefined
is given with -r -gc-sections if --gc-keep-exported.
GDB Administrator [Sat, 20 Oct 2018 00:00:40 +0000 (00:00 +0000)]
Automatic date update in version.in
Tom Tromey [Mon, 3 Sep 2018 01:41:41 +0000 (19:41 -0600)]
Deprecate and replace the "tabset" command
The "tabset" command sets the tab width as used by the TUI for source
and disassembly display.
This command has long seemed to be misnamed to me. It is more in
keeping with gdb design to call it "set tui tab-width". Also, making
this change allows for the corresponding "show" command to work.
gdb/ChangeLog
2018-10-19 Tom Tromey <tom@tromey.com>
PR tui/18388:
* NEWS: Mention tabset deprecation.
* tui/tui-win.c (tui_tab_width, internal_tab_width): New globals.
(update_tab_width): New function.
(tui_set_tab_width, tui_show_tab_width): New functions.
(tui_set_tab_width_command): Use update_tab_width.
(_initialize_tui_win): Move to end of file. Deprecate "tabset".
Add new "set tui tab-width" command.
* tui/tui-source.c (tui_set_source_content): Update.
* tui/tui-disasm.c (tui_set_disassem_content): Update.
* tui/tui-data.h (tui_default_tab_len, tui_set_default_tab_len):
Don't declare.
(tui_tab_width): Declare.
* tui/tui-data.c (default_tab_len, tui_default_tab_len)
(tui_set_default_tab_len): Remove.
gdb/doc/ChangeLog
2018-10-19 Tom Tromey <tom@tromey.com>
PR tui/18388:
* gdb.texinfo (TUI Commands): Remove tabset documentation.
(TUI Configuration): Document "set tui tab-width".
Tom Tromey [Sun, 2 Sep 2018 00:44:33 +0000 (18:44 -0600)]
Minor cleanups in tui-io.c
I noticed that a couple of functions in tui-io.c could be static, and
that a couple more were unused and could be removed.
gdb/ChangeLog
2018-10-19 Tom Tromey <tom@tromey.com>
* tui/tui-io.h (key_is_start_sequence, key_is_end_sequence)
(key_is_backspace, tui_getc): Don't declare.
* tui/tui-io.c (key_is_start_sequence): Now static.
(key_is_end_sequence, key_is_backspace): Remove.
(tui_getc): Now static.
Tom Tromey [Thu, 26 Jul 2018 23:54:00 +0000 (17:54 -0600)]
Clear static_links in reread_symbols
-fsanitize=address pointed out a use-after free in
objfile_register_static_link. The bug turned out to be that
reread_symbols does not clear the static_links field; this leaves a
hash table that is filled with freed pointers.
Jan's (now quite old) idea of replacing reread_symbols with a simple
delete/new still seems good to me, and it's worth noting that it would
have avoided this bug.
Tested by the buildbot and by observing the change with
-fsanitize=address.
gdb/ChangeLog
2018-10-19 Tom Tromey <tom@tromey.com>
* symfile.c (reread_symbols): Clear "static_links".
Tamar Christina [Fri, 19 Oct 2018 15:18:37 +0000 (16:18 +0100)]
Arm: Skip new binary decode tests on pe targets
The two new test I added require the use of the ".inst" directive which the PE
targets don't support. Because of that I excluded *-unknown-pe but the mask needs
to be wider. I am now excluding *-*-pe.
gas/ChangeLog:
* testsuite/gas/arm/undefined-insn-arm.d: Widen pe skip.
* testsuite/gas/arm/undefined-insn-thumb.d: Likewise.
Alan Hayward [Fri, 19 Oct 2018 12:51:00 +0000 (13:51 +0100)]
Aarch64: Better termination checks for sigcontext reading
When reading the reserved section in the sigcontext ensure the
address is updated on an unknown section. Also add additional
checks to prevent reading past the end of the array.
Fixes gdb.base/savedregs.exp
* aarch64-linux-tdep.c (AARCH64_SIGCONTEXT_RESERVED_SIZE): New
define.
(aarch64_linux_sigframe_init): Extra boundary checks.
Andreas Arnez [Fri, 19 Oct 2018 12:05:08 +0000 (14:05 +0200)]
S390: Fix crash when remote tdesc doesn't define vec128
I've encountered a GDB crash when trying to read registers from a remote
stub that provided a target.xml with vector registers, but without the
'vec128' data type. The crash is caused by NULL register type entries for
the "concatenated" pseudo-registers v0-v15. These NULL entries are
introduced by the logic in s390_pseudo_register_type(), where the tdesc
type 'vec128' is returned unconditionally -- even if it doesn't exist (is
NULL).
The fixed logic for determining a "concatenated" vector register's type
now returns the type of the raw register v16 instead. This also makes
sure that all vector register have the same type.
gdb/ChangeLog:
* s390-tdep.c (s390_pseudo_register_type): For v0-v15 don't yield
the possibly non-existent tdesc type 'vec128', but the type of raw
register v16 instead.
Gary Benson [Fri, 19 Oct 2018 10:51:41 +0000 (11:51 +0100)]
Fix cli_interp::cli_uiout resource leak found by Coverity
This commit fixes a resource leak found by Coverity, where cli_interp's
constructor creates a new cli_ui_out, but there was no corresponding
destructor to free it.
gdb/ChangeLog:
* cli/cli-interp.c (cli_interp::~cli_interp): New function.
Alan Hayward [Tue, 9 Oct 2018 15:42:33 +0000 (16:42 +0100)]
Testsuite: Fix racy conditions in py-cmd.exp
The test loop in test_python_inline_or_multiline was not checking for the
gdb prompt. readline_is_used then reads in the prompt causing it to fail
and the final chunk of tests to be skipped.
Spotted this error because sometimes the gdb prompt does get processed
correctly and the final tests are run, causing it to show up in the
racy tests script output.
Fix by ensuring the prompt is always checked for. To do this the list
style needs reformatting so that variables get expanded.
2018-10-19 Alan Hayward <alan.hayward@arm.com>
* gdb.python/py-cmd.exp: Check for gdb_prompt.
Alan Hayward [Thu, 18 Oct 2018 10:43:40 +0000 (11:43 +0100)]
Testsuite: vla-optimized-out.exp is too pessimistic
On aarch64 (and possibly other ports), for O3 the sizeof "a" can still be shown.
2018-10-19 Alan Hayward <alan.hayward@arm.com>
* gdb.base/vla-optimized-out.exp: Allow either optimized out or 6.
Alan Hayward [Thu, 18 Oct 2018 13:36:06 +0000 (14:36 +0100)]
testsuite: ovldbreak.exp: fix regexp
Fix the layout used in the regexp for breakpoints.
Gets rid of two FAILS.
2018-10-18 Alan Hayward <alan.hayward@arm.com>
* gdb.cp/ovldbreak.exp: Fix regexps.
Alan Hayward [Thu, 18 Oct 2018 12:58:57 +0000 (13:58 +0100)]
Testsuite: compile-cplus-print.exp: Start inferior before compiling
skip_compile_feature_tests is only valid if the inferior has already
been started (see proc comments). Move the runto_main earlier.
2018-10-18 Alan Hayward <alan.hayward@arm.com>
* gdb.compile/compile-cplus-print.exp: Start inferior earlier.
Tamar Christina [Fri, 19 Oct 2018 09:31:42 +0000 (10:31 +0100)]
Arm: Fix disassembler crashing on -b binary when thumb file and thumb not forced.
The disassembler for Arm has some aborts in it in places it assumes can never
be reached. Under normal circumstances they indeed cannot be reached because
the right options are selected from the ARM attributes in the ELF file.
However when disassembling with -b binary then if you do not get the options
right the disassembler just aborts. This changes it so it just prints how it
was trying to interpret the instruction and prints UNKNOWN instructions next to it.
This way the user has an idea of what's going.
gas/ChangeLog:
* testsuite/gas/arm/undefined-insn-arm.d: New test.
* testsuite/gas/arm/undefined-insn-thumb.d: New test.
* testsuite/gas/arm/undefined-insn.s: New test.
opcodes/ChangeLog:
* arm-dis.c (UNKNOWN_INSTRUCTION_32BIT): Format specifier for arm mode.
(UNKNOWN_INSTRUCTION_16BIT): Format specifier for thumb mode.
(print_insn_arm, print_insn_thumb16, print_insn_thumb32): Use them.
Fredrik Noring [Fri, 19 Oct 2018 08:47:55 +0000 (09:47 +0100)]
This set of changes clarifies the conditions for the R5900 short loop fix and extends its test with the border cases of six and seven instructions.
* testsuite/gas/mips/r5900.s: Extend the R5900 short loop fix
test with border cases.
* testsuite/gas/mips/r5900.d: Add extra expected disassembly.
* config/tc-mips.c (can_swap_branch_p): Clarify the R5900 short
loop hardware bug conditions. Correct note on the R5900
instruction count short loop fix.
GDB Administrator [Fri, 19 Oct 2018 00:00:36 +0000 (00:00 +0000)]
Automatic date update in version.in
Sergio Durigan Junior [Thu, 18 Oct 2018 16:56:25 +0000 (12:56 -0400)]
Fix PR cli/23785: Check if file exists when invoking "restore FILE binary"
This simple patch fixes the segfault reported on PR cli/23785, which
happens when using the "restore FILE binary" command with a
non-existent file. We just have to check if the file handler returned
by "gdb_fopen_cloexec" is not NULL, and error out if it is.
A test has also been added to gdb.base/restore.exp in order to
exercise this scenario.
No regressions introduced.
gdb/ChangeLog:
2018-10-18 Sergio Durigan Junior <sergiodj@redhat.com>
PR cli/23785
* cli/cli-dump.c (restore_binary_file): Check if "file" is
NULL.
gdb/testsuite/ChangeLog:
2018-10-18 Sergio Durigan Junior <sergiodj@redhat.com>
PR cli/23785
* gdb.base/restore.exp: New test to check if "restore" with an
invalid file doesn't segfault.
Nick Clifton [Thu, 18 Oct 2018 15:58:16 +0000 (16:58 +0100)]
Update documentation of readelf's --unwind option.
* doc/binutils.texi (readelf): Document alternatives to the
--unwind option if it is not supported for the target
architecture.
Tom de Vries [Thu, 18 Oct 2018 11:23:08 +0000 (13:23 +0200)]
[gdb/testsuite] Fix capitalized test names
At https://sourceware.org/gdb/wiki/GDBTestcaseCookbook\
#Follow_the_test_name_convention we find:
..
Test names should start with a lower case and don't need to end with a period
(they are not sentences).
...
Fix some capitalized test names.
Tested on x86_64-linux.
2018-10-18 Tom de Vries <tdevries@suse.de>
* gdb.ada/bp_inlined_func.exp: Fix capitalized test name.
* gdb.ada/excep_handle.exp: Same.
* gdb.ada/mi_string_access.exp: Same.
* gdb.ada/mi_var_union.exp: Same.
* gdb.arch/arc-analyze-prologue.exp: Same.
* gdb.arch/arc-decode-insn.exp: Same.
* gdb.base/readnever.exp: Same.
* gdb.fortran/printing-types.exp: Same.
* gdb.guile/scm-lazy-string.exp: Same.
GDB Administrator [Thu, 18 Oct 2018 00:00:35 +0000 (00:00 +0000)]
Automatic date update in version.in
Paul Koning [Wed, 17 Oct 2018 23:26:55 +0000 (19:26 -0400)]
gdb/ChangeLog:
* charset.c (convert_between_encodings): Fix unsigned overflow.
gdb/charset.c (convert_between_encodings): Fix unsigned overflow.
John Baldwin [Wed, 17 Oct 2018 18:41:30 +0000 (11:41 -0700)]
Share the code to format "info proc mappings" entries for FreeBSD.
gdb/ChangeLog:
* fbsd-nat.c (fbsd_nat_target::info_proc) Use
fbsd_info_proc_mappings_header and fbsd_info_proc_mappings_entry.
* fbsd-tdep.c (fbsd_vm_map_entry_flags): Mark static.
(fbsd_info_proc_mappings_header, fbsd_info_proc_mappings_entry):
New functions.
(fbsd_core_info_proc_mappings): Use fbsd_info_proc_mappings_header
and fbsd_info_proc_mappings_header.
* fbsd-tdep.h (fbsd_vm_map_entry_flags): Remove.
(fbsd_info_proc_mappings_header, fbsd_info_proc_mappings_entry):
New.
Joel Brobecker [Wed, 17 Oct 2018 18:04:14 +0000 (11:04 -0700)]
gdb/MAINTAINERS: Add Rainer Orth as Solaris maintainer for GDB
gdb/ChangeLog:
* MAINTAINERS (Responsible Maintainers): Add Rainer Orth as
Solaris Maintainer.
Alan Modra [Tue, 16 Oct 2018 22:47:30 +0000 (09:17 +1030)]
PR23653, ld SIGSEGVs when attempts to link sparc object with x86_64 library
This patch improves dynobj selection. This allows the testcase in the
PR to proceed further before segfaulting due to other bugs in the
sparc backend.
../ld/ld-new --eh-frame-hdr -m elf_x86_64 -shared -o bug.so.5 bug.o ./libc.so.6 ./crtendS.o
../ld/ld-new: sparc architecture of input file `bug.o' is incompatible with i386:x86-64 output
../ld/ld-new: bug.o: in function `a':
bug.c:(.text+0x4): undefined reference to `_GLOBAL_OFFSET_TABLE_'
../ld/ld-new: bug.c:(.text+0x8): undefined reference to `_GLOBAL_OFFSET_TABLE_'
Segmentation fault
PR 23653
* elflink.c (_bfd_elf_link_create_dynstrtab): Match elf_object_id
too when choosing dynobj.
GDB Administrator [Wed, 17 Oct 2018 00:01:28 +0000 (00:01 +0000)]
Automatic date update in version.in
Tom de Vries [Thu, 4 Oct 2018 22:04:27 +0000 (00:04 +0200)]
[gdb/testsuite] Rewrite catch-follow-exec.exp
There are two problems with the current catch-follow-exec.exp:
- INTERNAL_GDBFLAGS (containing the datadir setting) is not used
- remote host testing doesn't work
Fix the former by using gdb_spawn_with_cmdline_opts. Fix the latter by
requiring gdb-native.
Build on x86_64-linux with and without ubsan, and tested.
2018-10-16 Tom de Vries <tdevries@suse.de>
PR gdb/23730
* gdb.base/catch-follow-exec.c: Add copyright notice.
* gdb.base/catch-follow-exec.exp: Rewrite to use
gdb_spawn_with_cmdline_opts. Require gdb-native.
Matthew Malcomson [Tue, 16 Oct 2018 17:49:36 +0000 (18:49 +0100)]
AArch64: Fix error checking for SIMD udot (by element)
Committed on behalf of Matthew Malcomson:
The SIMD UDOT instruction assembly has an unusual operand that selects a single
32 bit element with the mnemonic 4B.
This unusual mnemonic is handled by a special operand qualifier and associated
qualifier data in `aarch64_opnd_qualifiers`.
The current qualifier data describes 4 1-byte elements with the structure
{1, 4, 0x0, "4b", OQK_OPD_VARIANT}
This makes sense, as the instruction does work on 4 1-byte elements, however
some logic in the `operand_general_constraint_met_p` makes assumptions about
the range of index allowed when selecting a SIMD_ELEMENT depending on element
size.
That function reasons that e.g. in order to select a byte-sized element in a 16
byte V register an index must allow selection of one of the 16 elements and
hence its range will be in [0,15].
This reasoning breaks with the above description of a 4 part selection of 1
byte elements and allows an index outside the valid [0,3] range, triggering an
assert later on in the program in `aarch64_ins_reglane`.
vshcmd: > echo 'udot v0.2s, v1.8b, v2.4b[4]' | ../src/binutils-build/gas/as-new -march=armv8.4-a
as-new: ../../binutils-gdb/opcodes/aarch64-asm.c:134: aarch64_ins_reglane: Assertion `reglane_index < 4' failed.
{standard input}: Assembler messages:
{standard input}:1: Internal error (Aborted).
Please report this bug.
This patch changes the operand qualifier data so that it describes a single
32 bit element.
{4, 1, 0x0, "4b", OQK_OPD_VARIANT}
Hence the calculation in `operand_general_constraint_met_p` provides the
correct answer and the usual error checking machinery is used.
vshcmd: > echo 'udot v0.2s, v1.8b, v2.4b[4]' | ../src/binutils-build/gas/as-new -march=armv8.4-a
{standard input}: Assembler messages:
{standard input}:1: Error: register element index out of range 0 to 3 at operand 3 -- `udot v0.2s,v1.8b,v2.4b[4]'
Alan Modra [Tue, 16 Oct 2018 05:59:23 +0000 (16:29 +1030)]
Simplify PR23110 PE_DEBUG_DATA size checks
The negative size check can be rolled into the "exceeds space left in
section" check if that is done using an unsigned comparison. We know
that "addr - section->vma" is never larger than section->size since
the section is found by find_section_by_vma.
* peXXigen.c (_bfd_XX_bfd_copy_private_bfd_data_common): Simplify
PE_DEBUG_DATA size checks.
Alan Modra [Tue, 16 Oct 2018 04:53:20 +0000 (15:23 +1030)]
PR23781, _bfd_pe_bfd_copy_private_bfd_data_common memory leak
PR 23781
* peXXigen.c (_bfd_XX_bfd_copy_private_bfd_data_common): Free data
before returning.
Alan Modra [Tue, 16 Oct 2018 04:09:03 +0000 (14:39 +1030)]
PR23780, assertion abort in function display_raw_attribute
PR 23780
* readelf.c (display_raw_attribute): Correct assertion.
Cherry Zhang [Tue, 16 Oct 2018 03:37:41 +0000 (14:07 +1030)]
PR23769, mixing split-stack and non-split-stack error message
Corrects which file is reported as being split-stack.
PR 23769
* gold.cc (queue_middle_tasks): Correct split-stack error message.
Tom Tromey [Sun, 14 Oct 2018 18:50:32 +0000 (12:50 -0600)]
Remove unnecessary casts from TUI
This removes a number of unnecessary casts from the TUI. Some were
found with -Wuseless-cast (which, I think, can't easily be enabled for
gdb); and some were found by inspection.
Tested by rebuilding on x86-64 Fedora 28.
I'm checking this in.
gdb/ChangeLog
2018-10-15 Tom Tromey <tom@tromey.com>
* tui/tui.c (strcat_to_buf): Remove casts.
* tui/tui-winsource.c (tui_show_source_line)
(tui_set_is_exec_point_at, tui_line_is_displayed): Remove casts.
* tui/tui-wingeneral.c (tui_refresh_win, box_win): Remove casts.
* tui/tui-windata.c (tui_first_data_item_displayed)
(tui_delete_data_content_windows, tui_erase_data_content)
(tui_display_all_data, tui_display_data_from)
(tui_refresh_data_win, tui_vertical_data_scroll): Remove casts.
* tui/tui-win.c (tui_set_win_height)
(make_invisible_and_set_new_height, parse_scrolling_args): Remove
casts.
* tui/tui-win.c (tui_resize_all): Remove casts.
(tui_scroll_backward_command, tui_set_focus)
(tui_set_tab_width_command): Likewise.
* tui/tui-source.c (tui_vertical_source_scroll): Remove cast.
* tui/tui-regs.c (tui_show_register_group): Remove cast.
* tui/tui-layout.c (tui_set_layout_by_name): Remove cast.
* tui/tui-disasm.c (tui_vertical_disassem_scroll): Remove cast.
* tui/tui-data.c (tui_partial_win_by_name, tui_free_win_content):
Remove casts.
GDB Administrator [Tue, 16 Oct 2018 00:00:36 +0000 (00:00 +0000)]
Automatic date update in version.in
Jim Wilson [Mon, 15 Oct 2018 23:00:28 +0000 (16:00 -0700)]
RISC-V: Adjust __global_pointer$ value to reduce code size.
ld/
* emulparams/elf32lriscv-defs.sh (DATA_START_SYMBOLS): New.
(SDATA_START_SYMBOLS): Define __SDATA_BEGIN__. Don't define
__global_pointer$.
(OTHER_END_SYMBOLS): New. Define __global_pointer$.
* testsuite/ld-riscv-elf/pcrel-lo-addend-2.d (#ld): Add --no-relax.
Alan Modra [Mon, 15 Oct 2018 22:31:55 +0000 (09:01 +1030)]
Re: BFD_INIT_MAGIC
I should know better than to introduce the first use of size_t in
bfd.h.
PR 23534
* init.c (bfd_init): Return an unsigned int.
bfd-in2.h: Regenerate.
Simon Marchi [Mon, 15 Oct 2018 19:52:03 +0000 (15:52 -0400)]
Add Alan Hayward as AArch64/ARM GDB maintainer
gdb/ChangeLog:
* MAINTAINERS (Responsible Maintainers): Add Alan Hayward as
AArch64/ARM maintainer.
Alan Modra [Mon, 15 Oct 2018 05:40:27 +0000 (16:10 +1030)]
BFD_INIT_MAGIC
This patch performs a run-time test that a shared libbfd.so has been
compiled with the same size bfd_vma as that of apps using the library.
On a 32-bit host it is easily possible to have one libbfd.so compiled
to support 64-bit targets (or configured with --enable-64-bit-bfd)
while another only supports 32-bit targets. The two libraries will
have differently sized bfd_vma types, and if the wrong one is loaded
all sorts of weird behaviour might be seen.
bfd/
PR 23534
* init.c (BFD_INIT_MAGIC): Define.
(bfd_init): Return BFD_INIT_MAGIC.
bfd-in2.h: Regenerate.
binutils/
PR 23534
* addr2line.c (main): Exit with fatal error if bfd_init
returns an unexpected value.
* ar.c (main): Likewise.
* dlltool.c (identify_dll_for_implib): Likewise.
* nm.c (main): Likewise.
* objcopy.c (main): Likewise.
* objdump.c (main): Likewise.
* size.c (main): Likewise.
* strings.c (main): Likewise.
* windmc.c (main): Likewise.
* windres.c (main): Likewise.
gas/
PR 23534
* as.c (main): Exit with fatal error if bfd_init returns an
unexpected value.
ld/
PR 23534
* ldmain.c (main): Exit with fatal error if bfd_init returns
an unexpected value.
GDB Administrator [Mon, 15 Oct 2018 00:00:54 +0000 (00:00 +0000)]
Automatic date update in version.in
GDB Administrator [Sun, 14 Oct 2018 00:01:07 +0000 (00:01 +0000)]
Automatic date update in version.in
Alan Modra [Sat, 13 Oct 2018 11:33:02 +0000 (22:03 +1030)]
_bfd_clear_contents bounds checking
This PR shows a fuzzed binary triggering a segfault via a bad
relocation in .debug_line. It turns out that unlike normal
relocations applied to a section, the linker applies those with
symbols from discarded sections via _bfd_clear_contents without
checking that the relocation is within the section bounds. The same
thing now happens when reading debug sections since commit
a4cd947aca23, the PR23425 fix.
PR 23770
PR 23425
* reloc.c (_bfd_clear_contents): Replace "location" param with
"buf" and "off". Bounds check "off". Return status.
* cofflink.c (_bfd_coff_generic_relocate_section): Update
_bfd_clear_contents call.
* elf-bfd.h (RELOC_AGAINST_DISCARDED_SECTION): Likewise.
* elf32-arc.c (elf_arc_relocate_section): Likewise.
* elf32-i386.c (elf_i386_relocate_section): Likewise.
* elf32-metag.c (metag_final_link_relocate): Likewise.
* elf32-nds32.c (nds32_elf_get_relocated_section_contents): Likewise.
* elf32-ppc.c (ppc_elf_relocate_section): Likewise.
* elf32-visium.c (visium_elf_relocate_section): Likewise.
* elf64-ppc.c (ppc64_elf_relocate_section): Likewise.
* elf64-x86-64.c *(elf_x86_64_relocate_section): Likewise.
* libbfd-in.h (_bfd_clear_contents): Update prototype.
* libbfd.h: Regenerate.
Alan Modra [Fri, 12 Oct 2018 01:36:40 +0000 (12:06 +1030)]
ELF ld -r scripts
"ld -r" generally should not combine object file sections with
different names. For example, "ld -r" should not combine ".text",
".text.hot" and ".text.cold" into an output ".text" section. An
exception needs to be made for linker created sections, for example,
branch trampoline sections that might be created even for ld -r.
"ld -r" also should not define symbols in linker scripts. Any
definitions are likely to conflict with those defined at final link.
A MEMORY spec is also not needed for ld -r.
* Makefile.am (eelf32btsmip_fbsd.c, eelf32btsmipn32_fbsd.c),
(eelf32epiphany.c, eelf32epiphany_4x4.c, eelf32ltsmip_fbsd.c),
(eelf32ltsmipn32_fbsd.c, eelf32xc16x.c, eelf32xc16xl.c),
(eelf32xc16xs.c, emcorepe.c, enios2elf.c, enios2linux.c),
(eelf64btsmip_fbsd.c, eelf64ltsmip_fbsd.c): Correct dependencies.
* Makefile.in: Regenerate.
* emulparams/aarch64cloudabi.sh, * emulparams/aarch64fbsd.sh,
* emulparams/aarch64linux.sh, * emulparams/aarch64linux32.sh,
* emulparams/arc-nps.sh, * emulparams/elf32_spu.sh,
* emulparams/elf32_tic6x_le.sh, * emulparams/elf32bmip.sh,
* emulparams/elf32btsmipn32.sh, * emulparams/elf32lr5900n32.sh,
* emulparams/elf32mep.sh, * emulparams/elf32metag.sh,
* emulparams/elf64btsmip.sh, * emulparams/shelf_vxworks.sh,
* emulparams/shlelf_fd.sh, * scripttempl/DWARF.sc,
* scripttempl/alpha.sc, * scripttempl/alphavms.sc,
* scripttempl/arclinux.sc, * scripttempl/armbpabi.sc,
* scripttempl/avr.sc, * scripttempl/dlx.sc, * scripttempl/elf.sc,
* scripttempl/elf32cr16.sc, * scripttempl/elf32cr16c.sc,
* scripttempl/elf32crx.sc, * scripttempl/elf32msp430.sc,
* scripttempl/elf32msp430_3.sc, * scripttempl/elf32xc16x.sc,
* scripttempl/elf32xc16xl.sc, * scripttempl/elf32xc16xs.sc,
* scripttempl/elf64hppa.sc, * scripttempl/elf_chaos.sc,
* scripttempl/elfarc.sc, * scripttempl/elfarcv2.sc,
* scripttempl/elfd10v.sc, * scripttempl/elfd30v.sc,
* scripttempl/elfm68hc11.sc, * scripttempl/elfm68hc12.sc,
* scripttempl/elfm9s12z.sc, * scripttempl/elfmicroblaze.sc,
* scripttempl/elfxgate.sc, * scripttempl/elfxtensa.sc,
* scripttempl/epiphany_4x4.sc, * scripttempl/ft32.sc,
* scripttempl/hppaelf.sc, * scripttempl/ia64vms.sc,
* scripttempl/ip2k.sc, * scripttempl/iq2000.sc,
* scripttempl/mep.sc, * scripttempl/mmo.sc,
* scripttempl/nds32elf.sc, * scripttempl/pru.sc,
* scripttempl/sh.sc, * scripttempl/v850.sc,
* scripttempl/v850_rh850.sc, * scripttempl/visium.sc,
* scripttempl/xstormy16.sc: Condition various parts of scripts on
${RELOCATABLE} in order to prevent ld -r merging sections or
defining symbols. Remove MEMORY and VERSION definitions from
ld -r scripts too.
* testsuite/ld-elf/group2.d, * testsuite/ld-elf/group4.d,
* testsuite/ld-elf/group5.d, * testsuite/ld-elf/group6.d,
* testsuite/ld-elf/group7.d, * testsuite/ld-elf/group8a.d,
* testsuite/ld-elf/group8b.d, * testsuite/ld-elf/group9a.d,
* testsuite/ld-elf/group9b.d, * testsuite/ld-elf/pr17550a.d,
* testsuite/ld-elf/pr17550b.d,
* testsuite/ld-elf/pr17550d.d: Don't xfail cr16 and crx.
* testsuite/ld-elf/init-fini-arrays.d,
* testsuite/ld-elf/pr22677.d: Likewise, and dont' xfail mep.
Sandra Loosemore [Sat, 13 Oct 2018 00:56:13 +0000 (17:56 -0700)]
Clean up gdb.trace test results on targets not supporting this feature.
2018-10-12 Sandra Loosemore <sandra@codesourcery.com>
gdb/testsuite/
* gdb.trace/actions-changed.exp: Check for arch support.
* gdb.trace/actions.exp: Likewise.
* gdb.trace/ax.exp: Likewise.
* gdb.trace/backtrace.exp: Likewise.
* gdb.trace/change-loc.exp: Likewise.
* gdb.trace/deltrace.exp: Likewise.
* gdb.trace/ftrace-lock.exp: Check for shlib and arch support.
* gdb.trace/ftrace.exp: Likewise.
* gdb.trace/infotrace.exp: Check for arch support.
* gdb.trace/mi-trace-frame-collected.exp: Likewise.
* gdb.trace/mi-tracepoint-changed.exp: Likewise.
* gdb.trace/mi-tsv-changed.exp: Likewise.
* gdb.trace/packetlen.exp: Likewise.
* gdb.trace/passc-dyn.exp: Likewise.
* gdb.trace/passcount.exp: Likewise.
* gdb.trace/pending.exp: Likewise.
* gdb.trace/range-stepping.exp: Check for shlib support.
* gdb.trace/report.exp: Check for arch support.
* gdb.trace/save-trace.exp: Likewise.
* gdb.trace/signal.exp: Check for signal support.
* gdb.trace/tfind.exp: Check for arch support.
* gdb.trace/trace-break.exp: Check for arch and shlib support.
* gdb.trace/trace-common.h: Add comment.
* gdb.trace/trace-condition.exp: Check for shlib and arch support.
* gdb.trace/trace-enable-disable.exp: Likewise.
* gdb.trace/trace-mt.exp: Likewise. Remove redundant untested call.
* gdb.trace/tracecmd.exp: Check for arch support.
* gdb.trace/tspeed.exp: Check for shlib and target support.
* gdb.trace/tstatus.exp: Check for arch support.
* gdb.trace/tsv.exp: Likewise.
* gdb.trace/while-dyn.exp: Likewise.
* gdb.trace/while-stepping.exp: Likewise.
* lib/trace-support.exp (gdb_trace_common_supports_arch): New.
GDB Administrator [Sat, 13 Oct 2018 00:00:38 +0000 (00:00 +0000)]
Automatic date update in version.in
Simon Marchi [Fri, 12 Oct 2018 20:27:29 +0000 (16:27 -0400)]
Fix buglets in gdb.trace/tspeed.{exp,c}
When trying to run gdb.trace/tspeed.exp, I get:
ERROR: can't read "ipalib": no such variable
while executing
"gdb_load_shlib $ipalib"
(procedure "prepare_for_trace_test" line 5)
This problem seems to come from commit
c708f4d256f ("gdb: Don't call gdb_load_shlib unless GDB is running")
which moved the gdb_load_shlib call in prepare_for_trace_test. In order
to access the ipalib variable, we need to declare "global ipalib" first.
Then, this test uses nowarnings, for no good reason I could find. We
can remove that and fix the two trivial warnings that appear:
/home/emaisin/src/binutils-gdb/gdb/testsuite/gdb.trace/tspeed.c: In function 'main':
/home/emaisin/src/binutils-gdb/gdb/testsuite/gdb.trace/tspeed.c:87:16: warning: too many arguments for format [-Wformat-extra-args]
printf ("Negative times, giving up\n", max_iters);
^
/home/emaisin/src/binutils-gdb/gdb/testsuite/gdb.trace/tspeed.c:99:7: warning: implicit declaration of function 'sleep' [-Wimplicit-function-declaration]
sleep (1); /* set post-run breakpoint here */
^
gdb/testsuite/ChangeLog:
* gdb.trace/tspeed.exp: Remove nowarnings.
(prepare_for_trace_test): Declare "global ipalib".
* gdb.trace/tspeed.c: Include unistd.h.
(main): Remove superfluous printf argument.
GDB Administrator [Fri, 12 Oct 2018 00:00:39 +0000 (00:00 +0000)]
Automatic date update in version.in
Sandra Loosemore [Thu, 11 Oct 2018 23:51:26 +0000 (16:51 -0700)]
Fix pathname regexp in gdb.base/solib-vanish.exp.
2018-10-11 Sandra Loosemore <sandra@codesourcery.com>
gdb/testsuite/
* gdb.base/solib-vanish.exp: Fix regexp not to require a POSIX
directory prefix on the filename.
Nick Clifton [Thu, 11 Oct 2018 10:38:10 +0000 (11:38 +0100)]
Prevent the --keep-global-symbol and --globalize-symbol options from being used together.
This is the result of an email thread starting here:
https://sourceware.org/ml/binutils/2018-09/msg00031.html
The main point of the thread is this observation:
* Supposing we had an object file with two globals, SomeGlobal and
SomeOtherGlobal, if one were to do "--globalize-symbol SomeGlobal
--keep-global-symbol SomeOtherGlobal", you might expect that both
SomeGlobal and SomeOtherGlobal are global in the output file... but it
isn't. Because --keep-global-symbol is set and doesn't include
SomeGlobal, SomeGlobal will be demoted to a local symbol. And because
the check to see if we should apply the --globalize-symbol flag checks
"flags" (the original flag set), and not "sym->flags", it decides not
to do anything, so SomeGlobal remains a local symbol. Although this is
a weird edge case, should this be changed so that --keep-global-symbol
implicitly keeps anything also specified via --globalize-symbol? (The
code seems technically correct with respect to the documentation, but
IMO the behavior is counter-intuitive).
binutils* objcopy.c (copy_main): Issue a fata error if the
--keep-global-symbol(s) and the --globalize-symbol(s) options are
used together.
* doc/binutils.texi: Document that the two options are
incompatible.
* testsuite/binutils-all/copy-5.d: New test.
* testsuite/binutils-all/objcopy.exp: Run the new test.
Gary Benson [Thu, 11 Oct 2018 09:19:26 +0000 (10:19 +0100)]
Fix interp::m_name resource leak found by Coverity
This commit fixes a resource leak found by Coverity, where interp's
constructor allocated memory for m_name that interp's destructor did
not free.
gdb/ChangeLog:
* interps.h (interp::m_name): Make private and mutable.
* interps.c (interp::~interp): Free m_name.
Jan Beulich [Thu, 11 Oct 2018 07:16:28 +0000 (09:16 +0200)]
x86: add {,V}MOVQ cases to xmmword test
I had overlooked these when putting together the original test.
GDB Administrator [Thu, 11 Oct 2018 00:00:34 +0000 (00:00 +0000)]
Automatic date update in version.in
Sergio Durigan Junior [Mon, 17 Sep 2018 19:58:55 +0000 (15:58 -0400)]
Add parameter to allow enabling/disabling selftests via configure
This is a follow-up of:
https://sourceware.org/ml/gdb-patches/2018-08/msg00347.html
Instead of going throttle and always enabling our selftests (even in
non-development builds), this patch is a bit more conservative and
introduces a configure option ("--enable-unit-tests") that allows the
user to choose whether she wants unit tests in the build or not. Note
that the current behaviour is retained: if no option is provided, GDB
will have selftests included in a development build, and will *not*
have selftests included in a non-development build.
The rationale for having this option is still the same: due to the
many racy testcases and random failures we see when running the GDB
testsuite, it is unfortunately not possible to perform a full test
when one is building a downstream package. As the Fedora GDB
maintainer and one of the Debian GDB uploaders, I feel like this
situation could be improved by, at least, executing our selftests
after the package has been built.
This patch introduces no regressions to our build.
OK?
gdb/ChangeLog:
2018-10-10 Sergio Durigan Junior <sergiodj@redhat.com>
Simon Marchi <simark@simark.ca>
* README (`configure' options): Add documentation for new
"--enable-unit-tests" option.
* acinclude.m4: Include "selftest.m4".
* configure: Regenerate.
* configure.ac: Use "GDB_AC_SELFTEST".
* maint.c (maintenance_selftest): Update message informing
that selftests have been disabled.
(maintenance_info_selftests): Likewise.
* selftest.m4: New file.
gdb/gdbserver/ChangeLog:
2018-10-10 Sergio Durigan Junior <sergiodj@redhat.com>
Simon Marchi <simark@simark.ca>
* acinclude.m4: Include "../selftest.m4".
* configure: Regenerate.
* configure.ac: Use "GDB_AC_SELFTEST".
* configure.srv: Use "$enable_unittests" instead of
"$development" when checking whether unit tests have been
enabled.
* server.c (captured_main): Update message informing that
selftests have been disabled.
gdb/testsuite/ChangeLog:
2018-10-10 Sergio Durigan Junior <sergiodj@redhat.com>
* gdb.gdb/unittest.exp: Update expected message informing that
selftests have been disabled.
* gdb.server/unittest.exp: Likewise.
squash! Add parameter to allow enabling/disabling selftests via configure
Gary Benson [Wed, 10 Oct 2018 14:01:50 +0000 (15:01 +0100)]
Add missing va_end found by Coverity
This commit adds a missing va_end found by Coverity.
gdb/ChangeLog:
* remote.c (remote_target::remote_send_printf): Add
missing va_end found by Coverity.
Markus Metzger [Mon, 24 Sep 2018 09:33:11 +0000 (11:33 +0200)]
btrace: check for indirect jump return in _Unwind_RaiseException
Some versions of _Unwind_RaiseException, e.g. on Fedora 28, use an
indirect jump to return to the exception handler.
This messes up the output of "record function-call-history /c" since the
return is interpreted as cross-function goto. It had been detected by
gdb.btrace/exception.exp.
Add a heuristic for "_Unwind_*" functions to interpret an indirect jump
that ends in one of our caller functions as return to the first instance
of that function in our call stack.
gdb/
* btrace.c (ftrace_update_function): Add indirect jump heuristic.
Jan Beulich [Wed, 10 Oct 2018 06:41:52 +0000 (08:41 +0200)]
x86: fold Size{16,32,64} template attributes
Only one of them can be set at a time, which means they can be expressed
by a single 2-bit field instead of three 1-bit ones.
Alan Modra [Wed, 10 Oct 2018 02:44:56 +0000 (13:14 +1030)]
HPPA64 .PARISC.unwind entries
.PARISC.unwind has 32-bit addresses in both 32-bit ELF and 64-bit ELF.
Well, strictly speaking, the 32-bit "start" and "end" fields are
segment relative offsets. (The 64-bit ABI says so, while the 32-bit
ABI says they are addresses but it appears they are segment relative
offsets in practice. Likely the 32-bit ABI lacks an update.)
* readelf.c (hppa_process_unwind): Don't use eh_addr_size to
calculate number of entries.
(slurp_hppa_unwind_table): Don't use eh_addr_size here either.
Alan Modra [Wed, 10 Oct 2018 01:47:54 +0000 (12:17 +1030)]
S12Z: Set eh_addr_size to 4
* objdump.c (dump_dwarf): Set s12z eh_addr_size to 4.
GDB Administrator [Wed, 10 Oct 2018 00:00:45 +0000 (00:00 +0000)]
Automatic date update in version.in
Tom Tromey [Tue, 9 Oct 2018 19:57:10 +0000 (13:57 -0600)]
Make @pxref for Inferior.architecture point to gdb.Frame documentation
This fixes he @pxref in Inferior.architecture to point to the "Frames
In Python" node, as originally intended; somewhat reverting an earlier
build fix. The initial patch had typod the "In".
Tested by "make info".
gdb/doc/ChangeLog
2018-10-09 Tom Tromey <tom@tromey.com>
* python.texi (Inferiors In Python): Link to "Frames In Python",
not "Unwinding Frames in Python".
Tom Tromey [Tue, 9 Oct 2018 17:51:33 +0000 (11:51 -0600)]
Disable the undefined behavior sanitizer by default
There have been a few undefined behavior failures reported, and Pedro
suggested that the sanitizer be disabled by default. This patch
implements this.
gdb/ChangeLog
2018-10-09 Tom Tromey <tom@tromey.com>
* configure: Rebuild.
* sanitize.m4 (AM_GDB_UBSAN): Default to no.
* NEWS: Update --enable-ubsan documentation.
gdb/doc/ChangeLog
2018-10-09 Tom Tromey <tom@tromey.com>
* gdb.texinfo (Configure Options): Update --enable-ubsan
documentation.
Sudakshina Das [Wed, 26 Sep 2018 10:04:32 +0000 (11:04 +0100)]
[PATCH, BINUTULS, AARCH64, 9/9] Add SSBS to MSR/MRS
This patch is part of the patch series to add support for ARMv8.5-A
extensions.
(https://developer.arm.com/products/architecture/cpu-architecture/a-profile/exploration-tools)
The encodings can be found in the System Register XML.
This patch adds support for the mitigation for Spectre Variant 4 by
adding the PSTATE bit SSBS which are accessible using MSR and MRS
instructions. Although this is a mandatory addition to the ARMv8.5-A,
it is permitted to be added to any version of the ARMv8 architecture.
This is enabled using the command line option of +ssbs for older
versions.
*** include/ChangeLog ***
2018-10-09 Sudakshina Das <sudi.das@arm.com>
* opcode/aarch64.h (AARCH64_FEATURE_SSBS): New.
(AARCH64_ARCH_V8_5): Add AARCH64_FEATURE_SSBS by default.
*** opcodes/ChangeLog ***
2018-10-09 Sudakshina Das <sudi.das@arm.com>
* aarch64-opc.c (operand_general_constraint_met_p): Add
SSBS in the check for one-bit immediate.
(aarch64_sys_regs): New entry for SSBS.
(aarch64_sys_reg_supported_p): New check for above.
(aarch64_pstatefields): New entry for SSBS.
(aarch64_pstatefield_supported_p): New check for above.
*** gas/ChangeLog ***
2018-10-09 Sudakshina Das <sudi.das@arm.com>
* config/tc-aarch64.c (aarch64_features): Add new "ssbs".
* doc/c-aarch64.texi: Document the same.
* testsuite/gas/aarch64/ssbs-illegal1.d: New test.
* testsuite/gas/aarch64/ssbs-illegal1.l: New test.
* testsuite/gas/aarch64/ssbs-illegal2.d: New test.
* testsuite/gas/aarch64/ssbs-illegal2.l: New test.
* testsuite/gas/aarch64/ssbs.s: New test.
* testsuite/gas/aarch64/ssbs1.d: Test with +ssbs
* testsuite/gas/aarch64/ssbs2.d: Test with armv8.5-a.
Sudakshina Das [Wed, 26 Sep 2018 10:02:28 +0000 (11:02 +0100)]
[PATCH, BINUTILS, AARCH64, 8/9] Add SCXTNUM_ELx and ID_PFR2_EL1 system registers
This patch is part of the patch series to add support for ARMv8.5-A
extensions.
(https://developer.arm.com/products/architecture/cpu-architecture/a-profile/exploration-tools)
The encodings can be found in the System Register XML.
This patch adds the new system registers SCXTNUM_ELx and ID_PFR2_EL1.
*** include/ChangeLog ***
2018-10-09 Sudakshina Das <sudi.das@arm.com>
* opcode/aarch64.h (AARCH64_FEATURE_SCXTNUM): New.
(AARCH64_FEATURE_ID_PFR2): New.
(AARCH64_ARCH_V8_5): Add both by default.
*** opcodes/ChangeLog ***
2018-10-09 Sudakshina Das <sudi.das@arm.com>
* aarch64-opc.c (aarch64_sys_regs): New entries for
scxtnum_el[0,1,2,3,12] and id_pfr2_el1.
(aarch64_sys_reg_supported_p): New checks for above.
*** gas/ChangeLog ***
2018-10-09 Sudakshina Das <sudi.das@arm.com>
* testsuite/gas/aarch64/sysreg-4.s: Test registers
scxtnum_el[0,1,2,3,12] and id_pfr2_el1.
* testsuite/gas/aarch64/sysreg-4.d: Likewise.
* testsuite/gas/aarch64/illegal-sysreg-4.l: Likewise.
Sudakshina Das [Wed, 26 Sep 2018 10:00:49 +0000 (11:00 +0100)]
[PATCH, BINUTILS, AARCH64, 7/9] Add BTI instruction
This patch is part of the patch series to add support for ARMv8.5-A
extensions.
(https://developer.arm.com/products/architecture/cpu-architecture/a-profile/docs/ddi0596/a/a64-base-instructions-alphabetic-order/bti-branch-target-identification)
The Branch Target Identification instructions (BTI) are allocated to
existing HINT space, using HINT numbers 32, 34, 36, 38, such that
bits[7:6] of the instruction identify the compatibility of the BTI
instruction to different branches.
BTI {<targets>}
where <targets> one of the following, specifying which type of
indirection is allowed:
j : Can be a target of any BR Xn isntruction.
c : Can be a target of any BLR Xn and BR {X16|X17}.
jc: Can be a target of any free branch.
A BTI instruction without any <targets> is the strictest of all and
can not be a target of nay free branch.
*** include/ChangeLog ***
2018-10-09 Sudakshina Das <sudi.das@arm.com>
* opcode/aarch64.h (AARCH64_FEATURE_BTI): New.
(AARCH64_ARCH_V8_5): Add AARCH64_FEATURE_BTI by default.
(aarch64_opnd): Add AARCH64_OPND_BTI_TARGET.
(HINT_OPD_CSYNC, HINT_OPD_C, HINT_OPD_J): New macros to
define HINT #imm values.
(HINT_OPD_JC, HINT_OPD_NULL): Likewise.
*** opcodes/ChangeLog ***
2018-10-09 Sudakshina Das <sudi.das@arm.com>
* aarch64-opc.h (HINT_OPD_NOPRINT, HINT_ENCODE): New.
(HINT_FLAG, HINT_VALUE): New macros to encode NO_PRINT flag
with the hint immediate.
* aarch64-opc.c (aarch64_hint_options): New entries for
c, j, jc and default (with HINT_OPD_F_NOPRINT flag) for BTI.
(aarch64_print_operand): Add case for AARCH64_OPND_BTI_TARGET
while checking for HINT_OPD_F_NOPRINT flag.
* aarch64-dis.c (aarch64_ext_hint): Use new HINT_VALUE to
extract value.
* aarch64-tbl.h (aarch64_feature_bti, BTI, BTI_INSN): New.
(aarch64_opcode_table): Add entry for BTI.
(AARCH64_OPERANDS): Add new description for BTI targets.
* aarch64-asm-2.c: Regenerate.
* aarch64-dis-2.c: Regenerate.
* aarch64-opc-2.c: Regenerate.
*** gas/ChangeLog ***
2018-10-09 Sudakshina Das <sudi.das@arm.com>
* config/tc-aarch64.c (parse_bti_operand): New.
(process_omitted_operand): Add case for AARCH64_OPND_BTI_TARGET.
(parse_operands): Likewise.
* testsuite/gas/aarch64/system.d: Update for BTI.
* testsuite/gas/aarch64/bti.s: New.
* testsuite/gas/aarch64/bti.d: New.
* testsuite/gas/aarch64/illegal-bti.d: New.
* testsuite/gas/aarch64/illegal-bti.l: New.
Sudakshina Das [Wed, 26 Sep 2018 09:57:16 +0000 (10:57 +0100)]
[PATCH, BINUTILS, AARCH64, 6/9] Add Random number instructions
This patch is part of the patch series to add support for ARMv8.5-A
extensions.
(https://developer.arm.com/products/architecture/cpu-architecture/a-profile/exploration-tools)
The encodings can be found in the System Register XML.
This patch adds the following:
MSR Xn, RNDR
MSR Xn, RNDRRS
These are optional instructions in ARMv8.5-A and hence the new
+rng is added.
*** include/ChangeLog ***
2018-10-09 Sudakshina Das <sudi.das@arm.com>
* opcode/aarch64.h (AARCH64_FEATURE_RNG): New.
*** opcodes/ChangeLog ***
2018-10-09 Sudakshina Das <sudi.das@arm.com>
* aarch64-opc.c (aarch64_sys_regs): New entries for
rndr and rndrrs.
(aarch64_sys_reg_supported_p): New check for above.
*** gas/ChangeLog ***
2018-10-09 Sudakshina Das <sudi.das@arm.com>
* config/tc-aarch64.c (aarch64_features): New "rng" option.
* doc/c-aarch64.texi: Document the same.
* testsuite/gas/aarch64/sysreg-4.s: Test both instructions.
* testsuite/gas/aarch64/sysreg-4.d: Likewise.
* testsuite/gas/aarch64/illegal-sysreg-4.l: Likewise.
Sudakshina Das [Wed, 26 Sep 2018 09:54:07 +0000 (10:54 +0100)]
[PATCH, BINUTILS, AARCH64, 5/9] Add DC CVADP instruction
This patch is part of the patch series to add support for ARMv8.5-A
extensions.
(https://developer.arm.com/products/architecture/cpu-architecture/a-profile/docs/ddi0596/a/a64-base-instructions-alphabetic-order/dc-data-cache-operation-an-alias-of-sys)
This patch adds the DC CVADP instruction. Since this has a separate
identification mechanism a new feature bit is added.
*** include/ChangeLog ***
2018-10-09 Sudakshina Das <sudi.das@arm.com>
* opcode/aarch64.h (AARCH64_FEATURE_CVADP): New.
*** opcodes/ChangeLog ***
2018-10-09 Sudakshina Das <sudi.das@arm.com>
* aarch64-opc.c (aarch64_sys_regs_dc): New entry for cvadp.
(aarch64_sys_ins_reg_supported_p): New check for above.
*** gas/ChangeLog ***
2018-10-09 Sudakshina Das <sudi.das@arm.com>
* testsuite/gas/aarch64/sysreg-4.s: Test instruction.
* testsuite/gas/aarch64/sysreg-4.d: Likewise.
* testsuite/gas/aarch64/illegal-sysreg-4.l: Likewise.
Sudakshina Das [Wed, 26 Sep 2018 09:52:51 +0000 (10:52 +0100)]
[PATCH, BINUTILS, AARCH64, 4/9] Add Execution and Data Restriction instructions
This patch is part of the patch series to add support for ARMv8.5-A
extensions.
(https://developer.arm.com/products/architecture/cpu-architecture/a-profile/docs/ddi0596/a/a64-base-instructions-alphabetic-order)
This patch adds the prediction restriction instructions (that is, cfp,
dvp, cpp). These instructions are retrospectively made optional for
all versions of the architecture from ARMv8.0 to ARMv8.4 and is
mandatory from ARMv8.5. Hence adding a new +predres which can be used
by the older architectures.
*** include/ChangeLog ***
2018-10-09 Sudakshina Das <sudi.das@arm.com>
* opcode/aarch64.h (AARCH64_FEATURE_PREDRES): New.
(AARCH64_ARCH_V8_5): Add AARCH64_FEATURE_PREDRES by default.
(aarch64_opnd): Add AARCH64_OPND_SYSREG_SR.
(aarch64_sys_regs_sr): Declare new table.
*** opcodes/ChangeLog ***
2018-10-09 Sudakshina Das <sudi.das@arm.com>
* aarch64-dis.c (aarch64_ext_sysins_op): Add case for
AARCH64_OPND_SYSREG_SR.
* aarch64-opc.c (aarch64_print_operand): Likewise.
(aarch64_sys_regs_sr): Define table.
(aarch64_sys_ins_reg_supported_p): Check for RCTX with
AARCH64_FEATURE_PREDRES.
* aarch64-tbl.h (aarch64_feature_predres): New.
(PREDRES, PREDRES_INSN): New.
(aarch64_opcode_table): Add entries for cfp, dvp and cpp.
(AARCH64_OPERANDS): Add new description for SYSREG_SR.
* aarch64-asm-2.c: Regenerate.
* aarch64-dis-2.c: Regenerate.
* aarch64-opc-2.c: Regenerate.
*** gas/ChangeLog ***
2018-10-09 Sudakshina Das <sudi.das@arm.com>
* config/tc-aarch64.c (aarch64_sys_regs_sr_hsh): New.
(parse_operands): Add entry for AARCH64_OPND_SYSREG_SR.
(md_begin): Allocate and initialize aarch64_sys_regs_sr_hsh
with aarch64_sys_regs_sr.
(aarch64_features): Add new "predres" option for older
architectures.
* doc/c-aarch64.texi: Document the same.
* testsuite/gas/aarch64/sysreg-4.s: New.
* testsuite/gas/aarch64/sysreg-4.d: New.
* testsuite/gas/aarch64/illegal-sysreg-4.d: New.
* testsuite/gas/aarch64/illegal-sysreg-4.l: New.
* testsuite/gas/aarch64/predres.s: New.
* testsuite/gas/aarch64/predres.d: New.
Sudakshina Das [Wed, 26 Sep 2018 09:47:40 +0000 (10:47 +0100)]
[PATCH, BINUTILS, AARCH64, 3/9] Add instruction SB for ARMv8.5-A
This patch is part of the patch series to add support for ARMv8.5-A
extensions.
(https://developer.arm.com/products/architecture/cpu-architecture/a-profile/docs/ddi0596/a/a64-base-instructions-alphabetic-order)
This instruction is retrospectively made optional for all versions of
the architecture from ARMv8.0 to ARMv8.4 and is mandatory from
ARMv8.5. Hence a new command line option of "+sb" is added for older
architectures.
*** include/ChangeLog ***
2018-10-09 Sudakshina Das <sudi.das@arm.com>
* opcode/aarch64.h (AARCH64_FEATURE_SB): New.
(AARCH64_ARCH_V8_5): Add AARCH64_FEATURE_SB by default.
*** opcodes/ChangeLog ***
2018-10-09 Sudakshina Das <sudi.das@arm.com>
* aarch64-tbl.h (aarch64_feature_sb): New.
(SB, SB_INSN): New.
(aarch64_opcode_table): Add entry for sb.
* aarch64-asm-2.c: Regenerate.
* aarch64-dis-2.c: Regenerate.
* aarch64-opc-2.c: Regenerate.
*** gas/ChangeLog ***
2018-10-09 Sudakshina Das <sudi.das@arm.com>
* config/tc-aarch64.c (aarch64_features): Add new "sb" option
for older architectures.
* doc/c-aarch64.texi: Document the same.
* testsuite/gas/aarch64/sb.s: New.
* testsuite/gas/aarch64/sb.d: New.
Sudakshina Das [Wed, 26 Sep 2018 09:45:35 +0000 (10:45 +0100)]
[PATCH, BINUTILS, AARCH64, 2/9] Add Data procoessing instructions for ARMv8.5-A
This patch is part of the patch series to add support for ARMv8.5-A
extensions.
(https://developer.arm.com/products/architecture/cpu-architecture/a-profile/docs/ddi0596/a/a64-base-instructions-alphabetic-order)
This patch adds the data processing instructions that are new to
ARMv8.5-A.
1) There are 2 instructions: xaflag, axflag, that are added to
manipulate the states of the flag and are used to convert between the
Arm representation and the fcmp representation.
2) The other instructions are rounding instructions which have 8
versions based on whether the floating-point number is a
Single-Precision or Double-Precision number, whether the target
integer is a 32-bit or 64-bit integer and whether the rounding mode is
the ambient rounding mode or to zero. Each of these instruction is
available in both Scalar and Vector forms.
Since both 1) and 2) have separate identification mechanism and it is
permissible that a ARMv8.4 compliant implementation may include any
arbitrary subset of the ARMv8.5 features unless otherwise specified,
new feature bits are added.
*** include/ChangeLog ***
2018-10-09 Sudakshina Das <sudi.das@arm.com>
* opcode/aarch64.h (AARCH64_FEATURE_FLAGMANIP): New.
(AARCH64_FEATURE_FRINTTS): New.
(AARCH64_ARCH_V8_5): Add both by default.
*** opcodes/ChangeLog ***
2018-10-09 Sudakshina Das <sudi.das@arm.com>
* aarch64-tbl.h (aarch64_feature_flagmanip): New.
(aarch64_feature_frintts): New.
(FLAGMANIP, FRINTTS): New.
(aarch64_opcode_table): Add entries for xaflag, axflag
and frint[32,64][x,z] instructions.
* aarch64-asm-2.c: Regenerate.
* aarch64-dis-2.c: Regenerate.
* aarch64-opc-2.c: Regenerate.
*** gas/ChangeLog ***
2018-10-09 Sudakshina Das <sudi.das@arm.com>
* testsuite/gas/aarch64/armv8_5-a-dp.s: New.
* testsuite/gas/aarch64/armv8_5-a-dp.d: New.
Sudakshina Das [Wed, 26 Sep 2018 09:38:59 +0000 (10:38 +0100)]
[PATCH, BINUTILS, AARCH64, 1/9] Add -march=armv8.5-a and related internal feature macros
This patch is part of the patch series to add support for ARMv8.5-A
extensions.
(https://developer.arm.com/products/architecture/cpu-architecture/a-profile/exploration-tools)
This is the first of the patch series and adds -march=armv8.5-a and
other internal feature marcos needed for it.
2018-10-09 Sudakshina Das <sudi.das@arm.com>
* config/tc-aarch64.c (aarch64_archs): New entry for armv8.5-a.
* doc/c-aarch64.texi: Add documentation for the same.
*** include/ChnageLog ***
2018-10-09 Sudakshina Das <sudi.das@arm.com>
* opcode/aarch64.h (AARCH64_FEATURE_V8_5): New.
(AARCH64_ARCH_V8_5): New.
*** opcodes/ChangeLog ***
2018-10-09 Sudakshina Das <sudi.das@arm.com>
* aarch64-tbl.h (aarch64_feature_set aarch64_feature_v8_5): New.
(ARMV8_5, V8_5_INSN): New.
Tom de Vries [Thu, 4 Oct 2018 12:10:39 +0000 (14:10 +0200)]
[gdb/testsuite] Fix target_supports_scheduler_locking raciness
When calling gdb_start_cmd, it's the caller's responsibility to wait for gdb
to return to the prompt. In target_supports_scheduler_locking, that's not the
case, and consequently, target_supports_scheduler_locking fails spuriously.
Fix by using runto_main instead.
Build and reg-tested on x86_64-linux.
2018-10-09 Tom de Vries <tdevries@suse.de>
* lib/gdb.exp (target_supports_scheduler_locking): Replace gdb_start_cmd
with runto_main.
Gary Benson [Tue, 9 Oct 2018 13:13:12 +0000 (14:13 +0100)]
Fix buffer overrun found by Coverity
This commit fixes a buffer overrun found by Coverity, where
36 bytes are written into a 24 byte buffer.
gdb/ChangeLog:
* dwarf2read.c (create_dwp_hash_table): Fix buffer overrun
found by Coverity.
Egeyar Bagcioglu [Wed, 3 Oct 2018 21:27:32 +0000 (23:27 +0200)]
Do not place symbols into a discarded .dynsym
Prevents getting an error about dynamic symbols in sections indexed
64K+ when .dynsym is discarded.
* elflink.c (elf_link_output_extsym): Do not place symbols into a
discarded .dynsym.
GDB Administrator [Tue, 9 Oct 2018 00:01:10 +0000 (00:01 +0000)]
Automatic date update in version.in
Tom Tromey [Mon, 8 Oct 2018 22:39:29 +0000 (16:39 -0600)]
Remove unused variables from riscv-fbsd-tdep.c
This removes a couple of unused variables from riscv-fbsd-tdep.c.
This allows a --enable-targets=all build to complete on
x86-64 Fedora 28.
gdb/ChangeLog
2018-10-08 Tom Tromey <tom@tromey.com>
* riscv-fbsd-tdep.c (riscv_fbsd_sigframe_init): Remove unused
variable.
(riscv_fbsd_init_abi): Likewise.
Weimin Pan [Mon, 8 Oct 2018 22:14:11 +0000 (22:14 +0000)]
Fix the [-Werror=shadow=local] warning
Rename local variable in value_struct_elt_for_reference()
to work around the shadowing a previous local warning.
John Baldwin [Mon, 8 Oct 2018 21:47:34 +0000 (14:47 -0700)]
Add native target for FreeBSD/riscv.
gdb/ChangeLog:
* Makefile.in (ALLDEPFILES): Add riscv-fbsd-nat.c.
* NEWS: Mention new FreeBSD/riscv native configuration.
* configure.host: Add riscv*-*-freebsd*.
* configure.nat: Likewise.
* riscv-fbsd-nat.c: New file.
gdb/doc/ChangeLog:
* gdb.texinfo (Contributors): Add SRI International and University
of Cambridge for FreeBSD/riscv.
John Baldwin [Mon, 8 Oct 2018 21:47:34 +0000 (14:47 -0700)]
Add FreeBSD/riscv architecture.
Support for collecting and supplying general purpose and floating
point register sets is provided along with signal frame unwinding.
FreeBSD only supports RV64 currently, so while some provision is made
for RV32 in the general-purpose register set, the changes have only
been tested on RV64.
gdb/ChangeLog:
* Makefile.in (ALL_TARGET_OBS): Add riscv-fbsd-tdep.o.
(HFILES_NO_SRCDIR): Add riscv-fbsd-tdep.h.
(ALLDEPFILES): Add riscv-fbsd-tdep.c.
* NEWS: Mention new FreeBSD/riscv target.
* configure.tgt: Add riscv*-*-freebsd*.
* riscv-fbsd-tdep.c: New file.
* riscv-fbsd-tdep.h: New file.
John Baldwin [Mon, 8 Oct 2018 21:47:33 +0000 (14:47 -0700)]
Add a helper function to trad_frame to support register cache maps.
Currently, signal frame handlers require explicitly coded calls to
trad_frame_set_reg_addr() to describe the location of saved registers
within a signal frame. This change permits the regcache_map_entry
arrays used with regcache::supply_regset and regcache::collect_regset
to be used to describe a block of saved registers given an initial
address for the register block.
Some systems use the same layout for registers in core dump notes,
native register sets with ptrace(), and the register contexts saved in
signal frames. On these systems, a single register map can now be
used to describe the layout of registers in all three places.
If a register map entry's size does not match the native size of a
register, try to match the semantics used by
regcache::transfer_regset. If a register slot is too large, assume
that the register's value is stored in the first N bytes and ignore
the remaning bytes. If the register slot is smaller than the
register, assume the slot holds the low N bytes of the register's
value. Read these low N bytes from the target and zero-extend them to
generate a register value.
While here, document the semantics for both regcache::transfer_regset
and trad_frame with respect to register slot's whose size does not
match the register's size.
gdb/ChangeLog:
* regcache.h (struct regcache_map_entry): Note that this type can
be used with traditional frame caches.
* trad-frame.c (trad_frame_set_reg_regmap): New.
* trad-frame.h (trad_frame_set_reg_regmap): New.
Weimin Pan [Mon, 8 Oct 2018 21:16:59 +0000 (21:16 +0000)]
Finding data member in virtual base class
This patch fixes the original problem - printing member in a virtual base,
using various expressions, do not yield the same value. Simple test case
below demonstrates the problem:
% cat t.cc
struct base { int i; };
typedef base tbase;
struct derived: virtual tbase { void func() { } };
int main() { derived().func(); }
% g++ -g t.cc
% gdb a.out
(gdb) break derived::func
(gdb) run
(gdb) p i
$1 = 0
(gdb) p base::i
$3 = 0
(gdb) p derived::i
$4 = 4196392
To fix the problem, add function get_baseclass_offset() which searches
recursively for the base class along the class hierarchy. If the base
is virtual, it uses "vptr" in virtual class object, which indexes to
its derived class's vtable, to get and returns the baseclass offset.
If the base is non-virtual, it returns the accumulated offset of its
parent classes. The offset is then added to the address of the class
object to access its member in value_struct_elt_for_reference().
Tamar Christina [Mon, 8 Oct 2018 12:33:42 +0000 (13:33 +0100)]
AArch64: Replace C initializers with memset
Clang doesn't accept {0} as a valid C struct initializer under their implementation
of -Wmissing-field-initializers. This makes using C initializers a bit tricky.
Instead I'm changing the code to use memset instead, which at least GCC inlines and
generates the same code for. This also seems to be the idiom used in binutils for
most targets.
opcodes/
* aarch64-opc.c (verify_constraints): Use memset instead of {0}.
H.J. Lu [Mon, 8 Oct 2018 12:14:02 +0000 (05:14 -0700)]
x86: Don't add GNU_PROPERTY_X86_FEATURE_2_NEEDED for -z separate-code
With
commit
64029e93683a266c38d19789e780f3748bd6a188
Author: Alan Modra <amodra@gmail.com>
Date: Fri Oct 5 11:40:54 2018 +0930
Separate header PT_LOAD for -z separate-code
there is no need to add a GNU_PROPERTY_X86_ISA_1_USED note to force
program header in in non-code PT_LOAD segment when -z separate-code
is used.
bfd/
PR ld/23428
* elfxx-x86.c (_bfd_x86_elf_link_setup_gnu_properties): Don't
add GNU_PROPERTY_X86_FEATURE_2_NEEDED to force program header
in non-code PT_LOAD segment.
ld/
PR ld/23428
* testsuite/ld-i386/property-x86-4a.d: Updated.
* testsuite/ld-x86-64/property-x86-4a-x32.d: Likewise.
* testsuite/ld-x86-64/property-x86-4a.d: Likewise.