libstdc++: Fix whitespace in ChangeLog-2019

From-SVN: r280064

Save typespec for empty array constructor.

2020-01-09  Thomas Koenig  <tkoenig@gcc.gnu.org>

PR fortran/65428
* array.c (empty_constructor): New variable.
(empty_ts): New variable.
(expand_constructor): Save typespec in empty_ts.
Unset empty_constructor if there is an element.
(gfc_expand_constructor): Initialize empty_constructor
and empty_ts.  If there was no explicit constructor
type and the constructor is empty, take the type from
empty_ts.

2020-01-09  Thomas Koenig  <tkoenig@gcc.gnu.org>

PR fortran/65428
* gfortran.dg/zero_sized_11.f90: New test.

From-SVN: r280063

Remove inline debug markers if support not enabled on accelerator compiler

2020-01-09  Kwok Cheung Yeung  <kcy@codesourcery.com>

gcc/
* lto-streamer-in.c (input_function): Remove streamed-in inline debug
markers if debug_inline_points is false.

From-SVN: r280062

libstdc++: Fix undefined behaviour in random dist serialization (PR93205)

The deserialization functions for random number distributions fail to
check the stream state before using the extracted values. In some cases
this leads to using indeterminate values to resize a vector, and then
filling that vector with indeterminate values.

No values that affect control flow should be used without checking that a
good value was read from the stream.

Additionally, where reasonable to do so, defer modifying any state in
the distribution until all values have been successfully read, to avoid
modifying some of the distribution's parameters and leaving others
unchanged.

PR libstdc++/93205
* include/bits/random.h (operator>>): Check stream operation succeeds.
* include/bits/random.tcc (operator<<): Remove redundant __ostream_type
typedefs.
(operator>>): Remove redundant __istream_type typedefs. Check stream
operations succeed.
(__extract_params): New function to fill a vector from a stream.
* testsuite/26_numerics/random/pr60037-neg.cc: Adjust dg-error line.

From-SVN: r280061

[AArch64] Add support for the SVE2 ACLE

This patch adds support for the SVE2 ACLE,  The implementation
and tests follow the same pattern as the exiting SVE ACLE support.

2020-01-09  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
* config.gcc (aarch64*-*-*): Add aarch64-sve-builtins-sve2.o to
extra_objs.
* config/aarch64/t-aarch64 (aarch64-sve-builtins.o): Depend on
aarch64-sve-builtins-base.def, aarch64-sve-builtins-sve2.def and
aarch64-sve-builtins-sve2.h.
(aarch64-sve-builtins-sve2.o): New rule.
* config/aarch64/aarch64.h (AARCH64_ISA_SVE2_AES): New macro.
(AARCH64_ISA_SVE2_BITPERM, AARCH64_ISA_SVE2_SHA3): Likewise.
(AARCH64_ISA_SVE2_SM4, TARGET_SVE2_AES, TARGET_SVE2_BITPERM): Likewise.
(TARGET_SVE2_SHA, TARGET_SVE2_SM4): Likewise.
* config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Handle
TARGET_SVE2_AES, TARGET_SVE2_BITPERM, TARGET_SVE2_SHA3 and
TARGET_SVE2_SM4.
* config/aarch64/aarch64-sve.md: Update comments with SVE2
instructions that are handled here.
(@cond_asrd<mode>): Generalize to...
(@cond_<SVE_INT_SHIFT_IMM:sve_int_op><mode>): ...this.
(*cond_asrd<mode>_2): Generalize to...
(*cond_<SVE_INT_SHIFT_IMM:sve_int_op><mode>_2): ...this.
(*cond_asrd<mode>_z): Generalize to...
(*cond_<SVE_INT_SHIFT_IMM:sve_int_op><mode>_z): ...this.
* config/aarch64/aarch64.md (UNSPEC_LDNT1_GATHER): New unspec.
(UNSPEC_STNT1_SCATTER, UNSPEC_WHILEGE, UNSPEC_WHILEGT): Likewise.
(UNSPEC_WHILEHI, UNSPEC_WHILEHS): Likewise.
* config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): New
pattern.
(@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode><SVE_PARTIAL_I:mode>)
(@aarch64_scatter_stnt<mode>): Likewise.
(@aarch64_scatter_stnt_<SVE_FULL_SDI:mode><SVE_PARTIAL_I:mode>)
(@aarch64_mul_lane_<mode>): Likewise.
(@aarch64_sve_suqadd<mode>_const): Likewise.
(*<sur>h<addsub><mode>): Generalize to...
(@aarch64_pred_<SVE2_COND_INT_BINARY_REV:sve_int_op><mode>): ...this
new pattern.
(@cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>): New expander.
(*cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>_2): New pattern.
(*cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>_3): Likewise.
(*cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>_any): Likewise.
(*cond_<SVE2_COND_INT_BINARY_NOREV:sve_int_op><mode>_z): Likewise.
(@aarch64_sve_<SVE2_INT_BINARY:sve_int_op><mode>):: Likewise.
(@aarch64_sve_<SVE2_INT_BINARY:sve_int_op>_lane_<mode>): Likewise.
(@aarch64_pred_<SVE2_COND_INT_SHIFT:sve_int_op><mode>): Likewise.
(@cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>): New expander.
(*cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>_2): New pattern.
(*cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>_3): Likewise.
(*cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>_any): Likewise.
(@aarch64_sve_<SVE2_INT_TERNARY:sve_int_op><mode>): Likewise.
(@aarch64_sve_<SVE2_INT_TERNARY_LANE:sve_int_op>_lane_<mode>)
(@aarch64_sve_add_mul_lane_<mode>): Likewise.
(@aarch64_sve_sub_mul_lane_<mode>): Likewise.
(@aarch64_sve2_xar<mode>): Likewise.
(@aarch64_sve2_bcax<mode>): Likewise.
(*aarch64_sve2_eor3<mode>): Rename to...
(@aarch64_sve2_eor3<mode>): ...this.
(@aarch64_sve2_bsl<mode>): New expander.
(@aarch64_sve2_nbsl<mode>): Likewise.
(@aarch64_sve2_bsl1n<mode>): Likewise.
(@aarch64_sve2_bsl2n<mode>): Likewise.
(@aarch64_sve_add_<SHIFTRT:sve_int_op><mode>): Likewise.
(*aarch64_sve2_sra<mode>): Add MOVPRFX support.
(@aarch64_sve_add_<VRSHR_N:sve_int_op><mode>): New pattern.
(@aarch64_sve_<SVE2_INT_SHIFT_INSERT:sve_int_op><mode>): Likewise.
(@aarch64_sve2_<USMAX:su>aba<mode>): New expander.
(*aarch64_sve2_<USMAX:su>aba<mode>): New pattern.
(@aarch64_sve_<SVE2_INT_BINARY_WIDE:sve_int_op><mode>): Likewise.
(<su>mull<bt><Vwide>): Generalize to...
(@aarch64_sve_<SVE2_INT_BINARY_LONG:sve_int_op><mode>): ...this new
pattern.
(@aarch64_sve_<SVE2_INT_BINARY_LONG_lANE:sve_int_op>_lane_<mode>)
(@aarch64_sve_<SVE2_INT_SHIFT_IMM_LONG:sve_int_op><mode>)
(@aarch64_sve_add_<SVE2_INT_ADD_BINARY_LONG:sve_int_op><mode>)
(@aarch64_sve_add_<SVE2_INT_ADD_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
(@aarch64_sve_qadd_<SVE2_INT_QADD_BINARY_LONG:sve_int_op><mode>)
(@aarch64_sve_qadd_<SVE2_INT_QADD_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
(@aarch64_sve_sub_<SVE2_INT_SUB_BINARY_LONG:sve_int_op><mode>)
(@aarch64_sve_sub_<SVE2_INT_SUB_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
(@aarch64_sve_qsub_<SVE2_INT_QSUB_BINARY_LONG:sve_int_op><mode>)
(@aarch64_sve_qsub_<SVE2_INT_QSUB_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
(@aarch64_sve_<SVE2_FP_TERNARY_LONG:sve_fp_op><mode>): New patterns.
(@aarch64_<SVE2_FP_TERNARY_LONG_LANE:sve_fp_op>_lane_<mode>)
(@aarch64_sve_<SVE2_INT_UNARY_NARROWB:sve_int_op><mode>): Likewise.
(@aarch64_sve_<SVE2_INT_UNARY_NARROWT:sve_int_op><mode>): Likewise.
(@aarch64_sve_<SVE2_INT_BINARY_NARROWB:sve_int_op><mode>): Likewise.
(@aarch64_sve_<SVE2_INT_BINARY_NARROWT:sve_int_op><mode>): Likewise.
(<SHRNB:r>shrnb<mode>): Generalize to...
(@aarch64_sve_<SVE2_INT_SHIFT_IMM_NARROWB:sve_int_op><mode>): ...this
new pattern.
(<SHRNT:r>shrnt<mode>): Generalize to...
(@aarch64_sve_<SVE2_INT_SHIFT_IMM_NARROWT:sve_int_op><mode>): ...this
new pattern.
(@aarch64_pred_<SVE2_INT_BINARY_PAIR:sve_int_op><mode>): New pattern.
(@aarch64_pred_<SVE2_FP_BINARY_PAIR:sve_fp_op><mode>): Likewise.
(@cond_<SVE2_INT_BINARY_PAIR_LONG:sve_int_op><mode>): New expander.
(*cond_<SVE2_INT_BINARY_PAIR_LONG:sve_int_op><mode>_2): New pattern.
(*cond_<SVE2_INT_BINARY_PAIR_LONG:sve_int_op><mode>_z): Likewise.
(@aarch64_sve_<SVE2_INT_CADD:optab><mode>): Likewise.
(@aarch64_sve_<SVE2_INT_CMLA:optab><mode>): Likewise.
(@aarch64_<SVE2_INT_CMLA:optab>_lane_<mode>): Likewise.
(@aarch64_sve_<SVE2_INT_CDOT:optab><mode>): Likewise.
(@aarch64_<SVE2_INT_CDOT:optab>_lane_<mode>): Likewise.
(@aarch64_pred_<SVE2_COND_FP_UNARY_LONG:sve_fp_op><mode>): Likewise.
(@cond_<SVE2_COND_FP_UNARY_LONG:sve_fp_op><mode>): New expander.
(*cond_<SVE2_COND_FP_UNARY_LONG:sve_fp_op><mode>): New pattern.
(@aarch64_sve2_cvtnt<mode>): Likewise.
(@aarch64_pred_<SVE2_COND_FP_UNARY_NARROWB:sve_fp_op><mode>): Likewise.
(@cond_<SVE2_COND_FP_UNARY_NARROWB:sve_fp_op><mode>): New expander.
(*cond_<SVE2_COND_FP_UNARY_NARROWB:sve_fp_op><mode>_any): New pattern.
(@aarch64_sve2_cvtxnt<mode>): Likewise.
(@aarch64_pred_<SVE2_U32_UNARY:sve_int_op><mode>): Likewise.
(@cond_<SVE2_U32_UNARY:sve_int_op><mode>): New expander.
(*cond_<SVE2_U32_UNARY:sve_int_op><mode>): New pattern.
(@aarch64_pred_<SVE2_COND_INT_UNARY_FP:sve_fp_op><mode>): Likewise.
(@cond_<SVE2_COND_INT_UNARY_FP:sve_fp_op><mode>): New expander.
(*cond_<SVE2_COND_INT_UNARY_FP:sve_fp_op><mode>): New pattern.
(@aarch64_sve2_pmul<mode>): Likewise.
(@aarch64_sve_<SVE2_PMULL:optab><mode>): Likewise.
(@aarch64_sve_<SVE2_PMULL_PAIR:optab><mode>): Likewise.
(@aarch64_sve2_tbl2<mode>): Likewise.
(@aarch64_sve2_tbx<mode>): Likewise.
(@aarch64_sve_<SVE2_INT_BITPERM:sve_int_op><mode>): Likewise.
(@aarch64_sve2_histcnt<mode>): Likewise.
(@aarch64_sve2_histseg<mode>): Likewise.
(@aarch64_pred_<SVE2_MATCH:sve_int_op><mode>): Likewise.
(*aarch64_pred_<SVE2_MATCH:sve_int_op><mode>_cc): Likewise.
(*aarch64_pred_<SVE2_MATCH:sve_int_op><mode>_ptest): Likewise.
(aarch64_sve2_aes<CRYPTO_AES:aes_op>): Likewise.
(aarch64_sve2_aes<CRYPTO_AESMC:aesmc_op>): Likewise.
(*aarch64_sve2_aese_fused, *aarch64_sve2_aesd_fused): Likewise.
(aarch64_sve2_rax1, aarch64_sve2_sm4e, aarch64_sve2_sm4ekey): Likewise.
(<su>mulh<r>s<mode>3): Update after above pattern name changes.
* config/aarch64/iterators.md (VNx16QI_ONLY, VNx4SF_ONLY)
(SVE_STRUCT2, SVE_FULL_BHI, SVE_FULL_HSI, SVE_FULL_HDI)
(SVE2_PMULL_PAIR_I): New mode iterators.
(UNSPEC_ADCLB, UNSPEC_ADCLT, UNSPEC_ADDHNB, UNSPEC_ADDHNT, UNSPEC_BDEP)
(UNSPEC_BEXT, UNSPEC_BGRP, UNSPEC_CADD90, UNSPEC_CADD270, UNSPEC_CDOT)
(UNSPEC_CDOT90, UNSPEC_CDOT180, UNSPEC_CDOT270, UNSPEC_CMLA)
(UNSPEC_CMLA90, UNSPEC_CMLA180, UNSPEC_CMLA270, UNSPEC_COND_FCVTLT)
(UNSPEC_COND_FCVTNT, UNSPEC_COND_FCVTX, UNSPEC_COND_FCVTXNT)
(UNSPEC_COND_FLOGB, UNSPEC_EORBT, UNSPEC_EORTB, UNSPEC_FADDP)
(UNSPEC_FMAXP, UNSPEC_FMAXNMP, UNSPEC_FMLALB, UNSPEC_FMLALT)
(UNSPEC_FMLSLB, UNSPEC_FMLSLT, UNSPEC_FMINP, UNSPEC_FMINNMP)
(UNSPEC_HISTCNT, UNSPEC_HISTSEG, UNSPEC_MATCH, UNSPEC_NMATCH)
(UNSPEC_PMULLB, UNSPEC_PMULLB_PAIR, UNSPEC_PMULLT, UNSPEC_PMULLT_PAIR)
(UNSPEC_RADDHNB, UNSPEC_RADDHNT, UNSPEC_RSUBHNB, UNSPEC_RSUBHNT)
(UNSPEC_SLI, UNSPEC_SRI, UNSPEC_SABDLB, UNSPEC_SABDLT, UNSPEC_SADDLB)
(UNSPEC_SADDLBT, UNSPEC_SADDLT, UNSPEC_SADDWB, UNSPEC_SADDWT)
(UNSPEC_SBCLB, UNSPEC_SBCLT, UNSPEC_SMAXP, UNSPEC_SMINP)
(UNSPEC_SQCADD90, UNSPEC_SQCADD270, UNSPEC_SQDMULLB, UNSPEC_SQDMULLBT)
(UNSPEC_SQDMULLT, UNSPEC_SQRDCMLAH, UNSPEC_SQRDCMLAH90)
(UNSPEC_SQRDCMLAH180, UNSPEC_SQRDCMLAH270, UNSPEC_SQRSHRNB)
(UNSPEC_SQRSHRNT, UNSPEC_SQRSHRUNB, UNSPEC_SQRSHRUNT, UNSPEC_SQSHRNB)
(UNSPEC_SQSHRNT, UNSPEC_SQSHRUNB, UNSPEC_SQSHRUNT, UNSPEC_SQXTNB)
(UNSPEC_SQXTNT, UNSPEC_SQXTUNB, UNSPEC_SQXTUNT, UNSPEC_SSHLLB)
(UNSPEC_SSHLLT, UNSPEC_SSUBLB, UNSPEC_SSUBLBT, UNSPEC_SSUBLT)
(UNSPEC_SSUBLTB, UNSPEC_SSUBWB, UNSPEC_SSUBWT, UNSPEC_SUBHNB)
(UNSPEC_SUBHNT, UNSPEC_TBL2, UNSPEC_UABDLB, UNSPEC_UABDLT)
(UNSPEC_UADDLB, UNSPEC_UADDLT, UNSPEC_UADDWB, UNSPEC_UADDWT)
(UNSPEC_UMAXP, UNSPEC_UMINP, UNSPEC_UQRSHRNB, UNSPEC_UQRSHRNT)
(UNSPEC_UQSHRNB, UNSPEC_UQSHRNT, UNSPEC_UQXTNB, UNSPEC_UQXTNT)
(UNSPEC_USHLLB, UNSPEC_USHLLT, UNSPEC_USUBLB, UNSPEC_USUBLT)
(UNSPEC_USUBWB, UNSPEC_USUBWT): New unspecs.
(UNSPEC_SMULLB, UNSPEC_SMULLT, UNSPEC_UMULLB, UNSPEC_UMULLT)
(UNSPEC_SMULHS, UNSPEC_SMULHRS, UNSPEC_UMULHS, UNSPEC_UMULHRS)
(UNSPEC_RSHRNB, UNSPEC_RSHRNT, UNSPEC_SHRNB, UNSPEC_SHRNT): Move
further down file.
(VNARROW, Ventype): New mode attributes.
(Vewtype): Handle VNx2DI.  Fix typo in comment.
(VDOUBLE): New mode attribute.
(sve_lane_con): Handle VNx8HI.
(SVE_INT_UNARY): Include ss_abs and ss_neg for TARGET_SVE2.
(SVE_INT_BINARY): Likewise ss_plus, us_plus, ss_minus and us_minus.
(sve_int_op, sve_int_op_rev): Handle the above codes.
(sve_pred_int_rhs2_operand): Likewise.
(MULLBT, SHRNB, SHRNT): Delete.
(SVE_INT_SHIFT_IMM): New int iterator.
(SVE_WHILE): Add UNSPEC_WHILEGE, UNSPEC_WHILEGT, UNSPEC_WHILEHI
and UNSPEC_WHILEHS for TARGET_SVE2.
(SVE2_U32_UNARY, SVE2_INT_UNARY_NARROWB, SVE2_INT_UNARY_NARROWT)
(SVE2_INT_BINARY, SVE2_INT_BINARY_LANE, SVE2_INT_BINARY_LONG)
(SVE2_INT_BINARY_LONG_LANE, SVE2_INT_BINARY_NARROWB)
(SVE2_INT_BINARY_NARROWT, SVE2_INT_BINARY_PAIR, SVE2_FP_BINARY_PAIR)
(SVE2_INT_BINARY_PAIR_LONG, SVE2_INT_BINARY_WIDE): New int iterators.
(SVE2_INT_SHIFT_IMM_LONG, SVE2_INT_SHIFT_IMM_NARROWB): Likewise.
(SVE2_INT_SHIFT_IMM_NARROWT, SVE2_INT_SHIFT_INSERT, SVE2_INT_CADD)
(SVE2_INT_BITPERM, SVE2_INT_TERNARY, SVE2_INT_TERNARY_LANE): Likewise.
(SVE2_FP_TERNARY_LONG, SVE2_FP_TERNARY_LONG_LANE, SVE2_INT_CMLA)
(SVE2_INT_CDOT, SVE2_INT_ADD_BINARY_LONG, SVE2_INT_QADD_BINARY_LONG)
(SVE2_INT_SUB_BINARY_LONG, SVE2_INT_QSUB_BINARY_LONG): Likewise.
(SVE2_INT_ADD_BINARY_LONG_LANE, SVE2_INT_QADD_BINARY_LONG_LANE)
(SVE2_INT_SUB_BINARY_LONG_LANE, SVE2_INT_QSUB_BINARY_LONG_LANE)
(SVE2_COND_INT_UNARY_FP, SVE2_COND_FP_UNARY_LONG): Likewise.
(SVE2_COND_FP_UNARY_NARROWB, SVE2_COND_INT_BINARY): Likewise.
(SVE2_COND_INT_BINARY_NOREV, SVE2_COND_INT_BINARY_REV): Likewise.
(SVE2_COND_INT_SHIFT, SVE2_MATCH, SVE2_PMULL): Likewise.
(optab): Handle the new unspecs.
(su, r): Remove entries for UNSPEC_SHRNB, UNSPEC_SHRNT, UNSPEC_RSHRNB
and UNSPEC_RSHRNT.
(lr): Handle the new unspecs.
(bt): Delete.
(cmp_op, while_optab_cmp, sve_int_op): Handle the new unspecs.
(sve_int_op_rev, sve_int_add_op, sve_int_qadd_op, sve_int_sub_op)
(sve_int_qsub_op): New int attributes.
(sve_fp_op, rot): Handle the new unspecs.
* config/aarch64/aarch64-sve-builtins.h
(function_resolver::require_matching_pointer_type): Declare.
(function_resolver::resolve_unary): Add an optional boolean argument.
(function_resolver::finish_opt_n_resolution): Add an optional
type_suffix_index argument.
(gimple_folder::redirect_call): Declare.
(gimple_expander::prepare_gather_address_operands): Add an optional
bool parameter.
* config/aarch64/aarch64-sve-builtins.cc: Include
aarch64-sve-builtins-sve2.h.
(TYPES_b_unsigned, TYPES_b_integer, TYPES_bh_integer): New macros.
(TYPES_bs_unsigned, TYPES_hs_signed, TYPES_hs_integer): Likewise.
(TYPES_hd_unsigned, TYPES_hsd_signed): Likewise.
(TYPES_hsd_integer): Use TYPES_hsd_signed.
(TYPES_s_float_hsd_integer, TYPES_s_float_sd_integer): New macros.
(TYPES_s_unsigned): Likewise.
(TYPES_s_integer): Use TYPES_s_unsigned.
(TYPES_sd_signed, TYPES_sd_unsigned): New macros.
(TYPES_sd_integer): Use them.
(TYPES_d_unsigned): New macro.
(TYPES_d_integer): Use it.
(TYPES_d_data, TYPES_cvt_long, TYPES_cvt_narrow_s): New macros.
(TYPES_cvt_narrow): Likewise.
(DEF_SVE_TYPES_ARRAY): Include the new types macros above.
(preds_mx): New variable.
(function_builder::add_overloaded_function): Allow the new feature
set to be more restrictive than the original one.
(function_resolver::infer_pointer_type): Remove qualifiers from
the pointer type before printing it.
(function_resolver::require_matching_pointer_type): New function.
(function_resolver::resolve_sv_displacement): Handle functions
that don't support 32-bit vector indices or svint32_t vector offsets.
(function_resolver::finish_opt_n_resolution): Take the inferred type
as a separate argument.
(function_resolver::resolve_unary): Optionally treat all forms in
the same way as normal merging functions.
(gimple_folder::redirect_call): New function.
(function_expander::prepare_gather_address_operands): Add an argument
that says whether scaled forms are available.  If they aren't,
handle scaling of vector indices and don't add the extension and
scaling operands.
(function_expander::map_to_unspecs): If aarch64_sve isn't available,
fall back to using cond_* instead.
* config/aarch64/aarch64-sve-builtins-functions.h (rtx_code_function):
Split out the member variables into...
(rtx_code_function_base): ...this new base class.
(rtx_code_function_rotated): Inherit rtx_code_function_base.
(unspec_based_function): Split out the member variables into...
(unspec_based_function_base): ...this new base class.
(unspec_based_function_rotated): Inherit unspec_based_function_base.
(unspec_based_function_exact_insn): New class.
(unspec_based_add_function, unspec_based_add_lane_function)
(unspec_based_lane_function, unspec_based_pred_function)
(unspec_based_qadd_function, unspec_based_qadd_lane_function)
(unspec_based_qsub_function, unspec_based_qsub_lane_function)
(unspec_based_sub_function, unspec_based_sub_lane_function): New
typedefs.
(unspec_based_fused_function): New class.
(unspec_based_mla_function, unspec_based_mls_function): New typedefs.
(unspec_based_fused_lane_function): New class.
(unspec_based_mla_lane_function, unspec_based_mls_lane_function): New
typedefs.
(CODE_FOR_MODE1): New macro.
(fixed_insn_function): New class.
(while_comparison): Likewise.
* config/aarch64/aarch64-sve-builtins-shapes.h (binary_long_lane)
(binary_long_opt_n, binary_narrowb_opt_n, binary_narrowt_opt_n)
(binary_to_uint, binary_wide, binary_wide_opt_n, compare, compare_ptr)
(load_ext_gather_index_restricted, load_ext_gather_offset_restricted)
(load_gather_sv_restricted, shift_left_imm_long): Declare.
(shift_left_imm_to_uint, shift_right_imm_narrowb): Likewise.
(shift_right_imm_narrowt, shift_right_imm_narrowb_to_uint): Likewise.
(shift_right_imm_narrowt_to_uint, store_scatter_index_restricted)
(store_scatter_offset_restricted, tbl_tuple, ternary_long_lane)
(ternary_long_opt_n, ternary_qq_lane_rotate, ternary_qq_rotate)
(ternary_shift_left_imm, ternary_shift_right_imm, ternary_uint)
(unary_convert_narrowt, unary_long, unary_narrowb, unary_narrowt)
(unary_narrowb_to_uint, unary_narrowt_to_uint, unary_to_int): Likewise.
* config/aarch64/aarch64-sve-builtins-shapes.cc (apply_predication):
Also add an initial argument for unary_convert_narrowt, regardless
of the predication type.
(build_32_64): Allow loads and stores to specify MODE_none.
(build_sv_index64, build_sv_uint_offset): New functions.
(long_type_suffix): New function.
(binary_imm_narrowb_base, binary_imm_narrowt_base): New classes.
(binary_imm_long_base, load_gather_sv_base): Likewise.
(shift_right_imm_narrow_wrapper, ternary_shift_imm_base): Likewise.
(ternary_resize2_opt_n_base, ternary_resize2_lane_base): Likewise.
(unary_narrowb_base, unary_narrowt_base): Likewise.
(binary_long_lane_def, binary_long_lane): New shape.
(binary_long_opt_n_def, binary_long_opt_n): Likewise.
(binary_narrowb_opt_n_def, binary_narrowb_opt_n): Likewise.
(binary_narrowt_opt_n_def, binary_narrowt_opt_n): Likewise.
(binary_to_uint_def, binary_to_uint): Likewise.
(binary_wide_def, binary_wide): Likewise.
(binary_wide_opt_n_def, binary_wide_opt_n): Likewise.
(compare_def, compare): Likewise.
(compare_ptr_def, compare_ptr): Likewise.
(load_ext_gather_index_restricted_def,
load_ext_gather_index_restricted): Likewise.
(load_ext_gather_offset_restricted_def,
load_ext_gather_offset_restricted): Likewise.
(load_gather_sv_def): Inherit from load_gather_sv_base.
(load_gather_sv_restricted_def, load_gather_sv_restricted): New shape.
(shift_left_imm_def, shift_left_imm): Likewise.
(shift_left_imm_long_def, shift_left_imm_long): Likewise.
(shift_left_imm_to_uint_def, shift_left_imm_to_uint): Likewise.
(store_scatter_index_restricted_def,
store_scatter_index_restricted): Likewise.
(store_scatter_offset_restricted_def,
store_scatter_offset_restricted): Likewise.
(tbl_tuple_def, tbl_tuple): Likewise.
(ternary_long_lane_def, ternary_long_lane): Likewise.
(ternary_long_opt_n_def, ternary_long_opt_n): Likewise.
(ternary_qq_lane_def): Inherit from ternary_resize2_lane_base.
(ternary_qq_lane_rotate_def, ternary_qq_lane_rotate): New shape
(ternary_qq_opt_n_def): Inherit from ternary_resize2_opt_n_base.
(ternary_qq_rotate_def, ternary_qq_rotate): New shape.
(ternary_shift_left_imm_def, ternary_shift_left_imm): Likewise.
(ternary_shift_right_imm_def, ternary_shift_right_imm): Likewise.
(ternary_uint_def, ternary_uint): Likewise.
(unary_convert): Fix typo in comment.
(unary_convert_narrowt_def, unary_convert_narrowt): New shape.
(unary_long_def, unary_long): Likewise.
(unary_narrowb_def, unary_narrowb): Likewise.
(unary_narrowt_def, unary_narrowt): Likewise.
(unary_narrowb_to_uint_def, unary_narrowb_to_uint): Likewise.
(unary_narrowt_to_uint_def, unary_narrowt_to_uint): Likewise.
(unary_to_int_def, unary_to_int): Likewise.
* config/aarch64/aarch64-sve-builtins-base.cc (unspec_cmla)
(unspec_fcmla, unspec_cond_fcmla, expand_mla_mls_lane): New functions.
(svasrd_impl): Delete.
(svcadd_impl::expand): Handle integer operations too.
(svcmla_impl::expand, svcmla_lane::expand): Likewise, using the
new functions to derive the unspec numbers.
(svmla_svmls_lane_impl): Replace with...
(svmla_lane_impl, svmls_lane_impl): ...these new classes.  Handle
integer operations too.
(svwhile_impl): Rename to...
(svwhilelx_impl): ...this and inherit from while_comparison.
(svasrd): Use unspec_based_function.
(svmla_lane): Use svmla_lane_impl.
(svmls_lane): Use svmls_lane_impl.
(svrecpe, svrsqrte): Handle unsigned integer operations too.
(svwhilele, svwhilelt): Use svwhilelx_impl.
* config/aarch64/aarch64-sve-builtins-sve2.h: New file.
* config/aarch64/aarch64-sve-builtins-sve2.cc: Likewise.
* config/aarch64/aarch64-sve-builtins-sve2.def: Likewise.
* config/aarch64/aarch64-sve-builtins.def: Include
aarch64-sve-builtins-sve2.def.

gcc/testsuite/
* g++.target/aarch64/sve/acle/general-c++/mul_lane_1.c: New test.
* g++.target/aarch64/sve2/acle: New directory.
* gcc.target/aarch64/pragma_cpp_predefs_3.c: New test.
* gcc.target/aarch64/sve/acle/asm/test_sve_acle.h (TEST_TYPE_CHANGE_Z)
(TEST_DUAL_ZD, TEST_TYPE_CHANGE_ZX, TEST_TBL2, TEST_TBL2_REV): New
macros.
* gcc.target/aarch64/sve/acle/general-c/binary_lane_1.c: Do not
expect an error saying that the function has no f32 form, but instead
expect an error about SVE2 being required if the current target
doesn't support SVE2.
* gcc.target/aarch64/sve/acle/general-c/ternary_lane_1.c: Likewise.
* gcc.target/aarch64/sve/acle/general-c/ternary_lane_rotate_1.c Likewise.
* gcc.target/aarch64/sve/acle/general-c/binary_long_lane_1.c,
* gcc.target/aarch64/sve/acle/general-c/binary_long_opt_n_1.c,
* gcc.target/aarch64/sve/acle/general-c/binary_narrowb_opt_n_1.c,
* gcc.target/aarch64/sve/acle/general-c/binary_narrowt_opt_n_1.c,
* gcc.target/aarch64/sve/acle/general-c/binary_to_uint_1.c,
* gcc.target/aarch64/sve/acle/general-c/binary_wide_1.c,
* gcc.target/aarch64/sve/acle/general-c/binary_wide_opt_n_1.c,
* gcc.target/aarch64/sve/acle/general-c/compare_1.c,
* gcc.target/aarch64/sve/acle/general-c/compare_ptr_1.c,
* gcc.target/aarch64/sve/acle/general-c/load_ext_gather_index_restricted_1.c,
* gcc.target/aarch64/sve/acle/general-c/load_ext_gather_offset_restricted_1.c,
* gcc.target/aarch64/sve/acle/general-c/load_ext_gather_offset_restricted_2.c,
* gcc.target/aarch64/sve/acle/general-c/load_ext_gather_offset_restricted_3.c,
* gcc.target/aarch64/sve/acle/general-c/load_ext_gather_offset_restricted_4.c,
* gcc.target/aarch64/sve/acle/general-c/load_gather_sv_restricted_1.c,
* gcc.target/aarch64/sve/acle/general-c/load_gather_sv_restricted_2.c,
* gcc.target/aarch64/sve/acle/general-c/mul_lane_1.c,
* gcc.target/aarch64/sve/acle/general-c/shift_left_imm_long_1.c,
* gcc.target/aarch64/sve/acle/general-c/shift_left_imm_to_uint_1.c,
* gcc.target/aarch64/sve/acle/general-c/shift_left_imm_to_uint_2.c,
* gcc.target/aarch64/sve/acle/general-c/shift_right_imm_narrowb_1.c,
* gcc.target/aarch64/sve/acle/general-c/shift_right_imm_narrowb_to_uint_1.c,
* gcc.target/aarch64/sve/acle/general-c/shift_right_imm_narrowt_1.c,
* gcc.target/aarch64/sve/acle/general-c/shift_right_imm_narrowt_to_uint_1.c,
* gcc.target/aarch64/sve/acle/general-c/store_scatter_index_restricted_1.c,
* gcc.target/aarch64/sve/acle/general-c/store_scatter_offset_restricted_1.c,
* gcc.target/aarch64/sve/acle/general-c/tbl_tuple_1.c,
* gcc.target/aarch64/sve/acle/general-c/ternary_long_lane_1.c,
* gcc.target/aarch64/sve/acle/general-c/ternary_long_opt_n_1.c,
* gcc.target/aarch64/sve/acle/general-c/ternary_qq_lane_rotate_1.c,
* gcc.target/aarch64/sve/acle/general-c/ternary_qq_rotate_1.c,
* gcc.target/aarch64/sve/acle/general-c/ternary_shift_right_imm_1.c,
* gcc.target/aarch64/sve/acle/general-c/ternary_uint_1.c,
* gcc.target/aarch64/sve/acle/general-c/unary_convert_narrowt_1.c,
* gcc.target/aarch64/sve/acle/general-c/unary_narrowb_1.c,
* gcc.target/aarch64/sve/acle/general-c/unary_narrowb_to_uint_1.c,
* gcc.target/aarch64/sve/acle/general-c/unary_narrowt_1.c,
* gcc.target/aarch64/sve/acle/general-c/unary_narrowt_to_uint_1.c,
* gcc.target/aarch64/sve/acle/general-c/unary_to_int_1.c: New tests.
* gcc.target/aarch64/sve2/bcax_1.c: Likewise.
* gcc.target/aarch64/sve2/acle: New directory.

From-SVN: r280060

[AArch64] Pass a mode to some SVE immediate queries

It helps the SVE2 ACLE support if aarch64_sve_arith_immediate_p and
aarch64_sve_sqadd_sqsub_immediate_p accept scalars as well as vectors.

2020-01-09  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
* config/aarch64/aarch64-protos.h (aarch64_sve_arith_immediate_p)
(aarch64_sve_sqadd_sqsub_immediate_p): Add a machine_mode argument.
* config/aarch64/aarch64.c (aarch64_sve_arith_immediate_p)
(aarch64_sve_sqadd_sqsub_immediate_p): Likewise.  Handle scalar
immediates as well as vector ones.
* config/aarch64/predicates.md (aarch64_sve_arith_immediate)
(aarch64_sve_sub_arith_immediate, aarch64_sve_qadd_immediate)
(aarch64_sve_qsub_immediate): Update calls accordingly.

From-SVN: r280059

[AArch64] Add banner comments to aarch64-sve2.md

This patch imposes the same sort of structure on aarch64-sve2.md
as we already have for aarch64-sve.md, before it grows a lot more
patterns.

2020-01-09  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
* config/aarch64/aarch64-sve2.md: Add banner comments.
(<su>mulh<r>s<mode>3): Move further up file.
(<su>mull<bt><Vwide>, <r>shrnb<mode>, <r>shrnt<mode>)
(*aarch64_sve2_sra<mode>): Move further down file.
* config/aarch64/t-aarch64 (s-check-sve-md): Check aarch64-sve2.md too.

From-SVN: r280058

compiler: don't localize names in export data

    Localizing names in export data causes the compiler output to change
    depending on the LANG environment variable, so don't do it.

    Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/214038

From-SVN: r280057

compiler: don't add composite literal keys to package bindings

    Adding composite literal keys to package bindings gets confusing when
    it is combined with dot imports.  The test case showing the resulting
    compilation failure is https://golang.org/cl/213899.

    Fix this by adding a new expression type to hold composite literal keys.
    We shouldn't see it during lowering if it is a struct field name,
    because Composite_literal_expression::do_traverse skips struct field names.
    Or, it should, but that didn't quite work with pointer types so it had to
    be tweaked.

    This lets us remove the code that recorded whether an Unknown_expression
    is a composite literal key.

    Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/214017

From-SVN: r280056

[amdgcn] Add support for sub-word sync_compare_and_swap operations

2020-01-09  Kwok Cheung Yeung  <kcy@codesourcery.com>

libgcc/
* config/gcn/atomic.c: New.
* config/gcn/t-amdgcn (LIB2ADD): Add atomic.c.

From-SVN: r280055

[AArch64] Simplify WHILERW and WHILEWR definition

I'd made WHILERW and WHILEWR use separate patterns from the SVE
WHILE instructions, but they're similar enough that we can use
a single pattern.  This means that we also get the flag-related
patterns "for free".

2020-01-09  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
* config/aarch64/iterators.md (SVE_WHILE): Add UNSPEC_WHILERW
and UNSPEC_WHILEWR.
(while_optab_cmp): Handle them.
* config/aarch64/aarch64-sve.md
(*while_<while_optab_cmp><GPI:mode><PRED_ALL:mode>_ptest): Make public
and add a "@" marker.
* config/aarch64/aarch64-sve2.md (check_<raw_war>_ptrs<mode>): Use it
instead of gen_aarch64_sve2_while_ptest.
(@aarch64_sve2_while<cmp_op><GPI:mode><PRED_ALL:mode>_ptest): Delete.

From-SVN: r280054

[AArch64] Rename UNSPEC_WHILE* to match instruction mnemonics

The UNSPEC_WHILE*s had an underscore before the condition code,
whereas almost all other SVE unspecs are taken directly from
the mnemonic.

2020-01-09  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
* config/aarch64/aarch64.md (UNSPEC_WHILE_LE): Rename to...
(UNSPEC_WHILELE): ...this.
(UNSPEC_WHILE_LO): Rename to...
(UNSPEC_WHILELO): ...this.
(UNSPEC_WHILE_LS): Rename to...
(UNSPEC_WHILELS): ...this.
(UNSPEC_WHILE_LT): Rename to...
(UNSPEC_WHILELT): ...this.
* config/aarch64/iterators.md (SVE_WHILE): Update accordingly.
(cmp_op, while_optab_cmp): Likewise.
* config/aarch64/aarch64.c (aarch64_sve_move_pred_via_while): Likewise.
* config/aarch64/aarch64-sve-builtins-base.cc (svwhilele): Likewise.
(svwhilelt): Likewise.

From-SVN: r280053

[AArch64] Rename SVE shape "unary_count" to "unary_to_uint"

The SVE ACLE shape names use "_int" and "_uint" for arguments that are
signed-integer or unsigned-integer variants of the main vector type.
With SVE2 this variation also becomes common for return values,
which the main SVE2 patch handles using "_to_int" and "_to_uint".
This patch renames the existing unary_count shape to match the
new scheme.

2020-01-09  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
* config/aarch64/aarch64-sve-builtins-shapes.h (unary_count): Delete.
(unary_to_uint): Define.
* config/aarch64/aarch64-sve-builtins-shapes.cc (unary_count_def)
(unary_count): Rename to...
(unary_to_uint_def, unary_to_uint): ...this.
* config/aarch64/aarch64-sve-builtins-base.def: Update accordingly.

gcc/testsuite/
* gcc.target/aarch64/sve/acle/general-c/unary_count_1.c: Rename to...
* gcc.target/aarch64/sve/acle/general-c/unary_to_uint_1.c: ...this.
* gcc.target/aarch64/sve/acle/general-c/unary_count_2.c: Rename to...
* gcc.target/aarch64/sve/acle/general-c/unary_to_uint_2.c: ...this.
* gcc.target/aarch64/sve/acle/general-c/unary_count_3.c: Rename to...
* gcc.target/aarch64/sve/acle/general-c/unary_to_uint_3.c: ...this.

From-SVN: r280052

[AArch64] Specify some SVE ACLE functions in a more generic way

This patch generalises some boilerplate that becomes much more
common with SVE2 intrinsics.

2020-01-09  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
* config/aarch64/aarch64-sve-builtins-functions.h
(code_for_mode_function): New class.
(CODE_FOR_MODE0, QUIET_CODE_FOR_MODE0): New macros.
* config/aarch64/aarch64-sve-builtins-base.cc (svcompact_impl)
(svext_impl, svmul_lane_impl, svsplice_impl, svtmad_impl): Delete.
(svcompact, svext, svsplice): Use QUIET_CODE_FOR_MODE0.
(svmul_lane, svtmad): Use CODE_FOR_MODE0.

From-SVN: r280051

[AArch64] Tweak iterator usage for [SU]Q{ADD,SUB}

The pattern:

;; <su>q<addsub>

(define_insn "aarch64_<su_optab><optab><mode>"
  [(set (match_operand:VSDQ_I 0 "register_operand" "=w")
(BINQOPS:VSDQ_I (match_operand:VSDQ_I 1 "register_operand" "w")
  (match_operand:VSDQ_I 2 "register_operand" "w")))]
  "TARGET_SIMD"
  "<su_optab><optab>\\t%<v>0<Vmtype>, %<v>1<Vmtype>, %<v>2<Vmtype>"
  [(set_attr "type" "neon_<optab><q>")]
)

meant that we overloaded "optab" to be "qadd" for both SQADD and
UQADD.  Most other "optab" entries are instead the full optab name,
which for these patterns would be "ssadd" and "usadd" respectively.
(Unfortunately, the optabs don't extend to vectors yet, something
that would be good to fix in GCC 11.)

This patch therefore does what the comment implies and uses
q<addsub> to distinguish qadd and qsub instead.

2020-01-09  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
* config/aarch64/iterators.md (addsub): New code attribute.
* config/aarch64/aarch64-simd.md (aarch64_<su_optab><optab><mode>):
Re-express as...
(aarch64_<su_optab>q<addsub><mode>): ...this, making the same change
in the asm string and attributes.  Fix indentation.
* config/aarch64/aarch64-sve.md (@aarch64_<su_optab><optab><mode>):
Re-express as...
(@aarch64_sve_<optab><mode>): ...this.
* config/aarch64/aarch64-sve-builtins.h
(function_expander::expand_signed_unpred_op): Delete.
* config/aarch64/aarch64-sve-builtins.cc
(function_expander::expand_signed_unpred_op): Likewise.
(function_expander::map_to_rtx_codes): If the optab isn't defined,
try using code_for_aarch64_sve instead.
* config/aarch64/aarch64-sve-builtins-base.cc (svqadd_impl): Delete.
(svqsub_impl): Likewise.
(svqadd, svqsub): Use rtx_code_function instead.

From-SVN: r280050

[AArch64] Remove fictitious [SU]RHSUB instructions

We've had skeleton support for "SRHSUB" and "URHSUB" since the initial
commit of the port, but no such instructions exist.

2020-01-09  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
* config/aarch64/iterators.md (SRHSUB, URHSUB): Delete.
(HADDSUB, sur, addsub): Remove them.

From-SVN: r280049

Fix tree-nrv.c ICE for direct internal functions

pass_return_slot::execute has:

      /* Ignore internal functions without direct optabs,
 those are expanded specially and aggregate_value_p
 on their result might result in undesirable warnings
 with some backends.  */
      && (!gimple_call_internal_p (stmt)
  || direct_internal_fn_p (gimple_call_internal_fn (stmt)))
      && aggregate_value_p (TREE_TYPE (gimple_call_lhs (stmt)),
    gimple_call_fndecl (stmt)))

But what the comment says applies to directly-mapped internal functions
too, since they're only used if the target supports them without a
libcall.

This was triggering an ICE on the attached testcase.  The svld3 call
is folded to an IFN_LOAD_LANES, which returns an array of vectors with
VNx48QImode.  Since no such return type can exist in C, the target hook
was complaining about an unexpected use of SVE modes.  (And we want to
keep asserting for that, so that we don't accidentally define an ABI for
an unexpected corner case.)

2020-01-09  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
* tree-nrv.c (pass_return_slot::execute): Handle all internal
functions the same way, rather than singling out those that
aren't mapped directly to optabs.

gcc/testsuite/
* gcc.target/aarch64/sve/acle/general/nrv_1.c: New test.

From-SVN: r280048

Add a compatible_vector_types_p target hook

One problem with adding an N-bit vector extension to an existing
architecture is to decide how N-bit vectors should be passed to
functions and returned from functions.  Allowing all N-bit vector
types to be passed in registers breaks backwards compatibility,
since N-bit vectors could be used (and emulated) before the vector
extension was added.  But always passing N-bit vectors on the
stack would be inefficient for things like vector libm functions.

For SVE we took the compromise position of predefining new SVE vector
types that are distinct from all existing vector types, including
GNU-style vectors.  The new types are passed and returned in an
efficient way while existing vector types are passed and returned
in the traditional way.  In the right circumstances, the two types
are inter-convertible.

The SVE types are created using:

      vectype = build_distinct_type_copy (vectype);
      SET_TYPE_STRUCTURAL_EQUALITY (vectype);
      TYPE_ARTIFICIAL (vectype) = 1;

The C frontend maintains this distinction, using VIEW_CONVERT_EXPR
to convert from one type to the other.  However, the distinction can
be lost during gimple, which treats two vector types with the same
mode, number of elements, and element type as equivalent.  And for
most targets that's the right thing to do.

This patch therefore adds a hook that lets the target choose
whether such vector types are indeed equivalent.

Note that the new tests fail for -mabi=ilp32 in the same way as other
ACLE-based tests.  I'm still planning to fix that as a follow-on.

2020-01-09  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
* target.def (compatible_vector_types_p): New target hook.
* hooks.h (hook_bool_const_tree_const_tree_true): Declare.
* hooks.c (hook_bool_const_tree_const_tree_true): New function.
* doc/tm.texi.in (TARGET_COMPATIBLE_VECTOR_TYPES_P): New hook.
* doc/tm.texi: Regenerate.
* gimple-expr.c: Include target.h.
(useless_type_conversion_p): Use targetm.compatible_vector_types_p.
* config/aarch64/aarch64.c (aarch64_compatible_vector_types_p): New
function.
(TARGET_COMPATIBLE_VECTOR_TYPES_P): Define.
* config/aarch64/aarch64-sve-builtins.cc (gimple_folder::convert_pred):
Use the original predicate if it already has a suitable type.

gcc/testsuite/
* gcc.target/aarch64/sve/pcs/gnu_vectors_1.c: New test.
* gcc.target/aarch64/sve/pcs/gnu_vectors_2.c: Likewise.

From-SVN: r280047

Fortran] PR84135 fix merging dimension into codimension array spec

        PR fortran/84135
        * array.c (gfc_set_array_spec): Fix shifting of codimensions
        when adding a dimension.
        * decl.c (merge_array_spec): Ditto. Fix using correct codimensions.

        PR fortran/84135
        * gfortran.dg/coarray/codimension_3.f90: New.

From-SVN: r280046

libstdc++: Define memory resource key functions non-inline (PR93208)

This prevents the vtables and RTTI from being emitted in every object
file that uses memory_resource and monotonic_buffer_resource.

Objects compiled by GCC 9.1 or 9.2 will contain inline definitions of
the destructors, vtable and RTTI, but this is harmless. The inline
definitions have identical effects to the ones that are now defined in
libstdc++.so so it doesn't matter if the inline ones are used instead of
calling the symbols exported from the runtime library.

PR libstdc++/93208
* config/abi/pre/gnu.ver: Add new exports.
* include/std/memory_resource (memory_resource::~memory_resource()):
Do not define inline.
(monotonic_buffer_resource::~monotonic_buffer_resource()): Likewise.
* src/c++17/memory_resource.cc (memory_resource::~memory_resource()):
Define.
(monotonic_buffer_resource::~monotonic_buffer_resource()): Define.
* testsuite/20_util/monotonic_buffer_resource/93208.cc: New test.

From-SVN: r280044

Make cgraph_edge::resolve-speculation static

2020-01-09  Martin Jambor  <mjambor@suse.cz>

* cgraph.h (cgraph_edge): Make remove, set_call_stmt, make_direct,
resolve_speculation and redirect_call_stmt_to_callee static.  Change
return type of set_call_stmt to cgraph_edge *.
* auto-profile.c (afdo_indirect_call): Adjust call to
redirect_call_stmt_to_callee.
* cgraph.c (cgraph_edge::set_call_stmt): Make return cgraph-edge *,
make the this pointer explicit, adjust self-recursive calls and the
call top make_direct.  Return the resulting edge.
(cgraph_edge::remove): Make this pointer explicit.
(cgraph_edge::resolve_speculation): Likewise, adjust call to remove.
(cgraph_edge::make_direct): Likewise, adjust call to
resolve_speculation.
(cgraph_edge::redirect_call_stmt_to_callee): Likewise, also adjust
call to set_call_stmt.
(cgraph_update_edges_for_call_stmt_node): Update call to
set_call_stmt and remove.
* cgraphclones.c (cgraph_node::set_call_stmt_including_clones):
Renamed edge to master_edge.  Adjusted calls to set_call_stmt.
(cgraph_node::create_edge_including_clones): Moved "first" definition
of edge to the block where it was used.  Adjusted calls to
set_call_stmt.
(cgraph_node::remove_symbol_and_inline_clones): Adjust call to
cgraph_edge::remove.
* cgraphunit.c (walk_polymorphic_call_targets): Adjusted calls to
make_direct and redirect_call_stmt_to_callee.
* ipa-fnsummary.c (redirect_to_unreachable): Adjust calls to
resolve_speculation and make_direct.
* ipa-inline-transform.c (inline_transform): Adjust call to
redirect_call_stmt_to_callee.
(check_speculations_1):: Adjust call to resolve_speculation.
* ipa-inline.c (resolve_noninline_speculation): Adjust call to
resolve-speculation.
(inline_small_functions): Adjust call to resolve_speculation.
(ipa_inline): Likewise.
* ipa-prop.c (ipa_make_edge_direct_to_target): Adjust call to
make_direct.
* ipa-visibility.c (function_and_variable_visibility): Make iteration
safe with regards to edge removal, adjust calls to
redirect_call_stmt_to_callee.
* ipa.c (walk_polymorphic_call_targets): Adjust calls to make_direct
and redirect_call_stmt_to_callee.
* multiple_target.c (create_dispatcher_calls): Adjust call to
redirect_call_stmt_to_callee
(redirect_to_specific_clone): Likewise.
* tree-cfgcleanup.c (delete_unreachable_blocks_update_callgraph):
Adjust calls to cgraph_edge::remove.
* tree-inline.c (copy_bb): Adjust call to set_call_stmt.
(redirect_all_calls): Adjust call to redirect_call_stmt_to_callee.
(expand_call_inline): Adjust call to cgraph_edge::remove.

From-SVN: r280043

Set Optimization for param_max_speculative_devirt_maydefs.

2020-01-09  Martin Liska  <mliska@suse.cz>

* params.opt: Set Optimization for
param_max_speculative_devirt_maydefs.

From-SVN: r280042

PR middle-end/93200 - spurious -Wstringop-overflow due to assignment vectorization to multiple members

PR middle-end/93200 - spurious -Wstringop-overflow due to assignment vectorization to multiple members
PR fortran/92956 - 'libgomp.fortran/examples-4/async_target-2.f90' fails with offloading due to bogus -Wstringop-overflow warning

gcc/testsuite/ChangeLog:

PR middle-end/93200
* gcc.dg/Wstringop-overflow-30.c: New test.

gcc/ChangeLog:

PR middle-end/93200
PR fortran/92956
* builtins.c (compute_objsize): Avoid handling MEM_REFs of vector type.

From-SVN: r280041

Add Optimization for various IPA parameters.

2020-01-09  Martin Liska  <mliska@suse.cz>

* auto-profile.c (auto_profile): Use opt_for_fn
for a parameter.
* ipa-cp.c (ipcp_lattice::add_value): Likewise.
(propagate_vals_across_arith_jfunc): Likewise.
(hint_time_bonus): Likewise.
(incorporate_penalties): Likewise.
(good_cloning_opportunity_p): Likewise.
(perform_estimation_of_a_value): Likewise.
(estimate_local_effects): Likewise.
(ipcp_propagate_stage): Likewise.
* ipa-fnsummary.c (decompose_param_expr): Likewise.
(set_switch_stmt_execution_predicate): Likewise.
(analyze_function_body): Likewise.
* ipa-inline-analysis.c (offline_size): Likewise.
* ipa-inline.c (early_inliner): Likewise.
* ipa-prop.c (ipa_analyze_node): Likewise.
(ipcp_transform_function): Likewise.
* ipa-sra.c (process_scan_results): Likewise.
(ipa_sra_summarize_function): Likewise.
* params.opt: Rename ipcp-unit-growth to
ipa-cp-unit-growth.  Add Optimization for various
IPA-related parameters.

From-SVN: r280040

re PR tree-optimization/93054 (ICE in gimple_set_lhs, at gimple.c:1820)

2020-01-09  Richard Biener  <rguenther@suse.de>

PR middle-end/93054
* gimplify.c (gimplify_expr): Deal with NOP definitions.

* gcc.dg/pr93054.c: New testcase.

From-SVN: r280039

re PR tree-optimization/93040 (gcc doesn't optimize unaligned accesses to a 16-bit value on the x86 as well as it does a 32-bit value (or clang))

2020-01-09  Richard Biener  <rguenther@suse.de>

PR tree-optimization/93040
* gimple-ssa-store-merging.c (find_bswap_or_nop): Raise search limit.

* gcc.dg/optimize-bswaphi-1.c: Amend.
* gcc.dg/optimize-bswapsi-2.c: Likewise.

From-SVN: r280034

avr-common.c (avr_option_optimization_table): Set -fsplit-wide-types-early.

* common/config/avr/avr-common.c (avr_option_optimization_table)
[OPT_LEVELS_1_PLUS]: Set -fsplit-wide-types-early.

From-SVN: r280033

One more usage of cgraph_node::dump_name.

2020-01-09  Martin Liska  <mliska@suse.cz>

* cgraphclones.c (symbol_table::materialize_all_clones):
Use cgraph_node::dump_name.

From-SVN: r280031

re PR inline-asm/93202 ([RISCV] ICE when using inline asm 'h' operand modifier)

PR inline-asm/93202
* config/riscv/riscv.c (riscv_print_operand_reloc): Use
output_operand_lossage instead of gcc_unreachable.
* doc/md.texi (riscv f constraint): Fix typo.

* gcc.target/riscv/pr93202.c: New test.

From-SVN: r280030

re PR target/93141 (Missed optimization : Use of adc when checking overflow)

PR target/93141
* config/i386/i386.md (subv<mode>4): Use SWIDWI iterator instead of
SWI.  Use <general_hilo_operand> instead of <general_operand>.  Use
CONST_SCALAR_INT_P instead of CONST_INT_P.
(*subv<mode>4_1): Rename to ...
(subv<mode>4_1): ... this.
(*subv<dwi>4_doubleword, *addv<dwi>4_doubleword_1): New
define_insn_and_split patterns.
(*subv<mode>4_overflow_1, *addv<mode>4_overflow_2): New define_insn
patterns.

* gcc.target/i386/pr93141-1.c: Add tests with constants that have MSB
of the low half of the constant set.
* gcc.target/i386/pr93141-2.c: New test.

From-SVN: r280029

PR libstdc++/92124 fix incorrect unordered container move assignment

* include/bits/hashtable.h (_Hashtable<>::__alloc_node_gen_t): New
template alias.
(_Hashtable<>::__fwd_value_for): New.
(_Hashtable<>::_M_assign_elements<>): Remove _NodeGenerator template
parameter.
(_Hashtable<>::_M_assign<>): Add _Ht template parameter.
(_Hashtable<>::operator=(const _Hashtable<>&)): Adapt.
(_Hashtable<>::_M_move_assign): Adapt. Replace std::move_if_noexcept
with std::move.
(_Hashtable<>::_Hashtable(const _Hashtable&)): Adapt.
(_Hashtable<>::_Hashtable(const _Hashtable&, const allocator_type&)):
Adapt.
(_Hashtable<>::_Hashtable(_Hashtable&&, const allocator_type&)):
Adapt.
* testsuite/23_containers/unordered_set/92124.cc: New.

From-SVN: r280028

vec.h: add auto_delete_vec

This patch adds a class auto_delete_vec<T>, a subclass of auto_vec <T *>
that deletes all of its elements on destruction; it's used in many
places in the analyzer patch kit.

This is a crude way for a vec to "own" the objects it points to
and clean up automatically (essentially a workaround for not being able
to use unique_ptr, due to C++98).

gcc/ChangeLog:
* vec.c (class selftest::count_dtor): New class.
(selftest::test_auto_delete_vec): New test.
(selftest::vec_c_tests): Call it.
* vec.h (class auto_delete_vec): New class template.
(auto_delete_vec<T>::~auto_delete_vec): New dtor.

From-SVN: r280027

sbitmap.h: add operator const_sbitmap to auto_sbitmap

gcc/ChangeLog:
* sbitmap.h (auto_sbitmap): Add operator const_sbitmap.

From-SVN: r280026

RISC-V: Disable use of TLS copy relocs.

Musl and lld don't support TLS copy relocs, and don't want to add support
for this feature which is unique to RISC-V.  Only GNU ld and glibc support
them.  In the pasbi discussion, people have pointed out various problems
with using them, so we are deprecating them.  There doesn't seem to be an
ABI break from dropping them so this patch modifies gcc to stop creating
them.  I'm using an ifdef for now in case a problem turns up and the code
has to be re-enabled.  The plan is to add an initial to local exec
relaxation as a replacement, though this has not been defined or
implemented yet.

gcc/
* config/riscv/riscv.c (riscv_legitimize_tls_address): Ifdef out
use of TLS_MODEL_LOCAL_EXEC when not pic.

From-SVN: r280025

Daily bump.

From-SVN: r280024

Add TARGET_EXPR_DIRECT_INIT_P sanity check.

* cp-gimplify.c (cp_gimplify_expr) [TARGET_EXPR]: Check
TARGET_EXPR_DIRECT_INIT_P.
* constexpr.c (cxx_eval_constant_expression): Likewise.

From-SVN: r280019

PR c++/91369 - constexpr destructor and member initializer.

Previously it didn't matter whether we looked through a TARGET_EXPR in
constexpr evaluation, but now that we have constexpr destructors it does.
On IRC I mentioned the idea of clearing TARGET_EXPR_CLEANUP in
digest_nsdmi_init, but since this initialization is expressed by an
INIT_EXPR, it's better to handle all INIT_EXPR, not just those for a member
initializer.

* constexpr.c (cxx_eval_store_expression): Look through TARGET_EXPR
when not preevaluating.

From-SVN: r280018

Remove constexpr support for DECL_BY_REFERENCE.

Since we switched to doing constexpr evaluation on pre-GENERIC trees,
we don't have to handle DECL_BY_REFERENCE.

* constexpr.c (cxx_eval_call_expression): Remove DECL_BY_REFERENCE
support.

From-SVN: r280017

* gcc.dg/Wstringop-overflow-27.c: Make testnames unique.

From-SVN: r280016

hash-map-tests.c: fix memory leak

This commit makes "make selftest-valgrind" clean by fixing this leak:

4 bytes in 1 blocks are definitely lost in loss record 1 of 734
   at 0x483AB1A: calloc (vg_replace_malloc.c:762)
   by 0x261DBE0: xcalloc (xmalloc.c:162)
   by 0x2538C46: selftest::test_map_of_strings_to_int() (hash-map-tests.c:87)
   by 0x253ABD2: selftest::hash_map_tests_c_tests() (hash-map-tests.c:307)
   by 0x24A885B: selftest::run_tests() (selftest-run-tests.c:65)
   by 0x1373D80: toplev::run_self_tests() (toplev.c:2339)
   by 0x1373FA7: toplev::main(int, char**) (toplev.c:2421)
   by 0x2550EFF: main (main.c:39)

gcc/ChangeLog:
* hash-map-tests.c (selftest::test_map_of_strings_to_int): Fix
memory leak.

From-SVN: r280015

libstdc++: Fix error handling in filesystem::remove_all (PR93201)

When recursing into a directory, any errors that occur while removing a
directory entry are ignored, because the subsequent increment of the
directory iterator clears the error_code object.

This fixes that bug by checking the result of each recursive operation
before incrementing. This is a change in observable behaviour, because
previously other directory entries would still be removed even if one
(or more) couldn't be removed due to errors. Now the operation stops on
the first error, which is what the code intended to do all along. The
standard doesn't specify what happens in this case (because the order
that the entries are processed is unspecified anyway).

It also improves the error reporting so that the name of the file that
could not be removed is included in the filesystem_error exception. This
is done by introducing a new helper type for reporting errors with
additional context and a new function that uses that type. Then the
overload of std::filesystem::remove_all that throws an exception can use
the new function to ensure any exception contains the additional
information.

For std::experimental::filesystem::remove_all just fix the bug where
errors are ignored.

PR libstdc++/93201
* src/c++17/fs_ops.cc (do_remove_all): New function implementing more
detailed error reporting for remove_all. Check result of recursive
call before incrementing iterator.
(remove_all(const path&), remove_all(const path&, error_code&)): Use
do_remove_all.
* src/filesystem/ops.cc (remove_all(const path&, error_code&)): Check
result of recursive call before incrementing iterator.
* testsuite/27_io/filesystem/operations/remove_all.cc: Check errors
are reported correctly.
* testsuite/experimental/filesystem/operations/remove_all.cc: Likewise.

From-SVN: r280014

Add missing { dg-require-effective-target fpic } to aarch64 tests

2020-01-08  Joel Brobecker  <brobecker@adacore.com>
          Olivier Hainque  <hainque@adacore.com>

testsuite/
* g++.target/aarch64/sve/tls_2.C: Add missing
{ dg-require-effective-target fpic } directive.
* gcc.target/aarch64/noplt_2.c: Likewise.
* gcc.target/aarch64/noplt_3.c: Likewise.
* gcc.target/aarch64/pic-constantpool1.c: Likewise.
* gcc.target/aarch64/pic-small.c: Likewise.
* gcc.target/aarch64/pic-symrefplus.c: Likewise.
* gcc.target/aarch64/pr66912.c: Likewise.
* gcc.target/aarch64/sve/tls_1.c: Likewise.
* gcc.target/aarch64/sve/tls_preserve_1.c: Likewise.
* gcc.target/aarch64/sve/tls_preserve_2.c: Likewise.
* gcc.target/aarch64/sve/tls_preserve_3.c: Likewise.
* gcc.target/aarch64/tlsie_tiny_1.c: Likewise.
* gcc.target/aarch64/tlsle12_1.c: Likewise.
* gcc.target/aarch64/tlsle12_tiny_1.c: Likewise.
* gcc.target/aarch64/tlsle24_1.c: Likewise.
* gcc.target/aarch64/tlsle24_tiny_1.c: Likewise.
* gcc.target/aarch64/tlsle32_1.c: Likewise.
* gcc.target/aarch64/tlsle_sizeadj_small_1.c: Likewise.
* gcc.target/aarch64/tlsle_sizeadj_tiny_1.c: Likewise.

Co-Authored-By: Olivier Hainque <hainque@adacore.com>
From-SVN: r280013

re PR target/93187 (ICE in extract_insn, at recog.c:2294)

PR target/93187
* config/i386/i386.md (*stack_protect_set_2_<mode> peephole2,
*stack_protect_set_3 peephole2): Also check that the second
insns source is general_operand.

* g++.dg/opt/pr93187.C: New test.

From-SVN: r280012

re PR target/93174 (ICE building glibc __sha512_process_block for i686)

PR target/93174
* config/i386/i386.md (addcarry<mode>_0): Use nonimmediate_operand
predicate for output operand instead of register_operand.
(addcarry<mode>, addcarry<mode>_1): Likewise.  Add alternative with
memory destination and non-memory operands[2].

* gcc.c-torture/compile/pr93174.c: New test.

From-SVN: r280011

relax aarch64 stack-clash tests depedence on alloca.h

2020-01-06  Olivier Hainque  <hainque@adacore.com>
Alexandre Oliva  <oliva@adacore.com>

* gcc.target/aarch64/stack-check-alloca.h: Remove
#include alloca.h. #define alloca __builtin_alloca
instead.
* gcc.target/aarch64/stack-check-alloca-1.c: Add
{ dg-require-effective-target alloca }.
* gcc.target/aarch64/stack-check-alloca-2.c: Likewise.
* gcc.target/aarch64/stack-check-alloca-3.c: Likewise.
* gcc.target/aarch64/stack-check-alloca-4.c: Likewise.
* gcc.target/aarch64/stack-check-alloca-5.c: Likewise.
* gcc.target/aarch64/stack-check-alloca-6.c: Likewise.
* gcc.target/aarch64/stack-check-alloca-7.c: Likewise.
* gcc.target/aarch64/stack-check-alloca-8.c: Likewise.
* gcc.target/aarch64/stack-check-alloca-9.c: Likewise.
* gcc.target/aarch64/stack-check-alloca-10.c: Likewise.

Co-Authored-By: Alexandre Oliva <oliva@adacore.com>
From-SVN: r280010

Use cgraph_node::dump_{asm_},name where possible.

2020-01-08  Martin Liska  <mliska@suse.cz>

* cgraph.c (cgraph_node::dump): Use ::dump_name or
::dump_asm_name instead of (::name or ::asm_name).
* cgraphclones.c (symbol_table::materialize_all_clones): Likewise.
* cgraphunit.c (walk_polymorphic_call_targets): Likewise.
(analyze_functions): Likewise.
(expand_all_functions): Likewise.
* ipa-cp.c (ipcp_cloning_candidate_p): Likewise.
(propagate_bits_across_jump_function): Likewise.
(dump_profile_updates): Likewise.
(ipcp_store_bits_results): Likewise.
(ipcp_store_vr_results): Likewise.
* ipa-devirt.c (dump_targets): Likewise.
* ipa-fnsummary.c (analyze_function_body): Likewise.
* ipa-hsa.c (check_warn_node_versionable): Likewise.
(process_hsa_functions): Likewise.
* ipa-icf.c (sem_item_optimizer::merge_classes): Likewise.
(set_alias_uids): Likewise.
* ipa-inline-transform.c (save_inline_function_body): Likewise.
* ipa-inline.c (recursive_inlining): Likewise.
(inline_to_all_callers_1): Likewise.
(ipa_inline): Likewise.
* ipa-profile.c (ipa_propagate_frequency_1): Likewise.
(ipa_propagate_frequency): Likewise.
* ipa-prop.c (ipa_make_edge_direct_to_target): Likewise.
(remove_described_reference): Likewise.
* ipa-pure-const.c (worse_state): Likewise.
(check_retval_uses): Likewise.
(analyze_function): Likewise.
(propagate_pure_const): Likewise.
(propagate_nothrow): Likewise.
(dump_malloc_lattice): Likewise.
(propagate_malloc): Likewise.
(pass_local_pure_const::execute): Likewise.
* ipa-visibility.c (optimize_weakref): Likewise.
(function_and_variable_visibility): Likewise.
* ipa.c (symbol_table::remove_unreachable_nodes): Likewise.
(ipa_discover_variable_flags): Likewise.
* lto-streamer-out.c (output_function): Likewise.
(output_constructor): Likewise.
* tree-inline.c (copy_bb): Likewise.
* tree-ssa-structalias.c (ipa_pta_execute): Likewise.
* varpool.c (symbol_table::remove_unreferenced_decls): Likewise.
2020-01-08  Martin Liska  <mliska@suse.cz>

* lto-partition.c (add_symbol_to_partition_1): Use ::dump_name or
::dump_asm_name instead of (::name or ::asm_name).
(lto_balanced_map): Likewise.
(promote_symbol): Likewise.
(rename_statics): Likewise.
* lto.c (lto_wpa_write_files): Likewise.
2020-01-08  Martin Liska  <mliska@suse.cz>

* gcc.dg/ipa/ipa-icf-1.c: Update expected scanned output.
* gcc.dg/ipa/ipa-icf-10.c: Likewise.
* gcc.dg/ipa/ipa-icf-11.c: Likewise.
* gcc.dg/ipa/ipa-icf-12.c: Likewise.
* gcc.dg/ipa/ipa-icf-13.c: Likewise.
* gcc.dg/ipa/ipa-icf-16.c: Likewise.
* gcc.dg/ipa/ipa-icf-18.c: Likewise.
* gcc.dg/ipa/ipa-icf-2.c: Likewise.
* gcc.dg/ipa/ipa-icf-20.c: Likewise.
* gcc.dg/ipa/ipa-icf-21.c: Likewise.
* gcc.dg/ipa/ipa-icf-23.c: Likewise.
* gcc.dg/ipa/ipa-icf-25.c: Likewise.
* gcc.dg/ipa/ipa-icf-26.c: Likewise.
* gcc.dg/ipa/ipa-icf-27.c: Likewise.
* gcc.dg/ipa/ipa-icf-3.c: Likewise.
* gcc.dg/ipa/ipa-icf-35.c: Likewise.
* gcc.dg/ipa/ipa-icf-36.c: Likewise.
* gcc.dg/ipa/ipa-icf-37.c: Likewise.
* gcc.dg/ipa/ipa-icf-38.c: Likewise.
* gcc.dg/ipa/ipa-icf-5.c: Likewise.
* gcc.dg/ipa/ipa-icf-7.c: Likewise.
* gcc.dg/ipa/ipa-icf-8.c: Likewise.
* gcc.dg/ipa/ipa-icf-merge-1.c: Likewise.
* gcc.dg/ipa/pr64307.c: Likewise.
* gcc.dg/ipa/pr90555.c: Likewise.
* gcc.dg/ipa/propmalloc-1.c: Likewise.
* gcc.dg/ipa/propmalloc-2.c: Likewise.
* gcc.dg/ipa/propmalloc-3.c: Likewise.

From-SVN: r280009

libgomp.texi: Fix typos, use https (actual change)

From-SVN: r280008

libgomp.texi: Fix typos, use https.

From-SVN: r280007

re PR tree-optimization/93199 (Compile time hog in sink_clobbers)

2020-01-08  Richard Biener  <rguenther@suse.de>

PR middle-end/93199
* tree-eh.c (sink_clobbers): Update virtual operands for
the first and last stmt only.  Add a dry-run capability.
(pass_lower_eh_dispatch::execute): Perform clobber sinking
after CFG manipulations and in RPO order to catch all
secondary opportunities reliably.

From-SVN: r280006

re PR target/93182 ([avr] Add -nodevicespecs option.)

PR target/93182
* doc/invoke.texi (AVR Options) <-nodevicespecs>: Document.

From-SVN: r280005

re PR other/92997 (gcc.dg/torture/ftrapv-1.c fails starting with r279523)

2020-01-08  Richard Biener  <rguenther@suse.de>

PR testsuite/92997
* gcc.dg/torture/ftrapv-1.c (iaddv): Use noipa attribute.

From-SVN: r280003

* gcc/doc/install.texi: Typo.

From-SVN: r280002

re PR tree-optimization/93199 (Compile time hog in sink_clobbers)

2019-01-08  Richard Biener  <rguenther@suse.de>

PR middle-end/93199
c/
* gimple-parser.c (c_parser_parse_gimple_body): Remove __PHI IFN
permanently.

* gimple-fold.c (rewrite_to_defined_overflow): Mark stmt modified.
* tree-ssa-loop-im.c (move_computations_worker): Properly adjust
virtual operand, also updating SSA use.
* gimple-loop-interchange.cc (loop_cand::undo_simple_reduction):
Update stmt after resetting virtual operand.
(tree_loop_interchange::move_code_to_inner_loop): Likewise.

* gimple-iterator.c (gsi_remove): When not removing the stmt
permanently do not delink immediate uses or mark the stmt modified.

From-SVN: r280000

Replace node->name/node->order with node->dump_name.

2020-01-08  Martin Liska  <mliska@suse.cz>

* ipa-fnsummary.c (dump_ipa_call_summary): Use symtab_node::dump_name.
(ipa_call_context::estimate_size_and_time): Likewise.
(inline_analyze_function): Likewise.
2020-01-08  Martin Liska  <mliska@suse.cz>

* lto-partition.c (lto_balanced_map): Use symtab_node::dump_name.

From-SVN: r279999

Use dump_asm_name for Callers/Calls in dump.

2020-01-08  Martin Liska  <mliska@suse.cz>

* cgraph.c (cgraph_node::dump): Use systematically
dump_asm_name.

From-SVN: r279998

Add -nodevicespecs option for avr.

gcc/
Add -nodevicespecs option for avr.

PR target/93182
* config/avr/avr.opt (-nodevicespecs): New driver option.
* config/avr/driver-avr.c (avr_devicespecs_file): Only issue
"-specs=device-specs/..." if that option is not set.
* doc/invoke.texi (AVR Options) <-nodevicespecs>: Document.

From-SVN: r279995

Implement 64-bit double functions.

gcc/
PR target/92055
* config.gcc (tm_defines) [target=avr]: Support --with-libf7,
--with-double-comparison.
* doc/install.texi: Document them.
* config/avr/avr-c.c (avr_cpu_cpp_builtins)
<WITH_LIBF7_LIBGCC, WITH_LIBF7_MATH, WITH_LIBF7_MATH_SYMBOLS>
<WITH_DOUBLE_COMPARISON>: New built-in defines.
* doc/invoke.texi (AVR Built-in Macros): Document them.
* config/avr/avr-protos.h (avr_float_lib_compare_returns_bool): New.
* config/avr/avr.c (avr_float_lib_compare_returns_bool): New function.
* config/avr/avr.h (FLOAT_LIB_COMPARE_RETURNS_BOOL): New macro.
libgcc/
PR target/92055
* config.host (tmake_file) [target=avr]: Add t-libf7,
t-libf7-math, t-libf7-math-symbols as specified by --with-libf7=.
* config/avr/t-avrlibc: Don't copy libgcc.a if there are modules
depending on sizeof (double) or sizeof (long double).
* config/avr/libf7: New folder.
libgcc/config/avr/libf7/
PR target/92055
* t-libf7: New file.
* t-libf7-math: New file.
* t-libf7-math-symbols: New file.
* libf7-common.mk: New file.
* libf7-asm-object.mk: New file.
* libf7-c-object.mk: New file.
* asm-defs.h: New file.
* libf7.h: New file.
* libf7.c: New file.
* libf7-asm.sx: New file.
* libf7-array.def: New file.
* libf7-const.def: New file.
* libf7-constdef.h: New file.
* f7renames.sh: New script.
* f7wraps.sh: New script.
* f7-renames.h: New generated file.
* f7-wraps.h: New generated file.

From-SVN: r279994

arm: Fix rmprofile multilibs when architecture includes +mp or +sec (PR target/93188)

When only the rmprofile multilibs are built, compiling for armv7-a
should select the generic v7 multilibs.  This used to work before +sec
and +mp were added to the architecture options but it was broken by
that update.  This patch fixes those variants and adds some tests to
ensure that they remain fixed ;-)

PR target/93188
* config/arm/t-multilib (MULTILIB_MATCHES): Add rules to match
armv7-a{+mp,+sec,+mp+sec} to appropriate armv7 multilib variants
when only building rm-profile multilibs.

* gcc.target/arm/multilib.exp: Add new tests for rm-profile only.

From-SVN: r279993

whitespace

From-SVN: r279989

Rename condition_variable_any wait* methods to match current draft standard

2020-01-07  Thomas Rodgers  <trodgers@redhat.com>

* include/std/condition_variable
(condition_variable_any::wait_on): Rename to match current draft
standard.
(condition_variable_any::wait_on_until): Likewise.
(condition_variable_any::wait_on_for): Likewise.
* testsuite/30_threads/condition_variable_any/stop_token/wait_on.cc:
Adjust tests to account for renamed methods.

From-SVN: r279988

Find matched aggregate lattice for self-recursive CP (PR ipa/93084)

2020-01-08  Feng Xue  <fxue@os.amperecomputing.com>

        PR ipa/93084
        * ipa-cp.c (self_recursively_generated_p): Find matched aggregate
        lattice for a value to check.
        (propagate_vals_across_arith_jfunc): Add an assertion to ensure
        finite propagation in self-recursive scc.

2020-01-08  Feng Xue  <fxue@os.amperecomputing.com>

        PR ipa/93084
        * gcc.dg/ipa/ipa-clone-3.c: New test.

From-SVN: r279987

Partially revert ipa-inline caller_growth_limits

We need to revert one line of code change from r279942 due to
performance degression.

gcc/ChangeLog:

2020-01-08  Luo Xiong Hu  <luoxhu@linux.ibm.com>

PR middle-end/93189
* ipa-inline.c (caller_growth_limits): Restore the AND.

From-SVN: r279986

compiler: fix loopdepth tracking in array slicing expression in escape analysis

    In the gc compiler, for slicing an array, its AST has an implicit
    address operation node. There isn't such node in the gofrontend
    AST. During the escape analysis, we create a fake node to mimic
    the gc compiler's behavior. For the fake node, the loopdepth was
    not tracked correctly, causing miscompilation. Since this is an
    address operation, do the same thing as we do for the address
    operator.

    Fixes golang/go#36404.

    Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/213643

From-SVN: r279984

Daily bump.

From-SVN: r279983

compiler, runtime: stop using __go_runtime_error

    Use specific panic functions instead, which are mostly already in the
    runtime package.

    Also correct "defer nil" to panic when we execute the defer, rather
    than throw when we queue it.

    Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/213642

From-SVN: r279979

Revert patch accidentily created on the wrong sandbox

From-SVN: r279973

Restore patch reverted on trunk instead of a branch

From-SVN: r279972

Revert a patch from luoxhu@linux.ibm.com

From-SVN: r279971

PR libstdc++/92124 fix incorrect container move assignment

* include/bits/stl_tree.h
(_Rb_tree<>::_M_move_assign(_Rb_tree&, false_type)): Replace
std::move_if_noexcept by std::move.
* testsuite/23_containers/map/92124.cc: New.
* testsuite/23_containers/set/92124.cc: New.

From-SVN: r279967

init.c (build_new): Add location_t parameter and use it throughout.

/gcc/cp
2020-01-07  Paolo Carlini  <paolo.carlini@oracle.com>

* init.c (build_new): Add location_t parameter and use it throughout.
(build_raw_new_expr): Likewise.
* parser.c (cp_parser_new_expression): Pass the combined_loc.
* pt.c (tsubst_copy_and_build): Adjust call.
* cp-tree.h: Update declarations.

/libcc1
2020-01-07  Paolo Carlini  <paolo.carlini@oracle.com>

* libcp1plugin.cc (plugin_build_new_expr): Update build_new call.

/gcc/testsuite
2020-01-07  Paolo Carlini  <paolo.carlini@oracle.com>

* g++.old-deja/g++.bugs/900208_03.C: Check locations too.
* g++.old-deja/g++.bugs/900519_06.C: Likewise.

From-SVN: r279963

compiler: avoid write barrier for a[i] = a[i][:v]

    This avoids generating a write barrier for code that appears in the
    Go1.14beta1 runtime package in (*pageAlloc).sysGrow:
        s.summary[l] = s.summary[l][:needIdxLimit]

    Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/213558

From-SVN: r279962

[amdgcn] Add more modes for vector comparisons

2020-01-07  Andrew Stubbs  <ams@codesourcery.com>

gcc/
* config/gcn/gcn-valu.md (VEC_1REG_INT_ALT): Delete iterator.
(VEC_ALLREG_ALT): New iterator.
(VEC_ALLREG_INT_MODE): New iterator.
(VCMP_MODE): New iterator.
(VCMP_MODE_INT): New iterator.
(vec_cmpu<mode>di): Use VCMP_MODE_INT.
(vec_cmp<u>v64qidi): New define_expand.
(vec_cmp<mode>di_exec): Use VCMP_MODE.
(vec_cmpu<mode>di_exec): New define_expand.
(vec_cmp<u>v64qidi_exec): New define_expand.
(vec_cmp<mode>di_dup): Use VCMP_MODE.
(vec_cmp<mode>di_dup_exec): Use VCMP_MODE.
(vcond<VEC_ALL1REG_MODE:mode><VEC_1REG_ALT:mode>): Rename ...
(vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>): ... to this.
(vcond<VEC_ALL1REG_MODE:mode><VEC_1REG_ALT:mode>_exec): Rename ...
(vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>_exec): ... to this.
(vcondu<VEC_ALL1REG_MODE:mode><VEC_1REG_INT_ALT:mode>): Rename ...
(vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>): ... to this.
(vcondu<VEC_ALL1REG_MODE:mode><VEC_1REG_INT_ALT:mode>_exec): Rename ...
(vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>_exec): ... to
this.
* config/gcn/gcn.c (print_operand): Fix 8 and 16 bit suffixes.
* config/gcn/gcn.md (expander): Add sign_extend and zero_extend.

From-SVN: r279961

PR c++/47877 - -fvisibility-inlines-hidden and member templates.

DECL_VISIBILITY_SPECIFIED is also true if an enclosing scope has explicit
visibility, and we don't want that to override -fvisibility-inlines-hidden.
So check for the attribute specifically on the function, like we already do
for template argument visibility restriction.

* decl2.c (determine_visibility): -fvisibility-inlines-hidden beats
explicit class visibility for a template.

From-SVN: r279960

Disallow 'B' constraints on amdgcn addc/subb

2020-01-07  Andrew Stubbs  <ams@codesourcery.com>

gcc/
* config/gcn/constraints.md (DA): Update description and match.
(DB): Likewise.
(Db): New constraint.
* config/gcn/gcn-protos.h (gcn_inline_constant64_p): Add second
parameter.
* config/gcn/gcn.c (gcn_inline_constant64_p): Add 'mixed' parameter.
Implement 'Db' mixed immediate type.
* config/gcn/gcn-valu.md (addcv64si3<exec_vcc>): Rework constraints.
(addcv64si3_dup<exec_vcc>): Delete.
(subcv64si3<exec_vcc>): Rework constraints.
(addv64di3): Rework constraints.
(addv64di3_exec): Rework constraints.
(subv64di3): Rework constraints.
(addv64di3_dup): Delete.
(addv64di3_dup_exec): Delete.
(addv64di3_zext): Rework constraints.
(addv64di3_zext_exec): Rework constraints.
(addv64di3_zext_dup): Rework constraints.
(addv64di3_zext_dup_exec): Rework constraints.
(addv64di3_zext_dup2): Rework constraints.
(addv64di3_zext_dup2_exec): Rework constraints.
(addv64di3_sext_dup2): Rework constraints.
(addv64di3_sext_dup2_exec): Rework constraints.

From-SVN: r279959

[testsuite][arm] xfail vect-epilogues for armbe

gcc/testsuite/ChangeLog:
2020-01-07  Andre Vieira  <andre.simoesdiasvieira@arm.com>

* gcc.dg/vect/vect-epilogues.c: XFAIL for arm big endian.

From-SVN: r279958

[doc] Add missing documentation for existing target checks

gcc/ChangeLog:
2020-01-07  Andre Vieira  <andre.simoesdiasvieira@arm.com>

* doc/sourcebuild.texi (arm_little_endian, arm_nothumb): Documented
existing target checks.

From-SVN: r279957

compiler: avoid a couple of compiler crashes

    These came up while building 1.14beta1 while the code was still invalid.
    The policy is to not bother committing invalid test cases that cause
    compiler crashes.

    Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/213537

From-SVN: r279956

install.texi: Bump minimal supported MPC version.

2020-01-07  Richard Biener  <rguenther@suse.de>

* doc/install.texi: Bump minimal supported MPC version.

From-SVN: r279955

Add a generic lhd_simulate_enum_decl

Normally we only create SVE ACLE functions when arm_sve.h is included.
But for LTO we need to do it at start-up, so that the functions are
already defined when streaming in the LTO objects.

One hitch with doing that is that LTO doesn't yet implement the
simulate_enum_decl langhook.  This patch adds a simple default
implementation that it can use.

2020-01-07  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
* langhooks-def.h (lhd_simulate_enum_decl): Declare.
(LANG_HOOKS_SIMULATE_ENUM_DECL): Use it.
* langhooks.c: Include stor-layout.h.
(lhd_simulate_enum_decl): New function.
* config/aarch64/aarch64-sve-builtins.cc (init_builtins): Call
handle_arm_sve_h for the LTO frontend.
(register_vector_type): Cope with null returns from pushdecl.

gcc/testsuite/
* gcc.target/aarch64/sve/pcs/asm_4.c: New test.

From-SVN: r279954

[AArch64] Use type attributes to mark types that use the SVE PCS

The SVE port needs to maintain a different type identity for
GNU vectors and "SVE vectors", since the types use different ABIs.
Until now we've done that using pointer equality between the
TYPE_MAIN_VARIANT and the built-in SVE type.

However, as Richard B noted, that doesn't work well for LTO,
where we stream both GNU and SVE types from a file instead of
creating them directly.  We need a mechanism for distinguishing
the types using streamed type information.

This patch does that using a new type attribute.  This attribute
is only meant to be used for the built-in SVE types and shouldn't
be user-visible.  The patch tries to ensure this by including a space
in the attribute name, like we already do for things like "fn spec"
and "omp declare simd".

2020-01-07  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
* config/aarch64/aarch64-protos.h (aarch64_sve::svbool_type_p)
(aarch64_sve::nvectors_if_data_type): Replace with...
(aarch64_sve::builtin_type_p): ...this.
* config/aarch64/aarch64-sve-builtins.cc: Include attribs.h.
(find_vector_type): Delete.
(add_sve_type_attribute): New function.
(lookup_sve_type_attribute): Likewise.
(register_builtin_types): Add an "SVE type" attribute to each type.
(register_tuple_type): Likewise.
(svbool_type_p, nvectors_if_data_type): Delete.
(mangle_builtin_type): Use lookup_sve_type_attribute.
(builtin_type_p): Likewise.  Add an overload that returns the
number of constituent vector and predicate registers.
* config/aarch64/aarch64.c (aarch64_sve_argument_p): Delete.
(aarch64_returns_value_in_sve_regs_p): Use aarch64_sve::builtin_type_p
instead of aarch64_sve_argument_p.
(aarch64_takes_arguments_in_sve_regs_p): Likewise.
(aarch64_pass_by_reference): Likewise.
(aarch64_function_value_1): Likewise.
(aarch64_return_in_memory): Likewise.
(aarch64_layout_arg): Likewise.

gcc/testsuite/
* g++.target/aarch64/sve/acle/general-c++/mangle_5.C: New test.
* gcc.target/aarch64/sve/pcs/asm_1.c: Likewise.
* gcc.target/aarch64/sve/pcs/asm_2.c: Likewise.
* gcc.target/aarch64/sve/pcs/asm_3.c: Likewise.

From-SVN: r279953

Don't mangle attributes that have a space in their name

The SVE port needs to maintain a different type identity for
GNU vectors and "SVE vectors" even during LTO, since the types
use different ABIs.  The easiest way of doing that seemed to be
to use type attributes.  However, these type attributes shouldn't
be user-facing; they're just a convenient way of representing the
types internally in GCC.

There are already several internal-only attributes, such as "fn spec"
and "omp declare simd".  They're distinguished from normal user-facing
attributes by having a space in their name, which means that it isn't
possible to write them directly in C or C++.

Taking the same approach mostly works well for SVE.  The only snag
I've hit so far is that the new attribute needs to (and only exists to)
affect type identity.  This means that it would normally get included
in mangled names, to distinguish it from types without the attribute.

However, the SVE ABI specifies a separate mangling for SVE vector types,
rather than using an attribute mangling + a normal vector mangling.
So we need some way of suppressing the attribute mangling for this case.

There are currently no other target-independent or target-specific
internal-only attributes that affect type identity, so this patch goes
for the simplest fix of skipping mangling for attributes whose names
contain a space (which usually wouldn't give a valid symbol anyway).
Other options I thought about were:

(1) Also make sure that targetm.mangled_type returns nonnull.

(2) Check directly for the target-specific name.

(3) Add a new target hook.

(4) Add new information to attribute_spec.  This would be very invasive
    at this stage, but maybe we should consider replacing all the boolean
    fields with flags?  That should make the tables slightly easier to
    read and would make adding new flags much simpler in future.

2020-01-07  Richard Sandiford  <richard.sandiford@arm.com>

gcc/cp/
* mangle.c (mangle_type_attribute_p): New function, split out from...
(write_CV_qualifiers_for_type): ...here.  Don't mangle attributes
that contain a space.

From-SVN: r279952

re PR tree-optimization/93156 (abused nonnull attribute evokes new segfault in gcc 10 since Nov 4 commit, 0fb958ab8aa)

PR tree-optimization/93156
* tree-ssa-ccp.c (bit_value_binop): For x * x note that the second
least significant bit is always clear.

* gcc.dg/tree-ssa/pr93156.c: New test.

From-SVN: r279951

re PR tree-optimization/93118 (>>32<<32 is not always converted into &~0ffffffffull at the tree level)

PR tree-optimization/93118
* match.pd ((x >> c) << c -> x & (-1<<c)): Add nop_convert?.  Add new
simplifier with two intermediate conversions.

* gcc.dg/tree-ssa/pr93118.c: New test.

From-SVN: r279950

Add Optimization keyword for TREE/RTL optimization passes.

2020-01-07  Martin Liska  <mliska@suse.cz>

* params.opt: Add Optimization for various parameters.

From-SVN: r279949

Document cloning for the target_clone attribute.

2020-01-07  Martin Liska  <mliska@suse.cz>

PR ipa/83411
* doc/extend.texi: Explain cloning for target_clone
attribute.

From-SVN: r279948

Make warn_inline Optimization option.

2020-01-07  Martin Liska  <mliska@suse.cz>

PR tree-optimization/92860
* common.opt: Make in Optimization option
as it is affected by -O0, which is an Optimization
option.
* tree-inline.c (tree_inlinable_function_p):
Use opt_for_fn for warn_inline.
(expand_call_inline): Likewise.
2020-01-07  Martin Liska  <mliska@suse.cz>

PR tree-optimization/92860
* gcc.dg/pr92860-2.c: New test.

From-SVN: r279947

Mark -free as Optimization option.

From-SVN: r279946

Mark param_min_crossjump_insns with Optimization keyword.

2020-01-07  Martin Liska  <mliska@suse.cz>

    PR optimization/92860
    * params.opt: Mark param_min_crossjump_insns with Optimization
    keyword.

From-SVN: r279945

re PR fortran/93162 (gcc/fortran/trans-openmp.c:2469:50: runtime error: load of value 145992800, which is not a valid value for type 'ar_type' since r279628)

PR fortran/93162
* trans-openmp.c (gfc_trans_omp_clauses): Check for REF_ARRAY type
before testing u.ar.type == AR_FULL.

From-SVN: r279944

re PR c++/91369 (Implement P0784R7: constexpr new)

PR c++/91369
* constexpr.c (struct constexpr_global_ctx): Add heap_alloc_count
member, initialize it to zero in ctor.
(cxx_eval_call_expression): Bump heap_dealloc_count when deleting
a heap object.  Don't cache calls to functions which allocate some
heap objects and don't deallocate them or deallocate some heap
objects they didn't allocate.

* g++.dg/cpp1y/constexpr-new.C: Expect an error explaining why
static_assert failed for C++2a.
* g++.dg/cpp2a/constexpr-new9.C: New test.

From-SVN: r279943

ipa-inline: Adjust condition for caller_growth_limits

Inline should return failure either (newsize > param_large_function_insns)
OR (newsize > limit).  Sometimes newsize is larger than
param_large_function_insns, but smaller than limit, inline doesn't return
failure even if the new function is a large function.
Therefore, param_large_function_insns and param_large_function_growth should be
OR instead of AND, otherwise --param large-function-growth won't
work correctly with --param large-function-insns.

gcc/ChangeLog:

2020-01-07  Luo Xiong Hu  <luoxhu@linux.ibm.com>

* ipa-inline-analysis.c (estimate_growth): Fix typo.
* ipa-inline.c (caller_growth_limits): Use OR instead of AND.

From-SVN: r279942

Refactor some code for a future change.

2020-01-06  Michael Meissner  <meissner@linux.ibm.com>

* config/rs6000/rs6000.c (hard_reg_and_mode_to_addr_mask): New
helper function to return the valid addressing formats for a given
hard register and mode.
(rs6000_adjust_vec_address): Call hard_reg_and_mode_to_addr_mask.

Index: gcc/config/rs6000/rs6000.c
===================================================================
--- gcc/config/rs6000/rs6000.c (revision 279912)
+++ gcc/config/rs6000/rs6000.c (working copy)
@@ -6729,6 +6729,30 @@ rs6000_expand_vector_extract (rtx target
     }
 }

+/* Helper function to return an address mask based on a physical register.  */
+
+static addr_mask_type
+hard_reg_and_mode_to_addr_mask (rtx reg, machine_mode mode)
+{
+  unsigned int r = reg_or_subregno (reg);
+  addr_mask_type addr_mask;
+
+  gcc_assert (HARD_REGISTER_NUM_P (r));
+  if (INT_REGNO_P (r))
+    addr_mask = reg_addr[mode].addr_mask[RELOAD_REG_GPR];
+
+  else if (FP_REGNO_P (r))
+    addr_mask = reg_addr[mode].addr_mask[RELOAD_REG_FPR];
+
+  else if (ALTIVEC_REGNO_P (r))
+    addr_mask = reg_addr[mode].addr_mask[RELOAD_REG_VMX];
+
+  else
+    gcc_unreachable ();
+
+  return addr_mask;
+}
+
 /* Adjust a memory address (MEM) of a vector type to point to a scalar field
    within the vector (ELEMENT) with a mode (SCALAR_MODE).  Use a base register
    temporary (BASE_TMP) to fixup the address.  Return the new memory address
@@ -6865,21 +6889,8 @@ rs6000_adjust_vec_address (rtx scalar_re
   if (GET_CODE (new_addr) == PLUS)
     {
       rtx op1 = XEXP (new_addr, 1);
-      addr_mask_type addr_mask;
-      unsigned int scalar_regno = reg_or_subregno (scalar_reg);
-
-      gcc_assert (HARD_REGISTER_NUM_P (scalar_regno));
-      if (INT_REGNO_P (scalar_regno))
- addr_mask = reg_addr[scalar_mode].addr_mask[RELOAD_REG_GPR];
-
-      else if (FP_REGNO_P (scalar_regno))
- addr_mask = reg_addr[scalar_mode].addr_mask[RELOAD_REG_FPR];
-
-      else if (ALTIVEC_REGNO_P (scalar_regno))
- addr_mask = reg_addr[scalar_mode].addr_mask[RELOAD_REG_VMX];
-
-      else
- gcc_unreachable ();
+      addr_mask_type addr_mask
+ = hard_reg_and_mode_to_addr_mask (scalar_reg, scalar_mode);

       if (REG_P (op1) || SUBREG_P (op1))
  valid_addr_p = (addr_mask & RELOAD_REG_INDEXED) != 0;

From-SVN: r279941

Update ChangeLog for last change

From-SVN: r279940

Update 'Q' constraint documentation.

2020-01-06  Michael Meissner  <meissner@linux.ibm.com>

* config/rs6000/constraints.md (Q constraint): Update
documentation.
* doc/md.texi (RS/6000 constraints): Update 'Q' cosntraint
documentation.

From-SVN: r279939

Fix bad code of vector extract of PC-relative address with variable element #.

2020-01-06  Michael Meissner  <meissner@linux.ibm.com>

* config/rs6000/vsx.md (vsx_extract_<mode>_var, VSX_D iterator):
Use 'Q' for doing vector extract from memory.
(vsx_extract_v4sf_var): Use 'Q' for doing vector extract from
memory.
(vsx_extract_<mode>_var, VSX_EXTRACT_I iterator): Use 'Q' for
doing vector extract from memory.
(vsx_extract_<mode>_<VS_scalar>mode_var): Use 'Q' for doing vector
extract from memory.

From-SVN: r279938

Add support for large prefixed address in adjusting a vector address.

2020-01-06  Michael Meissner  <meissner@linux.ibm.com>

* config/rs6000/rs6000.c (rs6000_adjust_vec_address): Add support
for the offset being 34-bits when -mcpu=future is used.

From-SVN: r279937

PR c++/92552 - ICE with inherited constrained default ctor.

We set TYPE_HAS_USER_CONSTRUCTOR on the template type in lookup_using_decl,
but we didn't copy it to the instantiation.  Setting it in
one_inherited_ctor is too late, as that gets called after we decide whether
to set CLASSTYPE_LAZY_DEFAULT_CTOR.  This change affects other testcases as
well; the changes are fixes for the other inherited constructor tests as
well.

* pt.c (instantiate_class_template_1): Copy
TYPE_HAS_USER_CONSTRUCTOR.
* class.c (one_inherited_ctor): Don't set it here.

From-SVN: r279936

PR c++/92739 - parsing requires clause with attributes.

gcc/cp/
* parser.c (cp_parser_constraint_requires_parens): Exclude
attributes as postfix expressions.

gcc/testsuite/
* g++.dg/concepts-pr92739.C: New test.

From-SVN: r279935

Daily bump.

From-SVN: r279932

pa.md: Revert change to use ordered_comparison_operator instead of...

* config/pa/pa.md: Revert change to use ordered_comparison_operator
instead of cmpib_comparison_operator in cmpib patterns.
* config/pa/predicates.md (cmpib_comparison_operator): Revert removal
of cmpib_comparison_operator.  Revise comment.

From-SVN: r279927