Xiang, Haihao [Thu, 23 Aug 2012 02:55:00 +0000 (22:55 -0400)]
VPP: Update the shader for DI on IVB
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Fri, 29 Jun 2012 08:51:00 +0000 (16:51 +0800)]
VPP: Add support DN on IVB
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Wed, 22 Aug 2012 06:51:40 +0000 (02:51 -0400)]
VPP: New combined shaders for Ivybridge
In addtion, add the license header.
You need the latest intel-gen4asm to build these shaders
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Zhao Halley [Thu, 19 Jul 2012 09:49:08 +0000 (12:49 +0300)]
VPP: distinguish first plane width in pixel or in byte
Signed-off-by: Zhao,Halley <halley.zhao@intel.com>
Xiang, Haihao [Thu, 28 Jun 2012 04:01:32 +0000 (12:01 +0800)]
VPP: Add support for UYVY in image process
Tested on SNB and IVB.
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Thu, 28 Jun 2012 03:54:24 +0000 (11:54 +0800)]
VPP: color conversion between planar and packed formats on IVB
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Thu, 28 Jun 2012 03:35:50 +0000 (11:35 +0800)]
VPP: New shaders for color conversion between packed and planar YUV on IVB
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Zhao Halley [Wed, 27 Jun 2012 06:45:21 +0000 (09:45 +0300)]
VPP: Support NV12/I420/YV12->I420/YV12 conversion
Signed-off-by: Zhao,Halley <halley.zhao@intel.com>
Zhao halley [Thu, 17 May 2012 07:39:43 +0000 (15:39 +0800)]
VPP: add YV12 to YUY2 conversion
Signed-off-by: Zhao,Halley <halley.zhao@intel.com>
Xiang, Haihao [Wed, 27 Jun 2012 07:20:22 +0000 (15:20 +0800)]
VPP: Fix the width of the UV surface for AVS on IVB
The width is specified in units of pixel.
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Tue, 26 Jun 2012 07:20:50 +0000 (15:20 +0800)]
VPP: Only update u/v offset for some video processes
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Tue, 26 Jun 2012 07:03:38 +0000 (15:03 +0800)]
VPP: Fix the parameter initialization for IVB
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Wed, 30 May 2012 01:21:38 +0000 (09:21 +0800)]
VPP: Don't render the target surface with background if alpha value is 0
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Zhao halley [Thu, 31 May 2012 09:00:29 +0000 (17:00 +0800)]
VPP: update image width of packed format
Signed-off-by: Zhao,Halley <halley.zhao@intel.com>
Zhao halley [Thu, 17 May 2012 07:49:34 +0000 (15:49 +0800)]
VPP: Add yuyv->nv12 conversion in image processing
Signed-off-by: Zhao,Halley <halley.zhao@intel.com>
Zhao halley [Thu, 17 May 2012 07:28:16 +0000 (15:28 +0800)]
VPP: add NV12 to YUY2 color conversion for video process
Signed-off-by: Zhao,Halley <halley.zhao@intel.com>
Xiang, Haihao [Tue, 26 Jun 2012 04:51:29 +0000 (12:51 +0800)]
VPP: Update the PA shader for ILK/SNB
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Zhao halley [Thu, 31 May 2012 09:00:26 +0000 (17:00 +0800)]
VPP: fix a mistake in PA_Load_8x8.asm
Signed-off-by: Zhao,Halley <halley.zhao@intel.com>
Zhao halley [Wed, 16 May 2012 23:58:31 +0000 (07:58 +0800)]
VPP: add YUYV to NV12 conversion shaders for gen5_6
Signed-off-by: Zhao,Halley <halley.zhao@intel.com>
Zhao halley [Thu, 31 May 2012 09:00:24 +0000 (17:00 +0800)]
VPP: add pa_load_save_pl3 for YUY2-->YV12 conversion (SNB/ILK)
Signed-off-by: Zhao,Halley <halley.zhao@intel.com>
Zhao halley [Thu, 3 May 2012 02:50:51 +0000 (10:50 +0800)]
VPP: add pl3_load_save_pa.asm etc
Signed-off-by: Zhao, Halley <halley.zhao@intel.com>
Halley Zhao [Fri, 27 Apr 2012 05:54:13 +0000 (13:54 +0800)]
VPP: add NV12 load save PA shader for gen5_6
Signed-off-by Zhao,Halley <halley.zhao@intel.com>
Xiang, Haihao [Fri, 4 May 2012 08:33:47 +0000 (16:33 +0800)]
VPP: pass the origin of source region to vpp kernel
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Fri, 4 May 2012 02:58:48 +0000 (10:58 +0800)]
VPP: Render target surface with background color
Currently ignore alpha value. We will fix it once the
alpha blend kernel is ready
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Thu, 19 Apr 2012 05:11:44 +0000 (13:11 +0800)]
Don't use DNDI kernel on Ivybridge temporarily
We will integrate the right kernel for DN/DI on Ivybridge as soon as possible.
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Thu, 22 Mar 2012 01:31:05 +0000 (09:31 +0800)]
VPP: Use AVS kernel to implement normal scaling on Sandybridge
Set parameter nlas to 0 to disable NLAS
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit
0b38176cda6047b05cf0eacd913f57ce501f4fdf)
Xiang, Haihao [Thu, 1 Mar 2012 04:57:21 +0000 (12:57 +0800)]
VPP: Fix map/unmap mismatches in video process
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit
918f26fc0c5c38fb8c1002dd48c857897931c5d5)
Xiang, Haihao [Mon, 6 Feb 2012 06:36:21 +0000 (14:36 +0800)]
VPP: Pixel format conversion for IMC1/IMC3
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Wed, 1 Feb 2012 06:22:56 +0000 (14:22 +0800)]
VPP: Fix the base offset of cr(V) surface
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Mon, 30 Jan 2012 07:17:30 +0000 (15:17 +0800)]
VPP: Reuse AVS kernel for pixel format conversion on Ivybridge
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Thu, 19 Jan 2012 02:44:33 +0000 (10:44 +0800)]
VPP: Build new shaders for Ivybridge
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Fri, 13 Jan 2012 00:44:46 +0000 (08:44 +0800)]
VPP: use AM_V_GEN to generate files quietly on Ivybridge
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Mon, 30 Jan 2012 07:07:58 +0000 (15:07 +0800)]
VPP: Add support for I420/YV12/IMC1/IMC3 input/output surface for AVS on Ivybridge
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Mon, 30 Jan 2012 05:52:51 +0000 (13:52 +0800)]
VPP: Normal scaling on Ivybridge
Need to adjust parameters later
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Mon, 30 Jan 2012 05:33:06 +0000 (13:33 +0800)]
VPP: Clear target surface with specified color
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Mon, 30 Jan 2012 05:42:09 +0000 (13:42 +0800)]
VPP: Fix AVS parameters for Ivybridge
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Li, Xiaowei A [Mon, 29 Oct 2012 18:57:33 +0000 (02:57 +0800)]
VPP: Refine the Makefile.am in gen5_6
Signed-off-by: Xiang,Haihao <haihao.xiang@intel.com>
Li, Xiaowei A [Mon, 29 Oct 2012 18:43:57 +0000 (02:43 +0800)]
VPP: avoid depending on va_backend.h for some file
Signed-off-by: Xiang, Haihai <haihao.xiang@intel.com>
Xiang, Haihao [Thu, 24 Nov 2011 06:21:03 +0000 (14:21 +0800)]
VPP: Fix parameters for SCALING & AVS
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Thu, 17 Nov 2011 02:47:45 +0000 (10:47 +0800)]
VPP: Fixed surface height for DN/DI
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Wed, 16 Nov 2011 06:16:38 +0000 (14:16 +0800)]
VPP: Update DNDI kernel and DNDI states on Sandybridge
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Wed, 26 Oct 2011 06:02:20 +0000 (14:02 +0800)]
VPP: Update surface state, sampler state and kernel for AVS on Sandybridge
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Fri, 16 Sep 2011 07:37:31 +0000 (15:37 +0800)]
VPP: update AVS kernel
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Li, Xiaowei A [Mon, 29 Oct 2012 03:09:51 +0000 (11:09 +0800)]
VPP: Support video process on Ivybridge
Only AVS enabled currently on Ivybridge.
Signed-off-by: Li,Xiaowei A <xiaowei.a.li@intel.com>
Li, Xiaowei A [Mon, 29 Oct 2012 03:08:12 +0000 (11:08 +0800)]
VPP: Update the gen7 shader Makefile.am
Signed-off-by: Li,Xiaowei A <xiaowei.a.li@intel.com>
Li, Xiaowei A [Mon, 29 Oct 2012 01:28:51 +0000 (09:28 +0800)]
VPP: Add support for field and frame mixed content
Signed-off-by: Li,Xiaowei A <xiaowei.a.li@intel.com>
Li, Xiaowei A [Sun, 28 Oct 2012 20:11:56 +0000 (04:11 +0800)]
VPP: Support DN only on Ironlake and Sandybridge
signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Mon, 15 Aug 2011 08:17:15 +0000 (16:17 +0800)]
VPP: Emit base address command before other commands
This fixes potential GPU hang issue on SandyBridge
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Mon, 15 Aug 2011 06:45:02 +0000 (14:45 +0800)]
VPP: set surface base address for post processing
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Li, Xiaowei A [Tue, 30 Oct 2012 18:49:54 +0000 (02:49 +0800)]
VPP: Add image format conversion function
Signed-off-by: Li,Xiaowei A <xiaowei.a.li@intel.com>
Li, Xiaowei A [Tue, 30 Oct 2012 18:43:36 +0000 (02:43 +0800)]
VPP: code refine for video process
Signed-off-by: Li,Xiaowei A <xiaowei.a.li@intel.com>
Li, Xiaowei A [Fri, 26 Oct 2012 01:34:38 +0000 (09:34 +0800)]
VPP: Add shaders for video process on Ivybridge.
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Li, Xiaowei A [Fri, 26 Oct 2012 01:03:55 +0000 (09:03 +0800)]
VPP: Add NV12<->PL3 load and save shaders to gen5_6/
Signed-off-by: Li,Xiaowei A <xiaowei.a.li@intel.com>
Li, Xiaowei A [Thu, 25 Oct 2012 23:21:06 +0000 (07:21 +0800)]
VPP: move all vpp shaders to new gen5_6/ directory.
Signed-off-by: Li,Xiaowei A <xiaowei.a.li@intel.com>
Li, Xiaowei A [Tue, 30 Oct 2012 19:52:57 +0000 (03:52 +0800)]
VPP: Modify the definition for PP module number
Signed-off-by: Li,Xiaowei A <xiaowei.a.li@intel.com>
Xiang, Haihao [Wed, 31 Oct 2012 08:14:56 +0000 (16:14 +0800)]
Update the check for intel-gen4asm to support Haswell
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Tue, 30 Oct 2012 00:31:20 +0000 (08:31 +0800)]
Remove the dependence of va_vpp.h
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Wed, 24 Oct 2012 08:47:53 +0000 (16:47 +0800)]
Make it built against the current upstream libdrm
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Li,Xiaowei [Fri, 28 Sep 2012 14:35:55 +0000 (22:35 +0800)]
VEBox: setup haswell vebox pipeline for video post process
Currently, deinterlacing, denoise, color balance, color space conversion
are supported by vebox pipeline, and only deinterlace is exposed to video
post process on haswell.
Signed-off-by: Li,Xiaowei A <xiaowei.a.li@intel.com>
Li,Xiaowei [Tue, 25 Sep 2012 07:39:01 +0000 (15:39 +0800)]
VEBox: add special batch command and macro for VEBox command streamer
VEBox is a new feature introducted in haswell, which aims
to do video process through fixed functions, it also owns
one seperated command streamer.
Signed-off-by: Li,Xiaowei A <xiaowei.a.li@intel.com>
Li,Xiaowei [Wed, 26 Sep 2012 06:10:32 +0000 (14:10 +0800)]
VPP: enabling scaling function for post processing
Signed-off-by: Li,Xiaowei A <xiaowei.a.li@intel.com>
Gautam [Wed, 24 Oct 2012 08:16:42 +0000 (16:16 +0800)]
Fix thread issue with AVC private surafce
https://bugs.freedesktop.org/show_bug.cgi?id=55282
Signed-off-by: Gautam <manamgautam@gmail.com>
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Wed, 24 Oct 2012 08:05:05 +0000 (16:05 +0800)]
Unify the code for xxx_free_avc_surface
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Mon, 15 Oct 2012 15:10:18 +0000 (11:10 -0400)]
Haswell: Disable Picture ID Remapping for AVC decoding
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Zhao Yakui [Tue, 18 Sep 2012 13:40:03 +0000 (09:40 -0400)]
Handle the MFX change between A stepping and B-stepping for haswell
The A0-stepping is still covered.
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Zhao Yakui [Tue, 18 Sep 2012 13:40:03 +0000 (09:40 -0400)]
Add the support of encoding P frame on haswell
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Zhao Yakui [Tue, 18 Sep 2012 13:40:03 +0000 (09:40 -0400)]
Add the Intra VME for I-frame on Haswell
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Zhao Yakui [Tue, 18 Sep 2012 13:40:03 +0000 (09:40 -0400)]
Add the seperated file for media decoding on Haswell
As the MFX involves quite a lot of changes between Ivy and Haswell,
the seperated file is added for the media decoding on haswell. This
can avoid the complex backward logic for Ivy.
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Zhao Yakui [Tue, 18 Sep 2012 13:40:03 +0000 (09:40 -0400)]
Add the separated file for media encoding on haswell
There exist a lot of changes about the media encoder between Haswell
and IvyBridge. For example: the VME programming and the corresponding
general media command. To be simple, the separated files are added for Haswell.
Otherwise it has to consider the complex backward compatibility.
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Gwenole Beauchesne [Tue, 18 Sep 2012 13:40:03 +0000 (09:40 -0400)]
haswell: fix render kernels.
Regenerate render kernels for Haswell because JMPI instruction semantics
changed there. In particular, the offset is now expressed in bytes instead
of 64-bit units.
Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
Gwenole Beauchesne [Tue, 18 Sep 2012 13:40:02 +0000 (09:40 -0400)]
haswell: set "Shader Channel Select" fields in surface state.
For normal behaviour, each Shader Channel Select should be set to the
value indicating that same channel. i.e. Shader Channel Select Red is
set to SCS_RED, Shader Channel Select Green is set to SCS_GREEN, etc.
Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
Gwenole Beauchesne [Tue, 18 Sep 2012 13:40:02 +0000 (09:40 -0400)]
haswell: fix 3DSTATE_PS to fill in number of samples.
The sample mask value must match what is set for 3DSTATE_SAMPLE_MASK,
through gen7_emit_invarient_states().
Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
Gwenole Beauchesne [Tue, 18 Sep 2012 13:40:02 +0000 (09:40 -0400)]
haswell: fix max PS threads shift value.
The maximum number of threads is now a 9-bit value. Thus, one more bit
towards LSB was re-used. i.e. bit position is now 23 instead of 24 on
Ivy Bridge.
Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
Gwenole Beauchesne [Tue, 18 Sep 2012 13:40:02 +0000 (09:40 -0400)]
intel: fix max number of threads used on Ivy Bridge.
Fix the max number of threads to be used on Ivy Bridge. In particular,
the GEN7_PS_MAX_THREADS_SHIFT offset was wrong, thus causing the GPU
to use half of what was specified.
Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
Gwenole Beauchesne [Tue, 18 Sep 2012 13:40:02 +0000 (09:40 -0400)]
haswell: use at least 64 URB entries for GT2+.
Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
Gwenole Beauchesne [Tue, 18 Sep 2012 13:40:02 +0000 (09:40 -0400)]
Add haswell PCI IDs
Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Zhao Yakui [Tue, 18 Sep 2012 13:40:02 +0000 (09:40 -0400)]
Fix inconsistent surface dimension during allocating surface buffer object
When one surface is created, the height/width is aligned to 16 pixels.
But when trying to allocate the buffer object for it, the width is aligned
to 128 and height is aligned to 32. If the surface is mapped and accessed
before allocating the buffer object, the APP will get the incorrect dimension.
From: Zhao Yakui <yakui.zhao@intel.com>
Gwenole Beauchesne [Mon, 8 Oct 2012 08:30:23 +0000 (10:30 +0200)]
Fix build with VA-API 0.32.0.
Really fix build back to VA-API 0.32.0, and not only VA-API 0.32.1,
thus checking for VA/JPEG decode API. VA-API 0.32.0 was provided by
libva 1.0.15 and earlier version, which is still available in
Ubuntu 12.04-LTS.
Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
Gwenole Beauchesne [Mon, 8 Oct 2012 08:20:27 +0000 (10:20 +0200)]
Add sysdeps.h for system-dependent definitions.
Add new "sysdeps.h" file for system-dependent definitions and common
include files. This will be helpful for Android support so that to
stack every definition useful to Android that could not be auto-generated
since configure script is not built there.
Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
Gwenole Beauchesne [Mon, 8 Oct 2012 08:04:03 +0000 (10:04 +0200)]
Fix build with VA-API 0.32.0.
Add new <va/va_backend_compat.h> glue file with various utility functions
and definitions to help building the driver against a previous version of
libva (1.0.x for VA-API 0.32.x in particular).
Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
Gwenole Beauchesne [Thu, 4 Oct 2012 08:32:32 +0000 (10:32 +0200)]
render: fix rotation vertices for Ironlake.
Ironlake requires the vertex buffer to be ordered in a particular way.
More specifically, the correct order is bottom-right, bottom-left and
top-left vertices in "output" view, i.e. transformed.
Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
Gwenole Beauchesne [Thu, 4 Oct 2012 08:30:12 +0000 (10:30 +0200)]
Fix make dist.
The recent changes for Wayland support broke make dist. This is due
to the fact that DIST_SUBDIRS requires all subdirectories needed to
complete make dist. i.e. the generated list of subdirectories used
for make dist is *not* an union of DIST_SUBDIRS and SUBDIRS.
Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
Zhao Halley [Fri, 21 Sep 2012 02:30:55 +0000 (10:30 +0800)]
fix ttmbf/ttfrm when vstransform is 0
Zhao Yakui [Fri, 21 Sep 2012 14:28:59 +0000 (10:28 -0400)]
Fix inconsistent surface dimension during allocating surface buffer object
This is to fix the regression caused by
e25b3fbce3fc3c13ca054ba9a512bec954642fa8.
When one surface is created,the height/width is aligned to 16 pixels. But when
trying to allocate buffer object for it on SNB/IVB and the later chips,the width
is aligned to 128 and height is aligned to 32. If the surface is mapped and accessed
before allocating surface buffer object, the APP will get incorrect dimension.
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Homer Hsing [Thu, 27 Sep 2012 05:24:09 +0000 (13:24 +0800)]
Change ILLEGAL instructions to NOP instructions in avc_mc.g4b.gen5
Gwenole Beauchesne [Mon, 6 Aug 2012 14:11:47 +0000 (16:11 +0200)]
wayland: drop explicit dependencies to Wayland libraries.
Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
Zhao halley [Thu, 24 May 2012 09:13:31 +0000 (17:13 +0800)]
wayland: ship with wayland-drm protocol.
Signed-off-by: Zhao Halley <halley.zhao@intel.com>
Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
Gwenole Beauchesne [Sat, 7 Apr 2012 18:08:03 +0000 (20:08 +0200)]
Add Wayland support.
Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
Gwenole Beauchesne [Fri, 29 Jun 2012 12:56:28 +0000 (14:56 +0200)]
Drop explicit dependency on libva-x11.
Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
Dmitry Ermilov [Thu, 7 Jun 2012 12:03:01 +0000 (08:03 -0400)]
Allow build without VA/X11 API.
Signed-off-by: Dmitry Ermilov <dmitry.ermilov@intel.com>
Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
Dmitry Ermilov [Thu, 7 Jun 2012 12:03:01 +0000 (08:03 -0400)]
Add raw DRM support.
Signed-off-by: Dmitry Ermilov <dmitry.ermilov@intel.com>
Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
Gwenole Beauchesne [Mon, 6 Aug 2012 11:22:07 +0000 (13:22 +0200)]
Add shared library utils.
Add a few helpers to open shared libraries and load specific symbols
from there.
Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
Gwenole Beauchesne [Fri, 6 Apr 2012 15:24:36 +0000 (17:24 +0200)]
dri: cope with drm_state changes.
Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
Gwenole Beauchesne [Wed, 29 Aug 2012 16:37:25 +0000 (18:37 +0200)]
render: add support for display rotation attribute.
Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
Gwenole Beauchesne [Wed, 29 Aug 2012 15:27:25 +0000 (17:27 +0200)]
render: prepare for display attributes.
Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
Gwenole Beauchesne [Thu, 20 Sep 2012 08:35:08 +0000 (10:35 +0200)]
README: fix libva required version.
Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
Gwenole Beauchesne [Thu, 20 Sep 2012 08:26:01 +0000 (10:26 +0200)]
configure: simplify check for VA-API version.
Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
Gwenole Beauchesne [Thu, 20 Sep 2012 08:01:30 +0000 (10:01 +0200)]
build: use libva-intel-driver as the package name.
Most OSVs adopted XXX-intel-driver as their shipping packages for the
Intel VA driver, with XXX = { vaapi, libva }. Adopt libva-intel-driver
from now on for upstream packages too.
Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
Stéphane Marchesin [Fri, 3 Aug 2012 03:06:26 +0000 (20:06 -0700)]
intel-driver: Call intel_driver_terminate after i965_destroy_heap
Otherwise this leads to use-after-free of the bufmgr.
Signed-off-by: Stéphane Marchesin <marcheu@chromium.org>
Xiang, Haihao [Thu, 2 Aug 2012 06:00:18 +0000 (14:00 +0800)]
Bump a new version for development
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
projects / profile / ivi / vaapi-intel-driver.git / log