Ian Romanick [Thu, 12 Aug 2021 22:48:10 +0000 (15:48 -0700)]
iris: Eliminate iris_uncompiled_shader::needs_edge_flag
Use the flag that was set by nir_lower_passthrough_edgeflags. The
lowering passes will soon be moved to a finalize_nir hook, so there
won't be any choice. Ideally we'd like to eliminate iris_fix_edge_flags
completely, and this is a first step.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12858>
Ian Romanick [Tue, 24 Aug 2021 22:34:13 +0000 (15:34 -0700)]
nir/edgeflags: Add a flag to indicate the edge flag input is needed
Most modern hardware needs the edge flag added as a hidden vertex input
and needs code added to the vertex shader to copy the input to an
output. Intel hardware is a little different. Gfx4 and Gfx5 hardware
works in the previously described mannter. Gfx6+ hardware needs the
edge flag as a specific vertex shader input, and that input is magically
processed by fixed-function hardware without need for extra shader code.
This flag signals only that the vertex shader input is needed. It would
be nice if we could decouple adding the vertex shader input from
generating the copy-to-output code, but that has proven to be
challenging. Not having that code causes other passes to want to
eliminate that shader input.
v2: Convert conditional to assertion. This pass is only called for
vertex shaders. Suggested by Ken.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12858>
Ian Romanick [Wed, 11 Aug 2021 00:30:13 +0000 (17:30 -0700)]
iris: Calculate uses_atomic_load_store after all lowering
The lowering passes will soon be moved to another function, so there
won't be any choice.
As a side benefit, this allows eliminating the uses_atomic_load_store
**pointer** parameter from brw_nir_lower_storage_image. For some reason
crocus was passing false instead of NULL.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12858>
Ian Romanick [Tue, 10 Aug 2021 23:46:09 +0000 (16:46 -0700)]
iris: crocus: Use shader_info::is_arb_asm flag
...instead of looking for "ARB" in the name of the shader. This matches
the behavior of i965. Using "ARB" was added in
a1ebac3750e ("iris:
Implement ALT mode for ARB_{vertex,fragment}_shader"), but there's no
explanation of why that method was used.
v2: Just use shader_info::is_arb_asm everywhere instead of
iris_uncompiled_shader::use_alt_mode. Suggested by Ken.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12858>
Rob Clark [Fri, 17 Sep 2021 19:22:30 +0000 (12:22 -0700)]
freedreno/a6xx: Pre-bake SO-disable stateobj
No need to re-create this every time we transition from stream-out
enabled to disabled.
Creation of streamout_disable_stateobj is deferred until we create
a program state using streamout to avoid creating it unnecessarily
and because fd6_prog_init() is called before ctx->pipe is created.
(Changing that ordering is complicated by the fact that u_blitter
copies pctx->bind_fs_state(), and friends.)
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12918>
Mike Blumenkrantz [Fri, 17 Sep 2021 12:22:48 +0000 (08:22 -0400)]
zink: don't leak drm fd on drmPrimeFDToHandle failure
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12911>
Rob Clark [Fri, 18 Jun 2021 18:37:11 +0000 (11:37 -0700)]
freedreno: Add perf warning for WC readback
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11176>
Rob Clark [Fri, 18 Jun 2021 17:59:40 +0000 (10:59 -0700)]
freedreno: Used cached coherent for staging resources
These are really only accessed by the GPU once, so CPU access speed is
more important. Especially for PIPE_MAP_READ.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11176>
Rob Clark [Sun, 6 Jun 2021 19:31:36 +0000 (12:31 -0700)]
freedreno/drm: Use cached-coherent for control bo
Userspace frequently reads the elapsed fence, but the GPU only writes it
once per submit. So this should be another useful place for cached-
coherent.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11176>
Rob Clark [Wed, 2 Jun 2021 18:45:29 +0000 (11:45 -0700)]
freedreno/drm: Use cached-coherent cmdstream buffers
Some more extreme examples, like gl_driver2_off, can be bottlenecked on
writes to cmdstream. OTOH the CP is pretty pipelined in how it slurps
in memory, so the penalty of using coherent buffers should not be so
much.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11176>
Rob Clark [Wed, 2 Jun 2021 18:44:54 +0000 (11:44 -0700)]
freedreno/drm: Add cached-coherent bo support
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11176>
Rob Clark [Wed, 15 Sep 2021 22:16:48 +0000 (15:16 -0700)]
freedreno/drm: Don't return shared/control bo's to cache
They can never be allocated from the cache, as fd_bo_state() would
return FD_BO_STATE_UNKNOWN
Fixes:
7dabd624649 ("freedreno/drm: Userspace fences")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11176>
Rob Clark [Fri, 18 Jun 2021 16:58:11 +0000 (09:58 -0700)]
freedreno/drm: Consider allocation flags in bo-cache
It hasn't really mattered until now, as we keep a separate cache for
cmdstream (which is FD_BO_GPU_READONLY), and the only other flag so
far is FD_BO_SCANOUT (which the bo cache probably messes up, but it
does not matter on most hw, and on hw where it does the scanout buffer
will be imported (and therefore won't end up in the bo cache).
But when we add cached-coherent (or if we wanted to use GPU_READONLY
more) it starts to matter.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11176>
Rob Clark [Fri, 18 Jun 2021 16:53:22 +0000 (09:53 -0700)]
freedreno/drm: Rename bo->flags to bo->reloc_flags
Next patch adds alloc_flags, lets rename bo->flags first to make it
clear *which* flags these are.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11176>
Rob Clark [Sun, 6 Jun 2021 19:11:28 +0000 (12:11 -0700)]
freedreno/drm: Garbage collect unused bo_cache
The ring_cache that is actually used is in fd_device.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11176>
Christian Gmeiner [Fri, 12 Jun 2020 11:23:44 +0000 (13:23 +0200)]
ci/bare-metal: add etnaviv
Add deqp gles2 CI run for GC2000.
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Acked-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12852>
Christian Gmeiner [Mon, 6 Apr 2020 19:59:14 +0000 (21:59 +0200)]
ci/bare-metal: add support for eth008 power relay
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Acked-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12852>
Christian Gmeiner [Sat, 9 May 2020 19:53:24 +0000 (21:53 +0200)]
ci/bare-metal: add telnet based serial
Makes it possible to use e.g. a ser2net server in the lan.
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Acked-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12852>
Christian Gmeiner [Tue, 14 Sep 2021 08:39:24 +0000 (10:39 +0200)]
ci: update kernel
Switch to v5.13-rc5-for-mesa-ci-
2bb5d9ffd79c branch, which includes
etnaviv MMU patches.
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Acked-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12852>
Christian Gmeiner [Mon, 21 Dec 2020 12:37:38 +0000 (13:37 +0100)]
ci: include etnaviv support in ARMHF container.
Build the kernel with CONFIG_DRM_ETNAVIV=y and include
imx6q-cubox-i.dtb.
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Acked-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12852>
Rhys Perry [Thu, 5 Nov 2020 13:18:08 +0000 (13:18 +0000)]
nir/algebraic: distribute fmul(fadd(a, b), c) when b and c are constants
This allows for more MAD/FMA instructions to be created.
fossil-db (Sienna Cichlid):
Totals from 50134 (33.46% of 149839) affected shaders:
VGPRs: 2436536 -> 2436000 (-0.02%); split: -0.05%, +0.03%
SpillSGPRs: 13136 -> 13135 (-0.01%); split: -0.02%, +0.02%
CodeSize:
206621424 ->
206278292 (-0.17%); split: -0.23%, +0.07%
MaxWaves: 1116804 -> 1117448 (+0.06%); split: +0.07%, -0.01%
Instrs:
38977460 ->
38862886 (-0.29%); split: -0.33%, +0.04%
Latency:
832425389 ->
827432260 (-0.60%); split: -0.63%, +0.03%
InvThroughput:
184193457 ->
183563350 (-0.34%); split: -0.37%, +0.03%
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7458>
Emma Anholt [Thu, 9 Sep 2021 23:50:33 +0000 (16:50 -0700)]
freedreno: Remove dead fd_batch_reset().
Unused since
58f5605124a7 ("freedreno: Handle full blit discards by
invalidating the resource.")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11511>
Emma Anholt [Wed, 30 Jun 2021 23:33:22 +0000 (16:33 -0700)]
freedreno: Use a BO bitset for faster checks for resource referenced.
When moving the batch cache to the context, I added hash table lookups
from batch to rsc for "is this resource in use" because we could no longer
store data in the rsc bo under the batch cache's lock.
We can save that cost by tracking a bitfield of resources referenced by
the batch, which gives us very cheap checks in the draw path at a minor
cost in memory. We can just use the GEM BO handle, since it's a nice
small integer already (we can't use the TC buffer ID, because the frontend
changes that, and we're in the driver thread).
This required moving the !pending() assert up in resource shadowing, since
the BO swap meant we were checking pending on the wrong resource.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11511>
Emma Anholt [Mon, 25 Jan 2021 20:04:48 +0000 (12:04 -0800)]
freedreno: Remove the submit lock locking.
I think the whole submit lock thing should be possible to remove now, but
just getting rid of the lock since we're no longer sharing batches between
ctxes means another several percent draw overhead improvement.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11511>
Emma Anholt [Tue, 15 Jun 2021 20:44:27 +0000 (13:44 -0700)]
freedreno: Move the batch cache to the context.
Our draw call rate was significantly limited by the atomics we had to do
to manage access to the batch cache.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11511>
Emma Anholt [Thu, 16 Sep 2021 18:46:27 +0000 (11:46 -0700)]
freedreno: Use TC's flag for whether get_query is in the driver thread.
In moving batch cache to the context, the check for whether there's
pending work being done to this resources ends up accessing the context,
so we can't do it outside of the fd_context_access_begin(). This flag
lets us do the driver-thread asserts before we've decided whether we need
to flush.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11511>
Emma Anholt [Thu, 17 Jun 2021 03:34:37 +0000 (20:34 -0700)]
freedreno: Precompute resource pointer hash values.
It was around half a percent of the CPU in the fd-bc-ctx branch, and adds
4b to our 472b struct.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11511>
Rhys Perry [Fri, 3 Sep 2021 14:33:22 +0000 (15:33 +0100)]
aco/nops: fix handle_raw_hazard_internal when visiting the current block
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12720>
Rhys Perry [Fri, 3 Sep 2021 14:29:08 +0000 (15:29 +0100)]
aco/nops: add State
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12720>
Rhys Perry [Mon, 2 Aug 2021 14:44:47 +0000 (15:44 +0100)]
aco/nops: create handle_raw_hazard_instr helper
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12720>
Rhys Perry [Mon, 2 Aug 2021 15:13:16 +0000 (16:13 +0100)]
aco/nops: use up-to-date mask_size
fossil-db (Pitcairn):
Totals from 6 (0.00% of 129702) affected shaders:
CodeSize: 8760 -> 8736 (-0.27%)
Instrs: 1714 -> 1708 (-0.35%)
Latency: 12325 -> 12302 (-0.19%)
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12720>
Connor Abbott [Fri, 17 Sep 2021 13:37:49 +0000 (15:37 +0200)]
ir3: Make trig replacement expression exact
This prevents other optimizations from associating the inner multiply,
which can add inaccuracies that can lead to discontinuities around the
boundary of the ffract. We should use exactly the sequence that the blob
uses to avoid problems.
Since fadd + fmul cannot be combined to ffma when exact is specified, we
have to use ffma ourselves.
Fixes artifacts in PixMark Volplosion with !7458.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12912>
Rhys Perry [Wed, 9 Jun 2021 13:33:24 +0000 (14:33 +0100)]
aco: allow live-range splits of linear vgprs in top-level blocks
Fixes dEQP-VK.ssbo.phys.layout.random.8bit.all_per_block_buffers.46 on
GFX8.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12172>
Rhys Perry [Wed, 16 Jun 2021 16:19:36 +0000 (17:19 +0100)]
aco: implement linear vgpr copies
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12172>
Rhys Perry [Wed, 16 Jun 2021 14:35:36 +0000 (15:35 +0100)]
aco/tests: add regalloc.scratch_sgpr.create_vector
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12172>
Rhys Perry [Wed, 16 Jun 2021 14:31:24 +0000 (15:31 +0100)]
aco/tests: fix finish_ra_test()
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12172>
Rhys Perry [Thu, 17 Jun 2021 13:15:09 +0000 (14:15 +0100)]
aco: find scratch reg for sub-dword psuedo instructions which read sgprs
If there's a sgpr operand before a sub-dword operand, a scratch register
will not be found on GFX6/7.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12172>
Rhys Perry [Fri, 11 Jun 2021 13:43:50 +0000 (14:43 +0100)]
aco: find a scratch register for sub-dword copies on GFX7 if scc is empty
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12172>
Rhys Perry [Fri, 11 Jun 2021 12:08:51 +0000 (13:08 +0100)]
aco: rewrite print_reg_class()
Make it work for any regclass, and print linear VGPRs differently from
logical ones.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12172>
Rhys Perry [Fri, 11 Jun 2021 12:05:18 +0000 (13:05 +0100)]
aco: add and use RegClass::resize helper
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12172>
Rhys Perry [Fri, 11 Jun 2021 12:11:20 +0000 (13:11 +0100)]
aco: add RegClass::is_linear_vgpr helper
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12172>
Rhys Perry [Thu, 16 Sep 2021 14:02:20 +0000 (15:02 +0100)]
radv: fix pipeline caching with robust buffer access
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12900>
Mike Blumenkrantz [Thu, 16 Sep 2021 15:18:49 +0000 (11:18 -0400)]
util/tc: rename tc_replace_buffer_storage_func::num_rebinds and document
this parameter is only a hint, as tc provides no method for tracking cases
when a buffer is bound multiple times to the same site (e.g., multiple vertex
buffer slots will be counted as 1 bind), so rename to "minimum" to be more clear
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12898>
Mike Blumenkrantz [Fri, 17 Sep 2021 03:29:41 +0000 (23:29 -0400)]
features: fix listing for GL_ARB_parallel_shader_compile
this isn't actually all drivers
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12909>
Samuel Pitoiset [Thu, 16 Sep 2021 11:15:10 +0000 (13:15 +0200)]
ac/rgp, radv: report wave size for shaders
Fills the "Wave mode" in "Pipelines" for GPUs that supports Wave32.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12896>
Samuel Pitoiset [Thu, 16 Sep 2021 10:59:42 +0000 (12:59 +0200)]
ac/rgp, radv: report scratch memory size for shaders
Fills the "Scatch Mem" with "Yes/No" in "Pipelines", this requires
instruction timing to be enabled.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12896>
Pierre-Eric Pelloux-Prayer [Thu, 16 Sep 2021 13:24:51 +0000 (15:24 +0200)]
Revert "ci/v3d: add piglit flake"
This reverts commit
7d5aea9edf358bcfc43dd1517bbebe658dce10c8.
The test isn't flaky: now that the regression is fixed we can
remove it from the flakes list.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12849>
Pierre-Eric Pelloux-Prayer [Tue, 14 Sep 2021 08:14:04 +0000 (10:14 +0200)]
vbo/dlist: reallocate the vertex buffer on vertex upgrade
upgrade_vertex copies save->copied.nr vertices to the vertex buffer,
so we need to make sure it has enough space to accomodate them.
This commit also drops the usage of COPY_CLEAN_4V_TYPE_AS_UNION in
this function because it always writes 4-components for all attributes,
but our buffer might be smaller. Instead, only write the needed
components.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5353
Fixes:
cc57156dce0 ("vbo/dlist: rework vertex_store management")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12849>
Filip Gawin [Wed, 15 Sep 2021 22:32:03 +0000 (00:32 +0200)]
r300: assert that array in translate_vertex_program is initialized
Problematic usage is in case RC_OPCODE_ENDLOOP, at line
ret_addr = loops[--loop_depth];
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12880>
Timothy Arceri [Tue, 7 Sep 2021 05:00:58 +0000 (15:00 +1000)]
util/cache: run basic cache tests on the single file cache
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12745>
Marek Vasut [Wed, 15 Sep 2021 22:31:44 +0000 (00:31 +0200)]
freedreno: Handle timeout == PIPE_TIMEOUT_INFINITE and rollover
The fd_fence_finish() may be passed a special timeout value PIPE_TIMEOUT_INFINITE.
This gets propagated all the way to get_abs_timeout(), where it gets converted to
a huge timeout value and passed down to the kernel. At least on iMX53, the kernel
may complain about this value being too large and emit a backtrace. The relevant
piece of information there is the following:
schedule_timeout: wrong timeout value
bf94984b
Per suggestion by Rob Clark, fix this in get_abs_timeout() by picking the same
rollover implementation present in etnaviv. This fixes one part of the problem
where the tv_nsec becomes larger than NSEC_PER_SEC, which is invalid.
However, the PIPE_TIMEOUT_INFINITE is sufficiently large to make tv_secs larger
than KTIME_SEC_MAX, which makes kernel-side ktime_set() return KTIME_MAX and
that in turn triggers the above "wrong timeout value N" message. Fix this by
setting the timeout to large enough value in case of PIPE_TIMEOUT_INFINITE.
While the timeout is not truly infinite, the timeout is long enough as anything
longer than a few seconds means the GPU got hung.
The "util/timespec.h" is added so we can use NSEC_PER_SEC instead of ad-hoc
constant
1000000000 . The "pipe/p_defines.h" is needed for PIPE_TIMEOUT_INFINITE.
This problem can be reliably triggered on iMX53 using Qt5 with EGLFS support,
using the qtbase examples, as follows:
/usr/share/examples/opengl/qopenglwidget/qopenglwidget -platform eglfs
Fixes:
f3cc0d27475 ("freedreno: import libdrm_freedreno + redesign submit")
Signed-off-by: Marek Vasut <marex@denx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12886>
Mike Blumenkrantz [Thu, 16 Sep 2021 13:57:47 +0000 (09:57 -0400)]
zink: zero VkImageCreateInfo::queueFamilyIndexCount on creation
this explodes gfxreconstruct
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12905>
Emma Anholt [Thu, 16 Sep 2021 22:35:38 +0000 (15:35 -0700)]
ci/freedreno: Drop minetest from a3xx trace testing.
It's been flaking approximately weekly since the end of June.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12906>
Neha Bhende [Wed, 15 Sep 2021 00:43:16 +0000 (17:43 -0700)]
auxiliary/indices: convert primitive type PIPE_PRIM_PATCHES
Few tessellation related piglit test are crashing. This patch
fixes unhandled case
Tested with piglit
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
(cherry picked from commit
0e1c962cc105a9330caf22266e1962b049c13454)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12882>
Dave Airlie [Thu, 16 Sep 2021 04:48:15 +0000 (14:48 +1000)]
lavapipe: enable KHR_spirv_1_4
One test fails but I think it's a missing barrier in the test
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12888>
Marijn Suijten [Tue, 11 Aug 2020 22:01:45 +0000 (00:01 +0200)]
freedreno: Enable Adreno 508, 509 and 512
These GPUs attained kernel support in:
https://git.kernel.org/torvalds/c/
1d832ab30ce64abe30571bc12931a296a8a27c4d
Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12874>
Nanley Chery [Wed, 8 Sep 2021 14:08:17 +0000 (07:08 -0700)]
iris: Finish aux import in iris_resource_from_handle
This allows us to delete iris_resource_unfinished_aux_import, which
incorrectly assumed that a CCS-enabled resource needs an aux BO.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12795>
Nanley Chery [Wed, 8 Sep 2021 13:41:12 +0000 (06:41 -0700)]
iris: Add and use get_num_planes
This function counts the number of objects in a pipe_resource linked list.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12795>
Nanley Chery [Wed, 8 Sep 2021 13:48:15 +0000 (06:48 -0700)]
iris: Don't add a clear color BO for MC_CCS
It's unusable because ISL_AUX_USAGE_MC doesn't support fast clears.
Instead of performing this change in the if-ladder, replace the
if-ladder with a switch statement to make it clear what's going on.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12795>
Nanley Chery [Thu, 2 Sep 2021 22:11:47 +0000 (15:11 -0700)]
iris: Allow NULL aux BOs in aux-state functions
XeHP can use CCS_E without an aux BO.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12795>
Nanley Chery [Fri, 3 Sep 2021 21:01:36 +0000 (14:01 -0700)]
iris: Simplify an iris_use_pinned_bo call
Avoid using a helper function to get the resource BO. This fits in
better with the previous iris_use_pinned_bo calls.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12795>
Nanley Chery [Fri, 3 Sep 2021 20:53:40 +0000 (13:53 -0700)]
iris: Split clear color and aux BO checks
CCS_E-enabled resources on XeHP have a clear color without an aux BO.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12795>
Nanley Chery [Tue, 7 Sep 2021 15:26:31 +0000 (08:26 -0700)]
iris: Support NULL aux BOs in fill_surface_state
XeHP can use CCS_E without an aux BO.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12795>
Nanley Chery [Tue, 7 Sep 2021 15:45:05 +0000 (08:45 -0700)]
iris: Delete iris_resource_get_clear_color
This helper simply is a wrapper to the clear color fields in the
iris_resource struct. We choose to delete it for two reasons:
1) It incorrectly asserts that the resource argument has an aux BO.
This doesn't hold for CCS_E on XeHP.
2) The majority of functions ignore the helper anyway and access these
fields directly.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12795>
Jesse Natalie [Wed, 15 Sep 2021 21:53:36 +0000 (14:53 -0700)]
CI/windows: Build shared-glapi, EGL, gles2
Acked-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12881>
Jesse Natalie [Sun, 8 Aug 2021 15:45:34 +0000 (08:45 -0700)]
meson: Set /Zc:__cplusplus for MSVC
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12881>
Jesse Natalie [Wed, 15 Sep 2021 21:49:09 +0000 (14:49 -0700)]
egl: Update Windows .def to include missing exports
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12881>
Jesse Natalie [Wed, 15 Sep 2021 21:41:34 +0000 (14:41 -0700)]
symbols-check: Fix symbol demangling for Windows
Only strip leading underscores if there's also a trailing @
Fixes shared-glapi symbol check for x64
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12881>
Mike Blumenkrantz [Tue, 14 Sep 2021 17:45:42 +0000 (13:45 -0400)]
zink: pass all modifiers through to image creation
let the driver figure these out after zink guarantees that at least one of them
will work
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12857>
Mike Blumenkrantz [Tue, 14 Sep 2021 17:44:58 +0000 (13:44 -0400)]
zink: pre-filter multi-plane modifiers
only single plane modifiers are supported now
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12857>
Mike Blumenkrantz [Tue, 14 Sep 2021 17:01:59 +0000 (13:01 -0400)]
zink: unbreak dmabuf handling
this does need kms handling to do literally anything.
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12857>
Mike Blumenkrantz [Wed, 21 Apr 2021 12:45:10 +0000 (08:45 -0400)]
zink: store drm fd to screen
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12857>
Jason Ekstrand [Wed, 15 Sep 2021 22:59:52 +0000 (17:59 -0500)]
nir: Stop sweeping indirects
They're no longer ralloc'd.
Fixes:
879a569884b1 "nir: Switch from ralloc to malloc for NIR instructions."
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12884>
Jason Ekstrand [Wed, 15 Sep 2021 22:57:03 +0000 (17:57 -0500)]
nir: Properly clean up nir_src/dest indirects
Now that they're no longer ralloc'd, we have to be much more careful
about indirects. We have to make sure every time a source or
destination is overwritten, its indirect (if any) is freed. We also
have to choose a memory ownership convention for the rewrite functions.
Assuming that they will be called with the source from some other
instruction, we choose to always make a copy of the indirect (if any).
It's the responsibility of the caller to ensure its copy of the indirect
is freed.
Unfortunately, all this extra logic is going to make
nir_instr_rewrite/move_src/dest more expensive because they now have
all the logic of nir_src/dest_copy instead of a simple struct
assignment. Fortunately, the vast majority of rewrite calls are done by
nir_ssa_def_rewrite_uses which is an SSA-only fast-path.
Fixes:
879a569884b1 "nir: Switch from ralloc to malloc for NIR instructions."
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12884>
Timur Kristóf [Mon, 10 May 2021 11:15:12 +0000 (13:15 +0200)]
radv: Remove PSIZ output when it isn't needed.
PSIZ output is only needed when:
1. There is a next stage and it reads it.
2. Primitive topology is point list, in the last vertex pipeline stage.
Zink always adds this output in its vertex (and other) shaders,
because it helps Zink avoid recompiling shader variants.
However, this has a performance impact for RADV because
it needs a scalar memory load. That becomes noticeable
at high primitive rates.
The Fossil stats are unremarkable because our DB doesn't include any
shaders from Zink or D9VK, but there are a few affected shaders.
Note that there may be an increase in LDS use in some GS. This is
because with PSIZ removed the ES per-vertex LDS size is smaller, so
we can squeeze more GS threads in the same workgroup.
Fossil DB stats on Sienna Cichlid:
Totals from 14 (0.01% of 128647) affected shaders:
CodeSize: 119884 -> 119732 (-0.13%)
LDS: 235008 -> 228864 (-2.61%); split: -2.83%, +0.22%
Instrs: 23076 -> 23048 (-0.12%)
Latency: 71667 -> 71625 (-0.06%)
InvThroughput: 19155 -> 18870 (-1.49%)
Copies: 1586 -> 1572 (-0.88%)
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10725>
Dave Airlie [Tue, 7 Sep 2021 05:22:34 +0000 (15:22 +1000)]
docs: update docs for new llvmpipe/lavapipe features
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11816>
Dave Airlie [Tue, 7 Sep 2021 04:01:15 +0000 (14:01 +1000)]
lavapipe: enable KHR_shader_subgroup_extended_types
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11816>
Dave Airlie [Tue, 7 Sep 2021 04:51:48 +0000 (14:51 +1000)]
gallivm/nir: handle subgroup reduction across all types
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11816>
Dave Airlie [Mon, 6 Sep 2021 00:30:40 +0000 (10:30 +1000)]
lavapipe: enable KHR_shader_float16_int8
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11816>
Dave Airlie [Mon, 6 Sep 2021 00:00:16 +0000 (10:00 +1000)]
llvmpipe: enable FP16 and update CL + traces piglit results.
The fails will be addressed later.
This adds a fail in GLSL compiler that is due to a workaround
that fails when fp16 constants are lowered
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11816>
Dave Airlie [Tue, 7 Sep 2021 01:17:39 +0000 (11:17 +1000)]
gallivm: use llvm intrinsics for 16-bit round/trunc/roundeven
Otherwise the inf translations don't seem to work, and the VK CTS
fails
Fixes VK CTS dEQP-VK.spirv_assembly.instruction.graphics.float16.arithmetic*
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11816>
Dave Airlie [Mon, 6 Sep 2021 04:33:06 +0000 (14:33 +1000)]
gallivm: increase tgsi nesting call stack size
Some VK CTS tests are topping this out around 76, increase it to 80 for now.
Fixes:
dEQP-VK.spirv_assembly.instruction.graphics.float16.opvectorshuffle.*44*
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11816>
Dave Airlie [Thu, 22 Jul 2021 06:14:57 +0000 (16:14 +1000)]
gallivm/nir: pass the correct float builder to ddx/y
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11816>
Dave Airlie [Thu, 22 Jul 2021 05:59:34 +0000 (15:59 +1000)]
gallivm/nir: call pow with correct flt builder
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11816>
Dave Airlie [Thu, 22 Jul 2021 05:36:59 +0000 (15:36 +1000)]
gallivm/nir: handle 16-bit exp/lod using intrinsics.
This just passes the 16-bit float versions to the llvm intrinsics
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11816>
Dave Airlie [Tue, 9 Mar 2021 03:15:59 +0000 (13:15 +1000)]
llvmpipe: lower_flrp16
fixes a bunch of spir-v 16-bit tests
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11816>
Dave Airlie [Mon, 19 Jul 2021 02:49:00 +0000 (12:49 +1000)]
gallivm: add 16-bit sin/cos via llvm intrinsic
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11816>
Dave Airlie [Thu, 22 Jul 2021 04:08:31 +0000 (14:08 +1000)]
gallivvm/nir: handle non-32bit mask scatter stores
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11816>
Dave Airlie [Thu, 22 Jul 2021 03:40:49 +0000 (13:40 +1000)]
gallivm/nir: fix f2b32
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11816>
Dave Airlie [Thu, 22 Jul 2021 03:20:29 +0000 (13:20 +1000)]
gallivm/nir: handle conversion to 16-bit texel fetch
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11816>
Dave Airlie [Sun, 11 Jul 2021 21:24:54 +0000 (07:24 +1000)]
gallivm: add initial support for 16-bit float builder.
This is an initial patch that is needed for OpenCL and Vulkan
support for proper 16-bit floats.
This doesn't enable the cap bit yet
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11816>
Mike Blumenkrantz [Wed, 1 Sep 2021 20:56:52 +0000 (16:56 -0400)]
zink: cap max shader variants with inlined uniforms
avoid making a new shader for every frame forever
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12842>
Mike Blumenkrantz [Fri, 3 Sep 2021 14:06:22 +0000 (10:06 -0400)]
zink: simplify shader variant update loop
a single continue makes this much easier to read
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12842>
Mike Blumenkrantz [Wed, 1 Sep 2021 20:55:32 +0000 (16:55 -0400)]
zink: split out inlined uniform shader variants into separate cache
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12842>
Mike Blumenkrantz [Wed, 1 Sep 2021 20:52:12 +0000 (16:52 -0400)]
zink: remove default_variants storage in program struct
these should naturally be the first entry in the list when it matters
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12842>
Mike Blumenkrantz [Wed, 1 Sep 2021 20:46:27 +0000 (16:46 -0400)]
zink: replace shader module hash table with a list
this should be significantly more performant for the majority of cases
since it's rare that shaders have multiple variants outside of unit tests,
so now there can just be a list of shaders being iterated instead where the
first entry is the last used
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12842>
Mike Blumenkrantz [Wed, 1 Sep 2021 20:16:39 +0000 (16:16 -0400)]
zink: move shader cache to gfx program struct
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12842>
Mike Blumenkrantz [Wed, 1 Sep 2021 20:15:50 +0000 (16:15 -0400)]
zink: stop using hash table for compute programs
this is pointless since there's no variants yet
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12842>
Mike Blumenkrantz [Wed, 1 Sep 2021 20:12:54 +0000 (16:12 -0400)]
zink: store shader key to shader module
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12842>
Mike Blumenkrantz [Wed, 1 Sep 2021 20:09:22 +0000 (16:09 -0400)]
zink: move uniform size calc for shader keys into keybox
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12842>