Rhys Perry [Wed, 23 Feb 2022 17:21:42 +0000 (17:21 +0000)]
aco/insert_exec_mask: fix top-level to-exact with non-global exact mask
After transitioning to exact after a discard, the exec stack might be:
[exact|global, wqm, exact]
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15244>
Cristian Ciocaltea [Mon, 7 Mar 2022 16:24:55 +0000 (18:24 +0200)]
radeonsi/ci: Mark a bunch of flaky tests on stoney
radeonsi-stoney-gl:amd64 job fails due to random crashes of some
'dEQP-GLES3.functional.buffer.map.write.explicit_flush.*' tests.
Fix the pipeline by adding them to 'radeonsi-stoney-flakes.txt'.
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15238>
Cristian Ciocaltea [Mon, 7 Mar 2022 14:34:39 +0000 (16:34 +0200)]
ci/zink: Report flake test
Mark 'KHR-GL46.shader_image_load_store.advanced-sso-subroutine' as
flake since it failed several times while attempting to merge this MR.
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15238>
Cristian Ciocaltea [Thu, 3 Mar 2022 23:59:55 +0000 (01:59 +0200)]
ci: Improve interrupt signal handling in crosvm-runner.sh
Run crosvm as a background process in order to allow intercepting
interrupt signals (INT, TERM) and properly release/cleanup any allocated
resources.
This is particularly helpful when one or more crosvm tasks hang, which
will eventually prevent subsequent instances to be started - currently
we can handle up to 128 concurrent crosvm instances per runner.
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15238>
Cristian Ciocaltea [Mon, 28 Feb 2022 19:26:31 +0000 (21:26 +0200)]
ci: Increase limit of concurrent crosvm instances per runner
Ensure we can handle up to 128 concurrent crosvm instances per runner
with the current CID generator. This is a safety margin for the new
64-core runners.
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15238>
Dave Airlie [Mon, 7 Mar 2022 07:03:25 +0000 (17:03 +1000)]
gallivm/nir: extract a valid texture index according to exec_mask.
When using indirect textures, some lanes may not be active,
particularly in a loop, so as with some other areas, extracting
the correct lane is needed here. This extracts the last valid one.
KHR-GL45.texture_barrier.* on zink.
Fixes:
e168d148d76d ("gallivm/nir: handle non-uniform texture offsets")
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15259>
Samuel Pitoiset [Mon, 7 Mar 2022 13:49:00 +0000 (14:49 +0100)]
radv/ci: remove unused files
These files are no longer used.
Fixes:
cc327a0fe45 ("amd, ci: Remove unused runners.")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Charlie Turner <cturner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15264>
Ilia Mirkin [Tue, 16 Nov 2021 23:19:37 +0000 (18:19 -0500)]
freedreno: add a420 deqp-runner files
This doesn't actually get run in CI, but this helps track outstanding
issues / expectations. This is from a run on my IFC6540 with A420.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15251>
Ilia Mirkin [Sun, 14 Nov 2021 18:06:49 +0000 (13:06 -0500)]
freedreno/a4xx: expose shaders and images, as well as ES 3.1
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15251>
Ilia Mirkin [Sat, 4 Dec 2021 00:06:12 +0000 (19:06 -0500)]
freedreno/ir3: disable conversion folding on a4xx
Experiments suggest that e.g.
add.u r0.y, hr0.x, hr0.y
will result in the summed value in both the high and low words of r0.y.
This only happens with odd registers, not even ones (r0.x works fine).
Seen in the bit_count lowering (which turns out to be unnecessary, but
this is still a larger problem).
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15251>
Ilia Mirkin [Fri, 3 Dec 2021 08:04:19 +0000 (03:04 -0500)]
freedreno/ir3: no need to count bits 16b at a time for a4xx
This also works out nicely since a4xx has some sort of problem with the
16b-based lowering.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15251>
Ilia Mirkin [Sat, 20 Nov 2021 07:30:37 +0000 (02:30 -0500)]
freedreno/a4xx: improve condition for disabling early z
This helps some subtests in the early-z piglit test, but leaves one
occlusion-based test still failing.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15251>
Ilia Mirkin [Wed, 17 Nov 2021 00:10:46 +0000 (19:10 -0500)]
freedreno/a4xx: extend astc and tg4 workarounds to compute shaders
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15251>
Mike Blumenkrantz [Mon, 7 Mar 2022 23:00:42 +0000 (18:00 -0500)]
Revert "lavapipe: accurately set image/ssbo access based on shader usage"
This reverts commit
821a49981ff386559f8a8fdf6bf3526b8deb2415.
still flaky
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15271>
Matt Turner [Thu, 3 Mar 2022 23:30:37 +0000 (15:30 -0800)]
intel/perf: Destination array calculation into function
Cuts 119 KiB from iris_dri.so and libvulkan_intel.so.
text data bss dec hex filename
917511 0 0 917511 e0007 meson-generated_.._intel_perf_metrics.c.o (before)
796986 0 0 796986 c293a meson-generated_.._intel_perf_metrics.c.o (after)
text data bss dec hex filename
14130948 365708 210004
14706660 e067e4 iris_dri.so (before)
14009332 365708 210004
14585044 de8cd4 iris_dri.so (after)
text data bss dec hex filename
8124225 214264 22820 8361309 7f955d libvulkan_intel.so (before)
8002609 214264 22820 8239693 7dba4d libvulkan_intel.so (after)
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15237>
Matt Turner [Thu, 3 Mar 2022 07:28:18 +0000 (23:28 -0800)]
intel/perf: Fix mistake in description string
Along with fixing the grammar, this allows it to be deduplicated since
the properly worded description exists in later generations' XMLs.
Cuts 96 B from iris_dri.so and libvulkan_intel.so.
text data bss dec hex filename
917613 0 0 917613 e006d meson-generated_.._intel_perf_metrics.c.o (before)
917511 0 0 917511 e0007 meson-generated_.._intel_perf_metrics.c.o (after)
text data bss dec hex filename
14131044 365708 210004
14706756 e06844 iris_dri.so (before)
14130948 365708 210004
14706660 e067e4 iris_dri.so (after)
text data bss dec hex filename
8124321 214264 22820 8361405 7f95bd libvulkan_intel.so (before)
8124225 214264 22820 8361309 7f955d libvulkan_intel.so (after)
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15237>
Matt Turner [Wed, 2 Mar 2022 02:49:26 +0000 (18:49 -0800)]
intel/perf: Mark intel_perf_counter_* enums as PACKED
Reduces their sizes from 4 bytes to 1. Cuts 6 KiB from iris_dri.so and
libvulkan_intel.so.
text data bss dec hex filename
924401 0 0 924401 e1af1 meson-generated_.._intel_perf_metrics.c.o (before)
917613 0 0 917613 e006d meson-generated_.._intel_perf_metrics.c.o (after)
text data bss dec hex filename
14137732 365708 210004
14713444 e08264 iris_dri.so (before)
14131044 365708 210004
14706756 e06844 iris_dri.so (after)
text data bss dec hex filename
8131009 214264 22820 8368093 7fafdd libvulkan_intel.so (before)
8124321 214264 22820 8361405 7f95bd libvulkan_intel.so (after)
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15237>
Matt Turner [Mon, 31 Jan 2022 21:16:26 +0000 (13:16 -0800)]
intel/perf: Store indices to strings rather than pointers
The compiler does a good job of deduplicating strings already, but we
can eliminate the pointers to each string by combining the strings into
a single char array and storing only an index into that array.
The longest of the char arrays is the descriptions array, which is a
little over 45 KiB, so still under MSVC's 64 KiB string literal limit
[0]. Because the string length is under 64 KiB we can use uint16_t as
the index type, which roughly doubles our savings as compared to an int.
This cuts 77 KiB from iris_dri.so (0.5%) and libvulkan_intel.so (0.9%).
text data bss dec hex filename
926811 25920 0 952731 e899b meson-generated_.._intel_perf_metrics.c.o (before)
924401 0 0 924401 e1af1 meson-generated_.._intel_perf_metrics.c.o (after)
text data bss dec hex filename
14190852 391628 210004
14792484 e1b724 iris_dri.so (before)
14137732 365708 210004
14713444 e08264 iris_dri.so (after)
text data bss dec hex filename
8184097 240184 22820 8447101 80e47d libvulkan_intel.so (before)
8131009 214264 22820 8368093 7fafdd libvulkan_intel.so (after)
relinfo:
iris_dri.so (before): 17765 relocations, 17545 relative (98%), 452 PLT entries, 1 for local syms (0%), 0 users
iris_dri.so (after) : 15605 relocations, 15385 relative (98%), 452 PLT entries, 1 for local syms (0%), 0 users
libvulkan_intel.so (before): 10720 relocations, 6989 relative (65%), 355 PLT entries, 1 for local syms (0%), 0 users
libvulkan_intel.so (after) : 8560 relocations, 4829 relative (56%), 355 PLT entries, 1 for local syms (0%), 0 users
[0] https://docs.microsoft.com/en-us/cpp/cpp/string-and-character-literals-cpp?view=msvc-170&viewFallbackFrom=vs-2019
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15237>
Matt Turner [Thu, 3 Mar 2022 20:24:02 +0000 (12:24 -0800)]
intel/perf: Use slimmer intel_perf_query_counter_data struct
intel_perf_query_counter contains fields for things we can't or don't
want to store in our static data (like runtime-determined max values) or
oa_read_counter function pointers which are dependent on the GPU gen and
would make deduplication very ineffective.
Cuts 16 KiB from iris_dri.so and libvulkan_intel.so.
text data bss dec hex filename
926811 43200 0 970011 ecd1b meson-generated_.._intel_perf_metrics.c.o (before)
926811 25920 0 952731 e899b meson-generated_.._intel_perf_metrics.c.o (after)
text data bss dec hex filename
14190852 408908 210004
14809764 e1faa4 iris_dri.so (before)
14190852 391628 210004
14792484 e1b724 iris_dri.so (after)
text data bss dec hex filename
8184097 257464 22820 8464381 8127fd libvulkan_intel.so (before)
8184097 240184 22820 8447101 80e47d libvulkan_intel.so (after)
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15237>
Matt Turner [Thu, 3 Mar 2022 01:53:02 +0000 (17:53 -0800)]
intel/perf: Use a function to initialize perf counters
And specifically mark it with ATTRIBUTE_NOINLINE. Otherwise it will be
inlined and actually slightly increase code size.
Cuts 505 KiB from iris_dri.so and libvulkan_intel.so.
text data bss dec hex filename
1538720 0 0 1538720 177aa0 meson-generated_.._intel_perf_metrics.c.o (before)
926811 43200 0 970011 ecd1b meson-generated_.._intel_perf_metrics.c.o (after)
text data bss dec hex filename
14751700 365708 210004
15327412 e9e0b4 iris_dri.so (before)
14190852 408908 210004
14809764 e1faa4 iris_dri.so (after)
text data bss dec hex filename
8744913 214264 22820 8981997 890ded libvulkan_intel.so (before)
8184097 257464 22820 8464381 8127fd libvulkan_intel.so (after)
Relocations increase because the counter initializations are moved from
code (in .text) to pointers (in .text) to .rodata, which require
relocations.
relinfo:
iris_dri.so (before): 15605 relocations, 15385 relative (98%), 452 PLT entries, 1 for local syms (0%), 0 users
iris_dri.so (after) : 17765 relocations, 17545 relative (98%), 452 PLT entries, 1 for local syms (0%), 0 users
libvulkan_intel.so (before): 8560 relocations, 4829 relative (56%), 355 PLT entries, 1 for local syms (0%), 0 users
libvulkan_intel.so (after) : 10720 relocations, 6989 relative (65%), 355 PLT entries, 1 for local syms (0%), 0 users
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15237>
Matt Turner [Thu, 3 Mar 2022 01:26:17 +0000 (17:26 -0800)]
intel/perf: Deduplicate perf counters
No changes in resulting code (yes, seriously!). GCC constant propagates
the static const arrays into the code, yielding bit for bit identical
results. This will however enable further cleanups.
Before this patch, we emit 11916 different initializations of
intel_perf_query_counter. With this patch we emit an array of 539 and
initialize the intel_perf_query_counters in terms of those.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15237>
Matt Turner [Thu, 3 Mar 2022 21:13:38 +0000 (13:13 -0800)]
intel/perf: Don't print leading space from desc_units()
Just an annoyance I noticed when I needed to generate the description
string in two different places.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15237>
Emma Anholt [Mon, 7 Feb 2022 19:06:18 +0000 (11:06 -0800)]
intel/perf: Move some static blocks of C code out of the python script.
Now my editor can help me format code as I type.
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15237>
Chia-I Wu [Sat, 5 Mar 2022 17:39:36 +0000 (09:39 -0800)]
venus: fix properties of unsupported external fences/semaphores
compatibleHandleTypes should be cleared.
Fixed dEQP-VK.api.external.semaphore.sync_fd.info_timeline.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15266>
Ian Romanick [Thu, 3 Mar 2022 00:38:45 +0000 (16:38 -0800)]
iris/ci: Mark amd_performance_monitor tests as flakes.
On one attempt to merge !15210 failed because
spec@amd_performance_monitor@measure,UnexpectedPass. In that same
report, the other two tests were listed under "some flakes."
Reviewed-by: Emma Anholt <emma@anholt.net>
Acked-by: Nanley Chery <nanley.g.chery@intel.com>
Acked-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15220>
Danylo Piliaiev [Mon, 7 Mar 2022 10:13:45 +0000 (12:13 +0200)]
turnip: Add "rast_order" debug option to force rast order access
Enables rasterization order attachment access for all pipelines,
see VK_ARM_rasterization_order_attachment_access for details.
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15262>
Pierre-Eric Pelloux-Prayer [Mon, 21 Feb 2022 19:14:02 +0000 (20:14 +0100)]
gallium/tc: warn if an app is incompatible with cpu_storage
Instead of silently ignoring unmap calls.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15074>
Pierre-Eric Pelloux-Prayer [Fri, 18 Feb 2022 09:32:05 +0000 (10:32 +0100)]
radeonsi: enable tc cpu_storage by default
Enable for all applications for all small buffers.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15074>
Pierre-Eric Pelloux-Prayer [Fri, 18 Feb 2022 09:28:58 +0000 (10:28 +0100)]
gallium/u_threaded: late alloc cpu_storage
Instead of allocating cpu_storage in threaded_resource_init, defer the
allocation to first use (in tc_buffer_map).
This avoids needless memory allocation if tc_buffer_disable_cpu_storage is
called before tc_buffer_map.
map_buffer_alignment is stored and serves as a "can cpu_storage be used" flag.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15074>
Pierre-Eric Pelloux-Prayer [Thu, 17 Feb 2022 13:46:06 +0000 (14:46 +0100)]
radeonsi: use 1 shader compilation thread if NIR_PRINT is used
This avoids getting multiple shaders NIR code being printed at the
same time making the log unusable.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15074>
Georg Lehmann [Fri, 4 Mar 2022 12:32:06 +0000 (13:32 +0100)]
nir: Fix source type for fragment_fetch_amd.
Like txf_ms, these take integers not floats.
Signed-off-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15242>
Pierre-Eric Pelloux-Prayer [Fri, 4 Mar 2022 10:49:08 +0000 (11:49 +0100)]
radeonsi/tests: always add the --gpu argument
To get the same argument in multi and single gpu situation.
Fixes:
21b01538331 ("radeonsi/tests: print PCI-id of GPU device under test")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Mihai Preda <mhpreda@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15240>
Pierre-Eric Pelloux-Prayer [Fri, 4 Mar 2022 10:23:20 +0000 (11:23 +0100)]
radeonsi: change rounding mode to round to even
Use ROUND_TO_EVEN instead of TRUNCATE; this matches what pal and radv do.
This fixes the spec@ext_framebuffer_multisample@turn-on-off tests.
Cc: mesa-stable
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Mihai Preda <mhpreda@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15240>
José Expósito [Thu, 3 Mar 2022 07:20:46 +0000 (08:20 +0100)]
egl/wayland: fix crash in dri2_initialize_wayland_swrast
When "dri2_wl_formats_init" fails in "dri2_initialize_wayland_swrast",
the "dri2_display_destroy" function is called for clean up. However, the
"dri2_egl_display" was not associated with the display in its
"DriverData" field yet.
The following cast in "dri2_display_destroy":
struct dri2_egl_display *dri2_dpy = dri2_egl_display(disp);
Expands to:
_EGL_DRIVER_TYPECAST(drvname ## _display, _EGLDisplay, obj->DriverData)
Crashing.
Signed-off-by: José Expósito <jose.exposito89@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13972>
José Expósito [Sun, 28 Nov 2021 16:57:25 +0000 (17:57 +0100)]
egl/wayland: fix crash in dri2_initialize_wayland_drm
When "dri2_wl_formats_init" fails in "dri2_initialize_wayland_drm", the
"dri2_display_destroy" function is called for clean up. However, the
"dri2_egl_display" was not associated with the display in its
"DriverData" field yet.
The following cast in "dri2_display_destroy":
struct dri2_egl_display *dri2_dpy = dri2_egl_display(disp);
Expands to:
_EGL_DRIVER_TYPECAST(drvname ## _display, _EGLDisplay, obj->DriverData)
Crashing.
Addresses-Coverity-ID: 1494541 ("Resource leak")
Signed-off-by: José Expósito <jose.exposito89@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13972>
Mike Blumenkrantz [Fri, 4 Mar 2022 16:06:30 +0000 (11:06 -0500)]
zink: hide descriptor debug behind #ifdef
I've gotten a feel for this, but it's annoying to always see it spamming away
Acked-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15226>
Mike Blumenkrantz [Thu, 3 Mar 2022 17:25:41 +0000 (12:25 -0500)]
zink: invalidate non-punted recycled descriptor sets that are not valid
these sets may contain refs from the descriptors which need to be removed
to avoid invalid memory access if the ref is leaked
cc: mesa-stable
Acked-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15226>
Mike Blumenkrantz [Thu, 3 Mar 2022 17:16:33 +0000 (12:16 -0500)]
zink: stop leaking descriptor sets
when migrating a recycled set here, the set was previously invalid and
in the recycled table, meaning it can be reused directly so long as
it's first invalidated
the previous code would instead pop a different set off the allocation array,
leaking this one
cc: mesa-stable
Acked-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15226>
Mike Blumenkrantz [Thu, 3 Mar 2022 14:23:03 +0000 (09:23 -0500)]
zink: mark fbfetch push sets as non-cached
these can't be cached, so ensure the value isn't uninitialized
Test case 'KHR-GL46.blend_equation_advanced.blend_all.GL_HARDLIGHT_KHR_all_qualifier'..
==1193311== Conditional jump or move depends on uninitialised value(s)
==1193311== at 0x634EF05: update_push_ubo_descriptors (zink_descriptors.c:1230)
==1193311== by 0x634FCC5: zink_descriptors_update (zink_descriptors.c:1412)
==1193311== by 0x63A5EA1: void zink_draw<(zink_multidraw)1, (zink_dynamic_state)3, true, false>(pipe_context*, pipe_draw_info const*, unsigned int, pipe_draw_indirect_info const*, pipe_draw_start_count_bias const*, unsigned int, pipe_vertex_state*, unsigned int) (zink_draw.cpp:788)
==1193311== by 0x635A0AF: void zink_draw_vbo<(zink_multidraw)1, (zink_dynamic_state)3, true>(pipe_context*, pipe_draw_info const*, unsigned int, pipe_draw_indirect_info const*, pipe_draw_start_count_bias const*, unsigned int) (zink_draw.cpp:907)
==1193311== by 0x6174397: tc_call_draw_single (u_threaded_context.c:3150)
==1193311== by 0x616C403: tc_batch_execute (u_threaded_context.c:211)
==1193311== by 0x616CA44: _tc_sync (u_threaded_context.c:362)
==1193311== by 0x61725E9: tc_texture_map (u_threaded_context.c:2274)
==1193311== by 0x5A9DAE9: pipe_texture_map_3d (u_inlines.h:572)
==1193311== by 0x5A9EB80: st_ReadPixels (st_cb_readpixels.c:530)
==1193311== by 0x5A0647A: read_pixels (readpix.c:1178)
==1193311== by 0x5A0647A: _mesa_ReadnPixelsARB (readpix.c:1195)
==1193311== by 0x5A06517: _mesa_ReadPixels (readpix.c:1210)
cc: mesa-stable
Acked-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15226>
Mike Blumenkrantz [Wed, 2 Mar 2022 20:49:29 +0000 (15:49 -0500)]
zink: fix descriptor cache pointer array allocation
this got mixed up during some refactor and started indexing based on the
number of bindings instead of the number of descriptors, which means
that array descriptor bindings would have overlapping array memory
cc: mesa-stable
Acked-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15226>
Mike Blumenkrantz [Wed, 2 Mar 2022 13:48:52 +0000 (08:48 -0500)]
zink: wait on program cache fences before destroying programs
if these still have outstanding cache jobs, deleting the object now
will cause a crash
maybe fixes some cts flakiness?
cc: mesa-stable
Acked-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15226>
Mike Blumenkrantz [Wed, 2 Mar 2022 20:50:50 +0000 (15:50 -0500)]
zink: use a fence for pipeline cache update jobs
otherwise there's nothing to wait on
cc: mesa-stable
Acked-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15226>
Mike Blumenkrantz [Wed, 2 Mar 2022 13:48:28 +0000 (08:48 -0500)]
zink: add function for refcounting zink_program structs
step one in maybe cleaning up and deduplicating some program code
Acked-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15226>
Mike Blumenkrantz [Tue, 1 Mar 2022 17:06:13 +0000 (12:06 -0500)]
zink: always update shader variants when rebinding a gfx program
the variant data may have changed in the meanwhile, so do a pass to
ensure that the correct variant is used
cc: mesa-stable
fixes caselist:
dEQP-GLES31.functional.shaders.sample_variables.sample_mask.discard_half_per_two_samples.multisample_texture_4
dEQP-GLES31.functional.shaders.sample_variables.sample_mask.discard_half_per_two_samples.singlesample_rbo
Acked-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15226>
Mike Blumenkrantz [Thu, 3 Mar 2022 18:37:51 +0000 (13:37 -0500)]
lavapipe: accurately set image/ssbo access based on shader usage
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15233>
Mike Blumenkrantz [Thu, 3 Mar 2022 18:37:13 +0000 (13:37 -0500)]
lavapipe: scan shaders for image/ssbo access and generate per-stage masks
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15233>
Mike Blumenkrantz [Fri, 4 Mar 2022 18:17:06 +0000 (13:17 -0500)]
lavapipe: heap-allocate rendering_state struct
this thing is like 28k now, which is just way too big to have on the stack
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15233>
Mike Blumenkrantz [Fri, 4 Mar 2022 15:59:12 +0000 (10:59 -0500)]
gallivm: avoid division by zero when computing cube face
this is illegal and produces NaNs which blow up the sample instr
cc: mesa-stable
fixes (llvmpipe and zink):
KHR-GL45.incomplete_texture_access.sampler
dEQP-GLES31.functional.program_uniform.by_pointer.render.array_in_struct.sampler2D_samplerCube_both
dEQP-GLES31.functional.program_uniform.by_pointer.render.array_in_struct.sampler2D_samplerCube_fragment
dEQP-GLES31.functional.program_uniform.by_pointer.render.array_in_struct.sampler2D_samplerCube_vertex
dEQP-GLES31.functional.program_uniform.by_pointer.render.basic.samplerCube_both
dEQP-GLES31.functional.program_uniform.by_pointer.render.basic.samplerCube_fragment
dEQP-GLES31.functional.program_uniform.by_pointer.render.basic.samplerCube_vertex
dEQP-GLES31.functional.program_uniform.by_pointer.render.basic_struct.sampler2D_samplerCube_both
dEQP-GLES31.functional.program_uniform.by_pointer.render.basic_struct.sampler2D_samplerCube_fragment
dEQP-GLES31.functional.program_uniform.by_pointer.render.nested_structs_arrays.sampler2D_samplerCube_both
dEQP-GLES31.functional.program_uniform.by_pointer.render.nested_structs_arrays.sampler2D_samplerCube_fragment
dEQP-GLES31.functional.program_uniform.by_pointer.render.nested_structs_arrays.sampler2D_samplerCube_vertex
dEQP-GLES31.functional.program_uniform.by_pointer.render.struct_in_array.sampler2D_samplerCube_both
dEQP-GLES31.functional.program_uniform.by_pointer.render.struct_in_array.sampler2D_samplerCube_fragment
dEQP-GLES31.functional.program_uniform.by_pointer.render.struct_in_array.sampler2D_samplerCube_vertex
dEQP-GLES31.functional.program_uniform.by_value.render.array_in_struct.sampler2D_samplerCube_both
dEQP-GLES31.functional.program_uniform.by_value.render.array_in_struct.sampler2D_samplerCube_fragment
dEQP-GLES31.functional.program_uniform.by_value.render.array_in_struct.sampler2D_samplerCube_vertex
dEQP-GLES31.functional.program_uniform.by_value.render.basic.samplerCube_both
dEQP-GLES31.functional.program_uniform.by_value.render.basic.samplerCube_fragment
dEQP-GLES31.functional.program_uniform.by_value.render.basic.samplerCube_vertex
dEQP-GLES31.functional.program_uniform.by_value.render.basic_struct.sampler2D_samplerCube_both
dEQP-GLES31.functional.program_uniform.by_value.render.basic_struct.sampler2D_samplerCube_fragment
dEQP-GLES31.functional.program_uniform.by_value.render.nested_structs_arrays.sampler2D_samplerCube_both
dEQP-GLES31.functional.program_uniform.by_value.render.nested_structs_arrays.sampler2D_samplerCube_fragment
dEQP-GLES31.functional.program_uniform.by_value.render.nested_structs_arrays.sampler2D_samplerCube_vertex
dEQP-GLES31.functional.program_uniform.by_value.render.struct_in_array.sampler2D_samplerCube_both
dEQP-GLES31.functional.program_uniform.by_value.render.struct_in_array.sampler2D_samplerCube_fragment
dEQP-GLES31.functional.program_uniform.by_value.render.struct_in_array.sampler2D_samplerCube_vertex
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15246>
Mike Blumenkrantz [Fri, 4 Mar 2022 15:42:59 +0000 (10:42 -0500)]
gallivm: fix debug prints for halfs
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15246>
Icecream95 [Mon, 21 Feb 2022 03:54:50 +0000 (16:54 +1300)]
pan/bi: Don't assign slots for the blend second source
Another instruction might write to the second source, and then an
INSTR_INVALID_ENC fault will be raised because the tuple will write to
and read from the register at the same time.
Fixes:
795638767d1 ("pan/bi: Use fused dual source blending")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15250>
Icecream95 [Mon, 21 Feb 2022 03:50:56 +0000 (16:50 +1300)]
pan/bi: Skip psuedo sources in ISA.xml
The second staging register source for the +BLEND instruction should
not be packed nor disassembled, so skip it when include_pseudo is not
set.
Fixes:
795638767d1 ("pan/bi: Use fused dual source blending")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15250>
Icecream95 [Fri, 31 Dec 2021 13:15:21 +0000 (02:15 +1300)]
panfrost: Fix ubo_mask calculation
BITSET_MASK returns ~0 when given an input of zero, when we need it to
return 0 instead.
Fixes shaders with only sysvals but no UBOs when push constants are
disabled.
This breaks when 31 or 32 UBOs are used, but PAN_MAX_CONST_BUFFERS is
currently set to 16.
Fixes:
c246af0dd80 ("panfrost: Only upload UBOs when needed")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15250>
Icecream95 [Sun, 20 Feb 2022 09:45:02 +0000 (22:45 +1300)]
panfrost: Improve comment for emit_fragment_job
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15250>
Icecream95 [Wed, 23 Feb 2022 10:16:35 +0000 (23:16 +1300)]
pan/bi: Add documentation for bifrost_nir_lower_store_component
Taken from the commit that introduced the function,
95458c40330 ("pan/bi: Lower stores with component != 0").
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15250>
Icecream95 [Thu, 27 Jan 2022 04:46:54 +0000 (17:46 +1300)]
pan/bi: Make disassembler build reproducibly
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15250>
Icecream95 [Tue, 15 Feb 2022 07:34:57 +0000 (20:34 +1300)]
panfrost: Re-emit descriptors after resource shadowing
This could be made slightly more efficient by only setting the dirty
state that is needed, but eventually you reach a point where it's
cheaper to re-emit everything than work out what can or can't be kept.
Fixes rendering issues in Duckstation.
Fixes:
cd2c1ef9da6 ("panfrost: Dirty track textures/samplers")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15250>
Icecream95 [Tue, 15 Feb 2022 07:24:01 +0000 (20:24 +1300)]
panfrost: Set dirty state in set_shader_buffers
Otherwise the pointer (which is uploaded as a sysval) won't be updated
when a new SSBO is bound.
Fixes:
c34b760b9f9 ("panfrost: Dirty track constant buffers")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15250>
Icecream95 [Mon, 14 Feb 2022 03:26:59 +0000 (16:26 +1300)]
pan/bi: Check dependencies of both destinations of instructions
TEXC can have two destinations; the value for neither of them can be
used in the same bundle, so extend the code to check for this to
iterate over both destinations.
Fixes artefacts in the game "LIMBO".
Fixes:
a303076c1ab ("pan/bi: Add bi_instr_schedulable predicate")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15250>
Icecream95 [Mon, 14 Feb 2022 03:20:47 +0000 (16:20 +1300)]
pan/bi: Add interference between destinations
Trying to write to overlapping register ranges from a single
instruction is undefined behaviour, so add interference between the
nodes to avoid this.
Hit in a dual-texture instruction in LIMBO.
Fixes:
9146bafbb42 ("pan/bi: Add dual texture fusing pass")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15250>
Icecream95 [Tue, 18 Jan 2022 03:02:12 +0000 (16:02 +1300)]
panfrost: Disable point size upper limit clamping
The hardware already clamps this, there is no need to do it in the
shader.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15250>
Icecream95 [Tue, 18 Jan 2022 02:48:17 +0000 (15:48 +1300)]
panfrost: Update point size limits to match hardware behaviour
Found while reverse-engineering the tiler heap format.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15250>
Icecream95 [Tue, 18 Jan 2022 02:16:49 +0000 (15:16 +1300)]
panfrost: Set PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION
Fixes arb-provoking-vertex-render Piglit test.
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15250>
Icecream95 [Sat, 19 Jun 2021 03:01:15 +0000 (15:01 +1200)]
pan/mdg: Use util_logbase2 instead of C99 log2
log2 operates on double, we only need the integer util/ function.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15250>
Ilia Mirkin [Sun, 14 Nov 2021 18:01:57 +0000 (13:01 -0500)]
a4xx: add emission of compute state, and compute dispatch
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14794>
Ilia Mirkin [Sun, 14 Nov 2021 17:59:40 +0000 (12:59 -0500)]
a4xx: add logic to emit image/ssbo state
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14794>
Ilia Mirkin [Sun, 14 Nov 2021 18:05:07 +0000 (13:05 -0500)]
freedreno/ir3: support a4xx compute differences
Mainly the workgroup id comes injected via consts by the hardware (or
CP), and we must make room for it, otherwise the driver won't know where
to put it.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14794>
Ilia Mirkin [Sun, 14 Nov 2021 18:04:26 +0000 (13:04 -0500)]
freedreno/ir3: support a4xx in load/store buffer/image emission
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14794>
Rob Clark [Thu, 3 Mar 2022 23:38:22 +0000 (15:38 -0800)]
freedreno/perfetto+fdperf: Set SYSPROF param
No need to check error return and deal with older kernels. Older
kernels won't have this param but their default behavior allows for
systemwide perfcntr collection.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15236>
Rob Clark [Thu, 3 Mar 2022 23:34:36 +0000 (15:34 -0800)]
freedreno/drm: Add SYSPROF param
Add new param for putting kernel in system-profiling mode and add
corresponding fd_pipe_set_param() mechanism.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15236>
Rob Clark [Thu, 3 Mar 2022 23:17:13 +0000 (15:17 -0800)]
freedreno: Update uapi header
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15236>
Rob Clark [Fri, 25 Feb 2022 17:08:34 +0000 (09:08 -0800)]
egl+libsync: Add helper to complain about invalid fence fd's
Debugging fd lifetime issues can be hard. Add a helper for debug builds
to print out an error if an fd is not a fence fd, and sprinkle it around
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15094>
Rob Clark [Sat, 19 Feb 2022 16:38:26 +0000 (08:38 -0800)]
android: Push in-fence-fd down to driver
Rather than immediately stall on the CPU in SwapBuffers() if the
in-fence for the dequeued buffer is not yet signaled, push it down
to the driver.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6048
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15094>
Rob Clark [Sat, 19 Feb 2022 16:36:43 +0000 (08:36 -0800)]
gallium/dri: Extend image extension to support in-fence
Extend dri so that an in-fence-fd can be plumbed through to driver.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15094>
Samuel Pitoiset [Thu, 3 Mar 2022 19:26:54 +0000 (20:26 +0100)]
radv/ci: update list of expected failures
Add dEQP-VK.glsl.builtin.precision_double.determinant.compute.mat3
which fails on all generations.
It looks like CTS should relax tolerance slightly.
Co-authored-by: Charlie Turner <cturner@igalia.com>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Martin Roukala <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15234>
Samuel Pitoiset [Fri, 4 Mar 2022 15:20:25 +0000 (16:20 +0100)]
radv/ci: skip dEQP-VK.renderpass2.depth_stencil_resolve.*_samplemask
They randomly hang on Navi10 and randomly fail on Sienna Cichlid.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Martin Roukala <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15234>
Juan A. Suarez Romero [Thu, 3 Mar 2022 11:09:32 +0000 (12:09 +0100)]
v3d: rebind sampler view if resource changed the BO
When discarding the whole resource to create a new one, if this resource
is used by a sampler view, a rebind must be done to use the new
resource.
But this must be done when setting the sampler views, because we don't
have access to those samplers before.
v2:
- Pack shader state on setting sampler views (Iago)
- Use a serial ID to know when to rebind sampler views (Juan)
v3:
- Move check to caller (Iago)
- Keep rebind sampler view on BO change (Iago)
v4:
- Rename "serial_bo" to "serial_id" (Iago)
- Add comments (Iago)
Fixes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6027
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15171>
Alyssa Rosenzweig [Thu, 3 Mar 2022 22:39:02 +0000 (17:39 -0500)]
panfrost: Push twice as many uniforms
The limit for Bifrost is twice as high as previously thought -- the limit is 64
*slots* of FAU, not 64 words. Each slot is 2 words. We can push twice as much,
saving a considerable number of cycles in some cases.
total instructions in shared programs: 2454260 -> 2431502 (-0.93%)
instructions in affected programs: 845176 -> 822418 (-2.69%)
helped: 3376
HURT: 304
helped stats (abs) min: 1.0 max: 60.0 x̄: 7.92 x̃: 6
helped stats (rel) min: 0.13% max: 45.45% x̄: 4.60% x̃: 4.11%
HURT stats (abs) min: 1.0 max: 60.0 x̄: 13.06 x̃: 8
HURT stats (rel) min: 0.16% max: 35.09% x̄: 7.58% x̃: 6.52%
95% mean confidence interval for instructions value: -6.50 -5.87
95% mean confidence interval for instructions %-change: -3.75% -3.43%
Instructions are helped.
total tuples in shared programs: 1963383 -> 1951560 (-0.60%)
tuples in affected programs: 638622 -> 626799 (-1.85%)
helped: 2959
HURT: 573
helped stats (abs) min: 1.0 max: 54.0 x̄: 5.61 x̃: 4
helped stats (rel) min: 0.15% max: 28.57% x̄: 3.61% x̃: 3.12%
HURT stats (abs) min: 1.0 max: 50.0 x̄: 8.35 x̃: 6
HURT stats (rel) min: 0.25% max: 27.34% x̄: 6.24% x̃: 4.92%
95% mean confidence interval for tuples value: -3.61 -3.08
95% mean confidence interval for tuples %-change: -2.18% -1.85%
Tuples are helped.
total clauses in shared programs: 387817 -> 365111 (-5.85%)
clauses in affected programs: 135527 -> 112821 (-16.75%)
helped: 3489
HURT: 25
helped stats (abs) min: 1.0 max: 43.0 x̄: 6.52 x̃: 5
helped stats (rel) min: 0.82% max: 58.33% x̄: 17.48% x̃: 15.87%
HURT stats (abs) min: 1.0 max: 3.0 x̄: 1.56 x̃: 1
HURT stats (rel) min: 2.94% max: 11.11% x̄: 6.87% x̃: 6.67%
95% mean confidence interval for clauses value: -6.67 -6.26
95% mean confidence interval for clauses %-change: -17.65% -16.96%
Clauses are helped.
total cycles in shared programs: 201842.21 -> 168754.04 (-16.39%)
cycles in affected programs: 84035.50 -> 50947.33 (-39.37%)
helped: 3547
HURT: 136
helped stats (abs) min: 0.
041665999999999315 max: 54.0 x̄: 9.33 x̃: 8
helped stats (rel) min: 0.17% max: 80.77% x̄: 36.10% x̃: 36.84%
HURT stats (abs) min: 0.
041665999999999315 max: 1.0 x̄: 0.12 x̃: 0
HURT stats (rel) min: 0.18% max: 12.24% x̄: 1.18% x̃: 0.61%
95% mean confidence interval for cycles value: -9.26 -8.71
95% mean confidence interval for cycles %-change: -35.34% -34.11%
Cycles are helped.
total arith in shared programs: 74918.46 -> 75022.62 (0.14%)
arith in affected programs: 22471.04 -> 22575.21 (0.46%)
helped: 1571
HURT: 1492
helped stats (abs) min: 0.
041665999999999315 max: 1.125 x̄: 0.17 x̃: 0
helped stats (rel) min: 0.17% max: 40.00% x̄: 2.50% x̃: 1.96%
HURT stats (abs) min: 0.
041665999999999315 max: 2.375 x̄: 0.25 x̃: 0
HURT stats (rel) min: 0.16% max: 100.00% x̄: 5.35% x̃: 2.37%
95% mean confidence interval for arith value: 0.02 0.05
95% mean confidence interval for arith %-change: 1.08% 1.56%
Arith are HURT.
total ldst in shared programs: 174812 -> 137889 (-21.12%)
ldst in affected programs: 81319 -> 44396 (-45.41%)
helped: 3722
HURT: 0
helped stats (abs) min: 1.0 max: 62.0 x̄: 9.92 x̃: 8
helped stats (rel) min: 1.82% max: 100.00% x̄: 47.18% x̃: 43.75%
95% mean confidence interval for ldst value: -10.20 -9.64
95% mean confidence interval for ldst %-change: -47.97% -46.39%
Ldst are helped.
total quadwords in shared programs: 1757124 -> 1714130 (-2.45%)
quadwords in affected programs: 584065 -> 541071 (-7.36%)
helped: 3474
HURT: 173
helped stats (abs) min: 1.0 max: 90.0 x̄: 12.66 x̃: 9
helped stats (rel) min: 0.26% max: 34.18% x̄: 8.78% x̃: 8.33%
HURT stats (abs) min: 1.0 max: 26.0 x̄: 5.76 x̃: 4
HURT stats (rel) min: 0.45% max: 20.66% x̄: 4.48% x̃: 2.63%
95% mean confidence interval for quadwords value: -12.21 -11.37
95% mean confidence interval for quadwords %-change: -8.36% -7.95%
Quadwords are helped.
total threads in shared programs: 52898 -> 53142 (0.46%)
threads in affected programs: 262 -> 506 (93.13%)
helped: 250
HURT: 6
helped stats (abs) min: 1.0 max: 1.0 x̄: 1.00 x̃: 1
helped stats (rel) min: 100.00% max: 100.00% x̄: 100.00% x̃: 100.00%
HURT stats (abs) min: 1.0 max: 1.0 x̄: 1.00 x̃: 1
HURT stats (rel) min: 50.00% max: 50.00% x̄: 50.00% x̃: 50.00%
95% mean confidence interval for threads value: 0.92 0.99
95% mean confidence interval for threads %-change: 93.69% 99.28%
Threads are helped.
total spills in shared programs: 161 -> 107 (-33.54%)
spills in affected programs: 54 -> 0
helped: 27
HURT: 0
total fills in shared programs: 1386 -> 796 (-42.57%)
fills in affected programs: 590 -> 0
helped: 27
HURT: 0
Fixes:
d4dccea0ba3 ("panfrost: Add UBO push data structure")
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15239>
Alyssa Rosenzweig [Fri, 4 Mar 2022 02:04:28 +0000 (21:04 -0500)]
pan/bi: Run CSE after lowering FAU
Lowering FAU can add moves from uniforms. If a uniform is moved out to a
register mulitple times in a basic block, these moves can be CSE'd, saving
instructions at the cost of register pressure.
854 shaders in my shader-db are helped on cycle count (average 2.94% reduction
in cycles). Only 9 shaders have hurt thread count, and there is no change in
spills or fills. Overall, this seems to be a win.
Prevents instruction count regressions from the next commit.
total instructions in shared programs: 2454423 -> 2444690 (-0.40%)
instructions in affected programs: 386274 -> 376541 (-2.52%)
helped: 2105
HURT: 0
helped stats (abs) min: 1.0 max: 116.0 x̄: 4.62 x̃: 2
helped stats (rel) min: 0.04% max: 27.27% x̄: 3.64% x̃: 1.92%
95% mean confidence interval for instructions value: -4.91 -4.33
95% mean confidence interval for instructions %-change: -3.83% -3.45%
Instructions are helped.
total tuples in shared programs: 1963534 -> 1957106 (-0.33%)
tuples in affected programs: 233562 -> 227134 (-2.75%)
helped: 1491
HURT: 117
helped stats (abs) min: 1.0 max: 63.0 x̄: 4.44 x̃: 2
helped stats (rel) min: 0.04% max: 24.53% x̄: 4.39% x̃: 2.59%
HURT stats (abs) min: 1.0 max: 5.0 x̄: 1.61 x̃: 1
HURT stats (rel) min: 0.18% max: 8.33% x̄: 1.44% x̃: 1.05%
95% mean confidence interval for tuples value: -4.28 -3.71
95% mean confidence interval for tuples %-change: -4.20% -3.73%
Tuples are helped.
total clauses in shared programs: 387848 -> 387079 (-0.20%)
clauses in affected programs: 13718 -> 12949 (-5.61%)
helped: 583
HURT: 60
helped stats (abs) min: 1.0 max: 16.0 x̄: 1.42 x̃: 1
helped stats (rel) min: 1.11% max: 25.00% x̄: 8.28% x̃: 6.67%
HURT stats (abs) min: 1.0 max: 1.0 x̄: 1.00 x̃: 1
HURT stats (rel) min: 0.86% max: 20.00% x̄: 4.58% x̃: 4.00%
95% mean confidence interval for clauses value: -1.29 -1.10
95% mean confidence interval for clauses %-change: -7.57% -6.58%
Clauses are helped.
total cycles in shared programs: 201866.21 -> 201682.92 (-0.09%)
cycles in affected programs: 6241.79 -> 6058.50 (-2.94%)
helped: 952
HURT: 98
helped stats (abs) min: 0.
04166399999999726 max: 2.625 x̄: 0.20 x̃: 0
helped stats (rel) min: 0.12% max: 26.00% x̄: 4.05% x̃: 2.38%
HURT stats (abs) min: 0.
041665999999999315 max: 0.
16666700000000034 x̄: 0.07 x̃: 0
HURT stats (rel) min: 0.18% max: 8.70% x̄: 1.60% x̃: 1.43%
95% mean confidence interval for cycles value: -0.19 -0.16
95% mean confidence interval for cycles %-change: -3.80% -3.24%
Cycles are helped.
total arith in shared programs: 74924.00 -> 74660.12 (-0.35%)
arith in affected programs: 9303.67 -> 9039.79 (-2.84%)
helped: 1513
HURT: 118
helped stats (abs) min: 0.
04166399999999726 max: 2.625 x̄: 0.18 x̃: 0
helped stats (rel) min: 0.07% max: 33.33% x̄: 4.68% x̃: 2.67%
HURT stats (abs) min: 0.
041665999999999315 max: 0.
16666800000000137 x̄: 0.07 x̃: 0
HURT stats (rel) min: 0.18% max: 8.70% x̄: 1.55% x̃: 1.37%
95% mean confidence interval for arith value: -0.17 -0.15
95% mean confidence interval for arith %-change: -4.48% -3.98%
Arith are helped.
total quadwords in shared programs: 1757254 -> 1751978 (-0.30%)
quadwords in affected programs: 197399 -> 192123 (-2.67%)
helped: 1464
HURT: 110
helped stats (abs) min: 1.0 max: 51.0 x̄: 3.73 x̃: 2
helped stats (rel) min: 0.04% max: 21.95% x̄: 4.16% x̃: 2.52%
HURT stats (abs) min: 1.0 max: 7.0 x̄: 1.71 x̃: 1
HURT stats (rel) min: 0.21% max: 13.04% x̄: 1.65% x̃: 0.93%
95% mean confidence interval for quadwords value: -3.58 -3.13
95% mean confidence interval for quadwords %-change: -3.97% -3.53%
Quadwords are helped.
total threads in shared programs: 52899 -> 52890 (-0.02%)
threads in affected programs: 18 -> 9 (-50.00%)
helped: 0
HURT: 9
HURT stats (abs) min: 1.0 max: 1.0 x̄: 1.00 x̃: 1
HURT stats (rel) min: 50.00% max: 50.00% x̄: 50.00% x̃: 50.00%
95% mean confidence interval for threads value: -1.00 -1.00
95% mean confidence interval for threads %-change: -50.00% -50.00%
Threads are HURT.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15239>
Henry Goffin [Wed, 29 Dec 2021 09:20:30 +0000 (09:20 +0000)]
frontends/va: ignore incoming frame_num from VA picture parameters
The Gallium pipe video "frame_num" variable is internally used as a
counter of elapsed reference frames since the last IDR. The incoming
frame_num field from VA picture parameters is not equivalent; the VA
value may wrap to zero prematurely, as it is a 16-bit struct field with
a documented max value of 2^(log2_max_frame_num_minus4 + 4)-1.
This change improves "infinite GOP" single-client live streaming, where
it is reasonable for the server to desire an endless series of P-frames
without IDR. Without this change, it is difficult/impossible for an
application to encode a P- or B-frame after the VA frame_num field wraps
around to zero, depending on the backend encoder implementation.
This change has no effect on existing applications that always signal an
IDR frame and reset the VA frame_num to zero before it wraps around. For
example, the FFmpeg vaapi encoder ignores the VA documentation and sends
an un-wrapped VA frame_num, which results in identical computation of
the internal frame_num (as long as each GOP is less than 65536 frames).
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5768
Reviewed-by: Thong Thai <thong.thai@amd.com>
patch revision 3: correctly avoid incrementing frame_num when the encoded
frame is not a reference, per h264 spec and ffmpeg behavior
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14332>
Rhys Perry [Wed, 2 Mar 2022 13:32:42 +0000 (13:32 +0000)]
aco: rework removal of jumps over branches
Only allow this in situations where we know it's safe. In particular, this
stops removal of unconditional branches like with
block_kind_continue_or_break.
Fixes dEQP-VK.graphicsfuzz.fragcoord-control-flow hang.
fossil-db (Sienna Cichlid):
Totals from 34 (0.02% of 162293) affected shaders:
Instrs: 84115 -> 84178 (+0.07%); split: -0.00%, +0.08%
CodeSize: 463372 -> 463624 (+0.05%); split: -0.00%, +0.06%
Latency: 3467316 -> 3467652 (+0.01%)
InvThroughput: 3085493 -> 3085578 (+0.00%)
Branches: 3221 -> 3284 (+1.96%); split: -0.03%, +1.99%
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Fixes:
f030b75b7d2 ("aco: relax condition to remove branches in case of few instructions")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15214>
Samuel Pitoiset [Thu, 3 Mar 2022 12:08:17 +0000 (13:08 +0100)]
ac/nir: implement nir_op_pack_{uint,sint}_2x16
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15231>
Samuel Pitoiset [Thu, 3 Mar 2022 07:53:06 +0000 (08:53 +0100)]
aco: implement nir_op_pack_{uint,sint}_2x16
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15231>
Samuel Pitoiset [Thu, 3 Mar 2022 07:37:29 +0000 (08:37 +0100)]
nir: introduce nir_pack_{sint,uint}_2x16 instructions
These instructions have AMD hardware equivalent and they will be used
to lower fragment shader outputs in NIR.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15231>
Xiaohui Gu [Mon, 25 Oct 2021 05:58:03 +0000 (13:58 +0800)]
iris: Mark a dirty update when vs_needs_sgvs_element value changed
Add vs_needs_sgvs_element value check when updating vertex
element dirty state in iris_update_compiled_vs to solve
render error of Android game "Genshin Impact".
Signed-off-by: Xiaohui Gu <xiaohui.gu@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15142>
Yiwei Zhang [Tue, 1 Mar 2022 19:11:29 +0000 (19:11 +0000)]
venus: add VK_EXT_image_robustness support
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15205>
Yiwei Zhang [Tue, 1 Mar 2022 18:50:40 +0000 (18:50 +0000)]
venus: add VK_EXT_provoking_vertex support
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15205>
Yiwei Zhang [Tue, 1 Mar 2022 18:40:31 +0000 (18:40 +0000)]
venus: add VK_EXT_line_rasterization support
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15205>
Yiwei Zhang [Tue, 1 Mar 2022 18:30:36 +0000 (18:30 +0000)]
venus: update to latest venus protocol
Added the below extension support:
- VK_EXT_line_rasterization
- VK_EXT_provoking_vertex
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15205>
Yiwei Zhang [Thu, 3 Mar 2022 22:28:03 +0000 (22:28 +0000)]
venus: group extensions promoted to 1.3
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15205>
Yiwei Zhang [Thu, 3 Mar 2022 22:23:23 +0000 (22:23 +0000)]
venus: clean up physical device features and properties
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15205>
Daniel Schürmann [Thu, 19 Aug 2021 08:46:09 +0000 (10:46 +0200)]
nir/opt_shrink_vectors: update docstring
in order to reflect the various recent improvements.
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12468>
Daniel Schürmann [Tue, 17 Aug 2021 12:01:36 +0000 (14:01 +0200)]
nir/opt_shrink_vectors: remove duplicate components from vecN
vecN instructions which are only used by other ALU
will now get duplicate channels removed.
i915g:
total instructions in shared programs: 396309 -> 396294 (<.01%)
instructions in affected programs: 186 -> 171 (-8.06%)
r300:
total instructions in shared programs: 1165059 -> 1164354 (-0.06%)
instructions in affected programs: 35884 -> 35179 (-1.96%)
total temps in shared programs: 165497 -> 165326 (-0.10%)
temps in affected programs: 2990 -> 2819 (-5.72%)
softpipe:
total instructions in shared programs: 2860028 -> 2859084 (-0.03%)
instructions in affected programs: 55539 -> 54595 (-1.70%)
total temps in shared programs: 516939 -> 516546 (-0.08%)
temps in affected programs: 6623 -> 6230 (-5.93%)
Acked-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12468>
Daniel Schürmann [Tue, 17 Aug 2021 11:23:22 +0000 (13:23 +0200)]
nir/opt_shrink_vectors: shrink load_const properly
This patch enables removal of arbitrary channels in
load_const instructions, if they are either unused or
duplicates of other channels and only used by ALU.
Totals from 692 (0.51% of 134913) affected shaders: (GFX10.3)
VGPRs: 21832 -> 21544 (-1.32%)
CodeSize: 1322016 -> 1313080 (-0.68%); split: -0.68%, +0.01%
Instrs: 243635 -> 242231 (-0.58%); split: -0.58%, +0.00%
Latency: 1856138 -> 1857237 (+0.06%); split: -0.09%, +0.15%
InvThroughput: 424298 -> 421671 (-0.62%); split: -0.62%, +0.01%
VClause: 4580 -> 4583 (+0.07%); split: -0.02%, +0.09%
SClause: 14336 -> 14354 (+0.13%); split: -0.04%, +0.17%
Copies: 8897 -> 8859 (-0.43%); split: -0.45%, +0.02%
PreSGPRs: 20439 -> 20437 (-0.01%)
PreVGPRs: 16011 -> 15907 (-0.65%); split: -0.97%, +0.32%
i915g:
total instructions in shared programs: 396471 -> 396309 (-0.04%)
instructions in affected programs: 6408 -> 6246 (-2.53%)
total const in shared programs: 56458 -> 56422 (-0.06%)
const in affected programs: 407 -> 371 (-8.85%)
LOST: shaders/closed/steam/trine-2/fp-3.shader_test FS
r300:
total instructions in shared programs: 1164421 -> 1165059 (0.05%)
instructions in affected programs: 143981 -> 144619 (0.44%)
total temps in shared programs: 165488 -> 165497 (<.01%)
temps in affected programs: 318 -> 327 (2.83%)
total consts in shared programs: 922140 -> 921952 (-0.02%)
consts in affected programs: 12438 -> 12250 (-1.51%)
softpipe:
total instructions in shared programs: 2859978 -> 2860028 (<.01%)
instructions in affected programs: 183355 -> 183405 (0.03%)
total temps in shared programs: 517071 -> 516939 (-0.03%)
temps in affected programs: 1416 -> 1284 (-9.32%)
total imm in shared programs: 103601 -> 102767 (-0.81%)
imm in affected programs: 3928 -> 3094 (-21.23%)
Acked-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12468>
Dave Airlie [Thu, 3 Mar 2022 05:37:25 +0000 (15:37 +1000)]
crocus: change the line width workaround for gfx4/5
This fixes piglit line-flat-clip-color and the hud fps counter.
Fixes:
6b7a68b7c21e ("crocus: add missing line smooth bits.")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15229>
Chia-I Wu [Mon, 28 Feb 2022 22:28:36 +0000 (14:28 -0800)]
venus: abort when stuck
This gives
MESA-VIRTIO: debug: stuck in ring seqno wait with iter at 4096
MESA-VIRTIO: debug: stuck in ring seqno wait with iter at 8192
MESA-VIRTIO: debug: stuck in ring seqno wait with iter at 12288
MESA-VIRTIO: debug: stuck in ring seqno wait with iter at 16384
MESA-VIRTIO: debug: aborting
Aborted
which should be more friendly than printing the messages forever.
On my i7-7820HQ, this aborts after roughly 4+8+16+32=60 seconds
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15200>
Daniel Schürmann [Wed, 2 Mar 2022 23:52:06 +0000 (00:52 +0100)]
aco/ra: don't immediately assign a register for p_branch
These get now assigned after handling phis.
Totals from 564 (0.42% of 134913) affected shaders: (GFX10.3)
CodeSize: 5519744 -> 5515308 (-0.08%)
Instrs: 1063045 -> 1061936 (-0.10%)
Latency:
11880452 ->
11875904 (-0.04%)
InvThroughput: 2259933 -> 2259581 (-0.02%); split: -0.02%, +0.00%
Copies: 86908 -> 85799 (-1.28%)
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13432>
Rhys Perry [Tue, 27 Jul 2021 10:24:53 +0000 (11:24 +0100)]
aco/tests: add test for branch definition RA
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13432>
Rhys Perry [Fri, 10 Sep 2021 17:20:03 +0000 (18:20 +0100)]
aco: fix branch definition validation
Like how they have to be register allocated differently, branch
definitions at merge block predecessors need to be validated differently.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13432>
Rhys Perry [Wed, 20 Oct 2021 08:11:51 +0000 (09:11 +0100)]
aco: add validate_instr_defs()
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13432>
Rhys Perry [Wed, 28 Jul 2021 15:30:57 +0000 (16:30 +0100)]
aco/ra: fix register allocation of branch definitions
fossil-db (Sienna Cichlid):
Totals from 704 (0.52% of 134913) affected shaders:
CodeSize: 7177288 -> 7182072 (+0.07%); split: -0.00%, +0.07%
Instrs: 1371781 -> 1372977 (+0.09%); split: -0.00%, +0.09%
Latency:
17993572 ->
18001344 (+0.04%); split: -0.00%, +0.04%
InvThroughput: 4198996 -> 4199569 (+0.01%); split: -0.00%, +0.01%
Copies: 122456 -> 123516 (+0.87%); split: -0.01%, +0.88%
Branches: 43815 -> 43818 (+0.01%); split: -0.02%, +0.03%
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13432>