Krzysztof Kozlowski [Thu, 8 Sep 2022 08:10:50 +0000 (10:10 +0200)]
arm64: dts: qcom: sa8295p-adp: add missing gpio-ranges in PMIC GPIOs
The Qualcomm PMIC GPIO bindings require gpio-ranges property:
qcom/sa8295p-adp.dtb: pmic@8: gpio@c000: 'gpio-ranges' is a required property
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220908081050.29751-5-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Thu, 8 Sep 2022 08:10:49 +0000 (10:10 +0200)]
arm64: dts: qcom: sa8295p-adp: add fallback compatible to PMIC GPIOs
Bindings require all PMIC GPIO nodes to have two compatibles - specific
followed by SPMI or SSBI fallback:
qcom/sa8295p-adp.dtb: pmic@8: gpio@c000:compatible: ['qcom,pm8150-gpio'] is too short
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220908081050.29751-4-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Thu, 8 Sep 2022 08:10:48 +0000 (10:10 +0200)]
arm64: dts: qcom: msm8996-xiaomi: align PMIC GPIO pin configuration with DT schema
Bindings expect PMIC GPIO pin configuration nodes to be named with
'-state' suffix:
qcom/msm8996-xiaomi-scorpio.dtb: pmic@0: gpio@c000: 'irled-default', 'keypad-default' do not match any of the regexes: '-state$', 'pinctrl-[0-9]+'
Drop also additional indentation via "pinconf" to make the code a bit
smaller.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220908081050.29751-3-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Thu, 8 Sep 2022 08:10:47 +0000 (10:10 +0200)]
arm64: dts: qcom: msm8994-msft-lumia-octagon: align resin node name with bindings
Bindings expect resin node to be named "resin":
qcom/msm8992-msft-lumia-octagon-talkman.dtb: pmic@0: pon@800: Unevaluated properties are not allowed ('volwnkey' was unexpected)
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220908081050.29751-2-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Thu, 8 Sep 2022 08:10:46 +0000 (10:10 +0200)]
arm64: dts: qcom: pmi8994: add missing MPP compatible fallback
Bindings require usage of generic MPP fallback in compatible:
qcom/apq8094-sony-xperia-kitakami-karin_windy.dtb: pmic@2: mpps@a000:compatible: ['qcom,pmi8994-mpp'] is too short
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220908081050.29751-1-krzysztof.kozlowski@linaro.org
Krishna chaitanya chundru [Thu, 8 Sep 2022 08:46:16 +0000 (14:16 +0530)]
dt-bindings: pci: QCOM Add missing sc7280 aggre0, aggre1 clocks
Add missing aggre0 and aggre1 clocks.
Signed-off-by: Krishna chaitanya chundru <quic_krichai@quicinc.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/1662626776-19636-3-git-send-email-quic_krichai@quicinc.com
Krishna chaitanya chundru [Thu, 8 Sep 2022 08:46:15 +0000 (14:16 +0530)]
arm64: dts: qcom: sc7280: Add missing aggre0, aggre1 clocks
Add missing aggre0, aggre1 clocks.
Signed-off-by: Krishna chaitanya chundru <quic_krichai@quicinc.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/1662626776-19636-2-git-send-email-quic_krichai@quicinc.com
Douglas Anderson [Mon, 29 Aug 2022 15:48:24 +0000 (08:48 -0700)]
arm64: dts: qcom: sc7280-villager: Adjust LTE SKUs
There have been a few changes since the patch ("arm64: dts: qcom: Add
LTE SKUs for sc7280-villager family")
* New firmware reports LTE boards as "SKU 512" now. Old firmware will
still report "SKU 0", but that's all pre-production and everyone
will update.
* It's been relaized that no "-rev0" boards were ever built that were
WiFi-only. Thus we don't two entries for -rev0.
Adjust the organization a bit.
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220829084732.2.I22e256d1ebac577a91fac44d1d12919be7111cd4@changeid
Douglas Anderson [Mon, 29 Aug 2022 15:48:23 +0000 (08:48 -0700)]
dt-bindings: arm: qcom: Adjust LTE SKUs for sc7280-villager
There have been a few changes since the patch ("dt-bindings: arm:
qcom: document sc7280 and villager board").
* New firmware reports LTE boards as "SKU 512" now. Old firmware will
still report "SKU 0", but that's all pre-production and everyone
will update.
* It's been relaized that no "-rev0" boards were ever built that were
WiFi-only. Thus we don't two entries for -rev0.
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220829084732.1.I9ef7f8b909a7afbef9ff2251a98c67033f37b516@changeid
Matthias Kaehlcke [Fri, 22 Jul 2022 16:32:45 +0000 (09:32 -0700)]
arm64: dts: qcom: sc7280-herobrine: Add nodes for onboard USB hub
Add nodes for the onboard USB hub on herobrine devices. Remove the
'always-on' property from the hub regulator, since the regulator
is now managed by the onboard_usb_hub driver.
This requires "CONFIG_USB_ONBOARD_HUB=y".
Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220722093238.v24.2.I18481b296484eec47bdc292a31fa46fa8c655ca9@changeid
Matthias Kaehlcke [Fri, 22 Jul 2022 16:32:44 +0000 (09:32 -0700)]
arm64: dts: qcom: sc7180-trogdor: Add nodes for onboard USB hub
Add nodes for the onboard USB hub on trogdor devices. Remove the
'always-on' property from the hub regulator, since the regulator
is now managed by the onboard_usb_hub driver.
For anyone using trogdor-based devices on Linux, it should be
noted that this requires "CONFIG_USB_ONBOARD_HUB=y".
Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220722093238.v24.1.I7a1a6448d50bdd38e6082204a9818c59cc7a9bfd@changeid
Krzysztof Kozlowski [Tue, 12 Jul 2022 14:42:43 +0000 (16:42 +0200)]
arm64: dts: qcom: align SDHCI reg-names with DT schema
DT schema requires SDHCI reg names to be hc/core without "_mem" suffix,
just like TXT bindings were expecting before the conversion.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220712144245.17417-4-krzysztof.kozlowski@linaro.org
Dmitry Baryshkov [Thu, 7 Jul 2022 13:47:33 +0000 (16:47 +0300)]
arm64: dts: qcom: sm8250: provide additional MSI interrupts
On SM8250 each group of MSI interrupts is mapped to the separate host
interrupt. Describe each of interrupts in the device tree for PCIe0
host.
Tested on Qualcomm RB5 platform with first group of MSI interrupts being
used by the PME and attached ath11k WiFi chip using second group of MSI
interrupts.
Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220707134733.2436629-7-dmitry.baryshkov@linaro.org
Dmitry Baryshkov [Mon, 4 Jul 2022 16:11:48 +0000 (19:11 +0300)]
arm64: dts: qcom: msm8996: add #clock-cells and XO clock to the HDMI PHY node
Add #clock-cells property to the HDMI PHY device node to let other nodes
resolve the hdmipll clock. While we are at it, also add the XO clock to
the device node.
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220704161148.814510-4-dmitry.baryshkov@linaro.org
Yassine Oudjana [Wed, 22 Jun 2022 16:13:22 +0000 (20:13 +0400)]
arm64: dts: qcom: Use WCD9335 DT bindings
Replace DAI indices in codec nodes with definitions from the WCD9335
DT bindings for devices that use WCD9335.
Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220622161322.168017-4-y.oudjana@protonmail.com
Krzysztof Kozlowski [Fri, 9 Sep 2022 09:20:32 +0000 (11:20 +0200)]
arm64: dts: qcom: msm8994: switch TCSR mutex to MMIO
The TCSR mutex bindings allow device to be described only with address
space (so it uses MMIO, not syscon regmap). This seems reasonable as
TCSR mutex is actually a dedicated IO address space and it also fixes DT
schema checks:
qcom/msm8994-sony-xperia-kitakami-suzuran.dtb: hwlock: 'reg' is a required property
qcom/msm8994-sony-xperia-kitakami-suzuran.dtb: hwlock: 'syscon' does not match any of the regexes: 'pinctrl-[0-9]+'
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220909092035.223915-13-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Fri, 9 Sep 2022 09:20:31 +0000 (11:20 +0200)]
arm64: dts: qcom: ipq6018: switch TCSR mutex to MMIO
The TCSR mutex bindings allow device to be described only with address
space (so it uses MMIO, not syscon regmap). This seems reasonable as
TCSR mutex is actually a dedicated IO address space and it also fixes DT
schema checks:
qcom/ipq6018-cp01-c1.dtb: hwlock: 'reg' is a required property
qcom/ipq6018-cp01-c1.dtb: hwlock: 'syscon' does not match any of the regexes: 'pinctrl-[0-9]+'
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220909092035.223915-12-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Fri, 9 Sep 2022 09:20:28 +0000 (11:20 +0200)]
arm64: dts: qcom: msm8996: add missing TCSR syscon compatible
TCSR syscon node should come with dedicated compatible.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220909092035.223915-9-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Fri, 9 Sep 2022 09:20:27 +0000 (11:20 +0200)]
arm64: dts: qcom: qcs404: add missing TCSR syscon compatible
TCSR syscon node should come with dedicated compatible.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220909092035.223915-8-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Fri, 9 Sep 2022 09:20:26 +0000 (11:20 +0200)]
arm64: dts: qcom: msm8953: add missing TCSR syscon compatible
TCSR syscon node should come with dedicated compatible.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220909092035.223915-7-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Fri, 9 Sep 2022 09:20:25 +0000 (11:20 +0200)]
arm64: dts: qcom: ipq6018: add missing TCSR syscon compatible
TCSR syscon node should come with dedicated compatible.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220909092035.223915-6-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Mon, 12 Sep 2022 06:17:46 +0000 (08:17 +0200)]
arm64: dts: qcom: sc7280-herobrine: correct TLMM gpio-line-names
There are 174 GPIOs in SC7280.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220912061746.6311-41-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Mon, 12 Sep 2022 06:17:45 +0000 (08:17 +0200)]
arm64: dts: qcom: sc7280: align TLMM pin configuration with DT schema
DT schema expects TLMM pin configuration nodes to be named with '-state'
suffix and their optional children with '-pins' suffix.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220912061746.6311-40-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Mon, 12 Sep 2022 06:17:44 +0000 (08:17 +0200)]
arm64: dts: qcom: sm8450: align TLMM pin configuration with DT schema
DT schema expects TLMM pin configuration nodes to be named with '-state'
suffix and their optional children with '-pins' suffix.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220912061746.6311-39-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Mon, 12 Sep 2022 06:17:43 +0000 (08:17 +0200)]
arm64: dts: qcom: sm8350: align TLMM pin configuration with DT schema
DT schema expects TLMM pin configuration nodes to be named with '-state'
suffix and their optional children with '-pins' suffix.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220912061746.6311-38-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Mon, 12 Sep 2022 06:17:42 +0000 (08:17 +0200)]
arm64: dts: qcom: sm8350-sagami: correct TS pin property
The pin configuration is selected with "pins", not "pin" property.
Fixes:
1209e9246632 ("arm64: dts: qcom: sm8350-sagami: Enable and populate I2C/SPI nodes")
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220912061746.6311-37-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Mon, 12 Sep 2022 06:17:41 +0000 (08:17 +0200)]
arm64: dts: qcom: sm6350: align TLMM pin configuration with DT schema
DT schema expects TLMM pin configuration nodes to be named with '-state'
suffix and their optional children with '-pins' suffix.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220912061746.6311-36-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Mon, 12 Sep 2022 06:17:40 +0000 (08:17 +0200)]
arm64: dts: qcom: sm6125: align TLMM pin configuration with DT schema
DT schema expects TLMM pin configuration nodes to be named with '-state'
suffix and their optional children with '-pins' suffix.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220912061746.6311-35-krzysztof.kozlowski@linaro.org
Judy Hsiao [Fri, 26 Aug 2022 06:56:21 +0000 (06:56 +0000)]
arm64: dts: qcom: sc7280: Fix Dmic no sound on villager-r1
Fix the DMIC no sound issue of villager-r1 by using "PP1800_L2C" as the
DMIC power source to match the hardware schematic.
This patch:
1. set vdd-micb-supply to PP1800_L2C as the MIC Bias voltage regulator.
2. In audio-routing, set VA DMIC01~VA DMIC03 to use the vdd-micb-supply
setting.
Co-developed-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
Signed-off-by: Judy Hsiao <judyhsiao@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220826065621.2255795-1-judyhsiao@chromium.org
Srinivasa Rao Mandadapu [Thu, 7 Jul 2022 13:23:04 +0000 (18:53 +0530)]
arm64: dts: qcom: sc7280: Add sound node for CRD 3.0/3.1
Add dt nodes for sound card support on rev5+ (aka CRD 3.0/3.1) boards,
which is using WCD9385 headset playback, capture, I2S speaker playback
and DMICs via VA macro.
Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
Co-developed-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
Signed-off-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/1657200184-29565-13-git-send-email-quic_srivasam@quicinc.com
Srinivasa Rao Mandadapu [Thu, 7 Jul 2022 13:23:03 +0000 (18:53 +0530)]
arm64: dts: qcom: sc7280: Add sound node for CRD 1.0/2.0 and IDP boards
Add dt nodes for sound card support on revision 3, 4
(aka CRD 1.0 and 2.0) and IDP boards, which is using WCD9385 headset
playback, capture, I2S speaker playback and DMICs via VA macro.
Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
Co-developed-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
Signed-off-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/1657200184-29565-12-git-send-email-quic_srivasam@quicinc.com
Srinivasa Rao Mandadapu [Thu, 7 Jul 2022 13:23:02 +0000 (18:53 +0530)]
arm64: dts: qcom: sc7280: Enable lpass cpu node for CRD 3.0/3.1
Enable lpass cpu node and add pin control and dai-links for audio on
sc7280 based platforms of rev5+ (aka CRD 3.0/3.1) boards.
Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
Co-developed-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
Signed-off-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/1657200184-29565-11-git-send-email-quic_srivasam@quicinc.com
Srinivasa Rao Mandadapu [Thu, 7 Jul 2022 13:23:01 +0000 (18:53 +0530)]
arm64: dts: qcom: sc7280: Enable lpass cpu node for CRD 1.0/2.0 and IDP boards.
Enable lpass cpu node and add pin control and dai-links for audio on sc7280
based platforms of revision 3, 4 (aka CRD 1.0 and 2.0) and IDP boards.
Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
Co-developed-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
Signed-off-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/1657200184-29565-10-git-send-email-quic_srivasam@quicinc.com
Srinivasa Rao Mandadapu [Thu, 7 Jul 2022 13:23:00 +0000 (18:53 +0530)]
arm64: dts: qcom: sc7280: Add lpass cpu node
Add lpass cpu node for audio on sc7280 based platforms.
Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
Co-developed-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
Signed-off-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/1657200184-29565-9-git-send-email-quic_srivasam@quicinc.com
Srinivasa Rao Mandadapu [Thu, 7 Jul 2022 13:22:59 +0000 (18:52 +0530)]
arm64: dts: qcom: sc7280: herobrine: Add max98360a codec node
Add max98360a codec node for audio use case on all herobrine boards.
Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
Co-developed-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
Signed-off-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/1657200184-29565-8-git-send-email-quic_srivasam@quicinc.com
Srinivasa Rao Mandadapu [Thu, 7 Jul 2022 13:22:58 +0000 (18:52 +0530)]
arm64: dts: qcom: sc7280: Add max98360a codec for CRD 1.0/2.0 and IDP boards
Add max98360a codec node for audio use case on revision 3, 4
(aka CRD 1.0 and 2.0) and IDP boards.
Add amp_en node for max98360a codec pin control.
Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
Co-developed-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
Signed-off-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/1657200184-29565-7-git-send-email-quic_srivasam@quicinc.com
Srinivasa Rao Mandadapu [Thu, 7 Jul 2022 13:22:57 +0000 (18:52 +0530)]
arm64: dts: qcom: sc7280: Add wcd9385 codec node for CRD 3.0/3.1
Add wcd9385 codec node for audio use case on CRD rev5+ (aka CRD 3.0/3.1)
boards. Add tlmm gpio property for switching CTIA/OMTP Headset.
Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
Co-developed-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
Signed-off-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/1657200184-29565-6-git-send-email-quic_srivasam@quicinc.com
Srinivasa Rao Mandadapu [Thu, 7 Jul 2022 13:22:56 +0000 (18:52 +0530)]
arm64: dts: qcom: sc7280: Add wcd9385 codec node for CRD 1.0/2.0 and IDP boards
Add wcd9385 codec node for audio use case on sc7280 based platforms
of revision 3, 4 (aka CRD 1.0 and 2.0) and IDP boards.
Add tlmm gpio property for switching CTIA/OMTP Headset.
Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
Co-developed-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
Signed-off-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/1657200184-29565-5-git-send-email-quic_srivasam@quicinc.com
Srinivasa Rao Mandadapu [Thu, 7 Jul 2022 13:22:55 +0000 (18:52 +0530)]
arm64: dts: qcom: sc7280: Enable digital codecs and soundwire for CRD 3.0/3.1
Enable rx, tx and va macro codecs and soundwire nodes for
CRD rev5+ (aka CRD 3.0/3.1) boards.
Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
Co-developed-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
Signed-off-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/1657200184-29565-4-git-send-email-quic_srivasam@quicinc.com
Srinivasa Rao Mandadapu [Thu, 7 Jul 2022 13:22:54 +0000 (18:52 +0530)]
arm64: dts: qcom: sc7280: Enable digital codecs and soundwire for CRD 1.0/2.0 and IDP boards
Enable rx, tx and va macro codecs and soundwire nodes on revision 3,
4 (aka CRD 1.0 and 2.0) and IDP boards.
Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
Co-developed-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
Signed-off-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/1657200184-29565-3-git-send-email-quic_srivasam@quicinc.com
Srinivasa Rao Mandadapu [Thu, 7 Jul 2022 13:22:53 +0000 (18:52 +0530)]
arm64: dts: qcom: sc7280: Add nodes for soundwire and va tx rx digital macro codecs
SC7280 has VA, TX and RX macros with SoundWire Controllers to attach with
external codecs using soundwire masters. Add these nodes for sc7280 based
platforms audio use case.
Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
Co-developed-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
Signed-off-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/1657200184-29565-2-git-send-email-quic_srivasam@quicinc.com
Taniya Das [Thu, 1 Sep 2022 04:17:25 +0000 (09:47 +0530)]
dt-bindings: clock: Add support for external MCLKs for LPASS on SC7280
Support external mclk to interface external MI2S clocks for SC7280.
Fixes:
4185b27b3bef ("dt-bindings: clock: Add YAML schemas for LPASS clocks on SC7280")
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/1662005846-4838-5-git-send-email-quic_c_skakit@quicinc.com
Taniya Das [Thu, 1 Sep 2022 04:17:24 +0000 (09:47 +0530)]
dt-bindings: clock: Add resets for LPASS audio clock controller for SC7280
Add support for LPASS audio clock gating for RX/TX/SWA core bus clocks
for SC7280. Update reg property min/max items in YAML schema.
Fixes:
4185b27b3bef ("dt-bindings: clock: Add YAML schemas for LPASS clocks on SC7280")
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/1662005846-4838-4-git-send-email-quic_c_skakit@quicinc.com
Taniya Das [Thu, 1 Sep 2022 04:17:22 +0000 (09:47 +0530)]
dt-bindings: clock: Add "qcom,adsp-pil-mode" property
When this property is set, the remoteproc is used to boot the
LPASS and therefore lpass_q6ss_ahbm_clk and lpass_q6ss_ahbs_clk
clocks would be used to bring LPASS out of reset and the rest of
the lpass clocks would be controlled directly by the remoteproc.
This is a cleanup done to handle overlap of regmap of
lpasscc and lpass_aon blocks.
Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
Signed-off-by: Satya Priya <quic_c_skakit@quicinc.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/1662005846-4838-2-git-send-email-quic_c_skakit@quicinc.com
Jimmy Chen [Tue, 26 Jul 2022 09:45:49 +0000 (17:45 +0800)]
arm64: dts: qcom: Add LTE SKUs for sc7280-villager family
This adds LTE skus for villager device tree files.
Signed-off-by: Jimmy Chen <jinghung.chen3@hotmail.com>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Sibi Sankar <quic_sibis@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/SG2PR03MB5006B0C3E57803E3B1E0EDBCCC949@SG2PR03MB5006.apcprd03.prod.outlook.com
Jimmy Chen [Tue, 26 Jul 2022 09:45:48 +0000 (17:45 +0800)]
arm64: dts: qcom: sc7280: Add herobrine-villager-r1
This adds sc7280-herobrine-villager-r1.dts for villager device tree files.
Herobrine-r1 is exactly the same as -r0 except that it uses a
different audio solution (it uses the same one as the CRD).
Signed-off-by: Jimmy Chen <jinghung.chen3@hotmail.com>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/SG2PR03MB500667CFE3F5F59585F8BA77CC949@SG2PR03MB5006.apcprd03.prod.outlook.com
Jimmy Chen [Tue, 26 Jul 2022 09:45:47 +0000 (17:45 +0800)]
dt-bindings: arm: qcom: document sc7280 and villager board
This adds a LTE skus for Chromebook Villager to the yaml.
Signed-off-by: Jimmy Chen <jinghung.chen3@hotmail.com>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/SG2PR03MB5006CE1EB9BFD95511133CA6CC949@SG2PR03MB5006.apcprd03.prod.outlook.com
Bhupesh Sharma [Wed, 7 Sep 2022 20:41:53 +0000 (02:11 +0530)]
arm64: dts: qcom: sa8155p-adp: Remove unused properties from eth node
The 'snps,ptp-ref-clk-rate' and 'snps,ptp-req-clk-rate' properties
are not supported by the stmmac driver currently, so remove
them from the sa8155p-adp ethernet node as well.
Cc: Bjorn Andersson <andersson@kernel.org>
Cc: Rob Herring <robh@kernel.org>
Cc: Vinod Koul <vkoul@kernel.org>
Cc: David Miller <davem@davemloft.net>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220907204153.2039776-1-bhupesh.sharma@linaro.org
Krzysztof Kozlowski [Thu, 8 Sep 2022 08:58:30 +0000 (10:58 +0200)]
arm64: dts: qcom: sc7280: correct CPU BWMON unit address
Correct CPU BWMON unit address to match the "reg" property.
Reported-by: Stephen Boyd <swboyd@chromium.org>
Fixes:
b2f3eac1b77c ("arm64: dts: qcom: sc7280: Add cpu and llcc BWMON")
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220908085830.39141-1-krzysztof.kozlowski@linaro.org
Jakob Hauser [Sun, 4 Sep 2022 21:49:35 +0000 (23:49 +0200)]
arm64: dts: qcom: msm8916-samsung-serranove: Add magnetometer
Add magnetometer Yamaha YAS537 to the DeviceTree of samsung-serranove.
The YAS537 variant was recently added to the Yamaha YAS magnetometers
driver [1].
In the DeviceTree of samsung-serranove for the Android kernel, there is
unfortunately no information on interrupts or pinctrl [2].
In the Android kernel driver for magnetometer Yamaha YAS537, there is a
device-specific matrix to correct an ellipsoid shape of the measure values
into a sphere shape [3]. This could be converted and applied to a mount-matrix.
However, the current state of the mainline Yamaha YAS537 driver needs
post-process calibration in userspace anyway, as it lacks a formula to center
the measure values around zero. The correction of the ellipsoid into a sphere
can be done in the post-process calibration as well.
A mount-matrix is needed nonetheless. When putting samsung-serranove flat on
a table in portrait orientation heading north, the Yamaha YAS537 magnetometer
axes natively point X+ to north, Y+ to east and Z+ into the ground, which
corresponds to a common way to define the Earth's magnetic field coordinate
system [4]. According to the IIO definition, it should be Y+ to north, X+ to
east and Z+ upwards [5], which corresponds to a common device coordinate system
and eases sensor fusing.
[1] https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/commit/drivers/iio/magnetometer/yamaha-yas530.c?id=
65f79b501030678393eae0ae03d60a8151fbef55
[2] https://github.com/msm8916-mainline/android_kernel_qcom_msm8916/blob/GT-I9195I/arch/arm/boot/dts/samsung/msm8916/msm8916-sec-serranovelte-eur-r03.dtsi#L318-L321
[3] https://github.com/msm8916-mainline/android_kernel_qcom_msm8916/blob/GT-I9195I/drivers/iio/magnetometer/yas_mag_drv-yas537.c#L105-L106
[4] https://en.wikipedia.org/wiki/Earth%27s_magnetic_field#Characteristics
[5] https://github.com/torvalds/linux/blob/v5.19/Documentation/devicetree/bindings/iio/mount-matrix.txt#L93-L126
Cc: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Jakob Hauser <jahau@rocketmail.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220904214935.31032-1-jahau@rocketmail.com
Bhupesh Sharma [Mon, 5 Sep 2022 07:02:40 +0000 (12:32 +0530)]
arm64: dts: qcom: sc8280xp-pmics: Remove reg entry & use correct node name for pmc8280c_lpg node
Commit
eeca7d46217c ("arm64: dts: qcom: pm8350c: Drop PWM reg declaration")
dropped PWM reg declaration for pm8350c pwm(s), but there is a leftover
'reg' entry inside the lpg/pwm node in sc8280xp dts file. Remove the same.
While at it, also remove the unused unit address in the node
label.
Also, since dt-bindings expect LPG/PWM node name to be "pwm",
use correct node name as well, to fix the following
error reported by 'make dtbs_check':
'lpg' does not match any of the regexes
Fixes:
eeca7d46217c ("arm64: dts: qcom: pm8350c: Drop PWM reg declaration")
Cc: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Cc: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Bjorn Andersson <andersson@kernel.org>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220905070240.1634997-1-bhupesh.sharma@linaro.org
Luca Weiss [Fri, 2 Sep 2022 11:10:55 +0000 (13:10 +0200)]
arm64: dts: qcom: sm7225-fairphone-fp4: Add pm7250b PMIC
The PM7250B is primarily used for charger and fuel gauge on Fairphone 4
but also has some thermal zones that we can configure already.
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220902111055.106814-3-luca.weiss@fairphone.com
Luca Weiss [Fri, 2 Sep 2022 11:10:54 +0000 (13:10 +0200)]
arm64: dts: qcom: Add pm7250b PMIC
PM7250B is a PMIC primarily used for charging and fuel gauge but also
has some of the standard functionality like temp-alarm, adc, etc.
Add the .dtsi with some of the functionality added.
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220902111055.106814-2-luca.weiss@fairphone.com
Johan Hovold [Mon, 5 Sep 2022 09:16:02 +0000 (11:16 +0200)]
arm64: dts: qcom: fix syscon node names
Some recent changes that added new syscon nodes used misspelled node names.
Fixes:
86d7c9460e2c arm64: dts: qcom: sm8150: split TCSR halt regs out of mutex
Fixes:
0da603387225 arm64: dts: qcom: sdm630: split TCSR halt regs out of mutex
Fixes:
8a8531e69b2d arm64: dts: qcom: sdm845: split TCSR halt regs out of mutex
Fixes:
d9a2214d6ba5 arm64: dts: qcom: sc7280: split TCSR halt regs out of mutex
Fixes:
ce1ac53c7faa arm64: dts: qcom: sc7180: split TCSR halt regs out of mutex
Fixes:
fc10cfa38580 arm64: dts: qcom: msm8998: split TCSR halt regs out of mutex
Fixes:
100ce2205924 arm64: dts: qcom: msm8996: split TCSR halt regs out of mutex
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220905091602.20364-1-johan+linaro@kernel.org
Johan Hovold [Fri, 2 Sep 2022 08:16:52 +0000 (10:16 +0200)]
arm64: dts: qcom: sc8280xp: mark USB controllers as wakeup-sources
The primary and secondary USB controllers can be used to wake the system
from suspend so mark them accordingly.
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Tested-by: Steev Klimaszewski <steev@kali.org> #Lenovo Thinkpad X13s
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220902081652.12631-1-johan+linaro@kernel.org
Sheng-Liang Pan [Fri, 2 Sep 2022 08:09:11 +0000 (16:09 +0800)]
arm64: dts: qcom: sc7280: Add device tree for herobrine evoker
Add a basic device tree for the herobrine evoker board.
Signed-off-by: Sheng-Liang Pan <sheng-liang.pan@quanta.corp-partner.google.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220902160845.v5.2.I7dd7a79c4cc5fe91c3feb004473feb3b34b7b2d8@changeid
Sheng-Liang Pan [Fri, 2 Sep 2022 08:09:10 +0000 (16:09 +0800)]
dt-bindings: arm: qcom: document sc7280 and evoker board
This adds Chromebook Evoker to the yaml.
Signed-off-by: Sheng-Liang Pan <sheng-liang.pan@quanta.corp-partner.google.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220902160845.v5.1.Ief93544cd0cbfa412092f5de92de10d59a2a5b3a@changeid
Rajendra Nayak [Fri, 2 Sep 2022 04:35:11 +0000 (10:05 +0530)]
arm64: dts: qcom: sc7280: Add cpu and llcc BWMON
Add cpu and llcc BWMON nodes and their corresponding
OPP tables for sc7280 SoC.
Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220902043511.17130-5-quic_rjendra@quicinc.com
Krzysztof Kozlowski [Sun, 28 Aug 2022 08:43:39 +0000 (11:43 +0300)]
arm64: dts: qcom: sdm845-mtp: correct ADC settle time
The PMIC's VADC property for settle time is qcom,hw-settle-time, not
qcom,hw-settle-time-us. The latter is used in PMIC's TM ADC.
qcom/sdm845-mtp.dtb: pmic@0: adc@3100:adc-chan@4c: 'qcom,hw-settle-time-us' does not match any of the regexes: 'pinctrl-[0-9]+'
Fixes:
d5e12f3823ae ("arm64: dts: qcom: sdm845: mtp: Add vadc channels and thermal zones")
Cc: <stable@vger.kernel.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: David Heidelberg <david@ixit.cz>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220828084341.112146-13-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Sun, 28 Aug 2022 08:43:38 +0000 (11:43 +0300)]
arm64: dts: qcom: sc7280-idp: correct ADC channel node name and unit address
Correct SPMI PMIC VADC channel node name:
1. Use hyphens instead of underscores,
2. Add missing unit address.
This fixes `make dtbs_check` warnings like:
qcom/sc7280-idp.dtb: pmic@0: adc@3100: 'pmk8350_die_temp', 'pmr735a_die_temp' do not match any of the regexes: '^.*@[0-9a-f]+$', 'pinctrl-[0-9]+'
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: David Heidelberg <david@ixit.cz>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220828084341.112146-12-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Sun, 28 Aug 2022 08:43:37 +0000 (11:43 +0300)]
arm64: dts: qcom: align PMIC GPIO pin configuration with DT schema
DT schema expects PMIC GPIO pin configuration nodes to be named with
'-state' suffix:
qcom/sc7280-herobrine-crd.dtb: pmic@2: gpio@8800: 'edp-bl-reg-en' does not match any of the regexes: '-state$', 'pinctrl-[0-9]+'
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: David Heidelberg <david@ixit.cz>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220828084341.112146-11-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Sun, 28 Aug 2022 08:43:36 +0000 (11:43 +0300)]
arm64: dts: qcom: align SPMI PMIC Power-on node name with dtschema
Bindings expect Power-on node name to be "pon":
'power-on@800' do not match any of the regexes
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: David Heidelberg <david@ixit.cz>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220828084341.112146-10-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Sun, 28 Aug 2022 08:43:35 +0000 (11:43 +0300)]
arm64: dts: qcom: align SPMI PMIC LPG node name with dtschema
Bindings expect LPG/PWM node name to be "pwm":
pmic@5: 'lpg' does not match any of the regexes
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: David Heidelberg <david@ixit.cz>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220828084341.112146-9-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Sun, 28 Aug 2022 08:43:34 +0000 (11:43 +0300)]
arm64: dts: qcom: align SPMI PMIC regulators node name with dtschema
Bindings expect regulators node name to be "regulators":
qcom/sdm630-sony-xperia-nile-voyager.dtb: pmic@3: 'pm660l-regulators' does not match any of the regexes
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: David Heidelberg <david@ixit.cz>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220828084341.112146-8-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Sun, 28 Aug 2022 08:43:33 +0000 (11:43 +0300)]
arm64: dts: qcom: align SPMI PMIC ADC node name with dtschema
Bindings expect VADC node name to be "adc":
pmic@0: 'vadc@3100' does not match any of the regexes
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220828084341.112146-7-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Sun, 28 Aug 2022 08:43:32 +0000 (11:43 +0300)]
arm64: dts: qcom: pmk8350: drop interrupt-names from ADC
The SPMI PMIC VADC and Thermal Monitoring ADC have only one interrupt
line and their bindings do not allow interrupt-names. None of other
variants use them, so drop it from DTSI.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220828084341.112146-6-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Sun, 28 Aug 2022 08:43:31 +0000 (11:43 +0300)]
arm64: dts: qcom: pmk8350: drop incorrect io-channel-ranges
Since commit
044b32fa5229 ("dt-bindings:iio:qcom-spmi-vadc drop
incorrect io-channel-ranges from example") the io-channel-ranges are not
allowed in the Qualcomm SPMI PMIC ADC and anyway they are not correct
for IIO provider.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220828084341.112146-5-krzysztof.kozlowski@linaro.org
Akhil P Oommen [Sun, 28 Aug 2022 19:40:55 +0000 (01:10 +0530)]
arm64: dts: qcom: sc7280: Update gpu opp table
On the lite sku where GPU Fmax is 550Mhz, voting for a slightly higher
bandwidth at the highest gpu opp helps to improve "Manhattan offscreen"
score by 10%. Update the gpu opp table such that this is applicable only
on SKUs which has 550Mhz as GPU Fmax.
Signed-off-by: Akhil P Oommen <quic_akhilpo@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220829011035.1.Ie3564662150e038571b7e2779cac7229191cf3bf@changeid
Matthias Kaehlcke [Mon, 29 Aug 2022 16:44:38 +0000 (09:44 -0700)]
arm64: dts: qcom: sc7280-qcard: Add alias 'wifi0'
Add the alias 'wifi0' for the WiFi interface on the Qcard. The alias
is needed by the BIOS which patches the WiFi MAC address read from
the VPD (Vital Product Data) into the device tree.
Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220829094435.1.I4534cf408373478dd6e84dc8b9ddd0d4e1a3f143@changeid
Dmitry Baryshkov [Mon, 22 Aug 2022 19:11:38 +0000 (22:11 +0300)]
arm64: dts: qcom: sm8250: move DSI opp table to the dsi0 node
It makes no sense to have the OPP table for the DSI controllers in the
DSI1 PHY node. Move it to more logical dsi0 device node.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Caleb Connolly <caleb@connolly.tech>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220822191138.316912-1-dmitry.baryshkov@linaro.org
Eric Biggers [Fri, 26 Aug 2022 07:12:44 +0000 (00:12 -0700)]
arm64: dts: qcom: sm8450: add Inline Crypto Engine registers and clock
Add the registers and clock for the Inline Crypto Engine (ICE) to the
device tree node for the UFS host controller on sm8450. This makes
ufs_qcom support inline encryption when CONFIG_SCSI_UFS_CRYPTO=y.
The address and size of the register range, and the minimum and maximum
frequency of the ICE core clock, all match the values used downstream.
I've validated this on an SM8450 HDK using the 'encrypt' group of
xfstests on ext4 with MOUNT_OPTIONS="-o inlinecrypt".
Signed-off-by: Eric Biggers <ebiggers@google.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220826071244.185584-1-ebiggers@kernel.org
Matthias Kaehlcke [Fri, 26 Aug 2022 15:48:27 +0000 (08:48 -0700)]
arm64: dts: qcom: sc7280-herobrine: Don't enable the USB 2.0 port
The USB 2.0 port of sc7280 is currently not used by any herobrine
board. Delete the device tree entries that enable it.
Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220826084813.1.I8c9a771fcf4d1cfb6e8e0ef17a153143af9a644d@changeid
Stephen Boyd [Sat, 27 Aug 2022 00:49:00 +0000 (17:49 -0700)]
arm64: dts: qcom: sc7180-trogdor: Keep pm6150_adc enabled for TZ
There's still a thermal zone using pm6150_adc in the pm6150.dtsi file,
pm6150_thermal. It's not super obvious because it indirectly uses the
adc through an iio channel in pm6150_temp. Let's keep this enabled on
lazor and coachz so that reading the temperature of the pm6150_thermal
zone continues to work. Otherwise we get -EINVAL when reading the zone,
and I suspect the PMIC temperature trip doesn't work properly so we
don't shutdown when the PMIC overheats.
Cc: Matthias Kaehlcke <mka@chromium.org>
Fixes:
b8d1e3d33487 ("arm64: dts: qcom: sc7180-trogdor: Delete ADC config for unused thermistors")
Signed-off-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220827004901.511543-1-swboyd@chromium.org
Bryan O'Donoghue [Sun, 28 Aug 2022 13:26:48 +0000 (14:26 +0100)]
arm64: dts: qcom: pm8350c: Drop PWM reg declaration
The PWM is a part of the SPMI PMIC block and maps several different
addresses within the SPMI block. It is not accurate to describe as pwm@reg
as a result.
Fixes:
5be66d2dc887 ("arm64: dts: qcom: pm8350c: Add pwm support")
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220828132648.3624126-3-bryan.odonoghue@linaro.org
Bob Moragues [Thu, 28 Jul 2022 21:33:21 +0000 (14:33 -0700)]
arm64: dts: qcom: sc7280: Add support for zoglin
Zoglin is a Hoglin Chromebook with SPI Flash reduced from 64MB to 8MB.
Zoglin is identical to Hoglin except for the SPI Flash.
The actual SPI Flash is dynamically probed at and not specified in DTS.
Signed-off-by: Bob Moragues <moragues@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220728143215.v3.2.I7d57fb9c4806a8b3fe3501c766b64f4987c271ef@changeid
Bob Moragues [Thu, 28 Jul 2022 21:33:20 +0000 (14:33 -0700)]
dt-bindings: arm: qcom: document zoglin board
Zoglin is a Hoglin Chromebook with SPI Flash reduced from 64MB to 8MB.
Zoglin is identical to Hoglin except for the SPI Flash.
The actual SPI Flash is dynamically probed at and not specified in DTS.
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Bob Moragues <moragues@chromium.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220728143215.v3.1.I5b9006878bdabd6493b866b46dbd6149968d545b@changeid
Yassine Oudjana [Thu, 28 Jul 2022 18:01:20 +0000 (19:01 +0100)]
arm64: dts: qcom: msm8996-xiaomi-*: Add LEDs
Add LEDs found on the Xiaomi MSM8996 devices. The devices share
a status RGB LED mounted on the front, as well as a PWM-driven
IR LED for remote control (sometimes known as an IR blaster).
The Mi Note 2 has an additional pair of white LEDs used as backlights
for the touchkeys driven by the PM8994 LPG block.
Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220728180120.97968-1-y.oudjana@protonmail.com
Krzysztof Kozlowski [Tue, 2 Aug 2022 15:39:45 +0000 (17:39 +0200)]
arm64: dts: qcom: use GPIO flags for tlmm
Use respective GPIO_ACTIVE_LOW/HIGH flags for tlmm GPIOs. Include
gpio.h header if this is first usage of that flag.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220802153947.44457-4-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Tue, 2 Aug 2022 15:39:44 +0000 (17:39 +0200)]
arm64: dts: qcom: sdm845-db845c: drop gpios from CCI I2C sensors
The OV7251 and OV8856 camera sensor bindings do not allow
property "gpios" and Linux driver does not parse it.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Robert Foss <robert.foss@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220802153947.44457-3-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Tue, 2 Aug 2022 15:39:43 +0000 (17:39 +0200)]
arm64: dts: qcom: sdm845-db845c: drop power-domains from CCI I2C sensors
The Camera Control Interface I2C controller device node belongs to
TITAN_TOP_GDSC power domain, so its children do not need to specify it
again. The OV7251 and OV8856 camera sensor bindings do not allow
power-domains.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220802153947.44457-2-krzysztof.kozlowski@linaro.org
Johan Hovold [Wed, 3 Aug 2022 12:19:42 +0000 (14:19 +0200)]
arm64: dts: qcom: sa8295p-adp: disallow regulator mode switches
Do not allow the RPMh regulators to switch to low-power mode with an
exception for the UFS regulators (l3c, l6c, l10c and l17c) as UFS
supports an idle mode.
This specifically avoids having regulators be but in low-power mode when
only some consumers specify loads while the actual total load really
warrants high-power mode.
Fixes:
519183af39b2 ("arm64: dts: qcom: add SA8540P and ADP")
Link: https://lore.kernel.org/all/YtkrDcjTGhpaU1e0@hovoldconsulting.com
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220803121942.30236-4-johan+linaro@kernel.org
Johan Hovold [Wed, 3 Aug 2022 12:19:41 +0000 (14:19 +0200)]
arm64: dts: qcom: sc8280xp-lenovo-thinkpad-x13s: disallow regulator mode switches
Do not allow the RPMh regulators to switch to low-power mode.
This specifically avoids having regulators be but in low-power mode when
only some consumers specify loads while the actual total load really
warrants high-power mode.
Fixes:
32c231385ed4 ("arm64: dts: qcom: sc8280xp: add Lenovo Thinkpad X13s devicetree")
Link: https://lore.kernel.org/all/YtkrDcjTGhpaU1e0@hovoldconsulting.com
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220803121942.30236-3-johan+linaro@kernel.org
Johan Hovold [Wed, 3 Aug 2022 12:19:40 +0000 (14:19 +0200)]
arm64: dts: qcom: sc8280xp-crd: disallow regulator mode switches
Do not allow the RPMh regulators to switch to low-power mode with an
exception for the UFS regulators (l7c and l3d) as UFS supports an idle
mode.
This specifically avoids having regulators be but in low-power mode when
only some consumers specify loads while the actual total load really
warrants high-power mode.
Fixes:
ccd3517faf18 ("arm64: dts: qcom: sc8280xp: Add reference device")
Link: https://lore.kernel.org/all/YtkrDcjTGhpaU1e0@hovoldconsulting.com
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220803121942.30236-2-johan+linaro@kernel.org
Satya Priya [Wed, 10 Aug 2022 05:05:09 +0000 (10:35 +0530)]
arm64: dts: qcom: sc7280: Update lpasscore node
To maintain consistency with other lpass nodes(lpass_audiocc,
lpass_aon and lpass_hm), update lpasscore to lpass_core.
Fixes:
9499240d15f2 ("arm64: dts: qcom: sc7280: Add lpasscore & lpassaudio clock controllers")
Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
Signed-off-by: Satya Priya <quic_c_skakit@quicinc.com>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/1660107909-27947-4-git-send-email-quic_c_skakit@quicinc.com
Taniya Das [Wed, 10 Aug 2022 05:05:08 +0000 (10:35 +0530)]
arm64: dts: qcom: sc7280: Update lpassaudio clock controller for resets
The lpass audio supports TX/RX/WSA block resets.
Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
Signed-off-by: Satya Priya <quic_c_skakit@quicinc.com>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/1660107909-27947-3-git-send-email-quic_c_skakit@quicinc.com
Satya Priya [Wed, 10 Aug 2022 05:05:07 +0000 (10:35 +0530)]
arm64: dts: qcom: sc7280: Cleanup the lpasscc node
Remove "cc" regmap from lpasscc node which is overlapping
with the lpass_aon regmap.
Fixes:
422a295221bb ("arm64: dts: qcom: sc7280: Add clock controller nodes")
Signed-off-by: Satya Priya <quic_c_skakit@quicinc.com>
Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/1660107909-27947-2-git-send-email-quic_c_skakit@quicinc.com
Luca Weiss [Fri, 12 Aug 2022 08:27:21 +0000 (10:27 +0200)]
arm64: dts: qcom: sm6350: Add GPI DMA nodes
Add nodes for the gpi_dma0 and gpi_dma1 which are (optionally) used for
various i2c busses based on the qup firmware configuration.
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220812082721.1125759-4-luca.weiss@fairphone.com
Abel Vesa [Fri, 12 Aug 2022 10:12:39 +0000 (13:12 +0300)]
arm64: dts: qcom: sdm845: Add the RPMh stats node
SDM845 is a special case compared to the other platforms that use RPMh
stats, since it only has 2 stats (aosd and cxsd), while the others have
a 3rd one (ddr).
So lets add the node but with a SDM845 dedicated compatible to make
the driver aware of the different stats config.
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Tested-by: Caleb Connolly <caleb.connolly@linaro.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220812101240.1869605-3-abel.vesa@linaro.org
Abel Vesa [Fri, 12 Aug 2022 10:12:37 +0000 (13:12 +0300)]
arm64: dts: qcom: sdm845: Reduce reg size for aoss_qmp
Like on the other platforms that provide RPMh stats, on SDM845, the
aoss_qmp reg size needs to be reduced to its actual size of 0x400,
otherwise it will overlap with the RPMh stats reg base, node that will
be added later on.
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220812101240.1869605-1-abel.vesa@linaro.org
Luca Weiss [Fri, 12 Aug 2022 11:46:15 +0000 (13:46 +0200)]
arm64: dts: qcom: pm6150l: add missing adc channels
Add the missing adc channels and add pre-scaling property to die_temp
channel, as per downstream dts.
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220812114614.1195679-1-luca.weiss@fairphone.com
Krzysztof Kozlowski [Fri, 19 Aug 2022 08:32:09 +0000 (11:32 +0300)]
arm64: dts: qcom: sm8150: switch TCSR mutex to MMIO
The TCSR mutex bindings allow device to be described only with address
space (so it uses MMIO, not syscon regmap). This seems reasonable as
TCSR mutex is actually a dedicated IO address space and it also fixes DT
schema checks:
qcom/sm8150-mtp.dtb: hwlock: 'reg' is a required property
qcom/sm8150-mtp.dtb: hwlock: 'syscon' does not match any of the regexes: 'pinctrl-[0-9]+'
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220819083209.50844-17-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Fri, 19 Aug 2022 08:32:08 +0000 (11:32 +0300)]
arm64: dts: qcom: sm8150: split TCSR halt regs out of mutex
The TCSR halt regs are next to TCSR mutex (in one address block called
TCSR_MUTEX), so before converting the TCSR mutex into device with
address space, we need to split the halt regs to its own syscon device.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220819083209.50844-16-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Fri, 19 Aug 2022 08:32:07 +0000 (11:32 +0300)]
arm64: dts: qcom: sdm630: switch TCSR mutex to MMIO
The TCSR mutex bindings allow device to be described only with address
space (so it uses MMIO, not syscon regmap). This seems reasonable as
TCSR mutex is actually a dedicated IO address space and it also fixes DT
schema checks:
qcom/sdm636-sony-xperia-ganges-mermaid.dtb: hwlock: 'reg' is a required property
qcom/sdm636-sony-xperia-ganges-mermaid.dtb: hwlock: 'syscon' does not match any of the regexes: 'pinctrl-[0-9]+'
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220819083209.50844-15-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Fri, 19 Aug 2022 08:32:06 +0000 (11:32 +0300)]
arm64: dts: qcom: sdm630: split TCSR halt regs out of mutex
The TCSR halt regs are next to TCSR mutex (in one address block called
TCSR_MUTEX), so before converting the TCSR mutex into device with
address space, we need to split the halt regs to its own syscon device.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220819083209.50844-14-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Fri, 19 Aug 2022 08:32:05 +0000 (11:32 +0300)]
arm64: dts: qcom: qcs404: switch TCSR mutex to MMIO
The TCSR mutex bindings allow device to be described only with address
space (so it uses MMIO, not syscon regmap). This seems reasonable as
TCSR mutex is actually a dedicated IO address space and it also fixes DT
schema checks:
qcom/qcs404-evb-4000.dtb: hwlock: 'reg' is a required property
qcom/qcs404-evb-4000.dtb: hwlock: 'syscon' does not match any of the regexes: 'pinctrl-[0-9]+'
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220819083209.50844-13-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Fri, 19 Aug 2022 08:32:04 +0000 (11:32 +0300)]
arm64: dts: qcom: sdm845: switch TCSR mutex to MMIO
The TCSR mutex bindings allow device to be described only with address
space (so it uses MMIO, not syscon regmap). This seems reasonable as
TCSR mutex is actually a dedicated IO address space and it also fixes DT
schema checks:
qcom/sdm845-shift-axolotl.dtb: hwlock: 'reg' is a required property
qcom/sdm845-shift-axolotl.dtb: hwlock: 'syscon' does not match any of the regexes: 'pinctrl-[0-9]+'
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220819083209.50844-12-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Fri, 19 Aug 2022 08:32:03 +0000 (11:32 +0300)]
arm64: dts: qcom: sdm845: split TCSR halt regs out of mutex
The TCSR halt regs are next to TCSR mutex (in one address block called
TCSR_MUTEX), so before converting the TCSR mutex into device with
address space, we need to split the halt regs to its own syscon device.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220819083209.50844-11-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Fri, 19 Aug 2022 08:32:02 +0000 (11:32 +0300)]
arm64: dts: qcom: sc7280: split TCSR halt regs out of mutex
The TCSR halt regs are next to TCSR mutex (in one address block called
TCSR_MUTEX), so before converting the TCSR mutex into device with
address space, we need to split the halt regs to its own syscon device.
This also describes more accurately the devices and their IO address
space, and allows to remove incorrect syscon compatible from TCSR mutex:
qcom/sc7280-herobrine-crd.dtb: hwlock@1f40000: compatible: ['qcom,tcsr-mutex', 'syscon'] is too long
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220819083209.50844-10-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Fri, 19 Aug 2022 08:32:01 +0000 (11:32 +0300)]
arm64: dts: qcom: sc7180: switch TCSR mutex to MMIO
The TCSR mutex bindings allow device to be described only with address
space (so it uses MMIO, not syscon regmap). This seems reasonable as
TCSR mutex is actually a dedicated IO address space and it also fixes DT
schema checks:
qcom/sc7180-trogdor-wormdingler-rev1-inx.dtb: hwlock: 'reg' is a required property
qcom/sc7180-trogdor-wormdingler-rev1-inx.dtb: hwlock: 'syscon' does not match any of the regexes: 'pinctrl-[0-9]+'
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220819083209.50844-9-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Fri, 19 Aug 2022 08:32:00 +0000 (11:32 +0300)]
arm64: dts: qcom: sc7180: split TCSR halt regs out of mutex
The TCSR halt regs are next to TCSR mutex (in one address block called
TCSR_MUTEX), so before converting the TCSR mutex into device with
address space, we need to split the halt regs to its own syscon device.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220819083209.50844-8-krzysztof.kozlowski@linaro.org
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