Connor Abbott [Mon, 31 Jul 2023 17:57:06 +0000 (19:57 +0200)]
ir3: Implement helper invocation optimization
This kills helper invocations to ensure that subsequent memory accesses
don't fetch unused memory and unnecessary branch divergence from helper
invocations is eliminated.
shader-db results:
total instructions in shared programs: 3840580 -> 3841531 (0.02%)
instructions in affected programs: 278416 -> 279367 (0.34%)
helped: 0
HURT: 744
HURT stats (abs) min: 1 max: 16 x̄: 1.28 x̃: 1
HURT stats (rel) min: 0.05% max: 8.51% x̄: 0.75% x̃: 0.39%
95% mean confidence interval for instructions value: 1.22 1.34
95% mean confidence interval for instructions %-change: 0.67% 0.83%
Instructions are HURT.
total nops in shared programs: 866716 -> 867667 (0.11%)
nops in affected programs: 72851 -> 73802 (1.31%)
helped: 0
HURT: 744
HURT stats (abs) min: 1 max: 16 x̄: 1.28 x̃: 1
HURT stats (rel) min: 0.17% max: 33.33% x̄: 2.84% x̃: 1.82%
95% mean confidence interval for nops value: 1.22 1.34
95% mean confidence interval for nops %-change: 2.59% 3.08%
Nops are HURT.
total last-baryf in shared programs: 139806 -> 139864 (0.04%)
last-baryf in affected programs: 11772 -> 11830 (0.49%)
helped: 0
HURT: 58
HURT stats (abs) min: 1 max: 1 x̄: 1.00 x̃: 1
HURT stats (rel) min: 0.40% max: 5.26% x̄: 0.60% x̃: 0.47%
95% mean confidence interval for last-baryf value: 1.00 1.00
95% mean confidence interval for last-baryf %-change: 0.42% 0.78%
Last-baryf are HURT.
total last-helper in shared programs: 1508295 -> 935561 (-37.97%)
last-helper in affected programs: 1192594 -> 619860 (-48.02%)
helped: 7816
HURT: 3
helped stats (abs) min: 1 max: 1095 x̄: 73.28 x̃: 34
helped stats (rel) min: 0.42% max: 100.00% x̄: 71.91% x̃: 100.00%
HURT stats (abs) min: 1 max: 11 x̄: 4.67 x̃: 2
HURT stats (rel) min: 0.80% max: 1.44% x̄: 1.03% x̃: 0.86%
95% mean confidence interval for last-helper value: -75.64 -70.86
95% mean confidence interval for last-helper %-change: -72.67% -71.10%
Last-helper are helped.
fossil-db results:
Totals:
Instrs:
55172795 ->
55189122 (+0.03%)
CodeSize:
108952746 ->
108984452 (+0.03%)
NOPs:
11536680 ->
11553007 (+0.14%)
(ss)-stall: 4166810 -> 4166581 (-0.01%)
(sy)-stall:
15890324 ->
15884974 (-0.03%)
last-baryf: 659588 -> 659633 (+0.01%)
last-helper:
25742996 ->
12601636 (-51.05%); split: -51.05%, +0.00%
Cat0:
12294891 ->
12311218 (+0.13%)
Totals from 39576 (25.22% of 156916) affected shaders:
Instrs:
24200008 ->
24216335 (+0.07%)
CodeSize:
44968736 ->
45000442 (+0.07%)
NOPs: 5854965 -> 5871292 (+0.28%)
(ss)-stall: 2357830 -> 2357601 (-0.01%)
(sy)-stall: 6166670 -> 6161320 (-0.09%)
last-baryf: 590330 -> 590375 (+0.01%)
last-helper:
24160432 ->
11019072 (-54.39%); split: -54.39%, +0.00%
Cat0: 6205561 -> 6221888 (+0.26%)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24433>
Connor Abbott [Tue, 1 Aug 2023 11:12:55 +0000 (13:12 +0200)]
ir3: Gather pixlod status earlier
We'll need this to skip optimizing helper invocations if it's
unnecessary.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24433>
Connor Abbott [Tue, 1 Aug 2023 16:34:24 +0000 (18:34 +0200)]
freedreno, tu, ir3: Add last_helper statistic
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24433>
Connor Abbott [Tue, 1 Aug 2023 16:32:30 +0000 (18:32 +0200)]
tu: Add missing last_baryf statistic
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24433>
Connor Abbott [Fri, 4 Aug 2023 16:41:40 +0000 (18:41 +0200)]
ir3, freedreno, tu: Plumb through SP_FS_PREFETCH_CNTL::ENDOFQUAD
Add a flag but don't use it yet.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24433>
Danylo Piliaiev [Wed, 2 Aug 2023 11:57:12 +0000 (13:57 +0200)]
freedreno/regs: Define unknown SP_FS_PREFETCH_CNTL fields
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24433>
Connor Abbott [Mon, 31 Jul 2023 17:21:33 +0000 (19:21 +0200)]
ir3: Parse (eq) flag
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24433>
Eric Engestrom [Thu, 10 Aug 2023 08:16:21 +0000 (09:16 +0100)]
meson: fix indentation
Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24603>
Samuel Pitoiset [Wed, 9 Aug 2023 07:05:35 +0000 (09:05 +0200)]
radv: re-introduce radv_pipeline_stage_init()
This helper is used to initialize a radv_shader_stage struct for
pipelines, while radv_shader_stage_init() would be for shader object
only (ie. using VkCreateShaderInfoEXT).
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24562>
Samuel Pitoiset [Wed, 9 Aug 2023 06:30:25 +0000 (08:30 +0200)]
radv: stop passing redundant stage to radv_shader_stage_init()
It's sinfo->stage.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24562>
Samuel Pitoiset [Tue, 8 Aug 2023 16:37:58 +0000 (18:37 +0200)]
radv: introduce radv_shader_layout for per-stage descriptor layout
With pipelines, the shader layout is inherited from the pipeline layout
but with shader objects, the layout is passed through
VkCreateShaderInfoEXT.
This basically replaces uses of radv_pipeline_layout by
radv_shader_layout during shaders compilation. This will avoid
creating a pipeline layout with ESO.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24562>
Samuel Pitoiset [Tue, 8 Aug 2023 15:53:10 +0000 (17:53 +0200)]
radv: remove useless NULL for pipeline layout during shader info pass
It should be non-NULL.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24562>
Iago Toral Quiroga [Mon, 7 Aug 2023 11:43:03 +0000 (13:43 +0200)]
v3d: fix texture packing lowering
For texture instructions that don't have sampler state we have
been incorrectly using sampler index to retrive texture packing
information. This is incorrect for two reasons:
1. These instructions don't have a defined sampler index by
definition.
2. The driver was not setting it either, so effectively, we
have always been using whatever we had set for the first
texture, which is obviously bogus.
Fix this by running a lowering pass that sets the index to use
in backend_flags, which is what the compiler expects, based on
the texture index, which is what we want in GL since we make
this decision based on the texture format.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24537>
Iago Toral Quiroga [Mon, 7 Aug 2023 11:23:00 +0000 (13:23 +0200)]
v3dv: assert that only tex instructions with sampler state have a sampler src
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24537>
Iago Toral Quiroga [Mon, 7 Aug 2023 07:19:11 +0000 (09:19 +0200)]
squash! v3dv,broadcom/compiler: don't abuse sampler index
For tex instructions that don't have sampler state use backend_flags
instead of sampler index to bind default sampler state.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24537>
Iago Toral Quiroga [Mon, 7 Aug 2023 08:48:45 +0000 (10:48 +0200)]
nir/lower_tex: use a callback to check sampler return size packing
The lower_tex_packing pass relies on the sampler index to access packing
information, but this is only valid for tex instructions that have sampler
state (so not txf, etc). Instead, let backends provide a callback to inform
the lowering about the packing used with a given texture instruction which
is more flexible.
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24537>
Iago Toral Quiroga [Mon, 7 Aug 2023 06:48:56 +0000 (08:48 +0200)]
nir/lower_tex: copy backend_flags field when copying a tex instruction
Fixes:
29c4417fb8 ('nir: Add a backend_flags field to nir_tex_instr')
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24537>
Iago Toral Quiroga [Mon, 7 Aug 2023 07:13:52 +0000 (09:13 +0200)]
v3dv: remove unused code
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24537>
Lionel Landwerlin [Mon, 7 Aug 2023 14:06:49 +0000 (17:06 +0300)]
intel/fs: add variable for output of debug backend optimizer
It can be useful to compare 2 runs with different compiler changes.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24552>
Lionel Landwerlin [Sun, 6 Aug 2023 12:46:12 +0000 (15:46 +0300)]
intel/fs: track more steps with INTEL_DEBUG=optimizer
One particular nice thing to have is the first generated backend IR
before validation. Especially if you made a mistake in the NIR
translation, you can at least look at it before validation tells you
off.
Then the last 2 steps of the optimize() function can be interesting to
look at.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24552>
Vinson Lee [Mon, 7 Aug 2023 05:26:57 +0000 (22:26 -0700)]
lavapipe: Fix struct initialization
Fix defect reported by Coverity Scan.
Evaluation order violation (EVALUATION_ORDER)
write_write_typo: In box.x = box.x = copy->imageOffset.x, box.x is written twice with the same value.
Fixes:
9e9d90c6c38 ("lavapipe: VK_EXT_host_image_copy")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24531>
Dave Airlie [Mon, 7 Aug 2023 02:51:36 +0000 (12:51 +1000)]
nvk: enable KHR_shader_clock.
This should all be wired up.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24595>
Samuel Pitoiset [Mon, 1 May 2023 15:05:57 +0000 (17:05 +0200)]
radv: advertise VK_KHR_maintenance5
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24392>
Samuel Pitoiset [Fri, 28 Jul 2023 07:23:42 +0000 (09:23 +0200)]
radv: implement radv_Get{Device}ImageSubresourceLayout2KHR()
Not really possible without creating an image internally.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24392>
Samuel Pitoiset [Fri, 28 Jul 2023 07:20:11 +0000 (09:20 +0200)]
radv: allow VK_REMAINING_ARRAY_LAYERS with VkImageSubresourceLayers
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24392>
Samuel Pitoiset [Fri, 28 Jul 2023 07:17:14 +0000 (09:17 +0200)]
radv: add support for VkBufferUsageFlags2CreateInfoKHR
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24392>
Samuel Pitoiset [Fri, 28 Jul 2023 07:10:23 +0000 (09:10 +0200)]
radv: add support for VkPipelineCreateFlags2CreateInfoKHR
If the structure is present in pNext, it's used instead of flags.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24392>
Samuel Pitoiset [Mon, 7 Aug 2023 07:40:01 +0000 (09:40 +0200)]
radv: store pipeline create flags to radv_pipeline::create_flags
This is a common practice in vulkan/runtime and this will be easier
to use extended pipeline create flags.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24392>
Samuel Pitoiset [Mon, 7 Aug 2023 06:50:45 +0000 (08:50 +0200)]
radv/rmv: remove unused pipeline create flags when logging pipelines
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24392>
Samuel Pitoiset [Tue, 2 May 2023 08:58:29 +0000 (10:58 +0200)]
radv: allow VK_WHOLE_SIZE for pSizes in vkCmdBindVertexBuffers2()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24392>
Samuel Pitoiset [Fri, 28 Jul 2023 07:08:34 +0000 (09:08 +0200)]
radv: implement vkCmdBindIndexBuffer2KHR()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24392>
Samuel Pitoiset [Mon, 7 Aug 2023 06:42:53 +0000 (08:42 +0200)]
vulkan/render_pass: add common vkGetRenderingAreaGranularityKHR()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24392>
Thomas H.P. Andersen [Wed, 9 Aug 2023 23:35:44 +0000 (01:35 +0200)]
nvk: advertise VK_EXT_tooling_info
Use the implementation in common code to report no tools in use.
Passes:
dEQP-VK.api.tooling_info.validate_getter
dEQP-VK.api.tooling_info.validate_tools_properties
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24594>
Mike Blumenkrantz [Wed, 9 Aug 2023 19:25:56 +0000 (15:25 -0400)]
lavapipe: maintenance5
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24589>
Mike Blumenkrantz [Wed, 9 Aug 2023 19:24:35 +0000 (15:24 -0400)]
lavapipe: VK_REMAINING_ARRAY_LAYERS for copy ops
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24589>
Mike Blumenkrantz [Wed, 9 Aug 2023 19:24:26 +0000 (15:24 -0400)]
lavapipe: GetDeviceImageSubresourceLayoutKHR
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24589>
Mike Blumenkrantz [Wed, 9 Aug 2023 19:25:52 +0000 (15:25 -0400)]
lavapipe: BindIndexBuffer2
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24589>
Mike Blumenkrantz [Wed, 9 Aug 2023 19:23:28 +0000 (15:23 -0400)]
lavapipe: block yuv formats from getting blit feature flags
this is illegal
cc: mesa-stable
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24589>
Mike Blumenkrantz [Wed, 9 Aug 2023 19:21:47 +0000 (15:21 -0400)]
lavapipe: fix resolves where src image has a layer offset
cc: mesa-stable
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24589>
Mike Blumenkrantz [Wed, 9 Aug 2023 19:21:03 +0000 (15:21 -0400)]
lavapipe: fix BindVertexBuffers2 buffer size handling
if the size specified is smaller than the buffer, the buffer needs to
be clamped
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24589>
Mike Blumenkrantz [Wed, 9 Aug 2023 19:18:59 +0000 (15:18 -0400)]
llvmpipe: fix early depth + alpha2coverage + occlusion query interaction
in this scenario, sample counting must happen before a2c, as a2c may eliminate
coverage if alpha is zero, leading to a sample count of zero
dEQP-VK.fragment_operations.early_fragment.sample_count_early_fragment_tests_depth_alpha_to_coverage_samples_4_maintenance5
cc: mesa-stable
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24589>
Mike Blumenkrantz [Wed, 9 Aug 2023 19:18:26 +0000 (15:18 -0400)]
llvmpipe: block weird uses of subsampled formats in buffers
cc: mesa-stable
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24589>
Mike Blumenkrantz [Wed, 9 Aug 2023 19:25:39 +0000 (15:25 -0400)]
lavapipe: GetRenderingAreaGranularityKHR
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24589>
Mike Blumenkrantz [Tue, 7 Mar 2023 14:27:51 +0000 (09:27 -0500)]
llvmpipe: export PIPE_CAP_IMAGE_LOAD_FORMATTED
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24589>
Mike Blumenkrantz [Thu, 2 Mar 2023 12:59:58 +0000 (07:59 -0500)]
llvmpipe: enable A8_UNORM for shader images
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24589>
Mike Blumenkrantz [Mon, 6 Mar 2023 15:44:27 +0000 (10:44 -0500)]
gallivm: handle A8_UNORM image stores
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24589>
timmac-qmc [Wed, 9 Aug 2023 08:44:02 +0000 (09:44 +0100)]
glsl: fix potential crash with DisableUniformArrayResize
We still need to gather information on uniform use when skipping
uniform array resize.
Fixes:
ac5af6c0 ("util/driconf: add Dune: Spice Wars workaround")
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24576>
Georg Lehmann [Tue, 8 Aug 2023 12:48:50 +0000 (14:48 +0200)]
nir/opt_intrinsics: optimize (exclusive_scan(op, a) op a) to inclusive scan
D3D only has exclusive scans so some games use this pattern.
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24557>
Georg Lehmann [Tue, 8 Aug 2023 16:48:59 +0000 (18:48 +0200)]
aco: use s_bitreplicate_b64_b32 to set exec to 0xffff0000ffff0000
Foz-DB Navi21:
Totals from 29 (0.02% of 132657) affected shaders:
Instrs: 19342 -> 19301 (-0.21%)
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24561>
Eric Engestrom [Wed, 9 Aug 2023 13:19:14 +0000 (14:19 +0100)]
git-blame-ignore-revs: add pvr formatting commit
Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24583>
Eric Engestrom [Wed, 9 Aug 2023 13:19:14 +0000 (14:19 +0100)]
git-blame-ignore-revs: add radv formatting commit
Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24583>
Eric Engestrom [Wed, 9 Aug 2023 13:35:25 +0000 (14:35 +0100)]
git-blame-ignore-revs: repeat instruction on how to enable to avoid having to look for it
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24583>
Mike Blumenkrantz [Wed, 9 Aug 2023 11:50:58 +0000 (07:50 -0400)]
zink: apply ZINK_DEBUG=noopt to linked separate shaders
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24581>
Mike Blumenkrantz [Wed, 9 Aug 2023 11:50:22 +0000 (07:50 -0400)]
zink: generated tcs is on the tes, not the vs
not sure how I screwed this up
Fixes:
4c47d830516 ("zink: use EXT_shader_object to implement generic separate shader precompile")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24581>
Eric Engestrom [Wed, 9 Aug 2023 13:23:12 +0000 (14:23 +0100)]
docs/radv: mark VK_INTEL_shader_integer_functions2 as implemented
Fixes:
aa9d2d88935eda7612aa ("radv: Enable VK_INTEL_shader_integer_functions2.")
Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24582>
Eric Engestrom [Wed, 9 Aug 2023 13:22:23 +0000 (14:22 +0100)]
docs/radv: mark VK_EXT_tooling_info as implemented
Fixes:
10d1073aa62203d86c1b ("radv: advertise VK_EXT_tooling_info")
Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24582>
Eric Engestrom [Tue, 8 Aug 2023 15:22:05 +0000 (16:22 +0100)]
ci: document max image tag length
I've known about this for years and yet I still accidentally wrote a too
long tag.
Document this for myself next time, and for everyone else.
Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24560>
David Heidelberg [Wed, 9 Aug 2023 10:03:40 +0000 (12:03 +0200)]
ci/zink: Add flake seen in the wild
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24577>
Georg Lehmann [Mon, 7 Aug 2023 09:32:04 +0000 (11:32 +0200)]
ac/nir: handle more special cases in ac_nir_unpack_arg
Foz-DB Navi21:
Totals from 60972 (45.96% of 132657) affected shaders:
CodeSize:
158371336 ->
158127376 (-0.15%)
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24534>
Feng Jiang [Fri, 2 Jun 2023 02:21:51 +0000 (10:21 +0800)]
virgl/video: Enable AV1 decoding
Signed-off-by: Feng Jiang <jiangfeng@kylinos.cn>
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Reviewed-by: Daniel Almeida <daniel.almeida@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23386>
Feng Jiang [Fri, 2 Jun 2023 02:21:07 +0000 (10:21 +0800)]
virgl/video: Add support for AV1 decoding
Signed-off-by: Feng Jiang <jiangfeng@kylinos.cn>
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Reviewed-by: Daniel Almeida <daniel.almeida@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23386>
Feng Jiang [Fri, 2 Jun 2023 01:45:20 +0000 (09:45 +0800)]
virgl/video: Add definition of virgl_av1_picture_desc
The virgl_av1_picture_desc references to pipe_av1_picture_desc.
Signed-off-by: Feng Jiang <jiangfeng@kylinos.cn>
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Reviewed-by: Daniel Almeida <daniel.almeida@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23386>
Feng Jiang [Fri, 2 Jun 2023 01:38:37 +0000 (09:38 +0800)]
frontends/va: Add slice_count to AV1 slice_parameter
Save the number of slice in AV1 slice parameter, so that the
underlying driver (such as virgl) can handle the slice parameters
better.
Signed-off-by: Feng Jiang <jiangfeng@kylinos.cn>
Suggested-by: Sil Vilerino <sivileri@microsoft.com>
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Reviewed-by: Daniel Almeida <daniel.almeida@collabora.com>
Reviewed-by: Sil Vilerino <sivileri@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23386>
Lionel Landwerlin [Wed, 22 Jun 2022 01:48:03 +0000 (18:48 -0700)]
anv: implement VK_EXT_pipeline_robustness
v2:
- Use vk_pipeline_robustness_state
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17545>
Lionel Landwerlin [Wed, 22 Jun 2022 01:06:04 +0000 (18:06 -0700)]
anv/hasvk: track robustness per pipeline stage
And split them into UBO and SSBO
v2 (Lionel):
- Get rid of robustness fields in anv_shader_bin
v3 (Lionel):
- Do not pass unused parameters around
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17545>
Lionel Landwerlin [Mon, 3 Jul 2023 14:29:05 +0000 (17:29 +0300)]
hasvk: remove descriptor array bounds checking
Same reason as Anv.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17545>
Lionel Landwerlin [Mon, 3 Jul 2023 14:16:28 +0000 (17:16 +0300)]
anv: remove descriptor array bounds checking
We cannot find anything in the Vulkan spec requiring this. D3D12 [1]
says it's undefined as long as it doesn't crash the OS :
"Out of bounds indexing of any descriptor table from the shader
results in a largely undefined memory access, including the
possibility of reading arbitrary in-process memory as if it is a
hardware state descriptor and living with the consequence of what
the hardware does with that. This could produce a device reset, but
will not crash Windows."
[1] : https://learn.microsoft.com/en-us/windows/win32/direct3d12/advanced-use-of-descriptor-tables#out-of-bounds-indexing
Found 2 titles affected by this change
Some pretty good results on Cyberpunk 2077 :
Totals from 10285 (100.00% of 10285) affected shaders:
Instrs: 7638709 -> 7517360 (-1.59%); split: -1.64%, +0.05%
Cycles:
148047414 ->
148470916 (+0.29%); split: -0.83%, +1.12%
Subgroup size: 112544 -> 112576 (+0.03%); split: +0.04%, -0.01%
Spill count: 98 -> 90 (-8.16%)
Fill count: 90 -> 82 (-8.89%)
Max live registers: 495274 -> 479502 (-3.18%); split: -3.21%, +0.03%
Max dispatch width: 87824 -> 91168 (+3.81%); split: +4.10%, -0.29%
Gaining 297 shaders in SIMD16/32, loosing 16 SIMD32 shaders
Some not so good results on Strange Brigade :
Totals from 4027 (100.00% of 4027) affected shaders:
Instrs: 2080355 -> 2013880 (-3.20%); split: -3.20%, +0.01%
Cycles:
25405149 ->
25170579 (-0.92%); split: -1.37%, +0.45%
Max live registers: 167303 -> 168958 (+0.99%)
Max dispatch width: 33264 -> 32496 (-2.31%)
Loosing 96 SIMD16 shaders.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17545>
Lionel Landwerlin [Mon, 3 Jul 2023 14:46:41 +0000 (17:46 +0300)]
hasvk: fix null descriptor handling with A64 messages
This replicates the same fix we did for Anv and null descriptors with
A64 messages from commit
efcda1c530 ("anv: fix null descriptor
handling with A64 messages").
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17545>
Yonggang Luo [Tue, 4 Jul 2023 05:21:04 +0000 (13:21 +0800)]
svga: use alignas over struct MKSGuestStatInfoEntry
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24571>
Yonggang Luo [Tue, 4 Jul 2023 04:26:48 +0000 (12:26 +0800)]
v3dv: Use alignas(8) over 64 bit atomic value
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24571>
Yonggang Luo [Tue, 4 Jul 2023 04:26:28 +0000 (12:26 +0800)]
util/treewide: Use alignas(x) instead __attribute__((aligned(x)))
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24571>
Thomas H.P. Andersen [Sun, 23 Jul 2023 15:10:27 +0000 (17:10 +0200)]
nvk: EXT_conditional_rendering
This reads the buffer value, combines it with the inverted setting
and sets SET_RENDER_ENABLE depending on this.
This works for draw and clear calls, but not for dispatch.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24520>
Dave Airlie [Tue, 25 Jul 2023 03:49:55 +0000 (13:49 +1000)]
nvk: add cond render upload buffer.
conditional render has some issues with vram, so we have to use
a gart buffer to put the value into. This is similiar to what
nvidia seem to do.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24520>
Dave Airlie [Tue, 25 Jul 2023 03:46:09 +0000 (13:46 +1000)]
nvk: add gart forced cmd pool side buffer.
Currently we put the upload and cmd bos into GART, however in the
future this might change, but for conditional rendering we must have
a GART space to read the value from. This creates a separate buffer
allocations that are gart forced. This will be used to provide
cond render with a gart location.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24520>
Timothy Arceri [Fri, 21 Jul 2023 03:59:35 +0000 (13:59 +1000)]
glsl: mark structs containing images as bindless
Structs are not allowed to contain an image in regular glsl. The only time
they are intended to be allowed to be declared in a struct is when
they are bindless.
Unfortunately the bindless spec does not meantion this behaviour
explicitly so there is no spec quote to reference but you can see in
the original commit to allow them in mesa that spec clarification was
provided
48b7882200c5
The spec also states that certain uses are implicitly bindless as per
the following spec quote:
"When used as shader inputs, outputs, uniform block members,
or temporaries, the value of the sampler is a 64-bit unsigned
integer handle and never refers to a texture image unit."
Given images are not allowed in regular glsl for the above types
similair to being forbidden in structs, we can also assume
declarations in structs are implicitly bindless.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24269>
Mike Blumenkrantz [Thu, 3 Aug 2023 18:00:02 +0000 (14:00 -0400)]
aux/trace: fix winsys handle dumping
cc: mesa-stable
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24493>
Mike Blumenkrantz [Tue, 8 Aug 2023 21:06:38 +0000 (17:06 -0400)]
zink: add VK_PIPELINE_CACHE_CREATE_EXTERNALLY_SYNCHRONIZED_BIT_EXT
now that there's more locking around pipeline caches this makes sense
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24559>
Mike Blumenkrantz [Tue, 8 Aug 2023 13:25:35 +0000 (09:25 -0400)]
zink: add more locking for pipeline cache
this ensures the size remains constant for entry updates
fixes #9494
cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24559>
Mike Blumenkrantz [Thu, 3 Aug 2023 11:05:28 +0000 (07:05 -0400)]
zink: use SPV_KHR_workgroup_memory_explicit_layout when available
aliasing shared memory is otherwise questionably legal
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24467>
Mike Blumenkrantz [Thu, 3 Aug 2023 11:05:18 +0000 (07:05 -0400)]
zink: propagate have_workgroup_memory_explicit_layout to ntv
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24467>
Mike Blumenkrantz [Thu, 3 Aug 2023 11:04:58 +0000 (07:04 -0400)]
zink: hook up VK_KHR_workgroup_memory_explicit_layout
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24467>
George Ouzounoudis [Tue, 8 Aug 2023 17:09:27 +0000 (20:09 +0300)]
nvk: Enable dynamic line rasterization mode state
Enables extendedDynamicState3LineRasterizationMode feature.
Just moved the state flipping from the pipeline to the dynamic rs state
flush.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24517>
georgeouzou [Mon, 7 Nov 2022 17:16:13 +0000 (19:16 +0200)]
nvk: Support VK_EXT_line_rasterization
- bresenham and smooth lines
These two need to override multisample rasterization to get correct
results on CTS tests.
- stippled lines
The stipple factor needs to be remapped from [1, 256] to [0, 255].
-rectangular and strict lines
Rectangular lines need multisample rasterization rules to get correctly
rasterized even for one sample. That way we get strict lines too for
VK_LINE_RASTERIZATION_MODE_DEFAULT_EXT.
As per the DX rasterization rules:
Rasterization rules for primitives are, in general, unchanged by multisample antialiasing, except:
- For a triangle, a coverage test is performed for each sample location (not for a pixel center).
If more than one sample location is covered, a pixel shader runs once with attributes interpolated at the pixel center.
The result is stored (replicated) for each covered sample location in the pixel that passes the depth/stencil test.
- A line is treated as a rectangle made up of two triangles, with a line width of 1.4.
- For a point, a coverage test is performed for each sample location (not for a pixel center).
For single sample rasterization we get the same results for the
triangles and points, but for lines we get the rectangular form instead.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24517>
Mike Blumenkrantz [Tue, 25 Jul 2023 16:30:18 +0000 (12:30 -0400)]
zink: set msrtss depth resolve mode when enabled
cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24309>
Mike Blumenkrantz [Tue, 25 Jul 2023 16:30:01 +0000 (12:30 -0400)]
zink: don't append msrtss to dynamic render if not supported
cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24309>
Mike Blumenkrantz [Mon, 24 Jul 2023 20:29:08 +0000 (16:29 -0400)]
zink: don't add VK_IMAGE_USAGE_ATTACHMENT_FEEDBACK_LOOP_BIT_EXT for transient images
this is illegal
cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24309>
Mike Blumenkrantz [Mon, 24 Jul 2023 20:27:21 +0000 (16:27 -0400)]
zink: fix zs resolve attachment indexing
this has never been tested until now
cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24309>
Mike Blumenkrantz [Mon, 24 Jul 2023 20:26:53 +0000 (16:26 -0400)]
zink: add batch refs for transient images
ensure these don't get deleted while in use
cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24309>
Tatsuyuki Ishi [Tue, 8 Aug 2023 07:31:57 +0000 (16:31 +0900)]
radv/winsys: Remove unused struct radv_winsys_bo_list.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24551>
Tatsuyuki Ishi [Tue, 8 Aug 2023 07:18:56 +0000 (16:18 +0900)]
radv/amdgpu: Remove unused bo_list variable from cs_submit.
Handle based bo_list is no longer used since
767a9324b9c ("radv/amdgpu:
remove legacy code path for creating the BO list").
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24551>
Emma Anholt [Fri, 28 Jul 2023 00:24:12 +0000 (17:24 -0700)]
freedreno/a5xx: Skip SSBO emit when none are enabled.
There was a weird NUM_UNIT=0 in a crash dump I was looking at, but this
doesn't fix the crash.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24358>
Emma Anholt [Fri, 28 Jul 2023 00:15:11 +0000 (17:15 -0700)]
freedreno: Fix crashdec pre-a6xx.
We'd assert fail looking up the REM registers.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24358>
Emma Anholt [Thu, 27 Jul 2023 21:51:13 +0000 (14:51 -0700)]
ci/freedreno: Add a regression test for decoding a540 blob's compute shaders.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24358>
Eric Anholt [Thu, 25 Feb 2021 19:51:05 +0000 (11:51 -0800)]
freedreno/cffdec: Fix decode on pixel 2 blob's COMPUTE_CHECKPOINT
dEQP-GLES31.functional.image_load_store.buffer.image_size.writeonly_7
produces:
t7 opcode: CP_COMPUTE_CHECKPOINT (6e) (8 dwords)
{ ADDR_0_LO = 0x15000 }
{ ADDR_0_HI = 0x5 }
0x18
{ ADDR_1_LEN = 3 }
0xf
{ ADDR_1_LO = 0x2e010 }
{ ADDR_1_HI = 0x5 }
and it was asserting due to sizedwords==7. Without the assert, we were
dereffing a len past the end of the packet. This len value we were
loading is also suspiciously not the location of the ADDR_1_LEN field in
the packet's XML. But then, the command stream at ADDR_1 was clearly 0xf
long, and that puts ADDR_1_LEN at the spot we would expect compared to
SET_RENDER_MODE's ADDR_1.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24358>
Emma Anholt [Wed, 26 Jul 2023 23:04:31 +0000 (16:04 -0700)]
freedreno/a5xx: Add private mem support.
A bunch of our piglit fails were due to failing to compile shaders due to
a lack of spilling support. I used a simple shader with a large local
array with tunable size to determine the MEMSIZEPERITEM increment and the
location of HWSTACKOFFSET (matching a3xx locations). Unfortunately
fibers_per_sp I had to guess by taking a big spilling shader and cranking
it up until it rendered correctly. The value I found made HWSTACKOFFSET's
shift value match a6xx's, as a bit of confirmation.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24358>
Emma Anholt [Tue, 8 Aug 2023 16:53:16 +0000 (09:53 -0700)]
freedreno/a5xx: Set num_sp_cores and set PC/VFD_POWER_CNTL accordingly.
Based on libwrap tracing of the blob.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24358>
Emma Anholt [Thu, 27 Jul 2023 18:36:03 +0000 (11:36 -0700)]
freedreno/a5xx: Refactor SHADER_OBJ emit to a helper function.
This will grow private mem setup shortly.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24358>
Emma Anholt [Thu, 27 Jul 2023 17:03:10 +0000 (10:03 -0700)]
freedreno/a3xx: Add the shift for MEMSIZEPERITEM according to db410c docs.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24358>
Emma Anholt [Thu, 27 Jul 2023 18:21:04 +0000 (11:21 -0700)]
freedreno/a6xx: Move pvtmem allocation to ir3_gallium.
This will be the same thing for pre-a6xx.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24358>
Emma Anholt [Thu, 27 Jul 2023 19:54:17 +0000 (12:54 -0700)]
freedreno/devices: Set num_sp_cores explicitly for pre-gen6.
These are all 0 currently, but will change for a5xx shortly.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24358>