Marcin Ślusarz [Wed, 27 Apr 2022 14:05:44 +0000 (16:05 +0200)]
anv: disable streamout before emitting mesh shading state
Fixes tests which use secondary command buffers.
Fixes:
ef04caea9b8 ("anv: Implement Mesh Shading pipeline")
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16493>
Marcin Ślusarz [Mon, 25 Apr 2022 08:55:06 +0000 (10:55 +0200)]
intel/compiler: print name of the unhandled intrinsic
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16493>
Marcin Ślusarz [Thu, 21 Apr 2022 15:26:52 +0000 (17:26 +0200)]
anv: update task/mesh distribution with the recommended values
Fixes:
ef04caea9b8 ("anv: Implement Mesh Shading pipeline")
Acked-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16493>
Marcin Ślusarz [Fri, 25 Feb 2022 15:35:26 +0000 (16:35 +0100)]
intel/compiler: handle gl_Viewport and gl_Layer in FS URB setup
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16493>
Marcin Ślusarz [Wed, 5 Jan 2022 13:04:49 +0000 (14:04 +0100)]
intel/compiler: handle VARYING_SLOT_CULL_PRIMITIVE in mesh
It's needed for gl_MeshPerPrimitiveNV[].gl_ViewportMask
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16493>
Marcin Ślusarz [Wed, 30 Mar 2022 12:37:12 +0000 (14:37 +0200)]
compiler: add VARYING_SLOT_CULL_PRIMITIVE
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16493>
Marek Olšák [Tue, 3 May 2022 02:43:38 +0000 (22:43 -0400)]
ac/llvm: skip s_barrier if tess patches don't cross a wave boundary
If tess patches are wholly in one wave, "s_waitcnt lgkm(0)" is sufficient.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16304>
Marek Olšák [Tue, 3 May 2022 13:09:51 +0000 (09:09 -0400)]
radeonsi: add si_get_tcs_epilog_key
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16304>
Marek Olšák [Tue, 3 May 2022 02:08:43 +0000 (22:08 -0400)]
ac/llvm: fix the remaining s_barriers for LLVM 15
LLVM 15 doesn't insert s_waitcnt before barriers.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16304>
Marek Olšák [Tue, 3 May 2022 01:58:35 +0000 (21:58 -0400)]
ac/llvm: move the gfx6 optimization for TCS barriers into ac_build_s_barrier
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16304>
Marek Olšák [Tue, 3 May 2022 01:38:07 +0000 (21:38 -0400)]
ac/llvm: add gl_shader_stage parameter into ac_build_s_barrier
this will be used later
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16304>
Marek Olšák [Mon, 2 May 2022 23:52:15 +0000 (19:52 -0400)]
ac/llvm: replace LLVMBuildFence with ac_build_waitcnt(VSTORE)
No change in LLVM IR.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16304>
Marek Olšák [Mon, 2 May 2022 23:48:13 +0000 (19:48 -0400)]
ac/llvm: inline emit_membar
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16304>
Marek Olšák [Tue, 3 May 2022 01:53:12 +0000 (21:53 -0400)]
radeonsi: wait before s_barrier in TCS epilog to fix LLVM 15
Only LGKM is needed here.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16304>
Marek Olšák [Mon, 2 May 2022 23:39:54 +0000 (19:39 -0400)]
ac/llvm: implement memory_barrier_tcs_patch properly to fix LLVM 15
because LLVM 15 doesn't insert s_waitcnt before s_barrier.
Now, control_barrier shouldn't add any waits because memory_barrier is
responsible for it, so remove the wait.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16304>
Yonggang Luo [Wed, 11 May 2022 13:02:56 +0000 (21:02 +0800)]
st: Improve _mesa_error about GL_OUT_OF_MEMORY in st_cb_texture.c
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16453>
Pavel Ondračka [Wed, 11 May 2022 19:52:44 +0000 (21:52 +0200)]
r300: fix vertex shader control flow in loops
This fixes 7 loop piglit tests when loop unrolling is disabled.
The problem is that we were trying to be smart with breaks and
tried to save one predicate instruction for endif in some cases.
This worked for simple loops but brought problems for more complex
shaders, instead just switch to standard VE_PRED_SNEQ_PUSH
ME_PRED_SET_POP combo everywhere.
Shader-db results on RV530 show three hurt glmark tests, however
I believe the simplification should be worth it.
total instructions in shared programs: 123715 -> 123718 (<.01%)
instructions in affected programs: 54 -> 57 (5.56%)
total predicate in shared programs: 118 -> 121 (2.54%)
predicate in affected programs: 6 -> 9 (50.00%)
total temps in shared programs: 17304 -> 17307 (0.02%)
temps in affected programs: 12 -> 15 (25.00%)
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6468
Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Reviewed-by: Filip Gawin <filip.gawin@zoho.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16470>
Vadym Shovkoplias [Sun, 8 May 2022 10:03:49 +0000 (13:03 +0300)]
drirc: Set limit_trig_input_range option for the Wolfenstein Youngblood
One of the fragment shaders passes large values to sin() function that
causes some blinking artifacts on Intel. This workaround limits the input
range for sin() to [-2*pi : 2*pi] to have better precision.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6452
Signed-off-by: Vadym Shovkoplias <vadym.shovkoplias@globallogic.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16388>
Vadym Shovkoplias [Fri, 6 May 2022 15:52:47 +0000 (18:52 +0300)]
driconf: Add a limit_trig_input_range option
With this option enabled range of input values for fsin and fcos is
limited to [-2*pi : 2*pi] by calculating the reminder after 2*pi modulo
division. This helps to improve calculation precision for large input
arguments on Intel.
-v2: Add limit_trig_input_range option to prog_key to update shader
cache (Lionel)
Signed-off-by: Vadym Shovkoplias <vadym.shovkoplias@globallogic.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16388>
Guilherme Gallo [Tue, 10 May 2022 12:27:01 +0000 (09:27 -0300)]
ci/lava: Make job submitter parse the job result
Currently, the LAVA job submitter fetches the job results from the LAVA
XMLRPC call, but that is not necessary, as the job result is easily
found in the logs. E.g. the bare-metal and poe jobs uses that log to set
the final job status of their runs.
Another reason for the change is that the LAVA signals are not reliable
in some devices with one serial port, causing some troubles in a618
recently. So, if one signal fails to be sent/received, the job will
ultimately fail even when the hwci script has been successful.
Fixes: #6435
Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16425>
Mike Blumenkrantz [Thu, 12 May 2022 21:14:57 +0000 (17:14 -0400)]
zink: remove implicit query resets
this existed in order to reset query pools in advance so they
would never overflow. now the pools are reset every time the query
is started, so this behavior is no longer necessary
fixes #6475
Fixes:
57dd05616fa ("zink/query: rewrite the query handling code to pass validation.")
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16484>
Charmaine Lee [Thu, 12 May 2022 04:15:40 +0000 (21:15 -0700)]
svga: fix clip distance shadow copy writemask
Fix clip distance shadow copy writemask as the shadow copy
includes clip distances to all clip planes whether enabled or not.
Fixes spec@glsl-1.30@execution@interpolation@interpolation-*distance
Reviewed-by: Neha Bhende <bhenden@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16481>
Rob Clark [Thu, 12 May 2022 15:06:59 +0000 (08:06 -0700)]
freedreno/devices: Add another SKU
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16477>
Rob Clark [Thu, 12 May 2022 15:04:56 +0000 (08:04 -0700)]
freedreno/drm/virtio: Don't try to mmap imported bo's
Previously it would fail, and then we'd fall back to the transfer path
for things like readpix. But it would spam logcat w/ bo_mmap fail
messages. Since gralloc allocated buffers for GPU usage are allocate
without _USE_MAPPABLE, let's just assume we can't map imported bo's.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16477>
Rob Clark [Thu, 12 May 2022 15:04:11 +0000 (08:04 -0700)]
freedreno/drm: Use DEBUG_GET_ONCE_OPTION()
In particular this uses os_get_option() so the android setprop fallback
works.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16477>
Kenneth Graunke [Mon, 2 May 2022 22:03:47 +0000 (15:03 -0700)]
anv: Fix INTEL_DEBUG=bat on XeHP
We no longer emit STATE_BASE_ADDRESS in every batch on XeHP, so the
decoder might not know what the various base addresses are if it's only
looking at a single batch. Fortunately, they also never change, so we
can just emit them once here.
On earlier platforms, initializing them here should be harmless. We'll
emit STATE_BASE_ADDRESS if we change them, which will update these.
Thanks to Iván Briano for catching this.
Fixes:
8831cb38aa9 ("anv: Stop updating STATE_BASE_ADDRESS on XeHP")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16287>
Georg Lehmann [Tue, 10 May 2022 15:26:42 +0000 (17:26 +0200)]
nir/opt_algebraic: Optimize Doom Eternal's word extract by LSB.
Foz-db GFX10_3:
Totals from 419 (0.31% of 134913) affected shaders:
CodeSize: 4126032 -> 4121756 (-0.10%)
Instrs: 783608 -> 782541 (-0.14%)
Latency: 7889664 -> 7888521 (-0.01%); split: -0.02%, +0.00%
InvThroughput: 1315690 -> 1314863 (-0.06%); split: -0.06%, +0.00%
VClause: 11826 -> 11830 (+0.03%)
SClause: 27736 -> 27734 (-0.01%)
Copies: 50493 -> 50428 (-0.13%); split: -0.13%, +0.01%
PreSGPRs: 23264 -> 23265 (+0.00%)
Signed-off-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16436>
Danylo Piliaiev [Thu, 12 May 2022 12:47:58 +0000 (15:47 +0300)]
tu: Fix indices of drm_msm_gem_submit_cmd when filling them
For some reason CTS doesn't trigger the issue...
When submit entry is not filled - kernel says:
[drm:msm_ioctl_gem_submit] *ERROR* invalid type:
00000000
Fixes:
dbae9fa7d8412252c96e53ef3d50f4349969928a
("tu: implement sysmem vs gmem autotuner")
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16474>
Samuel Pitoiset [Wed, 11 May 2022 08:25:15 +0000 (10:25 +0200)]
aco: only retrieve the scratch offset when it's declared
This allows to run most of the fossils we have right now. I will fix
up scratch in upcoming patches.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16369>
Samuel Pitoiset [Fri, 6 May 2022 10:39:13 +0000 (12:39 +0200)]
radv,aco: export alpha-to-coverage via MRTZ on GFX11
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16369>
Samuel Pitoiset [Fri, 6 May 2022 09:57:10 +0000 (11:57 +0200)]
aco: do not set COMPR for exports but use 0x3 channel mask on GFX11
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16369>
Samuel Pitoiset [Fri, 6 May 2022 09:48:49 +0000 (11:48 +0200)]
aco: do not set RESOURCE_LEVEL for buffer descriptors on GFX11
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16369>
Samuel Pitoiset [Fri, 6 May 2022 09:38:43 +0000 (11:38 +0200)]
aco: update waitcnt on GFX11
Not sure if the vmcnt field can use more than 0x3f bits.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16369>
Samuel Pitoiset [Fri, 6 May 2022 09:17:11 +0000 (11:17 +0200)]
aco: update LDS allocation granularity for PS on GFX11
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16369>
Samuel Pitoiset [Fri, 6 May 2022 09:04:52 +0000 (11:04 +0200)]
aco: do not set GLC stores on GFX11
It has no effect.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16369>
Samuel Pitoiset [Fri, 6 May 2022 08:32:39 +0000 (10:32 +0200)]
aco: do not set DLC for loads on GFX11
It means something different.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16369>
Samuel Pitoiset [Fri, 6 May 2022 09:18:24 +0000 (11:18 +0200)]
aco: export MRT0 instead of NULL on GFX11
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16369>
Samuel Pitoiset [Fri, 6 May 2022 09:26:21 +0000 (11:26 +0200)]
radv,aco: use the new TCS WaveID SGPR to compute vs_rel_patch_id on GFX11
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16369>
Samuel Pitoiset [Wed, 4 May 2022 19:35:58 +0000 (21:35 +0200)]
radv,aco: add support for packed threadID VGPRs on GFX11
Thread ID are packed in one VGPR with 10 bits each.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16369>
Samuel Pitoiset [Fri, 6 May 2022 09:16:31 +0000 (11:16 +0200)]
aco: do not align VGPRS to 8 or 16 on GFX11
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16369>
Samuel Pitoiset [Thu, 5 May 2022 13:31:52 +0000 (15:31 +0200)]
aco: recognize GFX11 in few places
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16369>
Konstantin Seurer [Fri, 1 Apr 2022 14:03:04 +0000 (16:03 +0200)]
radv: Advertise indirect ray tracing
Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15712>
Konstantin Seurer [Fri, 1 Apr 2022 14:02:32 +0000 (16:02 +0200)]
radv: Implement vkCmdTraceRaysIndirectKHR
Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15712>
Konstantin Seurer [Fri, 1 Apr 2022 14:01:41 +0000 (16:01 +0200)]
radv,aco: Use ray_launch_size_addr
Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15712>
Konstantin Seurer [Thu, 21 Apr 2022 18:48:43 +0000 (20:48 +0200)]
radv: Indirect unaligned dispatches
Closes: #6251
Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15712>
Konstantin Seurer [Fri, 1 Apr 2022 13:59:19 +0000 (15:59 +0200)]
radv: Allow indirect dispatches without bo
Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15712>
Konstantin Seurer [Fri, 1 Apr 2022 13:57:51 +0000 (15:57 +0200)]
nir: Add a ray launch size addr intrinsic
Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15712>
Samuel Pitoiset [Wed, 11 May 2022 12:49:12 +0000 (14:49 +0200)]
radv: disable DCC for Senra Kagura Shinovi Versus
To workaround an issue with feedback loops in D3D9 with DCC in GENERAL,
until we can fix it properly with a new extension.
Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6469
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Martin Roukala <martin.roukala@mupuf.org>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16452>
Rajnesh Kanwal [Mon, 4 Apr 2022 11:17:47 +0000 (12:17 +0100)]
pvr: Add support to create transfer context and setup required shaders.
Signed-off-by: Rajnesh Kanwal <rajnesh.kanwal@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16451>
Rajnesh Kanwal [Mon, 4 Apr 2022 11:16:45 +0000 (12:16 +0100)]
pvr: Add services winsys transfer context support.
Signed-off-by: Rajnesh Kanwal <rajnesh.kanwal@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16451>
Rajnesh Kanwal [Mon, 4 Apr 2022 09:19:21 +0000 (10:19 +0100)]
pvr: Setup common nop shader.
Signed-off-by: Rajnesh Kanwal <rajnesh.kanwal@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16451>
Rajnesh Kanwal [Tue, 29 Mar 2022 14:53:54 +0000 (15:53 +0100)]
pvr: Change phase_rate_change type to bool from uint32_t.
Signed-off-by: Rajnesh Kanwal <rajnesh.kanwal@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16451>
Rajnesh Kanwal [Mon, 28 Feb 2022 17:12:48 +0000 (17:12 +0000)]
pvr: Remove double error reporting in error path.
Signed-off-by: Rajnesh Kanwal <rajnesh.kanwal@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16451>
Jason Ekstrand [Wed, 4 May 2022 14:50:30 +0000 (09:50 -0500)]
panvk: Round FillBuffer sizes down to a multiple of 4
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16276>
Jason Ekstrand [Tue, 3 May 2022 22:37:46 +0000 (17:37 -0500)]
panvk: Drop panvk_descriptor
The API-style representation of descriptors is no longer used by
anything so let's get rid of it. All we really need is the data in the
descriptor set itself.
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16276>
Jason Ekstrand [Tue, 3 May 2022 22:36:04 +0000 (17:36 -0500)]
panvk: Implement descriptor copies properly
All we were doing was copying panvk_descriptor structs around which
don't actually contain data that's used by anything interesting. We
need to copy the actual data arround. Annoyingly, that means we need a
descriptor copy function per descriptor type. Woo!
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16276>
Jason Ekstrand [Tue, 3 May 2022 22:31:59 +0000 (17:31 -0500)]
panvk: Set immutable samplers properly up-front
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16276>
Jason Ekstrand [Tue, 3 May 2022 21:25:25 +0000 (16:25 -0500)]
panvk: Rewrite the write portion of vkUpdateDescriptorSets
The new design is based on the ANV code which I massively cleaned up
some time ago. Each descriptor type has a write function and they have
consistent prototypes. This makes it all much easier to read and figure
out what's going on. It also makes it easier to make changes going
forward because you aren't re-plumbing function arguments if you ever
change the type of data in any given descriptor type. You just change
the write function.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16276>
Jason Ekstrand [Tue, 3 May 2022 21:03:06 +0000 (16:03 -0500)]
panvk: Re-arrange descriptor set functions
Put them in the order we call them which is also roughly descriptor type
enum order.
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16276>
Jason Ekstrand [Thu, 5 May 2022 22:18:36 +0000 (17:18 -0500)]
FIXUP: Use 16-bit things for texture sizes
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16276>
Jason Ekstrand [Fri, 29 Apr 2022 23:31:11 +0000 (18:31 -0500)]
panvk: Implement texture/image queries
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16276>
Jason Ekstrand [Fri, 29 Apr 2022 23:29:40 +0000 (18:29 -0500)]
pavnk: Pass bind layouts to texture and image descriptor helpers
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16276>
Jason Ekstrand [Fri, 29 Apr 2022 22:35:50 +0000 (17:35 -0500)]
panvk: Add an elems field to panvk_buffer_view
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16276>
Jason Ekstrand [Fri, 29 Apr 2022 20:28:42 +0000 (15:28 -0500)]
panvk: Advertise VK_KHR_variable_pointers
Now that our SSBO descriptor handling code no longer craws deref chains
back to the variable, we should be handling variable pointers properly.
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16276>
Jason Ekstrand [Thu, 5 May 2022 03:59:10 +0000 (22:59 -0500)]
panvk: Enable robustBufferAccess
It should already work for UBOs. This should do everything we need for
SSBOs. Not sure about vertex and index buffers but we can deal with
those later.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16276>
Jason Ekstrand [Thu, 5 May 2022 03:55:26 +0000 (22:55 -0500)]
vulkan: Start collecting enabled features in vk_device
We're not trying to make this 100% complete. For now, all we care about
is robustBufferAccess.
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16276>
Jason Ekstrand [Wed, 27 Apr 2022 22:58:03 +0000 (17:58 -0500)]
panvk: Put SSBO addresses in the descriptor buffer
Instead of storing SSBO pointers in the very limited sysval space, store
them in the UBO we've attached to the descriptor set. This gives us a
virtually unlimited number of SSBOs. Dynamic SSBOs still live in the
sysval space so we can update them as part of vkCmdBindDescriptorSets().
Also, the new code (based on the code in ANV) loads those SSBO addresses
in a way that never chases the deref chain back to the variable so we
should now be able to handle all of variable pointers. The code as
written in this patch is a bit overly generic because it switches on
address modes a bit more than panvk needs but we ended up needing all
that flexibility in ANV so we may as well leave hooks for it in panvk.
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16276>
Jason Ekstrand [Fri, 29 Apr 2022 15:38:36 +0000 (10:38 -0500)]
panvk: Interleave UBOs with multiple descriptor sets
The original intention was to put all the non-dynamic UBOs first
followed by all the dynamic ones. However, we got the calculations
wrong and, once you went above one descriptor set, things start stomping
each other.
Also, the whole strategy is a bit busted. Vulkan pipeline layout
compatability rules say that it's ok to create a pipeline with one
layout and then bind with another so long as the bottom N descriptor set
layouts match and the pipeline uses at most N descriptors. This means
that, while it's safe to have each subsequent set add onto a given pool
of descriptors, if you're going to combine two of those pools, you need
to be careful that the position of descriptors in set N only depends on
the layouts of sets M <= N. The easy way to do this is to interleve
where we do the UBOs for set 0 then dynamic for set 0 then UBOs for set
1 then dynamic for set 1, etc.
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16276>
Jason Ekstrand [Fri, 29 Apr 2022 15:20:18 +0000 (10:20 -0500)]
panvk: Put the sysval and push const UBOs at fixed indices
In theory, this may cost us a tiny bit of descriptor space but in
practice, given that the viewport transform is a sysval, we'll always
need it for 3D and given that SSBO pointers live there, we'll basically
always need it for compute. It also makes a lot of things simpler.
We're about to start using the sysval UBO directly in our descriptor set
code and knowing the index up-front is really nice.
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16276>
Jason Ekstrand [Fri, 29 Apr 2022 20:01:29 +0000 (15:01 -0500)]
panvk: Stop calling lower_uniforms_to_ubo
We don't need it because Vulkan doesn't have GL-style uniforms. It
*shouldn't* be doing anything but sometimes it inserts an extra UBO
binding and adds 1 to all our UBO indices for no good reason.
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16276>
Jason Ekstrand [Thu, 28 Apr 2022 22:02:20 +0000 (17:02 -0500)]
panvk: Use a flat sysvals struct
PanVK uses fewer sysvals than the GLES driver, as some data that would
be a data in GLES is instead part of the descriptor set or the pipeline
state in Vulkan. Therefore, it is simpler and more efficient to use a
flat, fixed layout provided by the driver for our sysvals, rather than
the compiler choosing a layout.
This commit switches to a flat sysval layout.
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16276>
Jason Ekstrand [Thu, 28 Apr 2022 20:51:51 +0000 (15:51 -0500)]
panvk: Get rid of the per-pipeline sysvals BO
This is a micro-optimization and probably not a correct one at that.
The cost involved in re-uploading the viewport is tiny compared to the
mental overhead from trying to do this juggle.
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16276>
Jason Ekstrand [Thu, 28 Apr 2022 20:46:00 +0000 (15:46 -0500)]
bifrost,midgard: Allow providing a fixed sysval layout
Vulkan doesn't need nearly as many system values and would like to bake
its layout up-front instead of having it provided by the back-end
compiler.
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16276>
Jason Ekstrand [Thu, 28 Apr 2022 22:52:41 +0000 (17:52 -0500)]
panfrost: Add some sanity checking for sysvals
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16276>
Jason Ekstrand [Wed, 4 May 2022 16:25:33 +0000 (11:25 -0500)]
panfrost,panvk: Make fixed_sysval_ubo < 0 mean compiler-assigned
In
3559efb9bf5c ("panfrost: Allow passing an explicit UBO index for the
sysval UBO"), an explicit UBO index was added and it was implicitly
assumed that it would be > num_ubos. This was convenient because it
meant 0, the default for designated initializers, implicitly meant
compiler-assigned. However, we're about to move the sysval UBO to 0
which breaks this assumption. Also, we don't want the back-end
compiler to even look at num_ubos since it's meaningless in Vulkan.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16276>
Jason Ekstrand [Wed, 27 Apr 2022 21:03:52 +0000 (16:03 -0500)]
panvk: Add a buffer to each descriptor set
Later in the series, we will map descriptor sets to driver-internal
buffers bound as UBOs. These buffers will contain various internal data,
like buffer and texture sizes. Resource access will be lowered to pull
from this UBO in the shader. To prepare, create a backing buffer when
creating descriptor set and emit a UBO record so we can bind it.
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16276>
Jason Ekstrand [Wed, 27 Apr 2022 19:44:35 +0000 (14:44 -0500)]
panvk: Break descriptor lowering into its own file
It's about to get a lot more complicated so let's split it out.
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16276>
Jason Ekstrand [Wed, 27 Apr 2022 19:53:38 +0000 (14:53 -0500)]
panvk: Move CreateDescriptorSetLayout to per-arch
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16276>
Jordan Justen [Sat, 30 Apr 2022 09:01:52 +0000 (02:01 -0700)]
intel/dev: Enable first set of DG2 PCI IDs
Mostly Matt Roper's kernel patch commit message:
The IDs added here are the subset reserved for 'motherboard down'
designs of DG2. We have all the necessary support upstream to enable
these now.
The remaining DG2 IDs for add-in cards will be enabled in a future
patch once some additional required functionality has fully landed.
Ref: https://patchwork.freedesktop.org/patch/msgid/
20220425211251.77154-3-matthew.d.roper@intel.com
Cc: 22.1 <mesa-stable>
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16449>
Jordan Justen [Sat, 30 Apr 2022 08:48:40 +0000 (01:48 -0700)]
intel/dev: Add DG2 G12 PCI IDs
Ref: https://patchwork.freedesktop.org/patch/483381/?series=103098&rev=1
Ref: https://patchwork.freedesktop.org/patch/msgid/
20220425211251.77154-3-matthew.d.roper@intel.com
Cc: 22.1 <mesa-stable>
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16449>
Jordan Justen [Mon, 8 Nov 2021 22:18:49 +0000 (14:18 -0800)]
intel/dev: Add INTEL_PLATFORM_DG2_G12
Cc: 22.1 <mesa-stable>
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16449>
Samuel Pitoiset [Thu, 5 May 2022 13:26:45 +0000 (15:26 +0200)]
radv/winsys: allow to use RADV_FORCE_FAMILY=gfx1100
The bare minimum to play with fossils.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16446>
Jason Volk [Fri, 22 Apr 2022 01:12:53 +0000 (18:12 -0700)]
r600: Elide downloads for discarded and immutable compute memories.
Compute memory item demotion invokes a device to host transfer unconditionally,
but there are at least two cases where this is not necessary:
1. The item is mapped for discarding with PIPE_MAP_DISCARD_RANGE (e.g.
CL_MAP_WRITE_INVALIDATE_REGION).
2. The item cannot be written to by the device.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16116>
Jason Volk [Thu, 21 Apr 2022 21:40:09 +0000 (14:40 -0700)]
r600: Improve compute memory pool performance; reduce fragmentation.
The compute memory pool forced a defragmentation (a left-packing relocation)
of items prior to promoting (adding) items to the tail end of the pool.
This patch instead makes an initial pass over the fragmented pool intent on
promoting items back to where they may have been recently demoted, filling
in the gaps first before conducting the defragmentation (if at all).
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16117>
Jason Volk [Wed, 9 Mar 2022 20:34:08 +0000 (12:34 -0800)]
r600: Fix userspace pointer support for evergreen compute.
Resources returned by r600_buffer_from_user_memory() are not compatible
with the evergreen compute memory pool, though they're added to it anyway.
This results in a segfault reproducible from Clover when the user passes
CL_MEM_USE_HOST_PTR.
This patch allows user_ptr resources to participate in the compute global
memory pool as intended. The result appears to finally allow for zero-copy
DMA out of userspace for anonymous pages.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16114>
Pierre-Eric Pelloux-Prayer [Wed, 11 May 2022 12:57:13 +0000 (14:57 +0200)]
amd: fix ac_build_mbcnt_add in wave32 mode
add_src was ignored and i32_0 was always used.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Fixes:
1e49018cedf ("amd: Add extra source to the mbcnt_amd NIR intrinsic.")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16427>
Pierre-Eric Pelloux-Prayer [Mon, 9 May 2022 20:20:12 +0000 (22:20 +0200)]
radeonsi: don't use wave32 for GE on gfx10 if culling is used
This is a workaround for issue #6457: it fixes the rendering and
prevent the hang but I can't explain why.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6457
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16427>
Pierre-Eric Pelloux-Prayer [Mon, 2 May 2022 14:10:35 +0000 (16:10 +0200)]
radeonsi: fix gs_invocation query with NGG
When NGG is active, the GS invocation counter is always incremented, even
if there's no explicit GS.
Implementing the counter manually fixes it:
* in emit_gs_epilogue for the legacy path
* in gfx10_ngg_gs_emit_prologue for the ngg path
This fixes piglit's arb_query_buffer_object-qbo test.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15861>
Pierre-Eric Pelloux-Prayer [Tue, 19 Apr 2022 11:13:51 +0000 (13:13 +0200)]
radeonsi/ngg: reuse the pipeline stats buffer when using atomics
To support PIPE_STAT_QUERY_GS_INVOCATIONS and PIPE_STAT_QUERY_GS_PRIMITIVES
being used at the same time we have to reuse the same buffer.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15861>
Pierre-Eric Pelloux-Prayer [Fri, 15 Apr 2022 14:11:10 +0000 (16:11 +0200)]
radeonsi/query: use the qbo correct size
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15861>
Pierre-Eric Pelloux-Prayer [Fri, 15 Apr 2022 14:48:16 +0000 (16:48 +0200)]
radeonsi/test: update sienna_cichlid results
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15861>
Pierre-Eric Pelloux-Prayer [Fri, 15 Apr 2022 13:12:39 +0000 (15:12 +0200)]
radeonsi: implement GL_GEOMETRY_SHADER_PRIMITIVES_EMITTED_ARB in shaders
Statistics only work in non-NGG mode. If screen->use_ngg is true, we can't
know if the draw will actually use NGG or not, so this commit switch
to a shader based implementation of this counter.
To avoid modifying si_query, the shader implementation behaves like the hw
one: it uses the same buffer size and offset.
The emulation path activation in the shader is controlled by vs_state_bit[31].
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15861>
Pierre-Eric Pelloux-Prayer [Mon, 2 May 2022 13:16:29 +0000 (15:16 +0200)]
radeonsi: store the pipeline stats index
Will be used in later commits.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15861>
Pierre-Eric Pelloux-Prayer [Tue, 19 Apr 2022 08:27:30 +0000 (10:27 +0200)]
radeonsi: deduplicate query offsets
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15861>
Pierre-Eric Pelloux-Prayer [Tue, 19 Apr 2022 08:31:07 +0000 (10:31 +0200)]
gallium: deduplicate target -> stats index code
Now that target_to_index returns the correct index for
PIPE_QUERY_PIPELINE_STATISTICS we can use it in store_query_result instead
of duplicating the switch statement.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15861>
Pierre-Eric Pelloux-Prayer [Fri, 15 Apr 2022 13:11:58 +0000 (15:11 +0200)]
gallium: always return the correct pipeline stats index
Drivers with PIPE_CAP_QUERY_PIPELINE_STATISTICS_SINGLE = 0 shouldn't care
about the value of index, but radeonsi actually needs it in some situations.
So return the correct index instead of 0.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15861>
Pierre-Eric Pelloux-Prayer [Tue, 19 Apr 2022 08:28:05 +0000 (10:28 +0200)]
gallium: add a union to access queries counters
This allows to loop over counters easily.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15861>
Pierre-Eric Pelloux-Prayer [Thu, 14 Apr 2022 11:32:03 +0000 (13:32 +0200)]
radeonsi: implement pipeline stats workaround
DISABLE_INSTANCE_PACKING needs to be enabled when stats queries are
active to fix incorrect results.
We need to emit this for indexed and non-indexed draws.
Based on PAL's waDisableInstancePacking.
This fixes:
KHR-GL46.pipeline_statistics_query_tests_ARB.functional_primitives_vertices_submitted_and_clipping_input_output_primitives
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15861>
Pierre-Eric Pelloux-Prayer [Mon, 11 Apr 2022 14:25:01 +0000 (16:25 +0200)]
radeonsi: flush VGT streamout like PAL
Ported from
165b016bbeedd4e8d1517a5e95949871cc55a123.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15861>
Mike Blumenkrantz [Wed, 11 May 2022 20:59:31 +0000 (16:59 -0400)]
zink: fix sparse texture depth calcs for arrayed textures
use the array, not the depth
cc: mesa-stable
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16456>
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