builtins-7-p9-runnable.c: Change first argument to vui_arg.

gcc/testsuite/ChangeLog:

2018-06-06  Carl Love  <cel@us.ibm.com>
* gcc.target/powerpc/builtins-7-p9-runnable.c: Change first
argument to vui_arg.

From-SVN: r261249

re PR fortran/85641 (ICE with string concatenate)

2018-06-06  Thomas Koenig  <tkoenig@gcc.gnu.org>

PR fortran/85641
* frontend-passes.c (is_fe_temp): Add prototype.
(realloc_string_callback): Early return for frontend-generated
temporary.

2018-06-06  Thomas Koenig  <tkoenig@gcc.gnu.org>

PR fortran/85641
* gfortran.dg/realloc_on_assign_30.f90: New test.

From-SVN: r261248

builtins-3.c: Move tests requiring -mvsx to builtins-4.c.

gcc/testsuite/ChangeLog:

2018-06-06  Carl Love  <cel@us.ibm.com>

* gcc.target/powerpc/builtins-3.c: Move tests requiring -mvsx
to builtins-4.c.
* gcc.target/powerpc/builtins-4.c: New test file for tests
that need -mvsx.

From-SVN: r261247

re PR target/85657 (Make __ibm128 a separate type, even if long double uses the IBM double-double format)

[gcc]
2018-06-06  Michael Meissner  <meissner@linux.ibm.com>

* config/rs6000/rs6000.c (rs6000_passes_ieee128): New boolean to
track if we pass or return IEEE 128-bit floating point.
(ieee128_mangling_gcc_8_1): New boolean to say whether to generate
C++ mangling that is compatible with GCC 8.1.
(TARGET_ASM_GLOBALIZE_DECL_NAME): Override target hook.
(init_cumulative_args): Note if we pass or return IEEE 128-bit
floating point types.
(rs6000_function_arg_advance_1): Likewise.
(rs6000_mangle_type): Optionally generate mangled names that match
what GCC 8.1 generated for IEEE 128-bit floating point types.
(rs6000_globalize_decl_name): If we have an external function that
passes or returns IEEE 128-bit types, generate a weak reference
from the mangled name used in GCC 8.1 to the current mangled
name.

[gcc]
2018-06-05  Michael Meissner  <meissner@linux.ibm.com>

* config/rs6000/rs6000.c (rs6000_init_builtins): Make __ibm128 use
the long double type if long double is IBM extended double.  Make
__float128 use the long double type if long double is IEEE 128-bit.

[gcc/testsuite]
2018-06-05  Michael Meissner  <meissner@linux.ibm.com>

PR target/85657
* g++.dg/pr85657.C: Only test whether __ibm128 and long double can
be used in templates.  Don't check for them in overloaded functions.

From-SVN: r261246

Remove redundant std::move on const object

* include/bits/shared_ptr_base.h (__shared_count): Remove redundant
move of const value.

From-SVN: r261245

RISC-V: Add interrupt attribute modes.

gcc/
* config/riscv/riscv.c (enum riscv_privilege_levels): New.
(struct machine_function): New field interrupt_mode.
(riscv_handle_type_attribute): New function.  Add forward declaration.
(riscv_attribute_table) <interrupt>: Use riscv_handle_type_attribute.
(riscv_expand_epilogue): Check interrupt_mode field.
(riscv_set_current_function): Check interrupt attribute args and
set interrupt_mode field.
* config/riscv/riscv.md (UNSPECV_SRET, UNSPECV_URET): New.
(riscv_sret, riscv_uret): New.
* doc/extend.texi (RISC-V Function Attributes) <interrupt>: Document
new arguments to interrupt attribute.

gcc/testsuite/
* gcc.target/riscv/interrupt-5.c (sub3): Add new test.
* gcc.target/riscv/interrupt-mmode.c: New.
* gcc.target/riscv/interrupt-smode.c: New.
* gcc.target/riscv/interrupt-umode.c: New.

From-SVN: r261244

re PR target/63177 (Powerpc no-vfa-vect-depend-2.c and no-vfa-vect-depend-3.c failures)

PR target/63177
* /config/rs6000/rs6000.h (ASM_CPU_SPEC): Add support for -mpower9.
Don't handle -mcpu=power8 if -mpower9-vector is also used.

From-SVN: r261243

re PR c++/86068 (__cpp_transactional_memory is 210500)

PR c++/86068
* c-cppbuiltin.c (c_cpp_builtins): Fix a typo, set
__cpp_transactional_memory to 201500 instead of 210500.

* include/bits/c++config: Check __cpp_transactional_memory >= 201500L
rather than __cpp_transactional_memory >= 201505L.

From-SVN: r261242

re PR c++/85977 (Incorrect handling of array reference size deduction)

PR c++/85977
* pt.c (unify): If ELTTYPE has no deducible template parms, skip
deduction from the list elements.
(type_unification_real): Check convertibility of list elements.

* g++.dg/cpp0x/initlist102.C: New test.
* g++.dg/cpp0x/initlist103.C: New test.
* g++.dg/cpp0x/initlist104.C: New test.

From-SVN: r261241

PR c++/86060 - ICE on range for with -std=c++98.

* parser.c (cp_parser_init_statement): Don't clobber *decl after
pedwarn.

From-SVN: r261239

PR c++/85710 - ICE with -Wmemset-elt-size.

c-family/
* c-warn.c (warn_for_memset): Don't crash on incomplete element type.
cp/
* semantics.c (finish_call_expr): Call warn_for_memset here.
* parser.c (cp_parser_postfix_expression): Not here.
(literal_integer_zerop): No longer static.
* pt.c (build_non_dependent_expr): Don't wrap CONST_DECL.

From-SVN: r261238

reflect: fix StructOf hash and string

    Adjust the hash and string fields computed by StructOf to match the
    values that the compiler computes for a struct type with the same
    field names and types.  This makes the reflect code match the
    compiler's Type::hash_for_method and Type::reflection methods.

    Fixes golang/go#25284

    Reviewed-on: https://go-review.googlesource.com/116515

From-SVN: r261235

rs6000-builtin.def (VSX_BUILTIN_VEC_LD, [...]): Add comment to explain non-traditional uses.

gcc/ChangeLog:

2018-06-06  Kelvin Nilsen  <kelvin@gcc.gnu.org>

* config/rs6000/rs6000-builtin.def (VSX_BUILTIN_VEC_LD,
VSX_BUILTIN_VEC_ST): Add comment to explain non-traditional uses.
* config/rs6000/rs6000-c.c (altivec_overloaded_builtins): Remove
several redundant entries.

From-SVN: r261234

ix86_expand_call: convert return type to rtx_insn *

Eliminate an "as_a <rtx_insn *>()" cast.

gcc/ChangeLog:
* config/i386/i386-protos.h (ix86_expand_call): Strengthen return
type from "rtx" to "rtx_insn *".
* config/i386/i386.c (ix86_expand_split_stack_prologue): Likewise
for local "call_insn", removing cast.
(ix86_expand_call): Likewise, introducing a "call_insn" local.

From-SVN: r261233

re PR tree-optimization/86066 (wrong code for bit-field manipulation at -Os)

PR tree-optimization/86066
* gimple-ssa-store-merging.c (process_store): Do not bypass BIT_NOT_EXPR
for BIT_INSERT_EXPR stores.

From-SVN: r261232

re PR tree-optimization/86062 (Missed redundancy elimination with struct and array)

2018-06-06  Richard Biener  <rguenther@suse.de>

PR tree-optimization/86062
* tree-ssa-sccvn.c (vn_reference_lookup_3): Handle arbitrary
component refs ontop
of to be offsetted base.

* g++.dg/tree-ssa/pr86062.C: New testcase.

From-SVN: r261231

MSP430: Allow interrupt handlers to be static

* gcc/config/msp430/msp430.c (msp430_attr): Allow interrupt handlers
to be static and remove check on interrupt attribute name.

gcc/testsuite/gcc.target/msp430/
* function-attributes-4.c: New test.
* static-interrupts.c: New test.

From-SVN: r261229

PR libstdc++/86008 add std::quoted support for string_view

PR libstdc++/86008
* include/bits/quoted_string.h (_Quoted_string<basic_string_view, C>):
Define new partial specialization.
* include/std/iomanip (quoted(basic_string_view<C,T>, C, C)): Define
new overload.
(operator<<(basic_ostream<C,T>&, const _Quoted_string<S,C>&)): Use
value not reference for iteration.
* testsuite/27_io/manipulators/standard/char/quoted.cc: Adjust
comment.
* testsuite/27_io/manipulators/standard/char/quoted_sv.cc: New test.
* testsuite/27_io/manipulators/standard/wchar_t/quoted.cc: Adjust
comment.

From-SVN: r261227

Daily bump.

From-SVN: r261226

extend.texi (PowerPC AltiVec Built-in Functions): Remove volatile qualifier from vec_lvsl and vec_lvsr argument prototypes.

gcc/ChangeLog:

2018-06-05  Kelvin Nilsen  <kelvin@gcc.gnu.org>

* doc/extend.texi (PowerPC AltiVec Built-in Functions): Remove
volatile qualifier from vec_lvsl and vec_lvsr argument prototypes.

From-SVN: r261220

re PR target/79924 (aarch64: untranslated diagnostics in aarch64_err_no_fpadvsimd)

2018-06-05  Steve Ellcey  <sellcey@cavium.com>

PR target/79924
* gcc.target/aarch64/mgeneral-regs_1.c: Update error message.
* gcc.target/aarch64/mgeneral-regs_2.c: Ditto.
* gcc.target/aarch64/mgeneral-regs_3.c: Ditto.
* gcc.target/aarch64/nofp_1.c: Ditto.

From-SVN: r261218

re PR target/79924 (aarch64: untranslated diagnostics in aarch64_err_no_fpadvsimd)

2018-06-05  Steve Ellcey  <sellcey@cavium.com>

PR target/79924
* config/aarch64/aarch64-protos.h (aarch64_err_no_fpadvsimd): Remove
second argument.
* config/aarch64/aarch64-protos..c (aarch64_err_no_fpadvsimd):
Remove second argument, change how error is called.
(aarch64_layout_arg): Remove second argument from
aarch64_err_no_fpadvsimd call.
(aarch64_init_cumulative_args): Ditto.
(aarch64_gimplify_va_arg_expr): Ditto.
* config/aarch64/aarch64.md (mov<mode>): Ditto.

From-SVN: r261217

reflect: canonicalize types returned by StructOf() and friends

    Background: since gccgo does not currently merge identical types at link time,
    the reflect function canonicalize() exists to choose a canonical specimen
    for each set of identical types.
    In this way, user code has the guarantee that identical types
    will always compare as ==

    Change: arrange reflect functions MapOf(), SliceOf(), StructOf() etc.
    to call canonicalize() on the types they create, before storing the types
    in internal lookup caches and returning them.

    This fixes known cases where canonicalize() is needed but was missing.
    Supersedes https://golang.org/cl/112575 and mostly fixes issue 25284.

    Updates golang/go#25284

    Reviewed-on: https://go-review.googlesource.com/115577

From-SVN: r261216

ChangeLog: Fix whitespace.

* ChangeLog: Fix whitespace.
* testsuite/ChangeLog: Ditto.

From-SVN: r261210

i386.md (simple_return_indirect_internal): New expander.

* config/i386/i386.md (simple_return_indirect_internal): New expander.
(*simple_return_indirect_internal<mode>): Rename from
simple_return_indirect_internal.  Use W mode iterator.
(rstorssp): New expander.
(*rstorssp<mode>): Rename from rstorssp.  Use P mode iterator.
(clrssbsy): New expander.
(*clrssbsy<mode>): Rename from clrssbsy.  Use P mode iterator.

From-SVN: r261208

[arm] Make arm_cmse.h C99 compatible

gcc/ChangeLog
2018-06-05  Andre Vieira  <andre.simoesdiasvieira@arm.com>

* config/arm/arm_cmse.h (cmse_nsfptr_create): Change typeof to
__typeof__.
(cmse_check_pointed_object): Likewise.

gcc/testsuite/ChangeLog
2018-06-05  Andre Vieira  <andre.simoesdiasvieira@arm.com>

* gcc.target/arm/cmse/cmse-1c99.c: New test.

From-SVN: r261204

re PR fortran/85701 ([openacc] ICE in mark_scope_block_unused, at tree-ssa-live.c:364)

PR fortran/85701

gcc/fortran/
* openmp.c (gfc_resolve_oacc_declare): Error on functions and
subroutine data clause arguments.

gcc/testsuite/
* gfortran.dg/goacc/pr85701.f90: New test.

From-SVN: r261202

lto.c (cmp_type_location): Expand locations only once.

2018-06-05  Richard Biener  <rguenther@suse.de>

* lto.c (cmp_type_location): Expand locations only once.

From-SVN: r261201

re PR c++/85976 (ICE in cp_tree_equal when building Blitz. May be nested templates.)

PR c++/85976
* tree.c (cp_tree_equal): Handle USING_DECL.

* g++.dg/cpp0x/alias-decl-64.C: New test.

From-SVN: r261200

Support variables in expansion of -fprofile-generate option (PR gcov-profile/47618).

2018-06-05  Martin Liska  <mliska@suse.cz>

PR gcov-profile/47618
* doc/invoke.texi: Document how -fprofile-dir format
        is extended.
2018-06-05  Martin Liska  <mliska@suse.cz>

PR gcov-profile/47618
* libgcov-driver-system.c (replace_filename_variables): New
        function.
(gcov_exit_open_gcda_file): Use it.

From-SVN: r261199

PR c++/85731 - wrong error with qualified-id in template.

* semantics.c (finish_qualified_id_expr): build_qualified_name
for unbound names in the current class.

From-SVN: r261196

tree-cfgcleanup.c (cleanup_control_flow_pre): For edge removal pretend DOM info isn't available so we do not update it and...

2018-06-05  Richard Biener  <rguenther@suse.de>

* tree-cfgcleanup.c (cleanup_control_flow_pre): For edge
removal pretend DOM info isn't available so we do not update
it and only remove edges, not dominated blocks.  Actually free
DOM info in case we removed something.  Remove unreachable blocks.
(mfb_keep_latches): Work with either DOM info or marked backedges.
(cleanup_tree_cfg_noloop): Do not remove unreachable blocks
first.  Mark backedges if DOM info isn't available.
(Re-)compute DOM info after cleanup_control_flow_pre.

From-SVN: r261195

tree-cfg.c (struct locus_discrim_map): Store line, not location.

2018-06-05  Richard Biener  <rguenther@suse.de>

* tree-cfg.c (struct locus_discrim_map): Store line, not location.
(locus_discrim_hasher::hash): Adjust.
(locus_discrim_hasher::equal): Likewise.
(next_discriminator_for_locus): Work on line directly.
(same_line_p): Pass in expanded locus1 as well.
(assign_discriminators): Avoid redundant location expansions.

From-SVN: r261194

re PR c/86046 (ICE in execute_todo, at passes.c:2043)

2018-06-05  Richard Biener  <rguenther@suse.de>

PR tree-optimization/86046
* tree-ssa.c (maybe_optimize_var): Clear DECL_GIMPLE_REG_P
if required after clearing TREE_ADDRESSABLE.

* gcc.dg/pr86046.c: New testcase.

From-SVN: r261193

re PR tree-optimization/86047 (ICE in for_each_index, at tree-ssa-loop.c:647)

2018-06-05  Richard Biener  <rguenther@suse.de>

PR tree-optimization/86047
* tree-ssa-loop.c (for_each_index): Glob handling of all
decls and constants and really handle all of them.

* gcc.dg/pr86047.c: New testcase.

From-SVN: r261192

[arm] PR target/81497: Fix arm_acle.h for C++

When trying to compile something with arm_acle.h using G++ we get a number of nasty errors:
arm_acle.h:48:49: error: invalid conversion from ‘const void*’ to ‘const int*’ [-fpermissive]
    return __builtin_arm_ldc (__coproc, __CRd, __p);

This is because the intrinsics that are supposed to be void return the "result" of their builtin,
which is void. C lets that slide but C++ complains.

After fixing that we run into further errors:
arm_acle.h:48:46: error: invalid conversion from 'const void*' to 'const int*' [-fpermissive]
    return __builtin_arm_ldc (__coproc, __CRd, __p);
                                               ^~~
Because the pointer arguments in these intrinsics are void pointers but the builtin
expects int pointers. So this patch introduces new qualifiers for void pointers and their
const-qualified versions and uses that in the specification of these intrinsics.

This gives us the opportunity of creating an arm subdirectory in g++.dg and inaugurates it
with the first arm-specific C++ tests (in that directory).

PR target/81497
* config/arm/arm-builtins.c (arm_type_qualifiers): Add
qualifier_void_pointer and qualifier_const_void_pointer.
(arm_ldc_qualifiers, arm_stc_qualifiers): Use the above.
(arm_init_builtins): Handle the above.
* config/arm/arm_acle.h (__arm_cdp, __arm_ldc, __arm_ldcl, __arm_stc,
__arm_stcl, __arm_mcr, __arm_cdp2, __arm_ldc2, __arm_ldcl2, __arm_stc2,
__arm_stcl2,__arm_mcr2, __arm_mcrr, __arm_mcrr2): Remove return for
void intrinsics.

* g++.target/arm/arm.exp: New file.
* g++.target/arm/pr81497.C: Likewise.

From-SVN: r261191

Simplify gcov_histogram as it's used only for ARCS counters.

2018-06-05  Martin Liska  <mliska@suse.cz>

* auto-profile.c (read_autofdo_file): Do not use
gcov_ctr_summary struct.
(afdo_callsite_hot_enough_for_early_inline): Likewise.
* coverage.c (struct counts_entry): Likewise.
(read_counts_file): Read just single summary entry.
(get_coverage_counts): Use gcov_summary struct.
* coverage.h (get_coverage_counts): Likewise.
* gcov-dump.c (dump_working_sets): Likewise.
(tag_summary): Dump just single summary.
* gcov-io.c (gcov_write_summary): Write just histogram
summary.
(gcov_read_summary): Read just single summary.
(compute_working_sets): Use gcov_summary struct.
* gcov-io.h (GCOV_TAG_SUMMARY_LENGTH): Remove usage
of GCOV_COUNTERS_SUMMABLE.
(GCOV_COUNTERS_SUMMABLE): Remove.
(GCOV_FIRST_VALUE_COUNTER): Replace with
GCOV_COUNTER_V_INTERVAL.
(struct gcov_ctr_summary): Remove.
(struct gcov_summary): Directly use fields of former
gcov_ctr_summary.
(compute_working_sets): Use gcov_summary struct.
* gcov.c (read_count_file): Do not use ctrs fields.
* lto-cgraph.c (merge_profile_summaries): Use gcov_summary
struct.
* lto-streamer.h (struct GTY): Make profile_info gcov_summary
struct.
* profile.c: Likewise.
* profile.h: Likewise.
2018-06-05  Martin Liska  <mliska@suse.cz>

* libgcov-driver.c (gcov_compute_histogram): Remove usage
of gcov_ctr_summary.
(compute_summary): Do it just for a single summary.
(merge_one_data): Likewise.
(merge_summary): Simplify as we read just single summary.
(dump_one_gcov): Pass proper argument.
* libgcov-util.c (compute_one_gcov): Simplify as we have just
single summary.
(gcov_info_count_all_cold): Likewise.
(calculate_overlap): Likewise.

From-SVN: r261189

Print working directory only in intermediate format (PR gcov-profile/84846).

2018-06-05  Martin Liska  <mliska@suse.cz>

PR gcov-profile/84846
* gcov.c (output_lines): Print working directory only
in intermediate format.

From-SVN: r261188

* include/std/type_traits: Fix comment typos.

From-SVN: r261186

Mark some Filesystem tests as XFAIL for mingw

Symlinks are not supported on mingw.

* testsuite/27_io/filesystem/operations/read_symlink.cc: XFAIL for
mingw* targets.
* testsuite/27_io/filesystem/operations/symlink_status.cc: Likewise.
* testsuite/experimental/filesystem/operations/read_symlink.cc:
Likewise.

From-SVN: r261185

S/390: Fix __builtin_tbeginc signature

The builtin was accidentally defined to have an integer return value.
Fixed with the attached patch.

gcc/ChangeLog:

2018-06-05  Andreas Krebbel  <krebbel@linux.ibm.com>

* config/s390/s390-builtin-types.def: Add void function type.
* config/s390/s390-builtins.def: Use the function type for the
tbeginc builtin.

gcc/testsuite/ChangeLog:

2018-06-05  Andreas Krebbel  <krebbel@linux.ibm.com>

* gcc.target/s390/htm-builtins-compile-4.c: New test.

From-SVN: r261183

2018-06-05  François Dumont  <fdumont@gcc.gnu.org>

* include/bits/stl_tempbuf.h
(_Temporary_buffer(_FwdIte, _FwdIte)): Delete, replaced by...
(_Temporary_buffer(_FwdIte, size_type)): ...this, new.
* include/ext/memory (temporary_buffer<>(_FwdIte, _FwdIte)): Adapt.
* include/bits/stl_algo.h (__stable_partition): Adapt.
(__inplace_merge): Adapt.
(__stable_sort): Adapt.

From-SVN: r261181

Daily bump.

From-SVN: r261180

RISC-V: Don't clobber retval when __builtin_eh_return called.

gcc/
* config/riscv/riscv-protos.h (riscv_expand_epilogue): Change bool arg
to int.
* config/riscv/riscv.c (riscv_for_each_saved_reg): New args epilogue
and maybe_eh_return.  Change regno to unsigned int.  Use new args to
handle EH_RETURN_DATA_REGNO registers properly.
(riscv_expand_prologue): Pass new args to riscv_for_each_saved_reg.
(riscv_expand_epilogue): Update comment.  Change argument name and
type.  Update code to use new name and type.  Pass new args to
riscv_for_each_saved_reg.  Only use EH_RETURN_STACKADJ_RTX when
EXCEPTION_RETURN.
* config/riscv/riscv.md (NORMAL_RETURN): New.
(SIBCALL_RETURN, EXCEPTION_RETURN): New.
(epilogue, sibcall_epilogue): Update riscv_expand_epilogue arg.
(eh_return): Call gen_eh_return_internal and emit barrier.
(eh_return_internal): Call riscv_expand_epilogue.

From-SVN: r261176

gimple-ssa-store-merging.c (struct merged_store_group): Move up bit_insertion field and declare can_be_merged_into method.

* gimple-ssa-store-merging.c (struct merged_store_group): Move up
bit_insertion field and declare can_be_merged_into method.
(merged_store_group::can_be_merged_into): New method.
(imm_store_chain_info::coalesce_immediate): Call it to decide whether
consecutive non-overlapping stores can be merged.  Turn MEM_REF stores
into BIT_INSERT_EXPR stores if the group contains a non-MEM_REF store.

From-SVN: r261173

PR libstdc++/85930 fix misplaced alignment-specifier

PR libstdc++/85930
* include/bits/shared_ptr_base.h [!__cpp_rtti]: Include <typeinfo>
unconditionally. Remove redundant declaration.
[!__cpp_rtti] (_Sp_make_shared_tag::_S_ti): Fix location of
alignment-specifier.

From-SVN: r261172

compiler: fix crashes on cyclic var/type references

    This patch fixes type traversal to avoid compiler crashes for test
    cases where a type T includes an expression that refers back to the
    type without actually explicitly mentioning T. Examples include

      var x [uintptr(unsafe.Sizeof(&x))]byte
      var a [len(a)]int

    The fix involves expanding the set of types that the traversal code
    "remembers" (to avoid cycles) to include array types, and introducing an
    additional guard in Builtin_call_expression::do_is_constant to catch
    cyclic type constructs.

    Fixes golang/go#25299
    Fixes golang/go#25679
    Fixes golang/go#25315
    Fixes golang/go#25680

    Reviewed-on: https://go-review.googlesource.com/115796

From-SVN: r261168

Add myself as gcov maintainer.

2018-06-04  Martin Liska  <mliska@suse.cz>

* MAINTAINERS: Add myself as gcov maintainer.

From-SVN: r261167

re PR middle-end/85955 (ICE in fold_convert_loc, at fold-const.c:2408)

2018-06-04  Richard Biener  <rguenther@suse.de>

PR tree-optimization/85955
* builtins.c (fold_builtin_sincos): Convert pointers to
destination to appropriate type before dereferencing.

* gcc.dg/pr85955.c: New testcase.

From-SVN: r261165

* g++.dg/warn/string1.C: Prune extra warning with -std=c++17.

From-SVN: r261164

* es.po, fr.po: Update.

From-SVN: r261159

rs6000: Fix absif2

Without this patch absif2 always FAILs.  There is no testcase for
that, nor do we see it during bootstrap, but it is obvious.

* config/rs6000/rs6000.md (abs<mode>2 for FLOAT128): Handle IFmode.

From-SVN: r261158

Define std::fpos special members as defaulted

* include/bits/postypes.h (fpos): Define special members as defaulted.

From-SVN: r261156

PR libstdc++/85930 fix misaligned reference

PR libstdc++/85930
* include/bits/shared_ptr_base.h (_Sp_make_shared_tag::_S_ti): Align
the static variable correctly.

From-SVN: r261155

re PR fortran/85981 (ICE in gfc_trans_string_copy, at fortran/trans-expr.c:6539)

2018-06-04  Steven G. Kargl  <kargl@gcc.gnu.org>

PR fortran/85981
* resolve.c (resolve_allocate_deallocate): Check errmsg is default
character kind.

2018-06-04  Steven G. Kargl  <kargl@gcc.gnu.org>

PR fortran/85981
* gfortran.dg/allocate_alloc_opt_14.f90: New test.
* gfortran.dg/allocate_alloc_opt_1.f90: Update error string.
* gfortran.dg/allocate_stat_2.f90: Ditto.
* gfortran.dg/deallocate_alloc_opt_1.f90: Ditto.

From-SVN: r261154

[MAINTAINERS] Update email address

* MAINTAINERS: Update my email address.

From-SVN: r261153

PR c++/61806 - missed SFINAE with partial specialization.

* cp-tree.h (deferring_access_check_sentinel): Add deferring_kind
parameter to constructor.
* pt.c (instantiate_class_template_1): Enable access checking
before call to most_specialized_partial_spec.

From-SVN: r261151

Fix expand_expr_real_1 handling of BLKmode bitfield references

The handling of bitfield references in expand_expr_real_1 includes:

            machine_mode ext_mode = mode;

            if (ext_mode == BLKmode
                && ! (target != 0 && MEM_P (op0)
                      && MEM_P (target)
                      && multiple_p (bitpos, BITS_PER_UNIT)))
              ext_mode = int_mode_for_size (bitsize, 1).else_blk ();

            if (ext_mode == BLKmode)
              {
                [...]
                gcc_assert (MEM_P (op0)

Here "mode" is the TYPE_MODE of the result, so when mode == BLKmode,
the target must be a MEM if nonnull, since no other rtl objects can
have BLKmode.  But there's no guarantee that the source value op0 is also
BLKmode and thus also a MEM: we can reach the assert for any source if
the bitsize being extracted is larger than the largest integer mode
(or larger than MAX_FIXED_MODE_SIZE).

This triggered for SVE with -msve-vector-bits=512, where we could
sometimes try to extract a BLKmode value from a 512-bit vector,
and where int_mode_for_size would rightly fail for large bitsizes.

The patch reuses the existing:

/* Otherwise, if this is a constant or the object is not in memory
   and need be, put it there.  */
else if (CONSTANT_P (op0) || (!MEM_P (op0) && must_force_mem))
  {
    memloc = assign_temp (TREE_TYPE (tem), 1, 1);
    emit_move_insn (memloc, op0);
    op0 = memloc;
    clear_mem_expr = true;
  }

to handle this case.

2018-05-29  Richard Sandiford  <richard.sandiford@linaro.org>

gcc/
* expr.c (expand_expr_real_1): Force the operand into memory if
its TYPE_MODE is BLKmode and if there is no integer mode for
the number of bits being extracted.

gcc/testsuite/
* gcc.target/aarch64/sve/extract_5.c: New test.

From-SVN: r261150

re PR target/85832 ([AVX512] possible shorter code when comparing with vector of zeros)

PR target/85832
PR target/86036
* config/i386/sse.md (<avx512>_eq<mode>3<mask_scalar_merge_name>_1):
Use vptestnm rather than vptestm in (=Yc,v,C) variant.

* gcc.target/i386/avx512f-pr85832.c: Expect vptestnm rather than
vptestm.
* gcc.target/i386/avx512vl-pr85832.c: Likewise.
* gcc.target/i386/avx512vlbw-pr85832.c: Likewise.
* gcc.target/i386/avx512bw-pr85832.c: Likewise.
* gcc.target/i386/avx512bw-pr86036.c: New test.

From-SVN: r261148

PR c++/85765 - SFINAE and non-type default template arg.

* pt.c (type_unification_real): Do full semantic processing if
substituting a partial args list replaces all template parms.

From-SVN: r261146

tree-cfgcleanup.c (cleanup_tree_cfg_1): Fold into...

2018-06-04  Richard Biener  <rguenther@suse.de>

* tree-cfgcleanup.c (cleanup_tree_cfg_1): Fold into...
(cleanup_tree_cfg_noloop): ... single caller.  Do
start_recording_case_labels later.

From-SVN: r261145

cldemoteintrin.h: Change define from _X86INTRIN_H_INCLUDED to _IMMINTRIN_H_INCLUDED.

2018-06-04  Sebastian Peryt  <sebastian.peryt@intel.com>

        * config/i386/cldemoteintrin.h: Change define from _X86INTRIN_H_INCLUDED
        to _IMMINTRIN_H_INCLUDED.
        * config/i386/pconfigintrin.h: Ditto.
        * config/i386/waitpkgintrin.h: Ditto.
        * config/i386/immintrin.h: Add includes for sgxintrin.h,
        pconfigintrin.h, waitpkgintrin.h and cldemoteintrin.h.
        * config/i386/x86intrin.h: Remove includes for mintrin.h, xmmintrin.h,
        emmintrin.h, pmmintrin.h, tmmintrin.h, smmintrin.h, wmmintrin.h,
        bmiintrin.h, bmi2intrin.h, lzcntintrin.h, sgxintrin.h, pconfigintrin.h,
        waitpkgintrin.h and cldemoteintrin.h.

From-SVN: r261144

[MAINTAINERS] Remove redundant write-after-approval entries

2018-06-04  Tom de Vries  <tdevries@suse.de>

* MAINTAINERS: Remove write-after-approval entries for component
maintainers.

From-SVN: r261143

re PR tree-optimization/86038 (ICE in to_reg_br_prob_base, at profile-count.h:242)

2018-06-04  Richard Biener  <rguenther@suse.de>

PR tree-optimization/86038
* tracer.c (find_best_successor): Check probability for
being initialized, bail out if not.

* gcc.dg/pr86038.c: New testcase.

From-SVN: r261142

[arm] PR target/86003 build failures with --with-cpu=xscale

The XScale cpu configuration in GCC has always been somewhat
non-conforming.  Although XScale isn't an architecture (it's simply an
implementation of ARMv5te), we do by tradition emit a specific
pre-define for it.  We achieve this effect by adding an additional
feature bit to the xscale CPU definition that isn't part of the base
architecture.

When I restructured the options last year I overlooked this oddity and
the result, of course, is that this configuration now fails to build
as intended.

What happens is that the driver (correctly) constructs an architecture
for the xscale cpu name (as armv5te) and passes it in addition to the
CPU name.  The backend code, on finding both a cpu and an architecture
specifies attempts to correlate the two and finds a difference due to
the additional feature bit and reports an inconsistency (fatally if
-werror is specified).

I think the best fix to this is to treat the xscale feature bit using
the same mechanism that we use for other 'quirks' in CPU
implementations and simply filter it out before comparing the
capabilities.  It has the additional benefit that it's also the
simplest fix.

PR target/86003
* config/arm/arm-cpus.in (ALL_QUIRKS): Add xscale feature to the list
of bits to ignore when comparing architectures.

From-SVN: r261140

re PR tree-optimization/69615 (0 to limit signed range checks don't always use unsigned compare)

PR tree-optimization/69615
* fold-const.c (merge_ranges): If range1 is - [x, x] and x is the
maximum or minimum of the type, try to merge it also as if
range1 is + [-, x - 1] or + [x + 1, -].

* gcc.dg/pr69615.c: New test.

From-SVN: r261139

re PR c++/86025 (ICE with -Wduplicated-branches and OpenMP critical)

PR c++/86025
* tree.c (inchash::add_expr): Handle IDENTIFIER_NODE.

* c-c++-common/gomp/pr86025.c: New test.

From-SVN: r261137

Daily bump.

From-SVN: r261136

* gcc.target/powerpc/altivec-7.c: Remove extra brace.

From-SVN: r261130

PR c++/85739 - ICE with pointer to member template parm.

* cvt.c (perform_qualification_conversions): Use cp_fold_convert.

From-SVN: r261129

re PR tree-optimization/86034 (wrong code for bit-field manipulation at -Os)

PR tree-optimization/86034
* gimple-ssa-store-merging.c (output_merged_store): Convert the RHS to
the unsigned bitfield type in a bit insertion sequence if it does not
have a larger precision than the bitfield size.
(process_store): Also bypass widening conversions for BIT_INSERT_EXPR.

From-SVN: r261128

re PR fortran/36497 (USE association, cray pointers and error checking)

2018-06-03  Paul Thomas  <pault@gcc.gnu.org>

PR fortran/36497
* decl.c (variable_decl): Use gfc_add_type for cray pointees.

2018-06-03  Paul Thomas  <pault@gcc.gnu.org>

PR fortran/36497
* gfortran.dg/cray_pointer_12.f90: New test.

From-SVN: r261127

re PR fortran/85938 (Spurious assert failure for matmul with reshaped array)

2018-06-02  Steven G. Kargl  <kargl@gcc.gnu.org>

PR fortran/85938
* gfortran.dg/pr85938.f90: Fixed by revision r261081

From-SVN: r261125

[NDS32] Implement peephole2 patterns for tuning code size.

gcc/
* config/nds32/nds32-peephole2.md: Add new patterns for code size.

From-SVN: r261124

[NDS32] Add -march=v3j.

gcc/
* config/nds32/nds32-opts.h (nds32_arch_type): Add ARCH_V3J.
* config/nds32/nds32.c (nds32_option_override): Consider ARCH_V3J.
* config/nds32/nds32.h (TARGET_ISA_V3): Add ARCH_V3J checking.
* config/nds32/nds32.opt (march): Add enum value Value(ARCH_V3J).

From-SVN: r261123

[NDS32] Disable -fdelete-null-pointer-checks by default for nds32*-*-elf.

gcc/
* common/config/nds32/nds32-common.c (nds32_option_optimization_table):
Disable -fdelete-null-pointer-checks for ELF toolchain.

From-SVN: r261122

PR c++/85761 - ICE with ill-formed use of const outer variable.

* expr.c (mark_use): Handle location wrappers.

From-SVN: r261121

Daily bump.

From-SVN: r261120

[NDS32] Support Linux target for nds32.

gcc/
* config.gcc (nds32*): Use nds32-linux.opt and nds32-elf.opt.
(nds32le-*-*, nds32be-*-*): Integrate checking process.
(nds32*-*-*): Add glibc and uclibc conditions.
* common/config/nds32/nds32-common.c (nds32_except_unwind_info): New.
(TARGET_EXCEPT_UNWIND_INFO): Define.
* config/nds32/elf.h: New file.
* config/nds32/linux.h: New file.
* config/nds32/nds32-elf.opt: New file.
* config/nds32/nds32-linux.opt: New file.
* config/nds32/nds32-fp-as-gp.c
(pass_nds32_fp_as_gp::gate): Consider TARGET_LINUX_ABI.
* config/nds32/nds32.c (nds32_conditional_register_usage): Consider
TARGET_LINUX_ABI.
(nds32_asm_file_end): Ditto.
(nds32_print_operand): Ditto.
(nds32_insert_attributes): Ditto.
(nds32_init_libfuncs): New function.
(TARGET_HAVE_TLS): Define.
(TARGET_INIT_LIBFUNCS): Define.
* config/nds32/nds32.h (TARGET_DEFAULT_RELAX): Apply different relax
spec content.
(TARGET_ELF): Apply different mcmodel setting.
(LINK_SPEC, LIB_SPEC, STARTFILE_SPEC, ENDFILE_SPEC): The content has
been migrated into elf.h and linux.h files.
* config/nds32/nds32.md (add_pc): Consider TARGET_LINUX_ABI.
* config/nds32/nds32.opt (mvh): Consider TARGET_LINUX_ABI.
(mcmodel): The content has been migrated into nds32-elf.opt and
nds32-linux.opt files.
* config/nds32/t-elf: New file.
* config/nds32/t-linux: New file.

libgcc/
* config.host (nds32*-linux*): New.
* config/nds32/linux-atomic.c: New file.
* config/nds32/linux-unwind.h: New file.

Co-Authored-By: Kito Cheng <kito.cheng@gmail.com>
Co-Authored-By: Monk Chiang <sh.chiang04@gmail.com>
From-SVN: r261116

[NDS32] Implement fp-as-gp optimization.

gcc/
* config/nds32/constants.md (unspec_volatile_element): Add
UNSPEC_VOLATILE_OMIT_FP_BEGIN and UNSPEC_VOLATILE_OMIT_FP_END.
* config/nds32/nds32-fp-as-gp.c: New implementation of fp_as_gp
optimization.
* config/nds32/nds32-protos.h (nds32_naked_function_p): Declare.
(make_pass_nds32_fp_as_gp): Declare.
* config/nds32/nds32.c (nds32_register_passes): Add fp_as_gp as one
optmization pass.
(nds32_asm_function_end_prologue): Remove unused asm output.
(nds32_asm_function_begin_epilogue): Remove unused asm output.
(nds32_asm_file_start): Output necessary fp_as_gp information.
(nds32_option_override): Adjust register usage.
(nds32_expand_prologue): Consider fp_as_gp situation.
(nds32_expand_prologue_v3push): Consider fp_as_gp situation.
* config/nds32/nds32.md (prologue): Check fp_as_gp_p and naked_p.
(epilogue): Ditto.
(return): Ditto.
(simple_return): Ditto.
(omit_fp_begin): Output special directive for fp_as_gp.
(omit_fp_end): Output special directive for fp_as_gp.
* config/nds32/nds32.opt (mfp-as-gp, mno-fp-as-gp, mforce-fp-as-gp,
mforbid-fp-as-gp): New options.

Co-Authored-By: Shiva Chen <shiva0217@gmail.com>
From-SVN: r261115

decl.c (gnat_to_gnu_entity): If this is not a definition...

* gcc-interface/decl.c (gnat_to_gnu_entity) <E_Constant>: If this is
not a definition, retrieve the expression only if it's a compile-time
known value if we are just annotating types.

* gcc-interface/utils.c (convert): Do not try to upcast properly for a
conversion between tagged types in type_annotate_only mode.

From-SVN: r261113

Add missing directive

From-SVN: r261109

ada-tree.h (TYPE_PADDING_FOR_COMPONENT): New macro.

* gcc-interface/ada-tree.h (TYPE_PADDING_FOR_COMPONENT): New macro.
* gcc-interface/decl.c (gnat_to_gnu_component_type): Cache the padding
type built for an aliased component with variable size.

From-SVN: r261106

discr53.ad[sb]: New test.

* gnat.dg/discr53.ad[sb]: New test.
* gnat.dg/discr53_pkg.ads: New helper.

From-SVN: r261102

PR c++/85764 - bogus 'this' not captured error.

* lambda.c (resolvable_dummy_lambda): Use nonlambda_method_basetype.
(nonlambda_method_basetype): Handle NSDMI.

From-SVN: r261101

* g++.dg/cpp1z/feat-cxx1z.C: Update __cpp_deduction_guides.

From-SVN: r261100

Commit 260294 on 2018-05-16 by Carl Love was supposed to add the following files.

gcc/testsuite/ChangeLog:

2018-06-01  Carl Love  <cel@us.ibm.com>

Commit 260294 on 2018-05-16 by Carl Love was supposed to add the
following files.

* gcc.target/powerpc/vsx-vector-6-be.p7.c: New test file.
* gcc.target/powerpc/vsx-vector-6-be.p8.c: New test file.

From-SVN: r261098

altivec-12.c (main): Fix declaration of ucz to make it consistent with the naming convention in the file.

gcc/testsuite/ChangeLog:

2018-06-01  Carl Love  <cel@us.ibm.com>

* gcc.target/powerpc/altivec-12.c (main): Fix declaration of ucz
to make it consistent with the naming convention in the file.
* gcc.target/powerpc/altivec-7-be.c: Move BE specific checks
to altivec-7.c.  Delete file.
* gcc.target/powerpc/altivec-7-le.c: Move LE specific checks
to altivec-7.c.  Delete file.
* gcc.target/powerpc/altivec-7.h: Move to altivec-7.c.
* gcc.target/powerpc/altivec-7.c (main): Add vec_unpackh and
vec_unpackl tests.  Update instruction counts.
* gcc.target/powerpc/builtins-1-le.c: Move LE specific checks to
tests to builtins-1.c.
* gcc.target/powerpc/builtins-1-be.c: Move BE specific
tests to builtins-1.c.
* gcc.target/powerpc/builtins-1.h: Move to file builtins-1.c.
* gcc.target/powerpc/builtins-1.c (main): Add test case for vec_and.
vec_round, vec_rsqrt, vec_rsqrte, vec_mergee, vec_mergh, vec_mergo.
Remove vec_ctf tests returning double.  Remove vec_cts with
double args. Remove vec_sel with invalid arguments. Add tests for
vec_splat.
Add instruction counts for new tests.
* gcc.target/powerpc/builtins-3-runnable.c (main): Add test for
vec_doublee, vec_doubleo, vec_doublel, vec_doubleh, vec_signed,
vec_unsigned.
* gcc.target/powerpc/builtins-3.c: Add tests test_sll_vuill_vuill_vuc,
test_sll_vsill_vsill_vuc.
* gcc.target/powerpc/p9-xxbr-2.c (rev_bool_long_long): Added test for
vec_revb.
* gcc.target/powerpc/vsx-7.h: Rename to vsx-7.c. Remove redundant
tests from altivec-7.h.
* gcc.target/powerpc/vsx-7-be.c: Remove file.
* gcc.target/powerpc/vsx-builtin-7.c: Add test functions splat_sc_s8,
splat_uc_u8, splat_ssi_s16, splat_usi_s16, splat_si_s32, splat_ui_u32,
splat_sll, splat_uc, splat_int128, splat_uint128.
Make second argument of vec_extract and vec_insert a signed int.
* gcc.target/powerpc/vsx-vector-5.c (vrint): Add vrint test for float
argument.

From-SVN: r261097

Daily bump.

From-SVN: r261096

DWARF5: Don't generate DW_AT_loclists_base for split compile unit DIEs.

The loclists_base attribute is used to point to the beginning of the
loclists index of a DWARF5 loclists table when using DW_FORM_loclistsx.
For split compile units the base is not given by the attribute, but is
either the first (and only) index in the .debug_loclists.dwo section,
or (when placed in a .dwp file) given by the DW_SECT_LOCLISTS row in
the .debug_cu_index section.

The loclists_base attribute is only valid for the full (or skeleton)
compile unit DIE in the main (relocatable) object. But GCC only ever
generates a loclists table index for the .debug_loclists section put
into the split DWARF .dwo file.

For split compile unit DIEs it is confusing (and not according to spec)
to also have a DW_AT_loclists_base attribute (which might be wrong,
since its relocatable offset won't actually be relocated).

gcc/ChangeLog

* dwarf2out.c (dwarf2out_finish): Remove generation of
DW_AT_loclists_base.

From-SVN: r261092

* c-cppbuiltin.c (c_cpp_builtins): Bump __cpp_deduction_guides to 201703.

From-SVN: r261090

gimple-ssa-store-merging.c: Include gimple-fold.h.

* gimple-ssa-store-merging.c: Include gimple-fold.h.
(struct store_immediate_info): Document BIT_INSERT_EXPR stores.
(struct merged_store_group): Add bit_insertion field.
(dump_char_array): Use standard hexadecimal format.
(merged_store_group::merged_store_group): Set bit_insertion to false.
(merged_store_group::apply_stores): Use optimal buffer size.  Deal
with BIT_INSERT_EXPR stores.  Move up code updating the mask and
also print the mask in the dump file.
(pass_store_merging::gate): Minor tweak.
(imm_store_chain_info::coalesce_immediate): Fix wrong association
of stores with groups in dump.  Allow coalescing of BIT_INSERT_EXPR
stores with INTEGER_CST stores.
(count_multiple_uses) <BIT_INSERT_EXPR>: New case.
(imm_store_chain_info::output_merged_store): Add try_bitpos variable
and use it throughout.  Generate bit insertion sequences if need be.
(pass_store_merging::process_store): Remove redundant condition.
Record stores from a SSA name to a bit-field with BIT_INSERT_EXPR.

From-SVN: r261089

altivec-35.c (foo): Add builtin test vec_madds.

gcc/testsuite/ChangeLog:

2018-06-01  Carl Love  <cel@us.ibm.com>
* gcc.target/powerpc/altivec-35.c (foo): Add builtin test vec_madds.
* gcc.target/powerpc/builtins-6-runnable.c (main): Fix typo for output.
Add vec_xst_be for signed and unsigned arguments.

From-SVN: r261088

ChangeLog tidying

From-SVN: r261087

CWG 1581: When are constexpr member functions defined?

* constexpr.c (instantiate_cx_fn_r, instantiate_constexpr_fns): New.
(cxx_eval_outermost_constant_expr): Call instantiate_constexpr_fns.

From-SVN: r261086

PR c++/58281 - explicit instantiation of constexpr

* pt.c (mark_decl_instantiated): Clear DECL_EXTERNAL.

From-SVN: r261085

* pt.c (instantiate_decl): Any defaulted function is defined.

From-SVN: r261084

MAINTAINERS (write after approval): Add myself.

  * MAINTAINERS (write after approval): Add myself.

From-SVN: r261082

re PR fortran/85816 (nested spread fails with "Integer overflow in xmallocarray")

2018-06-01  Steven G. Kargl  <kargl@gcc.gnu.org>

PR fortran/85816
PR fortran/85975
* libgfortran.h: Remove the GFC_DTYPE_COPY_SETRANK macro.
* intrinsics/reshape_generic.c: Directly assign rank.
* intrinsics/spread_generic.c: Ditto.
* m4/iforeach-s.m4: Ditto.
* m4/iforeach.m4: Ditto.
* m4/ifunction-s.m4: Ditto.
* m4/ifunction-s2.m4: Ditto.
* m4/ifunction.m4: Ditto.
* m4/ifunction_logical.m4: Ditto.
* m4/reshape.m4: Ditto.
* m4/spread.m4: Ditto.
* generated/all_l1.c: Regenerated from m4 files.
* generated/all_l16.c: Ditto.
* generated/all_l2.c: Ditto.
* generated/all_l4.c: Ditto.
* generated/all_l8.c: Ditto.
* generated/any_l1.c: Ditto.
* generated/any_l16.c: Ditto.
* generated/any_l2.c: Ditto.
* generated/any_l4.c: Ditto.
* generated/any_l8.c: Ditto.
* generated/count_16_l.c: Ditto.
* generated/count_1_l.c: Ditto.
* generated/count_2_l.c: Ditto.
* generated/count_4_l.c: Ditto.
* generated/count_8_l.c: Ditto.
* generated/iall_i1.c: Ditto.
* generated/iall_i16.c: Ditto.
* generated/iall_i2.c: Ditto.
* generated/iall_i4.c: Ditto.
* generated/iall_i8.c: Ditto.
* generated/iany_i1.c: Ditto.
* generated/iany_i16.c: Ditto.
* generated/iany_i2.c: Ditto.
* generated/iany_i4.c: Ditto.
* generated/iany_i8.c: Ditto.
* generated/iparity_i1.c: Ditto.
* generated/iparity_i16.c: Ditto.
* generated/iparity_i2.c: Ditto.
* generated/iparity_i4.c: Ditto.
* generated/iparity_i8.c: Ditto.
* generated/maxloc0_16_i1.c: Ditto.
* generated/maxloc0_16_i16.c: Ditto.
* generated/maxloc0_16_i2.c: Ditto.
* generated/maxloc0_16_i4.c: Ditto.
* generated/maxloc0_16_i8.c: Ditto.
* generated/maxloc0_16_r10.c: Ditto.
* generated/maxloc0_16_r16.c: Ditto.
* generated/maxloc0_16_r4.c: Ditto.
* generated/maxloc0_16_r8.c: Ditto.
* generated/maxloc0_16_s1.c: Ditto.
* generated/maxloc0_16_s4.c: Ditto.
* generated/maxloc0_4_i1.c: Ditto.
* generated/maxloc0_4_i16.c: Ditto.
* generated/maxloc0_4_i2.c: Ditto.
* generated/maxloc0_4_i4.c: Ditto.
* generated/maxloc0_4_i8.c: Ditto.
* generated/maxloc0_4_r10.c: Ditto.
* generated/maxloc0_4_r16.c: Ditto.
* generated/maxloc0_4_r4.c: Ditto.
* generated/maxloc0_4_r8.c: Ditto.
* generated/maxloc0_4_s1.c: Ditto.
* generated/maxloc0_4_s4.c: Ditto.
* generated/maxloc0_8_i1.c: Ditto.
* generated/maxloc0_8_i16.c: Ditto.
* generated/maxloc0_8_i2.c: Ditto.
* generated/maxloc0_8_i4.c: Ditto.
* generated/maxloc0_8_i8.c: Ditto.
* generated/maxloc0_8_r10.c: Ditto.
* generated/maxloc0_8_r16.c: Ditto.
* generated/maxloc0_8_r4.c: Ditto.
* generated/maxloc0_8_r8.c: Ditto.
* generated/maxloc0_8_s1.c: Ditto.
* generated/maxloc0_8_s4.c: Ditto.
* generated/maxloc1_16_i1.c: Ditto.
* generated/maxloc1_16_i16.c: Ditto.
* generated/maxloc1_16_i2.c: Ditto.
* generated/maxloc1_16_i4.c: Ditto.
* generated/maxloc1_16_i8.c: Ditto.
* generated/maxloc1_16_r10.c: Ditto.
* generated/maxloc1_16_r16.c: Ditto.
* generated/maxloc1_16_r4.c: Ditto.
* generated/maxloc1_16_r8.c: Ditto.
* generated/maxloc1_16_s1.c: Ditto.
* generated/maxloc1_16_s4.c: Ditto.
* generated/maxloc1_4_i1.c: Ditto.
* generated/maxloc1_4_i16.c: Ditto.
* generated/maxloc1_4_i2.c: Ditto.
* generated/maxloc1_4_i4.c: Ditto.
* generated/maxloc1_4_i8.c: Ditto.
* generated/maxloc1_4_r10.c: Ditto.
* generated/maxloc1_4_r16.c: Ditto.
* generated/maxloc1_4_r4.c: Ditto.
* generated/maxloc1_4_r8.c: Ditto.
* generated/maxloc1_4_s1.c: Ditto.
* generated/maxloc1_4_s4.c: Ditto.
* generated/maxloc1_8_i1.c: Ditto.
* generated/maxloc1_8_i16.c: Ditto.
* generated/maxloc1_8_i2.c: Ditto.
* generated/maxloc1_8_i4.c: Ditto.
* generated/maxloc1_8_i8.c: Ditto.
* generated/maxloc1_8_r10.c: Ditto.
* generated/maxloc1_8_r16.c: Ditto.
* generated/maxloc1_8_r4.c: Ditto.
* generated/maxloc1_8_r8.c: Ditto.
* generated/maxloc1_8_s1.c: Ditto.
* generated/maxloc1_8_s4.c: Ditto.
* generated/maxval1_s1.c: Ditto.
* generated/maxval1_s4.c: Ditto.
* generated/maxval_i1.c: Ditto.
* generated/maxval_i16.c: Ditto.
* generated/maxval_i2.c: Ditto.
* generated/maxval_i4.c: Ditto.
* generated/maxval_i8.c: Ditto.
* generated/maxval_r10.c: Ditto.
* generated/maxval_r16.c: Ditto.
* generated/maxval_r4.c: Ditto.
* generated/maxval_r8.c: Ditto.
* generated/minloc0_16_i1.c: Ditto.
* generated/minloc0_16_i16.c: Ditto.
* generated/minloc0_16_i2.c: Ditto.
* generated/minloc0_16_i4.c: Ditto.
* generated/minloc0_16_i8.c: Ditto.
* generated/minloc0_16_r10.c: Ditto.
* generated/minloc0_16_r16.c: Ditto.
* generated/minloc0_16_r4.c: Ditto.
* generated/minloc0_16_r8.c: Ditto.
* generated/minloc0_16_s1.c: Ditto.
* generated/minloc0_16_s4.c: Ditto.
* generated/minloc0_4_i1.c: Ditto.
* generated/minloc0_4_i16.c: Ditto.
* generated/minloc0_4_i2.c: Ditto.
* generated/minloc0_4_i4.c: Ditto.
* generated/minloc0_4_i8.c: Ditto.
* generated/minloc0_4_r10.c: Ditto.
* generated/minloc0_4_r16.c: Ditto.
* generated/minloc0_4_r4.c: Ditto.
* generated/minloc0_4_r8.c: Ditto.
* generated/minloc0_4_s1.c: Ditto.
* generated/minloc0_4_s4.c: Ditto.
* generated/minloc0_8_i1.c: Ditto.
* generated/minloc0_8_i16.c: Ditto.
* generated/minloc0_8_i2.c: Ditto.
* generated/minloc0_8_i4.c: Ditto.
* generated/minloc0_8_i8.c: Ditto.
* generated/minloc0_8_r10.c: Ditto.
* generated/minloc0_8_r16.c: Ditto.
* generated/minloc0_8_r4.c: Ditto.
* generated/minloc0_8_r8.c: Ditto.
* generated/minloc0_8_s1.c: Ditto.
* generated/minloc0_8_s4.c: Ditto.
* generated/minloc1_16_i1.c: Ditto.
* generated/minloc1_16_i16.c: Ditto.
* generated/minloc1_16_i2.c: Ditto.
* generated/minloc1_16_i4.c: Ditto.
* generated/minloc1_16_i8.c: Ditto.
* generated/minloc1_16_r10.c: Ditto.
* generated/minloc1_16_r16.c: Ditto.
* generated/minloc1_16_r4.c: Ditto.
* generated/minloc1_16_r8.c: Ditto.
* generated/minloc1_16_s1.c: Ditto.
* generated/minloc1_16_s4.c: Ditto.
* generated/minloc1_4_i1.c: Ditto.
* generated/minloc1_4_i16.c: Ditto.
* generated/minloc1_4_i2.c: Ditto.
* generated/minloc1_4_i4.c: Ditto.
* generated/minloc1_4_i8.c: Ditto.
* generated/minloc1_4_r10.c: Ditto.
* generated/minloc1_4_r16.c: Ditto.
* generated/minloc1_4_r4.c: Ditto.
* generated/minloc1_4_r8.c: Ditto.
* generated/minloc1_4_s1.c: Ditto.
* generated/minloc1_4_s4.c: Ditto.
* generated/minloc1_8_i1.c: Ditto.
* generated/minloc1_8_i16.c: Ditto.
* generated/minloc1_8_i2.c: Ditto.
* generated/minloc1_8_i4.c: Ditto.
* generated/minloc1_8_i8.c: Ditto.
* generated/minloc1_8_r10.c: Ditto.
* generated/minloc1_8_r16.c: Ditto.
* generated/minloc1_8_r4.c: Ditto.
* generated/minloc1_8_r8.c: Ditto.
* generated/minloc1_8_s1.c: Ditto.
* generated/minloc1_8_s4.c: Ditto.
* generated/minval1_s1.c: Ditto.
* generated/minval1_s4.c: Ditto.
* generated/minval_i1.c: Ditto.
* generated/minval_i16.c: Ditto.
* generated/minval_i2.c: Ditto.
* generated/minval_i4.c: Ditto.
* generated/minval_i8.c: Ditto.
* generated/minval_r10.c: Ditto.
* generated/minval_r16.c: Ditto.
* generated/minval_r4.c: Ditto.
* generated/minval_r8.c: Ditto.
* generated/norm2_r10.c: Ditto.
* generated/norm2_r16.c: Ditto.
* generated/norm2_r4.c: Ditto.
* generated/norm2_r8.c: Ditto.
* generated/parity_l1.c: Ditto.
* generated/parity_l16.c: Ditto.
* generated/parity_l2.c: Ditto.
* generated/parity_l4.c: Ditto.
* generated/parity_l8.c: Ditto.
* generated/product_c10.c: Ditto.
* generated/product_c16.c: Ditto.
* generated/product_c4.c: Ditto.
* generated/product_c8.c: Ditto.
* generated/product_i1.c: Ditto.
* generated/product_i16.c: Ditto.
* generated/product_i2.c: Ditto.
* generated/product_i4.c: Ditto.
* generated/product_i8.c: Ditto.
* generated/product_r10.c: Ditto.
* generated/product_r16.c: Ditto.
* generated/product_r4.c: Ditto.
* generated/product_r8.c: Ditto.
* generated/reshape_c10.c: Ditto.
* generated/reshape_c16.c: Ditto.
* generated/reshape_c4.c: Ditto.
* generated/reshape_c8.c: Ditto.
* generated/reshape_i16.c: Ditto.
* generated/reshape_i4.c: Ditto.
* generated/reshape_i8.c: Ditto.
* generated/reshape_r10.c: Ditto.
* generated/reshape_r16.c: Ditto.
* generated/reshape_r4.c: Ditto.
* generated/reshape_r8.c: Ditto.
* generated/spread_c10.c: Ditto.
* generated/spread_c16.c: Ditto.
* generated/spread_c4.c: Ditto.
* generated/spread_c8.c: Ditto.
* generated/spread_i1.c: Ditto.
* generated/spread_i16.c: Ditto.
* generated/spread_i2.c: Ditto.
* generated/spread_i4.c: Ditto.
* generated/spread_i8.c: Ditto.
* generated/spread_r10.c: Ditto.
* generated/spread_r16.c: Ditto.
* generated/spread_r4.c: Ditto.
* generated/spread_r8.c: Ditto.
* generated/sum_c10.c: Ditto.
* generated/sum_c16.c: Ditto.
* generated/sum_c4.c: Ditto.
* generated/sum_c8.c: Ditto.
* generated/sum_i1.c: Ditto.
* generated/sum_i16.c: Ditto.
* generated/sum_i2.c: Ditto.
* generated/sum_i4.c: Ditto.
* generated/sum_i8.c: Ditto.
* generated/sum_r10.c: Ditto.
* generated/sum_r16.c: Ditto.
* generated/sum_r4.c: Ditto.
* generated/sum_r8.c: Ditto.

2018-06-01  Steven G. Kargl  <kargl@gcc.gnu.org>

PR fortran/85816
PR fortran/85975
* gfortran.dg/pr85816.f90: New test.
* gfortran.dg/pr85975.f90: New test.

From-SVN: r261081

* Fix email address in ChangeLog.

From-SVN: r261080