platform/upstream/llvm.git
3 years ago[OpenMP] Add documentation for error messages and release notes
Joseph Huber [Wed, 13 Jan 2021 00:19:39 +0000 (19:19 -0500)]
[OpenMP] Add documentation for error messages and release notes

Add extra information to the runtime page describing the error messages and add information to the release notes for clang 12.0

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D94562

3 years ago[Frontend] Add pragma align natural and sort out pragma pack stack effect
Xiangling Liao [Wed, 13 Jan 2021 14:49:19 +0000 (09:49 -0500)]
[Frontend] Add pragma align natural and sort out pragma pack stack effect

- Implemente the natural align for XL on AIX
- Sort out pragma pack stack effect
- Add -fxl-pragma-stack option to enable XL on AIX pragma stack effect

Differential Revision: https://reviews.llvm.org/D87702

3 years ago[lld][WebAssembly] Fix for TLS + --relocatable
Sam Clegg [Fri, 18 Dec 2020 18:02:29 +0000 (10:02 -0800)]
[lld][WebAssembly] Fix for TLS + --relocatable

When running in `-r/--relocatable` we output relocations but the
new TLS relocations type was missing from `ObjFile::calcNewAddend`
causing this combination of inputs/flags to crash the linker.

Also avoid creating tls variables in relocatable mode.  These variables
are only needed when linking final executables.

Fixes: https://github.com/emscripten-core/emscripten/issues/12934
Fixes: PR48506

Differential Revision: https://reviews.llvm.org/D93554

3 years ago[AArch64][GlobalISel] Add support for FCONSTANT of FP128 type
Muhammad Asif Manzoor [Wed, 13 Jan 2021 15:44:49 +0000 (10:44 -0500)]
[AArch64][GlobalISel] Add support for FCONSTANT of FP128 type

Add support for G_FCONSTANT of FP128 (Quadruple precision) type.
It replaces the constant by emitting a load with a constant pool entry.

Reviewed By: aemerson

Differential Revision: https://reviews.llvm.org/D94437

3 years ago[NFC][RISCV] Add double type in RISC-V V CodeGen test cases for RV32.
Hsiangkai Wang [Wed, 13 Jan 2021 08:42:48 +0000 (16:42 +0800)]
[NFC][RISCV] Add double type in RISC-V V CodeGen test cases for RV32.

Differential Revision: https://reviews.llvm.org/D94584

3 years agoGlobalISel: Do not set observer of MachineIRBuilder in LegalizerHelper
Matt Arsenault [Wed, 19 Aug 2020 14:46:59 +0000 (10:46 -0400)]
GlobalISel: Do not set observer of MachineIRBuilder in LegalizerHelper

This fixes double printing of insertion debug messages in the
legalizer.

Try to cleanup usage of observers. Currently the use of observers is
pretty hard to follow and it's not clear what is responsible for
them. Observers are referenced in 3 places:

1. In the MachineFunction
2. In the MachineIRBuilder
3. In the LegalizerHelper

The observers in the MachineFunction and MachineIRBuilder are both
called only on insertions, and are redundant with each other. The
source of the double printing was the same observer was added to both
the MachineFunction, and the MachineIRBuilder. One of these references
needs to be removed. Arguably observers in general should be fully
removed from one or the other, but it may be useful to have a local
observer in the MachineIRBuilder that is not added to the function's
observers. Alternatively, the wrapper observer could manage a local
observer in one place.

The LegalizerHelper only ever calls the observer on changing/changed
instructions, and never insertions. Logically these are two different
types of observers, for changes and for insertions.

Additionally, some places used the GISelObserverWrapper when they only
needed a single observer they could use directly.

Setting the observer in the LegalizerHelper constructor is not
flexible enough if the LegalizerHelper is constructed anywhere outside
the one used by the legalizer. AMDGPU calls the LegalizerHelper in
RegBankSelect, and needs to use a local observer to apply the regbank
to newly created instructions. Currently it accomplishes this by
constructing a local MachineIRBuilder. I'm trying to move the
MachineIRBuilder to be owned/maintained by the RegBankSelect pass
itself, but the locally constructed LegalizerHelper would reset the
observer.

Mips also has a special case use of the LegalizationArtifactCombiner
in applyMappingImpl; I think we do need to run the artifact combiner
during RegBankSelect, but in a more consistent way outside of
applyMappingImpl.

3 years ago[AArch64] Attempt to sink mul operands
Nicholas Guy [Wed, 2 Dec 2020 15:16:06 +0000 (15:16 +0000)]
[AArch64] Attempt to sink mul operands

Following on from D91255, this patch is responsible for sinking relevant mul
operands to the same block so that umull/smull instructions can be correctly
generated by the mul combine implemented in the aforementioned patch.

Differential revision: https://reviews.llvm.org/D91271

3 years ago[clangd] Split out a base class for delegating GlobalCompilationDatabases. NFC
Sam McCall [Wed, 13 Jan 2021 14:43:54 +0000 (15:43 +0100)]
[clangd] Split out a base class for delegating GlobalCompilationDatabases. NFC

This prepares for adding another delegatable method (blockUntilIdle) to GCDB.

3 years ago[mlir][linalg] Use attributes in named ops' indexing maps
Lei Zhang [Wed, 13 Jan 2021 15:04:40 +0000 (10:04 -0500)]
[mlir][linalg] Use attributes in named ops' indexing maps

This commit adds support for parsing attribute uses in indexing
maps. These attribute uses are represented as affine symbols in
the resultant indexing maps because we can only know their
concrete value (which are coming from op attributes and are
constants) for specific op instances. The `indxing_maps()`
calls are synthesized to read these attributes and create affine
constants to replace the placeholder affine symbols and simplify.

Depends on D94240

Reviewed By: nicolasvasilache

Differential Revision: https://reviews.llvm.org/D94335

3 years ago[X86] Add tests for rv_marker lowering.
Florian Hahn [Wed, 13 Jan 2021 13:35:04 +0000 (13:35 +0000)]
[X86] Add tests for rv_marker lowering.

Precommit tests for D94597.

3 years ago[OpenCL] Improve OpenCL operator tests
Sven van Haastregt [Wed, 13 Jan 2021 14:50:49 +0000 (14:50 +0000)]
[OpenCL] Improve OpenCL operator tests

Extend testing of increment/decrement operators and make sure these
operators are tested in only one dedicated test file.

Rename logical-ops.cl to operators.cl, as it was already containing
more than just logical operators.

Add testing for the remainder operator on floating point types.

3 years ago[libc] Refresh benchmark progress bar when needed.
Guillaume Chatelet [Wed, 13 Jan 2021 14:06:36 +0000 (14:06 +0000)]
[libc] Refresh benchmark progress bar when needed.

3 years ago[X86] canonicalizeShuffleMaskWithHorizOp - minor refactor to support multiple src...
Simon Pilgrim [Wed, 13 Jan 2021 13:22:14 +0000 (13:22 +0000)]
[X86] canonicalizeShuffleMaskWithHorizOp - minor refactor to support multiple src ops. NFCI.

canonicalizeShuffleMaskWithHorizOp currently only supports shuffles with 1 or 2 sources, but PR41813 will require us to support higher numbers of sources.

This patch just generalizes the initial setup stages to ensure all src ops are the same type and opcode and then will continue to early out if we have more than 2 sources.

3 years ago[Tests] Added test for memcpy loop idiom recognization
Dávid Bolvanský [Wed, 13 Jan 2021 13:55:04 +0000 (14:55 +0100)]
[Tests] Added test for memcpy loop idiom recognization

3 years agoRevert "Hwasan InitPrctl check for error using internal_iserror"
Nico Weber [Wed, 13 Jan 2021 13:30:11 +0000 (08:30 -0500)]
Revert "Hwasan InitPrctl check for error using internal_iserror"

This reverts commit 1854594b80b444dc21b830b51e53e05d38fc7d60.
See https://reviews.llvm.org/D94425#2495621

3 years ago[ValueTracking] Fix one s/dyn_cast/dyn_cast_or_null/
Markus Lavin [Wed, 13 Jan 2021 12:25:14 +0000 (13:25 +0100)]
[ValueTracking] Fix one s/dyn_cast/dyn_cast_or_null/

Handle if Constant::getAggregateElement() returns nullptr in
canCreateUndefOrPoison().

Differential Revision: https://reviews.llvm.org/D94494

3 years ago[SVE][CodeGen] CTLZ, CTTZ & CTPOP operations (predicates)
Kerry McLaughlin [Wed, 13 Jan 2021 11:21:44 +0000 (11:21 +0000)]
[SVE][CodeGen] CTLZ, CTTZ & CTPOP operations (predicates)

Canonicalise the following operations in getNode() for predicate types:
 - CTLZ(Pred)  -> bitwise_NOT(Pred)
 - CTTZ(Pred)  -> bitwise_NOT(Pred)
 - CTPOP(Pred) -> Pred

Reviewed By: david-arm

Differential Revision: https://reviews.llvm.org/D94428

3 years agoRevert "[dsymutil] Warn on timestmap mismatch between object file and debug map"
David Zarzycki [Wed, 13 Jan 2021 12:22:09 +0000 (07:22 -0500)]
Revert "[dsymutil] Warn on timestmap mismatch between object file and debug map"

This reverts commit e5553b9a6ab9f02f382a31cc5117b52c3bfaf77a.

Tests are not allowed to modify the source. Please figure out a way to
use %t rather than dynamically modifying the inputs.

3 years agoFix build errors after ceb9379a9
Nathan James [Wed, 13 Jan 2021 12:19:42 +0000 (12:19 +0000)]
Fix build errors after ceb9379a9

For some reason some builds dont like the arrow operator access. using the deref then access should fix the issue.

/home/buildbots/ppc64le-flang-mlir-rhel-test/ppc64le-flang-rhel-clang-build/llvm-project/llvm/include/llvm/ADT/iterator.h:171:34: error: taking the address of a temporary object of type 'llvm::StringRef' [-Waddress-of-temporary]
  PointerT operator->() { return &static_cast<DerivedT *>(this)->operator*(); }
                                 ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
/home/buildbots/ppc64le-flang-mlir-rhel-test/ppc64le-flang-rhel-clang-build/llvm-project/llvm/include/llvm/ADT/StringExtras.h:387:13: note: in instantiation of member function 'llvm::iterator_facade_base<llvm::mapped_iterator<mlir::tblgen::TypeParameter *, (lambda at /home/buildbots/ppc64le-flang-mlir-rhel-test/ppc64le-flang-rhel-clang-build/llvm-project/mlir/tools/mlir-tblgen/TypeDefGen.cpp:414:19), llvm::StringRef>, std::random_access_iterator_tag, llvm::StringRef, long, llvm::StringRef *, llvm::StringRef &>::operator->' requested here
    Len += I->size();

3 years ago[LTO] Add test to ensure objc-arc-contract is executed.
Florian Hahn [Wed, 13 Jan 2021 12:00:18 +0000 (12:00 +0000)]
[LTO] Add test to ensure objc-arc-contract is executed.

This test adds additional test coverage for upcoming refactorings.

3 years ago[ADT] Fix join_impl using the wrong size when calculating total length
Nathan James [Wed, 13 Jan 2021 11:36:49 +0000 (11:36 +0000)]
[ADT] Fix join_impl using the wrong size when calculating total length

Reviewed By: dblaikie

Differential Revision: https://reviews.llvm.org/D83305

3 years agoHwasan InitPrctl check for error using internal_iserror
Matthew Malcomson [Wed, 13 Jan 2021 11:35:09 +0000 (11:35 +0000)]
Hwasan InitPrctl check for error using internal_iserror

When adding this function in https://reviews.llvm.org/D68794 I did not
notice that internal_prctl has the API of the syscall to prctl rather
than the API of the glibc (posix) wrapper.

This means that the error return value is not necessarily -1 and that
errno is not set by the call.

For InitPrctl this means that the checks do not catch running on a
kernel *without* the required ABI (not caught since I only tested this
function correctly enables the ABI when it exists).
This commit updates the two calls which check for an error condition to
use `internal_iserror`.  That function sets a provided integer to an
equivalent errno value and returns a boolean to indicate success or not.

Tested by running on a kernel that has this ABI and on one that does
not.  Verified that running on the kernel without this ABI the current
code prints the provided error message and does not attempt to run the
program.  Verified that running on the kernel with this ABI the current
code does not print an error message and turns on the ABI.
All tests done on an AArch64 Linux machine.

Reviewed By: eugenis

Differential Revision: https://reviews.llvm.org/D94425

3 years ago[SVE] Add ISel pattern for addvl
Cullen Rhodes [Tue, 12 Jan 2021 14:55:46 +0000 (14:55 +0000)]
[SVE] Add ISel pattern for addvl

Reviewed By: cameron.mcinally

Differential Revision: https://reviews.llvm.org/D94504

3 years ago[X86][AVX] combineVectorSignBitsTruncation - limit AVX512 truncations to 128-bits...
Simon Pilgrim [Wed, 13 Jan 2021 10:38:23 +0000 (10:38 +0000)]
[X86][AVX] combineVectorSignBitsTruncation - limit AVX512 truncations to 128-bits (PR48727)

rG73a44f437bf1 result in 256-bit packss/packus ops with additional shuffles that shuffle combining can sometimes try to convert back into a truncation.

3 years ago[AArch64][SVE] Remove chains of unnecessary SVE reinterpret intrinsics
Joe Ellis [Mon, 11 Jan 2021 13:46:01 +0000 (13:46 +0000)]
[AArch64][SVE] Remove chains of unnecessary SVE reinterpret intrinsics

This commit extends SVEIntrinsicOpts::optimizeConvertFromSVBool to
identify and remove longer chains of redundant SVE reintepret
intrinsics. For example, the following chain of redundant SVE
reinterprets is now recognised as redundant:

    %a = <vscale x 2 x i1>
    %1 = <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool(<vscale x 2 x i1> %a)
    %2 = <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool(<vscale x 16 x i1> %1)
    %3 = <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool(<vscale x 4 x i1> %2)
    %4 = <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool(<vscale x 16 x i1> %3)
    %5 = <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool(<vscale x 4 x i1> %4)
    %6 = <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool(<vscale x 16 x i1> %5)
    ret <vscale x 2 x i1> %6

and will be replaced with:

    ret <vscale x 2 x i1> %a

Eliminating these can sometimes mean emitting fewer unnecessary
loads/stores when lowering to assembly.

Differential Revision: https://reviews.llvm.org/D94074

3 years ago[NFC][InstructionCost] Use InstructionCost in Transforms/Scalar/RewriteStatepointsFor...
David Sherwood [Tue, 12 Jan 2021 10:38:16 +0000 (10:38 +0000)]
[NFC][InstructionCost] Use InstructionCost in Transforms/Scalar/RewriteStatepointsForGC.cpp

In places where we calculate costs using TTI.getXXXCost() interfaces
I have changed the code to use InstructionCost instead of unsigned.
The change is non functional since InstructionCost behaves in the
same way as an integer for valid costs. Currently the getXXXCost()
functions used in this file do not return invalid costs.

See this patch for the introduction of the type: https://reviews.llvm.org/D91174
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2020-November/146408.html

Differential revision: https://reviews.llvm.org/D94484

3 years ago[LTO] Replace anonymous namespace with static functions (NFC).
Florian Hahn [Wed, 13 Jan 2021 09:02:23 +0000 (09:02 +0000)]
[LTO] Replace anonymous namespace with static functions (NFC).

Only class declarations should be inside anonymous namespaces
(https://llvm.org/docs/CodingStandards.html#anonymous-namespaces)

Instead of using a anonymous namespace, just mark the functions in it as
static (some of them already were).

This simplifies the diff for D94486.

3 years ago[clang][driver] Restore the original help text for `-I`
Andrzej Warzynski [Wed, 6 Jan 2021 12:49:26 +0000 (12:49 +0000)]
[clang][driver] Restore the original help text for `-I`

The help text for `-I` was recently expanded in [1]. The expanded
version focuses on explaining the semantics of `-I` in Clang. We are now
in the process of adding support for `-I` in Flang and this new
description is incompatible with the semantics of `-I` in Flang. This
was brought up in this review:
  * https://reviews.llvm.org/D93453

This patch reverts the original change in Options.td. This way the help
text for `-I` remains generic enough so that it applies to both Clang
and Flang.

The expanded description of `-I` from [1] is moved to the
`DocBrief` field for `-I`. This field is prioritised over the help text
when generating ClangCommandLineReference.rst, so the user facing
documentation for Clang retains the expanded description:
  * https://clang.llvm.org/docs/ClangCommandLineReference.html
`DocBrief` fields are currently not used in Flang.

As requested in the reviews, the help text and the expanded description
are slightly refined.

[1] Commit: 8dd4e3ceb804a58bcf25e6856fc6fde5e1995a66

Differential Revision: https://reviews.llvm.org/D94169

3 years ago[obj2yaml,yaml2obj] - Refine how we set/dump the sh_entsize field.
Georgii Rymar [Mon, 28 Dec 2020 11:08:26 +0000 (14:08 +0300)]
[obj2yaml,yaml2obj] - Refine how we set/dump the sh_entsize field.

This reuses the code from yaml2obj (moves it to ELFYAML.h).
With it we can set the `sh_entsize` in a single place in `obj2yaml`.

Note that it also fixes a bug of `yaml2obj`: we do not
set the `sh_entsize` field for the `SHT_ARM_EXIDX` section properly.

Differential revision: https://reviews.llvm.org/D93858

3 years ago[ARM] Update isVMOVNOriginalMask to handle single input shuffle vectors
David Green [Wed, 13 Jan 2021 08:51:28 +0000 (08:51 +0000)]
[ARM] Update isVMOVNOriginalMask to handle single input shuffle vectors

The isVMOVNOriginalMask was previously only checking for two input
shuffles that could be better expanded as vmovn nodes. This expands that
to single input shuffles that will later be legalized to multiple
vectors.

Differential Revision: https://reviews.llvm.org/D94189

3 years ago[llvm-readelf/obj] - Add support of multiple SHT_SYMTAB_SHNDX sections.
Georgii Rymar [Tue, 8 Dec 2020 09:39:04 +0000 (12:39 +0300)]
[llvm-readelf/obj] - Add support of multiple SHT_SYMTAB_SHNDX sections.

Currently we don't support multiple SHT_SYMTAB_SHNDX sections
and the DT_SYMTAB_SHNDX tag currently.

This patch implements it and fixes the
https://bugs.llvm.org/show_bug.cgi?id=43991.

I had to introduce the `struct DataRegion` to ELF.h,
it is used to represent a region that might have no known size.
It is needed, because we don't know the size of the extended
section indices table when it is located via DT_SYMTAB_SHNDX.
In this case we still want to validate that we don't read
past the end of the file.

Differential revision: https://reviews.llvm.org/D92923

3 years ago[ARM] Additional tests for different interleaving patterns. NFC
David Green [Wed, 13 Jan 2021 08:31:50 +0000 (08:31 +0000)]
[ARM] Additional tests for different interleaving patterns. NFC

3 years ago[Verifier] Add tied-ness verification to statepoint intsruction
Serguei Katkov [Tue, 12 Jan 2021 05:59:19 +0000 (12:59 +0700)]
[Verifier] Add tied-ness verification to statepoint intsruction

Reviewers: reames, dantrushin
Reviewed By: reames, dantrushin
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D94483

3 years ago[MSan] Partially revert some changes from D94552
Jianzhou Zhao [Wed, 13 Jan 2021 01:32:17 +0000 (01:32 +0000)]
[MSan] Partially revert some changes from D94552

Because of line 55, actually aligned_beg always equals to beg.

3 years ago[dsymutil] Add preliminary support for DWARF 5.
Jonas Devlieghere [Wed, 13 Jan 2021 05:55:41 +0000 (21:55 -0800)]
[dsymutil] Add preliminary support for DWARF 5.

Currently dsymutil will silently fail when processing binaries with
Dwarf 5 debug info. This patch adds rudimentary support for Dwarf 5 in
dsymutil.

 - Recognize relocations in the debug_addr section.
 - Recognize (a subset of) Dwarf 5 form values.
 - Emits valid Dwarf 5 compile unit header chains.

To simplify things (and avoid having to emit indexed sections) I decided
to emit the relocated addresses directly in the debug info section.

 - DW_FORM_strx gets relocated and rewritten to DW_FORM_strp
 - DW_FORM_addrx gets relocated and rewritten to DW_FORM_addr

Obviously there's a lot of work left, but this should be a step in the
right direction.

rdar://62345491

Differential revision: https://reviews.llvm.org/D94323

3 years ago[llvm] Use Optional::getValueOr (NFC)
Kazu Hirata [Wed, 13 Jan 2021 05:43:50 +0000 (21:43 -0800)]
[llvm] Use Optional::getValueOr (NFC)

3 years ago[CodeGen] Remove unused function isRegLiveInExitBlocks (NFC)
Kazu Hirata [Wed, 13 Jan 2021 05:43:48 +0000 (21:43 -0800)]
[CodeGen] Remove unused function isRegLiveInExitBlocks (NFC)

The last use was removed on Jan 17, 2020 in commit
42350cd893a9cf6c199b17441dc2ba526c7cca71.

3 years ago[llvm] Remove redundant string initialization (NFC)
Kazu Hirata [Wed, 13 Jan 2021 05:43:46 +0000 (21:43 -0800)]
[llvm] Remove redundant string initialization (NFC)

Identified with readability-redundant-string-init.

3 years ago[Verifier] Extend statepoint verifier to cover more constants
Serguei Katkov [Tue, 12 Jan 2021 09:56:04 +0000 (16:56 +0700)]
[Verifier] Extend statepoint verifier to cover more constants

Also old mir tests are updated to meet last changes in STATEPOINT format.

Reviewers: reames, dantrushin
Reviewed By: reames, dantrushin
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D94482

3 years ago[Statepoint Lowering] Add an option to allow use gc values in regs for landing pad
Serguei Katkov [Tue, 12 Jan 2021 04:52:48 +0000 (11:52 +0700)]
[Statepoint Lowering] Add an option to allow use gc values in regs for landing pad

Default value is not changed, so it is NFC actually.

The option allows to use gc values on registers in landing pads.

Reviewers: reames, dantrushin
Reviewed By: reames, dantrushin
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D94469

3 years ago[AMDGPU] Add SI_EARLY_TERMINATE_SCC0 for early terminating shader
Carl Ritson [Wed, 13 Jan 2021 04:08:42 +0000 (13:08 +0900)]
[AMDGPU] Add SI_EARLY_TERMINATE_SCC0 for early terminating shader

Add pseudo instruction to allow early termination of pixel shader
anywhere based on the value of SCC.  The intention is to use this
when a mask of live lanes is updated, e.g. live lanes in WQM pass.
This facilitates early termination of shaders even when EXEC is
incomplete, e.g. in non-uniform control flow.

Reviewed By: foad

Differential Revision: https://reviews.llvm.org/D88777

3 years ago[dsymutil] Fix spurious space in REQUIRES: line
Jonas Devlieghere [Wed, 13 Jan 2021 04:13:43 +0000 (20:13 -0800)]
[dsymutil] Fix spurious space in REQUIRES: line

This test is incorrectly running on non-darwin hosts.

3 years ago[dsymutil] s/dwarfdump/llvm-dwarfdump/ in test
Jonas Devlieghere [Wed, 13 Jan 2021 03:58:35 +0000 (19:58 -0800)]
[dsymutil] s/dwarfdump/llvm-dwarfdump/ in test

3 years ago[libomptarget][nvptx] Include omp_data.cu in bitcode deviceRTL
Jon Chesterfield [Wed, 13 Jan 2021 03:51:10 +0000 (03:51 +0000)]
[libomptarget][nvptx] Include omp_data.cu in bitcode deviceRTL

[libomptarget][nvptx] Include omp_data.cu in bitcode deviceRTL

Reviewed By: tianshilei1992

Differential Revision: https://reviews.llvm.org/D94565

3 years ago[dsymutil] Copy eh_frame content into the dSYM companion file.
Jonas Devlieghere [Tue, 12 Jan 2021 00:17:51 +0000 (16:17 -0800)]
[dsymutil] Copy eh_frame content into the dSYM companion file.

Copy over the __eh_frame from the binary into the dSYM. This helps
kernel developers that are working with only dSYMs (i.e. no binaries)
when debugging a core file. This only kicks in when the __eh_frame
exists in the linked binary. Most of the time ld64 will remove the
section in favor of compact unwind info. When it is emitted, it's
generally small enough and should not bloat the dSYM.

rdar://69774935

Differential revision: https://reviews.llvm.org/D94460

3 years ago[InlineSpiller] Re-tie operands if folding failed
Serguei Katkov [Mon, 11 Jan 2021 07:55:39 +0000 (14:55 +0700)]
[InlineSpiller] Re-tie operands if folding failed

InlineSpiller::foldMemoryOperand unties registers before an attempt to fold and
does not restore tied-ness in case of failure.

I do not have a particular test for demo of invalid behavior.
This is something of clean-up.
It is better to keep the behavior correct in case some time in future it happens.

Reviewers: reames, dantrushin
Reviewed By: dantrushin, reames
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D94389

3 years ago[Orc] Add a unit test for asynchronous definition generation.
Lang Hames [Wed, 13 Jan 2021 03:20:13 +0000 (14:20 +1100)]
[Orc] Add a unit test for asynchronous definition generation.

3 years ago[dsymutil] Warn on timestmap mismatch between object file and debug map
Jonas Devlieghere [Wed, 13 Jan 2021 02:50:57 +0000 (18:50 -0800)]
[dsymutil] Warn on timestmap mismatch between object file and debug map

Add a warning when the timestmap doesn't match between the object file
and the debug map entry. We were already emitting such warnings for
archive members and swift interface files. This patch also unifies the
warning across all three.

rdar://65614640

Differential revision: https://reviews.llvm.org/D94536

3 years ago[NFC] Use generic name for scalable vector stack ID.
Hsiangkai Wang [Tue, 12 Jan 2021 08:19:37 +0000 (16:19 +0800)]
[NFC] Use generic name for scalable vector stack ID.

Differential Revision: https://reviews.llvm.org/D94471

3 years ago[OpenMP] Use persistent memory for omp_large_cap_mem
Hansang Bae [Thu, 7 Jan 2021 15:16:52 +0000 (09:16 -0600)]
[OpenMP] Use persistent memory for omp_large_cap_mem

This change enables volatile use of persistent memory for omp_large_cap_mem*
on supported systems. It depends on libmemkind's support for persistent memory,
and requirements/details can be found at the following url.

https://pmem.io/2020/01/20/memkind-dax-kmem.html

Differential Revision: https://reviews.llvm.org/D94353

3 years ago[libc++] Give extern templates default visibility on gcc
Shoaib Meenai [Tue, 12 Jan 2021 18:29:03 +0000 (10:29 -0800)]
[libc++] Give extern templates default visibility on gcc

Contrary to the current visibility macro documentation, it appears that
gcc does handle visibility attribute on extern templates correctly, e.g.
https://godbolt.org/g/EejuV7. We need this so that extern template
instantiations of classes not marked _LIBCPP_TEMPLATE_VIS (e.g.
__vector_base_common) are correctly exported with gcc when building with
hidden visibility.

Reviewed By: ldionne

Differential Revision: https://reviews.llvm.org/D35388

3 years ago[gn build] Reorganize libcxx/include/BUILD.gn a bit
Nico Weber [Wed, 13 Jan 2021 02:10:55 +0000 (21:10 -0500)]
[gn build] Reorganize libcxx/include/BUILD.gn a bit

- Merge 6706342f48bea80 -- no more libcxx_needs_site_config, we now
  always need it
- Since it was always off in practice, write_config bitrot. Unbitrot
  it so that it works
- Remove copy step and let concat step write to final location
  immediately -- and fix copy destination directory

As a side effect, libcxx/include/BUILD.gn now has only a single
sources list, which means the cmake sync script should be able to
automatically sync additions and removals of .h files. On the flipside,
this means this file now must be updated after most changes to
libcxx/include/__config_site.in, and looking through the last few months
of changes this looks like it's going to be a wash.

3 years ago[OpenMP] Update allocator trait key/value definitions
Hansang Bae [Thu, 7 Jan 2021 16:14:21 +0000 (10:14 -0600)]
[OpenMP] Update allocator trait key/value definitions

Use new definitions introduced in 5.1 specification.

Differential Revision: https://reviews.llvm.org/D94277

3 years ago[PDB] Defer relocating .debug$S until commit time and parallelize it
Reid Kleckner [Thu, 4 Jun 2020 04:22:11 +0000 (21:22 -0700)]
[PDB] Defer relocating .debug$S until commit time and parallelize it

This is a pretty classic optimization. Instead of processing symbol
records and copying them to temporary storage, do a first pass to
measure how large the module symbol stream will be, and then copy the
data into place in the PDB file. This requires defering relocation until
much later, which accounts for most of the complexity in this patch.

This patch avoids copying the contents of all live .debug$S sections
into heap memory, which is worth about 20% of private memory usage when
making PDBs. However, this is not an unmitigated performance win,
because it can be faster to read dense, temporary, heap data than it is
to iterate symbol records in object file backed memory a second time.

Results on release chrome.dll:
peak mem: 5164.89MB -> 4072.19MB (-1,092.7MB, -21.2%)
wall-j1:  0m30.844s -> 0m32.094s (slightly slower)
wall-j3:  0m20.968s -> 0m20.312s (slightly faster)
wall-j8:  0m19.062s -> 0m17.672s (meaningfully faster)

I gathered similar numbers for a debug, component build of content.dll
in Chrome, and the performance impact of this change was in the noise.
The memory usage reduction was visible and similar.

Because of the new parallelism in the PDB commit phase, more cores makes
the new approach faster. I'm assuming that most C++ developer machines
these days are at least quad core, so I think this is a win.

Differential Revision: https://reviews.llvm.org/D94267

3 years ago[Coroutine] Update promise object's final layout index
Yuanfang Chen [Wed, 13 Jan 2021 01:42:10 +0000 (17:42 -0800)]
[Coroutine] Update promise object's final layout index

promise is a header field but it is not guaranteed that it would be the third
field of the frame due to `performOptimizedStructLayout`.

Reviewed By: lxfind

Differential Revision: https://reviews.llvm.org/D94137

3 years ago[X86][AMX] Prohibit pointer cast on load.
Luo, Yuanke [Sun, 10 Jan 2021 06:06:18 +0000 (14:06 +0800)]
[X86][AMX] Prohibit pointer cast on load.

The load/store instruction will be transformed to amx intrinsics in the
pass of AMX type lowering. Prohibiting the pointer cast make that pass
happy.

Differential Revision: https://reviews.llvm.org/D94372

3 years ago[mlir][Python] Add checking process before create an AffineMap from a permutation.
zhanghb97 [Tue, 12 Jan 2021 13:40:27 +0000 (21:40 +0800)]
[mlir][Python] Add checking process before create an AffineMap from a permutation.

An invalid permutation will trigger a C++ assertion when attempting to create an AffineMap from the permutation.
This patch adds an `isPermutation` function to check the given permutation before creating the AffineMap.

Reviewed By: mehdi_amini

Differential Revision: https://reviews.llvm.org/D94492

3 years ago[gn build] (manually) port 79f99ba65d96
Nico Weber [Wed, 13 Jan 2021 01:30:56 +0000 (20:30 -0500)]
[gn build] (manually) port 79f99ba65d96

3 years ago[MSan] Tweak CopyOrigin
Jianzhou Zhao [Tue, 12 Jan 2021 21:49:59 +0000 (21:49 +0000)]
[MSan] Tweak CopyOrigin

There could be some mis-alignments when copying origins not aligned.

I believe inaligned memcpy is rare so the cases do not matter too much
in practice.

1) About the change at line 50

Let dst be (void*)5,
then d=5, beg=4
so we need to write 3 (4+4-5) bytes from 5 to 7.

2) About the change around line 77.

Let dst be (void*)5,
because of lines 50-55, the bytes from 5-7 were already writen.
So the aligned copy is from 8.

Reviewed-by: eugenis
Differential Revision: https://reviews.llvm.org/D94552

3 years ago[DAGCombiner] Fold BRCOND(FREEZE(COND)) to BRCOND(COND)
Juneyoung Lee [Wed, 13 Jan 2021 00:33:21 +0000 (09:33 +0900)]
[DAGCombiner] Fold BRCOND(FREEZE(COND)) to BRCOND(COND)

This patch resolves the suboptimal codegen described in http://llvm.org/pr47873 .
When CodeGenPrepare lowers select into a conditional branch, a freeze instruction is inserted.
It is then translated to `BRCOND(FREEZE(SETCC))` in SelDag.
The `FREEZE` in the middle of `SETCC` and `BRCOND` was causing a suboptimal code generation however.
This patch adds `BRCOND(FREEZE(cond))` -> `BRCOND(cond)` fold to DAGCombiner to remove the `FREEZE`.

To make this optimization sound, `BRCOND(UNDEF)` simply should nondeterministically jump to the branch or not, rather than raising UB.
It wasn't clear what happens when the condition was undef according to the comments in ISDOpcodes.h, however.
I updated the comments of `BRCOND` to make it explicit (as well as `BR_CC`, which is also a conditional branch instruction).

Note that it diverges from the semantics of `br` instruction in IR, which is explicitly UB.
Since the UB semantics was necessary to explain optimizations that use branching conditions, and SelDag doesn't seem to have such optimization, I think this divergence is okay.

Reviewed By: spatel

Differential Revision: https://reviews.llvm.org/D92015

3 years ago[LangRef] State that a nocapture pointer cannot be returned
Juneyoung Lee [Mon, 11 Jan 2021 05:42:08 +0000 (14:42 +0900)]
[LangRef] State that a nocapture pointer cannot be returned

This is a small patch stating that a nocapture pointer cannot be returned.

Discussed in D93189.

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D94386

3 years ago[libc][NFC] Use more specific comparison macros in LdExpTest.h.
Siva Chandra Reddy [Wed, 13 Jan 2021 00:11:28 +0000 (16:11 -0800)]
[libc][NFC] Use more specific comparison macros in LdExpTest.h.

3 years ago[libc] add isascii and toascii implementations
Michael Jones [Tue, 12 Jan 2021 22:37:56 +0000 (22:37 +0000)]
[libc] add isascii and toascii implementations

adding both at once since these are trivial functions.

Reviewed By: sivachandra

Differential Revision: https://reviews.llvm.org/D94558

3 years ago[AMDGPU] Add _e64 suffix to VOP3 Insts
Joe Nash [Thu, 7 Jan 2021 18:56:02 +0000 (13:56 -0500)]
[AMDGPU] Add _e64 suffix to VOP3 Insts

Previously, instructions which could be
expressed as VOP3 in addition to another
encoding had a _e64 suffix on the tablegen
record name, while those
only available as VOP3 did not. With this
patch, all VOP3s will have the _e64 suffix.
The assembly does not change, only  the mir.

Reviewed By: foad

Differential Revision: https://reviews.llvm.org/D94341

Change-Id: Ia8ec8890d47f8f94bbbdac43745b4e9dd2b03423

3 years agoDelete unused function (was breaking the -Werror build)
David Blaikie [Tue, 12 Jan 2021 23:29:44 +0000 (15:29 -0800)]
Delete unused function (was breaking the -Werror build)

3 years ago[NFC] Disallow unused prefixes under MC/AMDGPU
Mircea Trofin [Tue, 12 Jan 2021 22:31:58 +0000 (14:31 -0800)]
[NFC] Disallow unused prefixes under MC/AMDGPU

This patches remaining tests, and patches lit.local.cfg to block future
such cases (until we flip FileCheck's flag)

Differential Revision: https://reviews.llvm.org/D94556

3 years ago[Sanitizer][Darwin] Fix test for macOS 11+ point releases
Julian Lettner [Tue, 12 Jan 2021 23:01:18 +0000 (15:01 -0800)]
[Sanitizer][Darwin] Fix test for macOS 11+ point releases

This test wrongly asserted that the minor version is always 0 when
running on macOS 11 and above.

3 years ago[MIPatternMatch] Add matcher for G_PTR_ADD
Jessica Paquette [Fri, 8 Jan 2021 23:06:13 +0000 (15:06 -0800)]
[MIPatternMatch] Add matcher for G_PTR_ADD

Add a matcher which recognizes G_PTR_ADD and add a test.

Differential Revision: https://reviews.llvm.org/D94348

3 years agoAdd sample-profile-suffix-elision-policy attribute with -funique-internal-linkage...
Hongtao Yu [Wed, 23 Dec 2020 06:43:22 +0000 (22:43 -0800)]
Add sample-profile-suffix-elision-policy attribute with -funique-internal-linkage-names.

Adding sample-profile-suffix-elision-policy attribute to functions whose linkage names are uniquefied so that their unique name suffix won't be trimmed when applying AutoFDO profiles.

Reviewed By: dblaikie

Differential Revision: https://reviews.llvm.org/D94455

3 years ago[ELF][NFCI] small cleanup to OutputSections.h
Bob Haarman [Tue, 12 Jan 2021 02:08:01 +0000 (02:08 +0000)]
[ELF][NFCI] small cleanup to OutputSections.h

OutputSections.h used to close the lld::elf namespace only to
immediately open it again. This change merges both parts into
one.

Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D94538

3 years ago[RISCV] Remove '.mask' from vcompress intrinsic name. NFC
Craig Topper [Tue, 12 Jan 2021 22:37:28 +0000 (14:37 -0800)]
[RISCV] Remove '.mask' from vcompress intrinsic name. NFC

It has a mask argument, but isn't a masked instruction. It doesn't
use the mask policy of or the v0.t syntax.

3 years ago[ADT][NFC] Use empty base optimisation in BumpPtrAllocatorImpl
Nathan James [Tue, 12 Jan 2021 22:43:48 +0000 (22:43 +0000)]
[ADT][NFC] Use empty base optimisation in BumpPtrAllocatorImpl

Most uses of this class just use the default MallocAllocator.
As this contains no fields, we can use the empty base optimisation for BumpPtrAllocatorImpl and save 8 bytes of padding for most use cases.

This prevents using a class that is marked as `final` as the `AllocatorT` template argument.
In one must use an allocator that has been marked as `final`, the simplest way around this is a proxy class.
The class should have all the methods that `AllocaterBase` expects and should forward the calls to your own allocator instance.

Reviewed By: dblaikie

Differential Revision: https://reviews.llvm.org/D94439

3 years ago[NFC] Disallow unused prefixes in MC/AMDGPU
Mircea Trofin [Tue, 12 Jan 2021 22:06:30 +0000 (14:06 -0800)]
[NFC] Disallow unused prefixes in MC/AMDGPU

1 out of 2 patches.

Differential Revision: https://reviews.llvm.org/D94553

3 years ago[Driver] Fix assertion failure when -fprofile-generate -fcs-profile-generate are...
Fangrui Song [Tue, 12 Jan 2021 22:19:55 +0000 (14:19 -0800)]
[Driver] Fix assertion failure when -fprofile-generate -fcs-profile-generate are used together

If conflicting `-fprofile-generate -fcs-profile-generate` are used together,
there is currently an assertion failure. Fix the failure.

Also add some driver tests.

Reviewed By: xur

Differential Revision: https://reviews.llvm.org/D94463

3 years agoAMDGPU: Remove wrapper only call limitation
Matt Arsenault [Wed, 6 Jan 2021 19:04:19 +0000 (14:04 -0500)]
AMDGPU: Remove wrapper only call limitation

This seems to only have overridden cold handling, which we probably
shouldn't do. As far as I can tell the wrapper library functions are
still inlined as appropriate.

3 years ago[OpenMP] Fixed a typo in openmp/CMakeLists.txt
Shilei Tian [Tue, 12 Jan 2021 22:00:49 +0000 (17:00 -0500)]
[OpenMP] Fixed a typo in openmp/CMakeLists.txt

3 years ago[libcxx] Avoid overflows in the windows __libcpp_steady_clock_now()
Martin Storsjö [Thu, 17 Dec 2020 13:40:06 +0000 (15:40 +0200)]
[libcxx] Avoid overflows in the windows __libcpp_steady_clock_now()

As freq.QuadValue can be in the range of 10000000 to 19200000,
the multiplication before division makes the calculation overflow
and wrap to negative values every 16-30 minutes.

Instead count the whole seconds separately before adding the
scaled fractional seconds.

Add a testcase for steady_clock to check that the values returned for
now() compare as bigger than the zero time origin; this
corresponds to a testcase in Qt [1] [2] (that failed spuriously
due to this).

[1] https://bugreports.qt.io/browse/QTBUG-89539
[2] https://code.qt.io/cgit/qt/qtbase.git/tree/tests/auto/corelib/kernel/qdeadlinetimer/tst_qdeadlinetimer.cpp?id=f8de5e54022b8b7471131b7ad55c83b69b2684c0#n569

Differential Revision: https://reviews.llvm.org/D93456

3 years ago[AArch64] [Windows] Properly add :lo12: reloc specifiers when generating assembly
Martin Storsjö [Fri, 11 Dec 2020 10:42:07 +0000 (12:42 +0200)]
[AArch64] [Windows] Properly add :lo12: reloc specifiers when generating assembly

This makes sure that assembly output actually can be assembled.

Set the correct MCExpr relocations specifier VK_PAGEOFF - and also
set VK_PAGE consistently even though it's not visible in the assembly
output.

Differential Revision: https://reviews.llvm.org/D94365

3 years ago[OpenMP] Fixed the link error that cannot find static data member
Shilei Tian [Tue, 12 Jan 2021 21:48:19 +0000 (16:48 -0500)]
[OpenMP] Fixed the link error that cannot find static data member

Constant static data member can be defined in the class without another
define after the class in C++17. Although it is C++17, Clang can still handle it
even w/o the flag for C++17. Unluckily, GCC cannot handle that.

Reviewed By: jhuber6

Differential Revision: https://reviews.llvm.org/D94541

3 years ago[Inliner] Change inline remark format and update ReplayInlineAdvisor to use it
modimo [Tue, 12 Jan 2021 21:19:30 +0000 (13:19 -0800)]
[Inliner] Change inline remark format and update ReplayInlineAdvisor to use it

This change modifies the source location formatting from:
LineNumber.Discriminator
to:
LineNumber:ColumnNumber.Discriminator

The motivation here is to enhance location information for inline replay that currently exists for the SampleProfile inliner. This will be leveraged further in inline replay for the CGSCC inliner in the related diff.

The ReplayInlineAdvisor is also modified to read the new format and now takes into account the callee for greater accuracy.

Testing:
ninja check-llvm

Reviewed By: mtrofin

Differential Revision: https://reviews.llvm.org/D94333

3 years ago[mlir] Update LLVM dialect type documentation
Alex Zinenko [Tue, 12 Jan 2021 11:07:12 +0000 (12:07 +0100)]
[mlir] Update LLVM dialect type documentation

Recent commits reconfigured LLVM dialect types to use built-in types whenever
possible. Update the documentation accordingly.

Reviewed By: mehdi_amini

Differential Revision: https://reviews.llvm.org/D94485

3 years ago[InstCombine] Handle logical and/or in assume optimization
Nikita Popov [Tue, 12 Jan 2021 21:35:19 +0000 (22:35 +0100)]
[InstCombine] Handle logical and/or in assume optimization

assume(a && b) can be converted to assume(a); assume(b) even if
the condition is logical. Same for assume(!(a || b)).

3 years ago[RISCV] Legalize select when Zbt extension available
Michael Munday [Tue, 12 Jan 2021 21:22:34 +0000 (21:22 +0000)]
[RISCV] Legalize select when Zbt extension available

The custom expansion of select operations in the RISC-V backend
interferes with the matching of cmov instructions. Legalizing
select when the Zbt extension is available solves that problem.

Reviewed By: lenary, craig.topper

Differential Revision: https://reviews.llvm.org/D93767

3 years ago[InstCombine] Add tests for logical and/or poison implication (NFC)
Nikita Popov [Tue, 12 Jan 2021 21:15:54 +0000 (22:15 +0100)]
[InstCombine] Add tests for logical and/or poison implication (NFC)

These tests cover some cases where we can fold select to and/or
based on poison implication logic.

3 years ago[RISCV] Add double test cases to vfmerge-rv32.ll. NFC
Craig Topper [Tue, 12 Jan 2021 21:08:58 +0000 (13:08 -0800)]
[RISCV] Add double test cases to vfmerge-rv32.ll. NFC

3 years ago[SLP] reduce code duplication while processing reductions; NFC
Sanjay Patel [Tue, 12 Jan 2021 20:07:01 +0000 (15:07 -0500)]
[SLP] reduce code duplication while processing reductions; NFC

3 years ago[SLP] rename variable to improve readability; NFC
Sanjay Patel [Tue, 12 Jan 2021 19:55:09 +0000 (14:55 -0500)]
[SLP] rename variable to improve readability; NFC

The OperationData in the 2nd block (visiting the operands)
is completely independent of the 1st block.

3 years ago[SLP] reduce code duplication in processing reductions; NFC
Sanjay Patel [Tue, 12 Jan 2021 18:53:18 +0000 (13:53 -0500)]
[SLP] reduce code duplication in processing reductions; NFC

3 years ago[SLP] reduce code duplication while matching reductions; NFC
Sanjay Patel [Tue, 12 Jan 2021 18:45:32 +0000 (13:45 -0500)]
[SLP] reduce code duplication while matching reductions; NFC

3 years ago[LV] Weaken spuriously strong assert in LoopVersioning
Philip Reames [Tue, 12 Jan 2021 20:54:07 +0000 (12:54 -0800)]
[LV] Weaken spuriously strong assert in LoopVersioning

LoopVectorize uses some utilities on LoopVersioning, but doesn't actually use it for, you know, versioning.  As a result, the precondition LoopVersioning expects is too strong for this user.  At the moment, LoopVectorize supports any loop with a unique exit block, so check the same precondition here.

Really, the whole class structure here is a mess.  We should separate the actual versioning from the metadata updates, but that's a bigger problem.

3 years ago[InstCombine] Duplicate tests for logical and/or (NFC)
Nikita Popov [Tue, 12 Jan 2021 19:54:23 +0000 (20:54 +0100)]
[InstCombine] Duplicate tests for logical and/or (NFC)

This replicates existing and/or tests to also test variants using
select. This should help us get a more accurate view on which
optimizations we're missing if we disable the select -> and/or
fold.

3 years agoFix for crash in __builtin_return_address in template context.
Sunil Srivastava [Tue, 12 Jan 2021 20:37:18 +0000 (12:37 -0800)]
Fix for crash in __builtin_return_address in template context.

The check for argument value needs to be guarded by !isValueDependent().

Differential Revision: https://reviews.llvm.org/D94438

3 years ago[LV] Relax assumption that LCSSA implies single entry
Philip Reames [Tue, 12 Jan 2021 20:32:24 +0000 (12:32 -0800)]
[LV] Relax assumption that LCSSA implies single entry

This relates to the ongoing effort to support vectorization of multiple exit loops (see D93317).

The previous code assumed that LCSSA phis were always single entry before the vectorizer ran. This was correct, but only because the vectorizer allowed only a single exiting edge. There's nothing in the definition of LCSSA which requires single entry phis.

A common case where this comes up is with a loop with multiple exiting blocks which all reach a common exit block. (e.g. see the test updates)

Differential Revision: https://reviews.llvm.org/D93725

3 years ago[InstCombine] Regenerate test checks (NFC)
Nikita Popov [Tue, 12 Jan 2021 20:21:22 +0000 (21:21 +0100)]
[InstCombine] Regenerate test checks (NFC)

3 years ago[clang-tidy] Add test for Transformer-based checks with diagnostics.
Yitzhak Mandelbaum [Mon, 11 Jan 2021 22:28:17 +0000 (22:28 +0000)]
[clang-tidy] Add test for Transformer-based checks with diagnostics.

Adds a test that checks the diagnostic output of the tidy.

Differential Revision: https://reviews.llvm.org/D94453

3 years ago[IR] move nomerge attribute from function declaration/definition to callsites
Zequan Wu [Tue, 12 Jan 2021 19:22:31 +0000 (11:22 -0800)]
[IR] move nomerge attribute from function declaration/definition to callsites

Move nomerge attribute from function declaration/definition to callsites to
allow virtual function calls attach the attribute.

Differential Revision: https://reviews.llvm.org/D94537

3 years ago[FunctionAttrs] Derive willreturn for fns with readonly` & `mustprogress`.
Florian Hahn [Tue, 12 Jan 2021 19:55:17 +0000 (19:55 +0000)]
[FunctionAttrs] Derive willreturn for fns with readonly` & `mustprogress`.

Similar to D94125, derive `willreturn` for functions that are `readonly` and
`mustprogress` in FunctionAttrs.

To quote the reasoning from D94125:

    Since D86233 we have `mustprogress` which, in combination with
    `readonly`, implies `willreturn`. The idea is that every side-effect
    has to be modeled as a "write". Consequently, `readonly` means there
    is no side-effect, and `mustprogress` guarantees that we cannot "loop"
    forever without side-effect.

Reviewed By: jdoerfert, nikic

Differential Revision: https://reviews.llvm.org/D94502

3 years ago[clang][aarch64] Precondition isHomogeneousAggregate on isCXX14Aggregate
David Truby [Thu, 3 Dec 2020 11:25:57 +0000 (11:25 +0000)]
[clang][aarch64] Precondition isHomogeneousAggregate on isCXX14Aggregate

MSVC on WoA64 includes isCXX14Aggregate in its definition. This is de-facto
specification on that platform, so match msvc's behaviour.

Fixes: https://bugs.llvm.org/show_bug.cgi?id=47611

Co-authored-by: Peter Waller <peter.waller@arm.com>
Differential Revision: https://reviews.llvm.org/D92751

3 years ago[libomptarget][amdgpu][nfc] Fix build on centos
Jon Chesterfield [Tue, 12 Jan 2021 19:40:02 +0000 (19:40 +0000)]
[libomptarget][amdgpu][nfc] Fix build on centos

[libomptarget][amdgpu][nfc] Fix build on centos

rtl.cpp replaced 224 with a #define from elf.h, but that
doesn't work on a centos 7 build machine with an old elf.h

Reviewed By: ronlieb

Differential Revision: https://reviews.llvm.org/D94528

3 years ago[OpenMP] Fixed include directories for OpenMP when building OpenMP with LLVM_ENABLE_R...
Shilei Tian [Tue, 12 Jan 2021 19:32:27 +0000 (14:32 -0500)]
[OpenMP] Fixed include directories for OpenMP when building OpenMP with LLVM_ENABLE_RUNTIMES

Some LLVM headers are generated by CMake. Before the installation,
LLVM's headers are distributed everywhere, some of which are in
`${LLVM_SRC_ROOT}/llvm/include/llvm`, and some are in
`${LLVM_BINARY_ROOT}/include/llvm`. After intallation, they're all in
`${LLVM_INSTALLATION_ROOT}/include/llvm`.

OpenMP now depends on LLVM headers. Some headers depend on headers generated
by CMake. When building OpenMP along with LLVM, a.k.a via `LLVM_ENABLE_RUNTIMES`,
we need to tell OpenMP where it can find those headers, especially those still
have not been copied/installed.

Reviewed By: jdoerfert, jhuber6

Differential Revision: https://reviews.llvm.org/D94534