Ye Li [Tue, 15 Oct 2019 06:08:46 +0000 (23:08 -0700)]
imx8: Change to use new SECO API commands
Latest SCFW has removed old MISC SECO commands. So update the codes
to use new SECO commands.
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Wed, 22 Apr 2020 07:25:31 +0000 (15:25 +0800)]
imx8: parser: fix 'end address' parameter of rm_find_memreg
parameter 'end address' must be inclusive of address range.
Modified from Seb's downstream patch.
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Ye Li [Tue, 24 Mar 2020 02:57:55 +0000 (19:57 -0700)]
imx8m: Dump DRAM PLL rate by clocks command
Add the dump of DRAM PLL into "clocks" command
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Peng Fan [Wed, 22 Apr 2020 03:18:23 +0000 (11:18 +0800)]
imx8mq: Set ARM core clock directly from ARM PLL
For ARM core clock, there are two input branches, and can select via mux:
one from ARM PLL directly, second from CCM A53 clock root.
Currently we are using second branch. But IC confirmed the CCM A53 root
signoff timing is 1Ghz, so we should switch to input from ARM PLL directly.
This patch fixes the CORE SEL slice configuration and switch ARM clock
to ARM PLL.
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Ye Li [Fri, 25 Oct 2019 08:28:48 +0000 (01:28 -0700)]
imx8mq: Enable eMMC HS400 and SD UHS mode on EVK
iMX8MQ EVK board has a eMMC5.0 chip and supports SD3.0, so enable the UHS
and HS400 configs to enhance the eMMC/SD access.
The change also needs to set usdhc clock to 400Mhz, and add the
off-on-delay-us to SD reset pin, otherwise some SD cards will
fail to select UHS mode in re-initialization.
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Wed, 22 Apr 2020 02:55:56 +0000 (10:55 +0800)]
imx8m: update clock root and fix core_sel
Update clock root table to let it be easy to configure clock at
very early stage. Also the core_sel mux parent should be A53 CLK
root and ARM PLL.
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Wed, 22 Apr 2020 02:51:13 +0000 (10:51 +0800)]
imx8m: acquire ATF commit hash
Acquire ATF commit hash when booting U-Boot to make user easy
to know the ATF version.
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Wed, 22 Apr 2020 02:50:04 +0000 (10:50 +0800)]
imx8: move SIP macro to common header
Move the SIP macro to common header and unify the name to
make others could reuse them.
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Wed, 5 Feb 2020 12:17:17 +0000 (20:17 +0800)]
imx: update is_imx6ull to include i.MX6ULZ
Update is_imx6ull helper to include i.MX6ULZ SoC. i.MX6ULZ could
share same macro, then we no need to add is_imx6ulz in various drivers.
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Wed, 5 Feb 2020 09:39:27 +0000 (17:39 +0800)]
imx: imx8m: add i.MX8MN variants support
Add i.MX8MN variants support
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Wed, 5 Feb 2020 09:34:54 +0000 (17:34 +0800)]
imx: imx8m: add i.MX8MQ Dual and QuadLite support
Add i.MX8MQ Dual and QuadLite variants.
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Fri, 17 Jan 2020 08:11:29 +0000 (16:11 +0800)]
imx: cpu: support speed grade for i.MX8MP
i.MX8MP speed grade use same layout as i.MX8MN, so reuse it for i.MX8MP
Reviewed-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Wed, 12 Dec 2018 10:47:58 +0000 (02:47 -0800)]
imx8mn: Update speed grade
imx8mn speed grade fuse uses new definitions as below. So have
to update get_cpu_speed_grade_hz function to match it.
SPEED_GRADE[5:4] SPEED_GRADE[3:0] MHz
xx 0000 2300
xx 0001 2200
xx 0010 2100
xx 0011 2000
xx 0100 1900
xx 0101 1800
xx 0110 1700
xx 0111 1600
xx 1000 1500
xx 1001 1400
xx 1010 1300
xx 1011 1200
xx 1100 1100
xx 1101 1000
xx 1110 900
xx 1111 800
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Ye Li [Wed, 17 Oct 2018 06:12:37 +0000 (23:12 -0700)]
imx8mm: Update CPU speed grading
According to iMX8MM datasheet (IMX8MMIEC_Rev_D and IMX8MMCEC_Rev_D),
the speed grading for imx8mm is 800Mhz, 1.2Ghz, 1.6Ghz and 1.8Ghz.
Update them to get_cpu_speed_grade_hz function.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Wed, 5 Feb 2020 09:44:28 +0000 (17:44 +0800)]
imx: fix cpu_type helper
i.MX8MP use 0x182 as its ID, so 0xff is not valid to get the cpu type,
extend it to 0x1ff.
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Marek Vasut [Fri, 24 Apr 2020 19:37:26 +0000 (21:37 +0200)]
ARM: imx: imx8mm: Add missing clock entries for FEC clock
All the FEC ethernet clock entries for iMX8MM are missing, while they
are already present on iMX8MQ. Fill in the nodes on iMX8MM, as the FEC
ethernet gets bogus clock information otherwise which makes ethernet
inoperable.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Tom Rini [Thu, 30 Apr 2020 19:11:06 +0000 (15:11 -0400)]
Merge tag 'efi-2020-07-rc2' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi
Pull request for UEFI sub-system for efi-2020-07-rc2
This pull request contains bug fixes needed due to the merged changes for
EFI secure boot.
Patches are supplied to identify EFI system partitions.
Tom Rini [Thu, 30 Apr 2020 17:00:20 +0000 (13:00 -0400)]
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-x86
- DM ACPI support (Part A)
- Improve support for chain-loading x86 U-Boot
Tom Rini [Thu, 30 Apr 2020 15:31:33 +0000 (11:31 -0400)]
Merge tag 'xilinx-for-v2020.07-rc2' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze
Xilinx changes for v2020.07-rc2
mmc:
- Fix dt property handling via generic function
clk:
- Fix versal watchdog clock setting
nand:
- Fix zynq nand command comparison
xilinx:
- Enable ubifs
- Sync board_late_init configurations with initrd_high setup
- Make custom distro boot more verbose
zynq:
- Kconfig alignments
- Fix nand cse configuration
zynqmp:
- Fix zcu104 low level qspi configuration
- Small DT updates
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Thu, 30 Apr 2020 14:06:54 +0000 (10:06 -0400)]
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriq
- Add DM_ETH support for DPAA1, DPAA2 based RDB platforms: ls1046ardb,
ls1043ardb, lx2160ardb, ls2088ardb, ls1088ardb.
- Add GICv3 support for ls1028a, ls2088a, ls1088a.
- Add lpuart support on ls1028aqds.
- Few bug fixes and updates on ls2088a, ls1012a, ls1046a, ls1021a based
platforms.
Simon Glass [Sun, 26 Apr 2020 15:13:01 +0000 (09:13 -0600)]
x86: Add documentation for the chain-load feature
Add a few notes about this feature, which is aimed for development.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Sun, 26 Apr 2020 15:13:00 +0000 (09:13 -0600)]
x86: Use the existing stack when chain-loading
With chromebook_coral we normally run TPL->SPL->U-Boot. This is the
'bare metal' case.
When running from coreboot we put u-boot.bin in the RW_LEGACY portion
of the image, e.g. with:
cbfstool image-coral.serial.bin add-flat-binary -r RW_LEGACY \
-f /tmp/b/chromebook_coral/u-boot.bin -n altfw/u-boot \
-c lzma -l 0x1110000 -e 0x1110000
In this case U-Boot is run from coreboot (actually Depthcharge, its
payload) so we cannot access CAR. Use the existing stack instead.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Sun, 26 Apr 2020 15:12:59 +0000 (09:12 -0600)]
x86: Add a way to detect running from coreboot
If U-Boot is running from coreboot we need to skip low-level init. Add
an way to detect this and to set the gd flag.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Sun, 26 Apr 2020 15:12:58 +0000 (09:12 -0600)]
x86: Move coreboot-table detection into common code
To support detecting booting from coreboot, move the code which locates
the coreboot tables into a common place. Adjust the algorithm slightly to
use a word comparison instead of string, since it is faster.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: correct the comments to 960KB]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Sun, 26 Apr 2020 15:12:57 +0000 (09:12 -0600)]
board: Add a gd flag for chain loading
When U-Boot is run from another boot loader, much of the low-level init
needs to be skipped.
Add a flag for this and adjust ll_boot_init() to use it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Sun, 26 Apr 2020 15:12:56 +0000 (09:12 -0600)]
pci: Avoid auto-config when chain loading
When U-Boot is not the first-stage bootloader we don't want to
re-configure the PCI devices, since this has already been done. Add a
check to avoid this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Sun, 26 Apr 2020 15:12:55 +0000 (09:12 -0600)]
x86: cpu: Skip init code when chain loading
When U-Boot is not the first-stage bootloader the interrupt and cache init
must be skipped, as well as init for various peripherals. Update the code
to add checks for this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Sun, 26 Apr 2020 15:12:54 +0000 (09:12 -0600)]
x86: apl: Skip init code when chain loading
When U-Boot is not the first-stage bootloader the FSP-S init must be
skipped. Update it to add a check.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Sun, 26 Apr 2020 15:12:53 +0000 (09:12 -0600)]
x86: fsp: Allow skipping init code when chain loading
It is useful to be able to boot the same x86 image on a device with or
without a first-stage bootloader. For example, with chromebook_coral, it
is helpful for testing to be able to boot the same U-Boot (complete with
FSP) on bare metal and from coreboot. It allows checking of things like
CPU speed, comparing registers, ACPI tables and the like.
When U-Boot is not the first-stage bootloader much of this code is not
needed and can break booting. Add checks for this to the FSP code.
Rather than checking for the amount of available SDRAM, just use 1GB in
this situation, which should be safe. Using 2GB may run into a memory
hole on some SoCs.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Sun, 26 Apr 2020 15:19:53 +0000 (09:19 -0600)]
acpi: Add an acpi command
It is useful to dump ACPI tables in U-Boot to see what has been generated.
Add a command to handle this.
To allow the command to find the tables, add a position into the global
data.
Support subcommands to list and dump the tables.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Simon Glass [Sun, 26 Apr 2020 15:19:52 +0000 (09:19 -0600)]
acpi: Move the xsdt pointer to acpi_ctx
Put this in the context along with the other important pointers.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Simon Glass [Sun, 26 Apr 2020 15:19:51 +0000 (09:19 -0600)]
acpi: Put table-setup code in its own function
We always write three basic tables to ACPI at the start. Move this into
its own function, along with acpi_fill_header(), so we can write a test
for this code.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 26 Apr 2020 15:19:50 +0000 (09:19 -0600)]
acpi: Move acpi_add_table() to generic code
Move this code to a generic location so that we can test it with sandbox.
This requires adding a few new fields to acpi_ctx, so drop the local
variables used in the original code.
Also use mapmem to avoid pointer-to-address casts which don't work on
sandbox.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Simon Glass [Sun, 26 Apr 2020 15:19:49 +0000 (09:19 -0600)]
acpi: Drop code for missing XSDT from acpi_write_rsdp()
We don't actually support tables without an XSDT so we can drop this dead
code.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Simon Glass [Sun, 26 Apr 2020 15:19:48 +0000 (09:19 -0600)]
x86: Allow devices to write ACPI tables
Call the new core function to permit devices to write their own ACPI
tables. These tables will appear after all other tables.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Simon Glass [Sun, 26 Apr 2020 15:19:47 +0000 (09:19 -0600)]
acpi: Convert part of acpi_table to use acpi_ctx
The current code uses an address but a pointer would result in fewer
casts. Also it repeats the alignment code in a lot of places so this would
be better done in a helper function.
Update write_acpi_tables() to make use of the new acpi_ctx structure,
adding a few helpers to clean things up.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Simon Glass [Sun, 26 Apr 2020 15:19:46 +0000 (09:19 -0600)]
acpi: Add a method to write tables for a device
A device may want to write out ACPI tables to describe itself to Linux.
Add a method to permit this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Simon Glass [Sun, 26 Apr 2020 15:19:45 +0000 (09:19 -0600)]
acpi: Add a binding for ACPI settings in the device tree
Devices need to report various identifiers in the ACPI tables. Rather than
hard-coding these in drivers it is typically better to put them in the
device tree.
Add a binding file to describe this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 5 Apr 2020 23:22:38 +0000 (17:22 -0600)]
x86: cbfs: Drop unwanted declaration
The intention here is add a forward declaration, not actually declare a
variable. Fix it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Heinrich Schuchardt [Wed, 29 Apr 2020 19:15:08 +0000 (21:15 +0200)]
efi_loader: fix 'efidebug bootorder'
* don't copy GUIDs for no reason
* shorten print format strings by using variable names
* don't use the run-time table to access exported functions
* check the result of malloc() (fixes Coverity CID 300331)
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Wed, 29 Apr 2020 18:21:39 +0000 (20:21 +0200)]
efi_loader: efidebug, avoid illegal memory access
For EFI_PERSISTENT_MEMORY_TYPE the 'efidebug memmap' command produces an
illegal memory access.
* Add the missing descriptive string for EFI_PERSISTENT_MEMORY_TYPE.
* Replace the check for EFI_MAX_MEMORY_TYPE by the ARRAY_SIZE() macro.
Reported-by: Coverity (CID 300336)
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Wed, 29 Apr 2020 17:20:35 +0000 (19:20 +0200)]
efi_loader: fix 'efidebug boot dump'
* Do not recreate a variable name that we already have as u16 string.
* Check the return value of malloc()
* EFI_NOT_FOUND cannot occur for a variable name returned by
GetNextVariableName(). Remove a print statement.
* Don't copy a GUID for no reason.
* Don't use the run-time service table to call exported functions.
* Don't pass NULL to show_efi_boot_opt_data() (fixes Coverity CID 300338).
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Wed, 22 Apr 2020 15:53:34 +0000 (17:53 +0200)]
MAINTAINERS: assign test/py/tests/test_efi*/ to EFI PAYLOAD
Some UEFI related files are not assigned currently. Add them to the
EFI PAYLOAD area.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
AKASHI Takahiro [Tue, 21 Apr 2020 00:38:38 +0000 (09:38 +0900)]
efi_loader: remove CONFIG_EFI_SECURE_BOOT in efi_loader.h
The guard doesn't make any difference, so remove it.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Suggested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Thu, 16 Apr 2020 18:31:56 +0000 (20:31 +0200)]
doc/efi: rework secure boot description
Ensure a uniform formatting.
Some rephrasing.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Thu, 19 Mar 2020 14:16:31 +0000 (15:16 +0100)]
efi_loader: identify EFI system partition
In subsequent patches UEFI variables shalled be stored on the EFI system
partition. Hence we need to identify the EFI system partition.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Thu, 19 Mar 2020 12:49:34 +0000 (13:49 +0100)]
part: detect EFI system partition
Up to now for MBR and GPT partitions the info field 'bootable' was set to 1
if either the partition was an EFI system partition or the bootable flag
was set.
Turn info field 'bootable' into a bit mask with separate bits for bootable
and EFI system partition.
This will allow us to identify the EFI system partition in the UEFI
sub-system.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Mon, 20 Apr 2020 10:44:56 +0000 (12:44 +0200)]
efi_loader: remove superfluous NULL check in bootefi.c
efi_free_pool() and efi_delete_handle() both check if their argument is
NULL. The caller should not duplicate this check.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Tue, 21 Apr 2020 16:44:39 +0000 (18:44 +0200)]
test/py: fix test_efi_secboot/conftest.py
If udisksctl is present
test/py/tests/test_efi_secboot/conftest.py
fails because the disk image is never mounted.
Normal users can only mount fuse file systems. Unfortunately fusefat is
still in an experimental state and seems not to work here correctly.
So as we have to be root or use the sudo command anyway delete all coding
referring to udisksctl.
--
We should not use mount point /mnt as this directory or one of its
sub-directories might already be in use as active mount points. Instead
create a new directory in the build root as mount point.
--
Remove debug print statements that have been commented out. print without
parentheses is anyway invalid in Python 3. And pytest anyway filters out
the output if there is no exception reported.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Tom Rini [Wed, 29 Apr 2020 14:39:18 +0000 (10:39 -0400)]
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-sh
- rmobile gen2/gen3 DTS sync and defconfig consolidation
Kuldeep Singh [Thu, 19 Mar 2020 10:04:16 +0000 (15:34 +0530)]
configs: ls2088ardb: Correct DEFAULT_DEVICE_TREE value
LS2088A-RDB has CONFIG_DEFAULT_DEVICE_TREE value correctly set as
"fsl-ls2088a-rdb-qspi" for QSPI secure/non-secure boot and TFA
non-secure boot mode.
Fix the value for TFA secure boot mode.
Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Madalin Bucur [Thu, 23 Apr 2020 13:25:22 +0000 (16:25 +0300)]
configs: enable DM_ETH support for LS1046ARDB
Enable DM_ETH on all the defconfigs for the LS1046ARDB board.
Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Madalin Bucur [Thu, 23 Apr 2020 13:25:21 +0000 (16:25 +0300)]
configs: enable DM_ETH support for LS1043ARDB
Enable DM_ETH on all the defconfigs for the LS1043ARDB board.
Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Madalin Bucur [Thu, 23 Apr 2020 13:25:19 +0000 (16:25 +0300)]
driver: net: fm: add DM ETH support
Probe the FMan MACs based on the device tree while
retaining the legacy code/functionality.
One notable change introduced here is that, for DM_ETH,
the name of the interfaces is corrected to the fmX-macY
format, that avoids the referral to the MAC block names
which were incorrect for FMan v3 devices (i.e. DTSEC,
TGEC) and had weird formatting (i.e. FM1@DTSEC6, FM1@TGEC1).
The legacy code is left unchanged in this respect.
Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Madalin Bucur [Thu, 23 Apr 2020 13:25:18 +0000 (16:25 +0300)]
driver: net: fm: add DM MDIO support
Allow the MDIO devices to be probed based on the device tree.
Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Madalin Bucur [Thu, 23 Apr 2020 13:25:17 +0000 (16:25 +0300)]
driver: net: fm: separate receive buffer free code
Move the receive buffer free code in a separate function.
Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Madalin Bucur [Thu, 23 Apr 2020 13:25:16 +0000 (16:25 +0300)]
driver: net: fm: change init_phy() param
Change the init_phy() parameter to simplify the code.
Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Madalin Bucur [Thu, 23 Apr 2020 13:25:15 +0000 (16:25 +0300)]
ARM: dts: add QorIQ DPAA 1 FMan v3 to LS1046ARDB
Introduce the QorIQ DPAA 1 Frame Manager nodes in the LS1046ARDB
device tree. The device tree fragments are copied over with little
modification from the Linux kernel source code.
Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Madalin Bucur [Thu, 23 Apr 2020 13:25:14 +0000 (16:25 +0300)]
ARM: dts: add QorIQ DPAA 1 FMan v3 for LS1046A
Add the QorIQ DPAA 1 Frame Manager v3 device tree nodes for the
LS1046A SoC. The device tree fragments are copied over with little
modification from the Linux kernel source code.
Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Madalin Bucur [Thu, 23 Apr 2020 13:25:13 +0000 (16:25 +0300)]
ARM: dts: add QorIQ DPAA 1 FMan v3 to LS1043ARDB
Introduce the QorIQ DPAA 1 Frame Manager nodes in the LS1043ARDB
device tree. The device tree fragments are copied over with little
modification from the Linux kernel source code.
Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Madalin Bucur [Thu, 23 Apr 2020 13:25:12 +0000 (16:25 +0300)]
ARM: dts: add QorIQ DPAA 1 FMan v3 for LS1043A
Add the QorIQ DPAA 1 Frame Manager v3 device tree nodes for the
LS1043A SoC. The device tree fragments are copied over with little
modification from the Linux kernel source code.
Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Madalin Bucur [Thu, 23 Apr 2020 13:25:11 +0000 (16:25 +0300)]
ARM: dts: add QorIQ DPAA 1 FMan v3 device tree nodes
Add the QorIQ DPAA Frame Manager v3 device tree nodes description.
The device tree fragments are copied over with little modification
from the Linux kernel source code.
Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Biwen Li [Fri, 17 Apr 2020 09:37:01 +0000 (17:37 +0800)]
configs: ls1012afrwy: drop env qspi_bootcmd
Drop useless environment variable installer and qspi_bootcmd
for ls1012afrwy.
Only 2 MB nor flash in ls1012afrwy. So cannot get kernel(30 MB) from
the nor flash, then drop it.
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Biwen Li [Mon, 20 Apr 2020 10:29:06 +0000 (18:29 +0800)]
configs: ls1046aqds: support distro boot
Add support of distro boot for ls1046aqds
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Yuantian Tang [Wed, 22 Apr 2020 03:34:39 +0000 (11:34 +0800)]
configs: ls1028aqds: add lpuart config
Add lpuart config to enable lpuart feature.
Signed-off-by: Vabhav Sharma <vabhav.sharma@nxp.com>
Signed-off-by: Yuantian Tang <andy.tang@nxp.com>.
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Yuantian Tang [Thu, 19 Mar 2020 08:48:25 +0000 (16:48 +0800)]
armv8: ls1028aqds: add lpuart dts support
Rename fsl-ls1028a-qds.dts to fsl-ls1028a-qds.dtsi so that
it can be used as common device tree for lpuart and duart.
Add lpuart device tree and duart device tree respectively
for qds which are used with duart and lpuart console.
Signed-off-by: Vabhav Sharma <vabhav.sharma@nxp.com>
Signed-off-by: Yuantian Tang <andy.tang@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Yuantian Tang [Thu, 19 Mar 2020 08:48:24 +0000 (16:48 +0800)]
arm: dts: ls1028a: add lpuart nodes
Add lpuart nodes to enable lpuart feature
Signed-off-by: Vabhav Sharma <vabhav.sharma@nxp.com>
Signed-off-by: Yuantian Tang <andy.tang@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Yuantian Tang [Thu, 19 Mar 2020 08:48:23 +0000 (16:48 +0800)]
board: freescale: ls1028a: mux changes for lpuart
mux changes in board file to enable lpuart1 and macro
define for lpuart1 used for mux changes in board configuation
register 13
Signed-off-by: Vabhav Sharma <vabhav.sharma@nxp.com>
Signed-off-by: Yuantian Tang <andy.tang@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Ioana Ciornei [Wed, 18 Mar 2020 14:47:49 +0000 (16:47 +0200)]
configs: lx2160ardb: enable CONFIG_DM_ETH and related
Enable CONFIG_DM_ETH and CONFIG_DM_MDIO and related configs for the
LX2160ARDB board.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Ioana Ciornei [Wed, 18 Mar 2020 14:47:48 +0000 (16:47 +0200)]
configs: ls2088ardb: enable CONFIG_DM_ETH and related
Enable CONFIG_DM_ETH and CONFIG_DM_MDIO and related configs for the
LS2088ARDB board.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Ioana Ciornei [Wed, 18 Mar 2020 14:47:47 +0000 (16:47 +0200)]
configs: ls1088ardb: enable CONFIG_DM_ETH and related
Enable CONFIG_DM_ETH and CONFIG_DM_MDIO and related configs for the
LS1088ARDB board.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Ioana Ciornei [Wed, 18 Mar 2020 14:47:46 +0000 (16:47 +0200)]
arm: dts: ls1088ardb: add DPMAC and PHY nodes
In order to maintain compatibility with the Linux DTS, the entire fsl-mc
node is added but instead of being probed by a dedicated bus driver it
will be a simple-mfd.
Also, annotate the external MDIO nodes and describe the PHYs (8 x
VSC8514, AQR105). Also, add phy-handles for the dpmacs to their
associated PHY.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Ioana Ciornei [Wed, 18 Mar 2020 14:47:45 +0000 (16:47 +0200)]
arm: dts: ls2088ardb: add DPMAC and PHY nodes
In order to maintain compatibility with the Linux DTS, the entire fsl-mc
node is added but instead of being probed by a dedicated bus driver it
will be a simple-mfd.
Also, annotate the external MDIO nodes and describe the PHYs (4 x AQR405
and 4 x CS4340). Also, add phy-handles for the dpmacs to their
associated PHY.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Ioana Ciornei [Wed, 18 Mar 2020 14:47:44 +0000 (16:47 +0200)]
arm: dts: lx2160ardb: add DPMAC and PHY nodes
In order to maintain compatibility with the Linux DTS, the entire fsl-mc
node is added but instead of being probed by a dedicated bus driver it
will be a simple-mfd.
Also, annotate the EMDIO1 node and describe the 2 AR8035 RGMII PHYs and
the 2 AQR107 PHYs. Also, add phy-handles for the dpmacs to their
associated PHY.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Ioana Ciornei [Wed, 18 Mar 2020 14:47:43 +0000 (16:47 +0200)]
arm: dts: ls1088a: add external MDIO nodes
Add the External MDIO1 device node found in the WRIOP global memory
region. This is needed for management of external PHYs.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Ioana Ciornei [Wed, 18 Mar 2020 14:47:42 +0000 (16:47 +0200)]
arm: dts: ls2088a: add external MDIO nodes
Add the External MDIO1 device node found in the WRIOP global memory
region. This is needed for management of external PHYs.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Ioana Ciornei [Wed, 18 Mar 2020 14:47:41 +0000 (16:47 +0200)]
arm: dts: lx2160a: add external MDIO nodes
Add the External MDIO device nodes found in the WRIOP global memory
region. This is needed for management of external PHYs.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Ioana Ciornei [Wed, 18 Mar 2020 14:47:40 +0000 (16:47 +0200)]
board: ls2088ardb: transition to DM_ETH
In case CONFIG_DM_ETH is enabled, no hardcoding is necessary for
DPAA2 Ethernet devices. Compile out any unnecessary setup when
CONFIG_DM_ETH is activated.
Also, force the PCI devices to be enumerated at probe time.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Ioana Ciornei [Wed, 18 Mar 2020 14:47:39 +0000 (16:47 +0200)]
board: ls1088ardb: transition to DM_ETH
In case CONFIG_DM_ETH is enabled, no hardcoding is necessary for
DPAA2 Ethernet devices. Compile out any unnecessary setup when
CONFIG_DM_ETH is activated.
Also, force the PCI devices to be enumerated at probe time.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Ioana Ciornei [Wed, 18 Mar 2020 14:47:38 +0000 (16:47 +0200)]
drivers: net: fsl-mc: add support for CONFIG_DM_ETH
Make any adjustments necessary in order to support DPAA2 devices probed
using CONFIG_DM_ETH. While at it, fixup some styling issues aroung the
switch-case statement.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Ioana Ciornei [Wed, 18 Mar 2020 14:47:37 +0000 (16:47 +0200)]
drivers: net: ldpaa: add DTS based probing support
When CONFIG_DM_ETH is enabled DPAA2 network interfaces will now probe
based on DTS nodes with the "fsl,qoriq-mc-dpmac" compatible.
In this case, transform the ldpaa_eth driver into a UCLASS_ETH driver
and reuse the _open()/_tx()/_stop() functions already inplemented.
For the moment, the ldpaa_eth driver will support both configurations:
with or without CONFIG_DM_ETH enabled. Any 'struct eth_device' occurrence
now has a matching 'struct udevice' made mutually exclusive based on the
state of CONFIG_DM_ETH.
Signed-off-by: Florin Laurentiu Chiculita <florinlaurentiu.chiculita@nxp.com>
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Ioana Ciornei [Wed, 18 Mar 2020 14:47:36 +0000 (16:47 +0200)]
drivers: net: add Layerscape mEMAC MDIO driver
Add a driver for the MDIO interface integrated in the mEMAC (Multi-rate
Ethernet Media Access Controller) and the Fman 10G Ethernet MACs.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Marek Vasut [Sun, 5 Apr 2020 16:08:58 +0000 (18:08 +0200)]
ARM: dts: rmobile: Scrub unused DT nodes
Remove DT nodes which are not used by U-Boot, like audio and video in/out
nodes. This saves about 35 kiB on the resulting U-Boot binary without any
impact on functionality.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Tom Rini [Tue, 28 Apr 2020 20:41:00 +0000 (16:41 -0400)]
Merge branch 'migrate-various-PHY-options'
- Finish migration of CONFIG_PHYLIB and a number of related symbols to
defconfig files.
Tom Rini [Tue, 28 Apr 2020 20:15:47 +0000 (16:15 -0400)]
configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Fri, 24 Apr 2020 19:35:53 +0000 (15:35 -0400)]
Convert CONFIG_PHYLIB et al to Kconfig
This converts the following to Kconfig:
CONFIG_PHYLIB
CONFIG_BITBANGMII
CONFIG_MV88E6352_SWITCH
CONFIG_MV88E61XX_SWITCH
CONFIG_PHYLIB_10G
CONFIG_PHY_AQUANTIA
CONFIG_PHY_ATHEROS
CONFIG_PHY_BROADCOM
CONFIG_PHY_CORTINA
CONFIG_PHY_DAVICOM
CONFIG_PHY_ET1011C
CONFIG_PHY_LXT
CONFIG_PHY_MARVELL
CONFIG_PHY_MICREL
CONFIG_PHY_NATSEMI
CONFIG_PHY_REALTEK
CONFIG_RTL8211X_PHY_FORCE_MASTER
CONFIG_PHY_SMSC
CONFIG_PHY_TERANETICS
CONFIG_PHY_TI
CONFIG_PHY_VITESSE
CONFIG_PHY_XILINX
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Fri, 24 Apr 2020 16:30:45 +0000 (12:30 -0400)]
sunxi: Fix PHY regression on A20-OLinuXino-Lime2 and A20-Olimex-SOM-EVB
When moving the PHYLIB PHY drivers around in Kconfig we did not at the
same time perform a careful migration of the related drivers and
sub-options. This lead to the case where previously Kconfig-enabled
driver choices were now disabled on some platforms. Correct this by
enabling both the PHY driver and sub-option on the above referenced
platforms.
Fixes:
af2cbfd6b982 ("drivers: net: Provide Kconfig menu for PHYLIB")
Fixes:
8728c97eff5b ("configs: Re-sync")
Reported-by: Dario <dario86@tutamail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Tue, 28 Apr 2020 19:55:57 +0000 (15:55 -0400)]
Prepare v2020.07-rc1
Signed-off-by: Tom Rini <trini@konsulko.com>
Masahiro Yamada [Fri, 17 Apr 2020 07:21:37 +0000 (16:21 +0900)]
kbuild: SPL/TPL: generate separate asm-offsets.h for SPL and TPL
Currently generic-asm-offsets.h and asm-offsets.h are generated based
on U-Boot proper config options. The same asm-offsets headers are used
for building U-Boot SPL/TPL, which causes potential offset mismatch if
U-Boot proper has different config options from U-Boot SPL/TPL.
This commit adds:
spl/include/generated/(generic-)asm-offsets.h
tpl/include/generated/(generic-)asm-offsets.h
spl/include/generated/(generic-)asm-offsets.h is generated if
CONFIG_SPL=y, and included when building SPL.
tpl/include/generated/(generic-)asm-offsets.h is generated if
CONFIG_TPL=y, and included when building TPL.
They are created before Kbuild descends into SPL/TPL object directories
and builds $(obj)/dts/dt-platdata.o because $(obj)/dts/dt-platdata.c
includes a bunch of headers.
Prepend -I$(obj)/include to $(UBOOTINCLUDE) so (generic-)asm-offsets.h
is searched in {spl,tpl}/include/generated/.
Requested-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Marek Vasut [Sat, 4 Apr 2020 14:12:48 +0000 (16:12 +0200)]
ARM: dts: rmobile: Synchronize Gen3 DTs with Linux 5.6.2
Synchronize R-Car Gen3 device trees with Linux 5.6.2,
commit
9fbe5c87eaa9b72db08425c52c373eb5f6537a0a .
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Sat, 4 Apr 2020 13:21:26 +0000 (15:21 +0200)]
ARM: dts: rmobile: Synchronize Gen2 DTs with Linux 5.6.2
Synchronize R-Car Gen2 device trees with Linux 5.6.2,
commit
9fbe5c87eaa9b72db08425c52c373eb5f6537a0a .
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Sun, 5 Apr 2020 16:17:42 +0000 (18:17 +0200)]
ARM: rmobile: Unify Gen3 Salvator-X(S) and ULCB defconfigs
The r8a779{5,6,65}_salvator-x and r8a779{5,6,65}_ulcb_defconfig were
building the same target, except for the default DT. The default DT is
however only a detail, as the actual DT to be used to configure U-Boot
is detected automatically based on the CPU ID, hence the default DT is
not meaningful. Unify each three defconfigs per board to reduce the
duplication.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Tom Rini [Tue, 28 Apr 2020 14:09:16 +0000 (10:09 -0400)]
Merge tag 'u-boot-amlogic-
20200428' of https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic
- fix sd-emmc controller A init on G12A/G12B/SM1 SoCs
- add GXBB USB PHY driver
- enable access to SPI NOR Flash on VIM2 and VIM3/VIM3L boards
- fix USB PHYs Power-Up on on VIM3/VIM3L boards
Tom Rini [Tue, 28 Apr 2020 14:08:47 +0000 (10:08 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-usb
- DWC2/DWC3 improvements
- Assorted bugfixes
Tom Rini [Tue, 28 Apr 2020 14:08:20 +0000 (10:08 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-socfpga
Tom Rini [Tue, 28 Apr 2020 13:52:01 +0000 (09:52 -0400)]
Merge tag 'dm-pull-27apr20' of git://git.denx.de/u-boot-dm
Move Python tools to use absolute paths
Minor buildman fixes for new features
Make libfdt code more similar to upsteam
Meenakshi Aggarwal [Mon, 27 Apr 2020 14:26:40 +0000 (19:56 +0530)]
lx2160a : Update eMMC boot environment variable
Update mcinitcmd and bootcmd environment variable for emmc boot.
Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Hou Zhiqiang [Tue, 28 Apr 2020 02:19:35 +0000 (10:19 +0800)]
configs: ls208xa: Enable GIC_V3_ITS config
Enable GIC_V3_ITS config to initialize the GIC redistributor
tables.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Hou Zhiqiang [Tue, 28 Apr 2020 02:19:34 +0000 (10:19 +0800)]
configs: ls1028a: Enable GIC_V3_ITS config
Enable GIC_V3_ITS config to initialize the GIC redistributor
tables.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Hou Zhiqiang [Tue, 28 Apr 2020 02:19:33 +0000 (10:19 +0800)]
configs: ls1088a: Enable GIC_V3_ITS config
Enable GIC_V3_ITS config to initialize the GIC redistributor
tables.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>