anv: Add missing untyped data port flush on PIPELINE_SELECT

See the comments in emit_apply_pipe_flushes().  Flushing HDC is not
sufficient in GPGPU mode, and we need to set the untyped data port flush
bit as well.

Fixes many dEQP-VK failures with INTEL_COMPUTE_CLASS=1 on Alchemist.

Fixes: 1067ec90a59 ("anv: Update PIPELINE_CONTROL flush when switching pipeline mode in TGL+")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20774>

radeonsi: remove some shadow reg optimization for bf1 game

This patch removes below shadow reg optimization. This is done for
Vega64 battlefield 1 crash when shadow regs enabled.

  + reset only dirty states with buffers in si_pm4_reset_emitted()
  + various draw states in si_begin_new_gfx_cs()

v2: remove first_cs parameter from si_pm4_reset_emitted() (Marek Olšák)

Signed-off-by: Yogesh Mohan Marimuthu <yogesh.mohanmarimuthu@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18301>

radv: allow NULL initial_preamble_cs in radv_amdgpu_winsys_cs_submit_sysmem()

In case of mcbp, shadowed_regs is initialized early in radv_queue_init()
function by submitting the command buffer. The command buffer is submitted in
radv_init_shadowed_regs_buffer_state() function. When RADV_DEBUG=noibs is used
radv_amdgpu_winsys_cs_submit_sysmem() function is used to submit command buffer.
radv_amdgpu_winsys_cs_submit_sysmem() crashes here because initial_preamble_cs
is NULL. This patch fixes the radv_amdgpu_winsys_cs_submit_sysmem() function
to support NULL initial_preamble_cs.

Signed-off-by: Yogesh Mohan Marimuthu <yogesh.mohanmarimuthu@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18301>

radv: fence complete struct is 4 qw size

also libdrm function amdgpu_cs_chunk_fence_info_to_data() has qw multiplier
and hence need not do it in radv_amdgpu_cs_submit().

Signed-off-by: Yogesh Mohan Marimuthu <yogesh.mohanmarimuthu@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18301>

radv: INDEX_TYPE and NUM_INSTANCES PKT3 are not shadowed

INDEX_TYPE and NUM_INSTANCES PKT3 should be always written
if shadowing is enabled since they are not shadowed.

Signed-off-by: Yogesh Mohan Marimuthu <yogesh.mohanmarimuthu@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18301>

radv: set preemp flag and pre_ena bit for shadowregs

Signed-off-by: Yogesh Mohan Marimuthu <yogesh.mohanmarimuthu@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18301>

radv: add support for register shadowing

Signed-off-by: Yogesh Mohan Marimuthu <yogesh.mohanmarimuthu@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18301>

radv: add shadowregs variable to RADV_DEBUG environment variable

Signed-off-by: Yogesh Mohan Marimuthu <yogesh.mohanmarimuthu@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18301>

ac,radeonsi: move shadow regs create ib preamble function to amd common

The si_create_shadowing_ib_preamble() function can be reused from radv also.
Hence it is moved.

Signed-off-by: Yogesh Mohan Marimuthu <yogesh.mohanmarimuthu@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18301>

ci/freedreno: Mark max-texture-size as a flake.

It's been a popular spurious fail in merges in the last week.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20894>

mesa: Fix format transform on big endian platforms

Reviewed-by: Emma Anholt <emma@anholt.net>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6001
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19051>

ci/zink: Update radv xfails for the recent shadow fixes.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20756>

ci/zink: Update TGL full-run xfails.

arb_shader_texture_lod-texgradcube was a fail incorrectly removed in the
sahdow changes.  line-smooth-* is new piglit coverage.

Haven't pinpointed when the rest were fixed.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20756>

ci/zink: Add coverage using the vulkan validation layer on lvp.

Let's make sure we aren't introducing new validation failures as
development proceeds.  Basically, we record the current set of known
validation failures from the CTS, and for any validation failure we have
the layer log it and abort.

I had started encoding xfails from piglit, but it turns out that piglit
and the validation layer fight about the teardown process, producing
use-after-frees.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20756>

zink: Re-emit the SpvBuiltInSampleMask access chain each load.

Otherwise, the access chain you emitted last time may not dominate the
current use.

Fixes the following validation failure in
dEQP-GLES31.functional.shaders.sample_variables.sample_mask_in.bits_unique_per_sample.multisample_texture_2:

  UNASSIGNED-CoreValidation-Shader-InconsistentSpirv(ERROR / SPEC):
  msgNum: 7060244 - Validation Error: [
  UNASSIGNED-CoreValidation-Shader-InconsistentSpirv ] Object 0: handle =
  0x55cf3cea2c60, type = VK_OBJECT_TYPE_DEVICE; | MessageID = 0x6bbb14 |
  SPIR-V module not valid: ID '67[%67]' defined in block '23[%23]' does
  not dominate its use in block '31[%31]'

Fixes: 8899f6a19857 ("zink: fix gl_SampleMaskIn spirv generation")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20756>

zink: Fix up mismatches of memory model vs addressing model.

MemoryModelVulkan was left out for CSes using it.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20756>

zink: Fix validation failure for maxLod < minLod.

GL lets you set a silly state, so do something plausible instead of
undefined.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20756>

zink: Add missing Flat decorations on some inputs.

Fixes validation failures:

Test case 'dEQP-GLES31.functional.android_extension_pack.shaders.es32.extension_directive.oes_sample_variables'..
MESA: error: Validation Error: [
UNASSIGNED-CoreValidation-Shader-InconsistentSpirv ] Object 0: handle =
0x563a1838b790, type = VK_OBJECT_TYPE_DEVICE; | MessageID = 0x6bbb14 |
SPIR-V module not valid: [VUID-StandaloneSpirv-Flat-04744] Fragment
OpEntryPoint operand 31 with Input interfaces with integer or float type
must have a Flat decoration for Entry Point id 4.
%gl_SampleId = OpVariable %_ptr_Input_uint Input

Test case 'KHR-GL46.shader_ballot_tests.ShaderBallotAvailability'..
MESA: error: Validation Error: [ UNASSIGNED-CoreValidation-Shader-InconsistentSpirv ] Object 0: handle = 0x5558e12f17e0, type = VK_OBJECT_TYPE_DEVICE; | MessageID = 0x6bbb14 | SPIR-V module not valid: [VUID-StandaloneSpirv-Flat-04744] Fragment OpEntryPoint operand 28 with Input interfaces with integer or float type must have a Flat decoration for Entry Point id 4.
  %gl_SubgroupLocalInvocationId = OpVariable %_ptr_Input_uint Input

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20756>

zink: Fatal error if requesting validation and we fail to load the layer.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20756>

dzn: Use core feature matching logic instead of rolling our own

This will print nice messages on unsupported features

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20801>

dzn: Implement subgroup size control extension

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20801>

dzn: Support more subgroup/quad ops

See the comment around supported shader stages - to avoid
introducing CTS failures, vertex/geometry support for
subgroups are turned off since they cannot support quads.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20801>

spirv2dxil: Support subgroup SPIR-V caps

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20801>

spirv2dxil: Lower some wave op properties

DXIL has no concept of subgroup mask ops, relative
shuffle ops, and everything is scalar.

Most wave broadcast ops support i1 overloads, except
for quad swap operations. Go figure. Use lower_bit_size
to promote those to i32 instead.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20801>

microsoft/compiler: Support emitting the SM6.6 wave size tag

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20801>

microsoft/compiler: Implement more wave/quad ops

This handles ballot, vote, shuffle, broadcast, and quads

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20801>

microsoft/compiler: Handle i1 overloads

Some wave ops can have bool/i1 overloads

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20801>

microsoft/compiler: Handle i2i1 and u2u1

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20801>

microsoft/compiler: Don't emit threadgroup barriers for graphics shaders

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20801>

spirv_to_dxil: Unify spirv_to_nir_options

Beyond the pure refactoring, this fixes spirv2dxil, which was using outdated values.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20884>

dzn: Enable Vulkan 1.1

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20823>

dzn: Fix independent blend check

Memcmp returns 0 on equal, so !memcmp means equal.

Fixes: c92729c3 ("dzn: Enable independent blending")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20823>

dzn: Don't expose variable pointers

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20823>

dzn: A single sampler descriptor set needs to support 1024 samplers

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20823>

dzn: Descriptor limits are based on binding tier, not heap tier

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20823>

dzn: Usage MULTISAMPLE_LOAD support instead of RT/DS support for MSAA

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20823>

dzn: Support EXTENDED_USAGE bit

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20823>

dzn: Usage image view usage instead of image usage

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20823>

dzn: Use SHADER_LOAD to indicate SAMPLED_IMAGE support

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20823>

dzn: Move patched vertex buffer capability check up a level

Some of these patched formats are also needed as (trivial) image
formats, so we can't just report vertex buffer as the only supported
operation.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20823>

dzn: When rendering to 3D, don't treat layers as subresources for barriers

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20823>

dzn: Set dynamic rendering caps

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20823>

dzn: Respect suspending/resuming flags to omit clears/resolves

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20823>

dzn: Use common physical device list/enumeration helpers

Implements EnumeratePhysicalDeviceGroups for us for free

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20823>

dzn: Support vkCmdDispatchBase

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20823>

spirv2dxil: Support dispatches with base group indices

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20823>

microsoft/compiler: Lower device index to zero

Maybe we'll support actual device groups at some point, but today
is not that day.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20823>

microsoft/compiler: Fix atomic image umax

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20823>

zink: fix implicit feedback loop detection

the code here was all expecting the VkPipelineStageFlags bitfield expansions,
but u_foreach_bit() gives the actual bit, so implicit feedback loops were never
actually being detected

instead, convert back to the bitfield at the top of the loop so the value works
as expected

Fixes: 9ba06579035 ("zink: make implicit feedback loop application stricter")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20863>

radv: print depth image size with RADV_DEBUG=img

This turned out to be useful when investigating a GPU hang.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20872>

intel/common: add a INTEL_DECODE variable to parameter decoder at runtime

Sometimes you want to diff 2 runs with INTEL_DEBUG=bat, but a tiny
allocation change can mess quite badly with offsets printed in the
decoding, making it hard to look at the diff with meld.

Fortunately our decoder can avoid printing offsets. We just need a
variable to specify that.

We still use the defaults specified by the driver but you can turn
things on/off with :

INTEL_DECODE=+color,-offsets,-floats INTEL_DEBUG=bat ./my_app

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20874>

intel/decoder: print out compute push constants

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20874>

intel/compiler/mesh: handle const data in task & mesh programs

Started showing up when nir_opt_large_constants call was moved in 88756cee8da.
Fixes dEQP-VK.mesh_shader.ext.smoke.monolithic.fullscreen_gradient*

Suggested-by: Kenneth Graunke <kenneth@whitecape.org>
Fixes: 88756cee8da ("intel/compiler: Run nir_opt_large_constants before scalarizing consts")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20876>

intel/compiler: fix generation of vec8/vec16 alu instruction

I stumbled on this when I inserted some suboptimal lowering code after all
optimizations. Adding certain subset of optimizations after my lowering code
actually avoided this bug, so I think it's not possible to hit this on upstream.

Let's fix this for the next person generating suboptimal code...

Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20857>

loader,glx,egl: remove is_different_gpu variable from loader

v2: fd number is different (Pierre-Eric)
v1: remove is_different_gpu (Pierre-Eric)

Signed-off-by: Yogesh Mohan Marimuthu <yogesh.mohanmarimuthu@amd.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13422>

glx: remove is_different_gpu variable from struct dri_screen

v2: fd number is different (Pierre-Eric)
v1: remove is_different_gpu (Pierre-Eric)

Signed-off-by: Yogesh Mohan Marimuthu <yogesh.mohanmarimuthu@amd.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13422>

egl: remove is_different_gpu variable from struct dri2_egl_display

v2: fd number is different (Pierre-Eric)
v1: remove is_different_gpu (Pierre-Eric)

Signed-off-by: Yogesh Mohan Marimuthu <yogesh.mohanmarimuthu@amd.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13422>

loader,glx,egl,vl,d3d: loader_get_user_preferred_fd() function to return original_fd

v1: return original_fd in loader_get_user_preferred_fd() (Pierre-Eric)
v2: fix *original_id crash for android, haiku... (Pierre-Eric)
    remove extra comment (Pierre-Eric)
v2: also return render fd in case of original_fd passed is NULL (Pierre-Eric)

Signed-off-by: Yogesh Mohan Marimuthu <yogesh.mohanmarimuthu@amd.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13422>

loader,glx: add render_gpu tag psc->driScreen and psc->fd

v1: add render_gpu_tag (Pierre-Eric)

Signed-off-by: Yogesh Mohan Marimuthu <yogesh.mohanmarimuthu@amd.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13422>

egl: add render_gpu tag to dri2_dpy->fd and dri2_dpy->dri_screen variable

v1: add render_gpu_tag (Pierre-Eric)

Signed-off-by: Yogesh Mohan Marimuthu <yogesh.mohanmarimuthu@amd.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13422>

egl/wayland: for prime, allocate linear_copy from display GPU VRAM

Allocates VRAM in display GPU in case of prime. Then the dma_buf is imported
into prime GPU.

v4: add image tag to __DRIimage (Marek Olšák)
v3: move display fd opening to separate commit (Pierre-Eric)
    image_format_to_fourcc() non-static to seperate commit (Pierre-Eric)
v2: close query fds after linear_copy buffer import (Marek Olšák)
    use image_format_to_fourcc() from loader_dri3_helper.c (Marek Olšák)

Signed-off-by: Yogesh Mohanmarimuthu <yogesh.mohanmarimuthu@amd.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13422>

loader: make image_format_to_fourcc() non-static

the image_format_to_fourcc() function will be used from
egl/wayland hence make it non-static. Also move the function
into loader_dri_helper.c from loader_dri3_helper.c since
loader_dri3_helper library depends on xcb which will make
egl wayland depend on xcb indirectly.

v2: add loader tag to extern image_format_to_fourcc() (Marek Olšák)

V3: move image_format_to_fourcc to loader_dri_helper.c
Signed-off-by: Yogesh Mohanmarimuthu <yogesh.mohanmarimuthu@amd.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13422>

egl/wayland: keep display fd open for prime

Keep the display fd open for creating DRI screen on display gpu in
case of prime.

Signed-off-by: Yogesh Mohanmarimuthu <yogesh.mohanmarimuthu@amd.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13422>

loader,glx,egl/x11: init dri_screen_display_gpu in struct loader_dri3_drawable

Initialize dri_screendisplay_gpu variable in struct laoder_dri3_drawable.
Also make dri_screen_display_gpu variable as input parameter to function
loader_dri3_drawable_init() since dri_screen variable is initialized this way.
This also helps to avoid duplicate initializing dri_screen_display_gpu
in glx and egl code.

Signed-off-by: Yogesh Mohanmarimuthu <yogesh.mohanmarimuthu@amd.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13422>

egl: create DRI screen for display GPU in case of prime

The created DRI screen can be used to allocate VRAM memory from
display GPU in case of prime.

v2: remove extra whitespace (Marek Olšák)

Signed-off-by: Yogesh Mohanmarimuthu <yogesh.mohanmarimuthu@amd.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13422>

egl,egl/x11: keep display fd open for prime

Keep the display fd open for creating DRI screen on display gpu in
case of prime. Also close the fd opened in dri2_display_destroy()

Signed-off-by: Yogesh Mohanmarimuthu <yogesh.mohanmarimuthu@amd.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13422>

egl: add fd_display_gpu to struct dri2_egl_display

fd opened on display gpu is saved in fd_display_gpu. It is later used
to create dri screen on display gpu.

Signed-off-by: Yogesh Mohanmarimuthu <yogesh.mohanmarimuthu@amd.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13422>

intel/genxml: set unused 3DSTATE_PS_EXTRA field as mbz

Wa_14015360517 mentions situations where HW produces invalid
occlusion query results when "Pixel Shader Does not write to RT"
bit is set.

"When Pixel Shader Kills Pixel is set, SW must perform a dummy render
 target write from the shader and not set this bit, so that Occlusion
 Query is correct."

Another situation is when writing to UAV or to NULL render target.
Patch sets field as 'must be zero' to discourage possible use of it.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20849>

mesa: move component bits queries as GL ES only

These enums have been removed/deprecated long time ago from desktop
GL. Here we remove them from modern GL while still allow for compat
contexts (~old apps). This change matches proprietary drivers and makes
our behaviour same within CTS with some tests.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20719>

v3dv: ensure we allocate at least the requested space for a CL

While we are already ensuring we allocate at least 8192 bytes should
this not be the first allocation and our allocations are typically just
a few bytes, multilayered framebuffers with large numbers of layers may
require more space than that in a single allocation.

Fixes: 3325950648 ('v3dv: increase BO allocation size when growing CLs')
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20871>

mesa: (more) correctly handle incomplete depth textures

according to GL spec, incomplete shadow samplers should return 0

this is technically possible for drivers to do using a RGBA texture in
the sense that somehow it's been working, but it's broken at the gallium-level
for what drivers should be expecting to see in such circumstances given
that such scenarios have been binding a RGBA texture to use with shadow samplers

instead, we can give drivers a fallback Z32 texture to avoid format/sampler
mismatches and complying with expected behavior

see also KHR-GL46.incomplete_texture_access.sampler for driver-specific testing

Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20817>

mesa: populate gl_program::ShadowSamplers mask from shader data

this data is already processed, it just isn't being propagated for whatever reason

Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20817>

mesa: remove dead parameter doc for _mesa_new_texture_object()

Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20817>

zink: pass depth swizzle data block to shader compile

with everything now hooked up, this should fix all related test failures

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20598>

zink: remove old depth swizzle workaround

this is already handled in match_tex_dests(), so it does nothing here

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20598>

zink: create another samplerview for shadow textures

when doing legacy depth texture mode sampling, it's necessary to keep
another view that has the right (R in component 0) swizzle so that depth
values can actually be returned in cases where it would otherwise be
a constant value due to swizzling

this also allows zink_sampler_view::shadow_needs_shader_swizzle to be removed

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20598>

zink: plug in the program/module parts of shadow texture mode emulation

this is clunky because of how big the swizzle data block is,
but the gist of it is the data block is stored onto the shader module key
after all the other data, and then it gets manually hashed/compared in
relevant cases

it's gross, but so is this functionality

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20598>

zink: block pipeline fast-pathing for any programs using depth texture modes

the data for this is too big to compress into a shader key, so these pipelines
will always consume more cpu

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20598>

zink: rework depth sampler splatting in shaders

this enables passing a zink_fs_shadow_key to the compiler to manually
apply a swizzle other than R/R/R/R to depth texture results

currently no data is passed, so the previous splatting behavior is preserved

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20598>

zink: add a fs shader key member to indicate depth texturing mode

this does nothing now besides track the data

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20598>

zink: track depth swizzle on samplerviews

this will provide info for shader rewrites

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20598>

zink: add an extra_data param to zink_shader_compile

this is extra shader key data that can be used in various ways per stage
and is too large to fit into the shader key

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20598>

zink: break out tex dest rewriting into separate function

no functional changes

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20598>

zink: flag old-style shadow tex mask for fragment shaders

this will be useful for handling depth texturing modes

only 32 are tracked now for performance reasons

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20598>

radv/winsys: fix incorrect PCIID for GFX11 in the null winsys

Fixes: bbad550f3d4 ("radv/winsys: fill real info for CHIP_GFX1100")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20850>

intel/fs: avoid cmod optimization on instruction with different write_mask

I've been running into failures with tests like :

dEQP-VK.robustness.robustness2.bind.notemplate.rgba32i.unroll.nonvolatile.uniform_buffer_dynamic.no_fmt_qual.len_4.samples_1.1d.frag

With the load_global_const_block_intel NIR intrinsic, you can load a
vec8/vec16 with a predicate. The predicate is correctly uniformized to
feed into the SEND instruction's flag register.

The problem is that a series of optimization first remove the
find_live_channel and then changes the broadcast into a simple MOV
instruction, on the assumption that the first channel is always active
if there is not control flow. This is correct.

But after that the cmod optimzation will remove this instruction :

   mov.nz.f0.0(16) null:D, vgrf16+0.0<0>:D NoMask

because it seems to be equivalent to :

   cmp.g.f0.0(16) vgrf16:D, vgrf12:D, 63d

In this case vgrf16 is the predicate to the load block SEND
instruction. Since the execution mask is different between both, some
of the channels of the SEND instruction end up not being loaded or
loaded with the wrong predication and we end up with incorrect UBO
data.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20852>

ci/piglit: Exclude swapbuffers front-readback tests with PIGLIT_PLATFORM=gbm.

These are expected to fail by the design of gbm.  Don't make each driver
track them.

Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Acked-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Martin Roukala <martin.roukala@mupuf.org>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20798>

ci/piglit: Add some common piglit skips for Mesa CI's testing of glx.

Since our X servers don't have a compositor, and we run tests in parallel,
various swap and frontbuffer tests won't ever be stable.  Rather than
having every driver have to track those flakes, make a general X11 skips
list as a known issue of our CI rather than pointing fingers at drivers.

Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Acked-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Martin Roukala <martin.roukala@mupuf.org>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20798>

ci: Move PIGLIT_PLATFORM settings out of the .tomls.

I'm going to add some automatic platform-based skips lists shortly (like
all-skips but more targeted), and this avoids needing to add them to each
.toml.

Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Acked-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Martin Roukala <martin.roukala@mupuf.org>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Acked-by: Erico Nunes <nunes.erico@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20798>

ci/freedreno: Switch the piglit job to using a deqp-runner suite.

This is one of the few remaining piglit-runner.sh users.

I think the notable change here is that we no longer set
EGL_PLATFORM=surfaceless like the piglit-runner.sh script did.

Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Acked-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Martin Roukala <martin.roukala@mupuf.org>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20798>

ci/zink: Clear issue #7781 flakes.

These tests all had valgrind UAF complaints that got fixed with the MR
closing that bug.

Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Acked-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Martin Roukala <martin.roukala@mupuf.org>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20798>

ci/zink: Drop glx-swap-copy xfails.

These now skip, since there are no preserved configs any more.

Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Acked-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Martin Roukala <martin.roukala@mupuf.org>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20798>

ci/zink: Drop xfail for copy-sub-buffer.

This is a skip these days, since the ext isn't supported in the kopper
world.

Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Acked-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Martin Roukala <martin.roukala@mupuf.org>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20798>

ci: Drop windowoverlap xfails, since it's always skipped.

e31d08d307d0aa2b2c7441e85f12c7e5deee4bc9 made it a skip, so no need to
track these any more.

Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Acked-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Martin Roukala <martin.roukala@mupuf.org>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20798>

ci/virgl: Disable iris traces for now while it's unstable.

4 spurious fails today it looks like with the same
"[drm:virtio_gpu_get_capsets] *ERROR* timed out waiting for cap set 0"
signature.  It had started by at least Jan 20.

https://gitlab.freedesktop.org/mesa/mesa/-/jobs/35240569#L2929 (today)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20868>

radv: stop using radv_pipeline_has_stage() in BindPipeline

this incurs a small amount of unnecessary cpu overhead as compared to just
checking bitflags

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20615>

hasvk: check the return value of anv_execbuf_add_bo_bitset()

This is the Hasvk version of Anv's:
  3d37950fd9dd ("anv: check the return value of anv_execbuf_add_bo_bitset()")

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20800>

hasvk: don't leave undefined values in exec->syncobj_values

This is the Hasvk version of Anv's:
  ad6a036a6815 ("anv: don't leave undefined values in exec->syncobj_values")

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20800>

ci: Uprev kernel to 6.1.7

Once prepared the archive in gfx-ci/linux for kernel 6.1 pointing to 6.1.7 and
with the patches for mesa, update the link. Also, enable some kconfigs needed
for the Adreno and USB.

One job in AMD required an expectation file to be updated with one test. Also,
an mt8192 device tree has been included in the arm64 trees for lava build.

Co-developed-by: Daniel Stone <daniels@collabora.com>
Co-developed-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Co-developed-by: Helen Koike <helen.koike@collabora.com>
Co-developed-by: David Heidelberg <david.heidelberg@collabora.com>
Signed-off-by: Sergi Blanch Torne <sergi.blanch.torne@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20855>

util/fossilize_db: fix macOS inotify build error

require <sys/inotify.h> for fossilize_db

Fixes: 3b69b67545b ("util/fossilize_db: add runtime RO foz db loading via FOZ_DBS_DYNAMIC_LIST")

Signed-off-by: Juston Li <justonli@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20755>