Raul Tambre [Tue, 15 Dec 2020 06:15:58 +0000 (08:15 +0200)]
Re-apply "[CMake][compiler-rt][AArch64] Avoid preprocessing LSE builtins separately"
aa772fc85e0f526615c78b9c3979c2be945a754c (D92530) has landed fixing relocations on Darwin.
3000c19df64f89ff319590f3a6e4d6b93d20983d (D93236) has landed working around an assembly parser bug on Darwin.
Previous quick-fix
d9697c2e6b153ac7dc40a69450d9b672f71b1029 (D93198) included in this commit.
Invoking the preprocessor ourselves is fragile and would require us to replicate CMake's handling of definitions, compiler flags, etc for proper compatibility.
In my toolchain builds this notably resulted in a bunch of warnings from unused flags as my CMAKE_C_FLAGS includes CPU-specific optimization options.
Notably this part was already duplicating the logic for VISIBILITY_HIDDEN define.
Instead, symlink the files and set the proper set of defines on each.
This should also be faster as we avoid invoking the compiler multiple times.
Fixes https://llvm.org/PR48494
Differential Revision: https://reviews.llvm.org/D93278
Raul Tambre [Tue, 15 Dec 2020 06:12:44 +0000 (08:12 +0200)]
[Compiler-rt][AArch64] Workaround for .cfi_startproc assembler parser bug.
Put .cfi_startproc on a new line to avoid hitting the assembly parser bug in MasmParser::parseDirectiveCFIStartProc().
Reviewed By: tambre
Differential Revision: https://reviews.llvm.org/D93236
Med Ismail Bennani [Tue, 15 Dec 2020 02:40:47 +0000 (03:40 +0100)]
[lldb/API] Expose Target::CreateBreakpoint(..., move_to_nearest_code) overload
This patch exposes the Target::CreateBreakpoint overload with the
boolean argument to move to the neareast code to the SBAPI.
This is useful when creating column breakpoints to restrict lldb's
resolution to the pointed source location, preventing it to go to the next
line.
rdar://
72196842
Differential Revision: https://reviews.llvm.org/D93266
Signed-off-by: Med Ismail Bennani <medismail.bennani@gmail.com>
Med Ismail Bennani [Tue, 15 Dec 2020 05:11:35 +0000 (06:11 +0100)]
Revert "[lldb/API] Expose Target::CreateBreakpoint(..., move_to_nearest_code) overload"
This reverts commit
04696ff002e7d311887b7b7e6e171340a0623dd9.
Exposing the LazyBool private type in SBTarget.h breaks some tests.
Hsiangkai Wang [Fri, 11 Dec 2020 07:16:08 +0000 (15:16 +0800)]
[RISCV] Define vadd/vsub/vrsub intrinsics and lower to V instructions.
This patch is based on the proposal from Roger Ferrer Ibanez.
http://lists.llvm.org/pipermail/llvm-dev/2020-October/145850.html
Differential Revision: https://reviews.llvm.org/D93013
LLVM GN Syncbot [Tue, 15 Dec 2020 03:35:00 +0000 (03:35 +0000)]
[gn build] Port
d2ed9d6b7ec
Nico Weber [Tue, 15 Dec 2020 03:33:29 +0000 (22:33 -0500)]
Reland "[MachineDebugify] Insert synthetic DBG_VALUE instructions"
This reverts commit
841f9c937f6e593c926a26aedf054436eb807fe6.
The change landed many months ago; something else broke those tests.
Med Ismail Bennani [Tue, 15 Dec 2020 02:40:47 +0000 (03:40 +0100)]
[lldb/API] Expose Target::CreateBreakpoint(..., move_to_nearest_code) overload
This patch exposes the Target::CreateBreakpoint overload with the
boolean argument to move to the neareast code to the SBAPI.
This is useful when creating column breakpoints to restrict lldb's
resolution to the pointed source location, preventing it to go to the next
line.
rdar://
72196842
Differential Revision: https://reviews.llvm.org/D93266
Signed-off-by: Med Ismail Bennani <medismail.bennani@gmail.com>
Nico Weber [Tue, 15 Dec 2020 03:13:40 +0000 (22:13 -0500)]
Revert "[MachineDebugify] Insert synthetic DBG_VALUE instructions"
This reverts commit
2a5675f11d3bc803a245c0e2a3b47491c8f8a065.
The tests it adds fail: https://reviews.llvm.org/D78135#2453736
Nico Weber [Tue, 15 Dec 2020 03:12:15 +0000 (22:12 -0500)]
Revert "[Debugify] Support checking Machine IR debug info"
This reverts commit
c4d2d4337d50bed3cafd564daece1a197005b22b.
Necessary to revert
2a5675f11d3bc803a245c0e.
Luo, Yuanke [Sun, 13 Dec 2020 03:14:46 +0000 (11:14 +0800)]
[X86] Add test case for commit
e52bc1d2bba794b.
Differential Revision: https://reviews.llvm.org/D93173
Nico Weber [Tue, 15 Dec 2020 03:04:41 +0000 (22:04 -0500)]
Revert "Lex: Migrate HeaderSearch::LoadedModuleMaps to FileEntryRef"
This reverts commit
a40db5502b2515a6f2f1676b5d7a655ae0f41179.
and follow-up
d636b881bb9214938973098a012fad453082c444
Somewhat speculative, likely broke check-clang on Windows:
https://reviews.llvm.org/D92975#2453482
Nico Weber [Tue, 15 Dec 2020 02:59:51 +0000 (21:59 -0500)]
Revert "[amdgpu] Default to code object v3"
This reverts commit
4b2e7d0215021d0d1df1a6319884b21d33936265.
Breaks check-clang, see https://reviews.llvm.org/D93258#2453600
Qiu Chaofan [Tue, 15 Dec 2020 02:30:00 +0000 (10:30 +0800)]
[NFC] [Legalizer] Use common method for expanding fp-to-int operands
Reviewed By: RKSimon, steven.zhang
Differential Revision: https://reviews.llvm.org/D92481
Rong Xu [Tue, 15 Dec 2020 02:41:09 +0000 (18:41 -0800)]
[PGO] remove unintentional code in early commit
Remove unintentional code in
commit 54e03d [PGO] Verify BFI counts after loading profile data.
River Riddle [Tue, 15 Dec 2020 02:07:45 +0000 (18:07 -0800)]
[mlir][Inliner] Refactor the inliner to use nested pass pipelines instead of just canonicalization
Now that passes have support for running nested pipelines, the inliner can now allow for users to provide proper nested pipelines to use for optimization during inlining. This revision also changes the behavior of optimization during inlining to optimize before attempting to inline, which should lead to a more accurate cost model and prevents the need for users to schedule additional duplicate cleanup passes before/after the inliner that would already be run during inlining.
Differential Revision: https://reviews.llvm.org/D91211
Siva Chandra [Tue, 15 Dec 2020 02:05:19 +0000 (18:05 -0800)]
[libc] Add remainder[f|l] and remquo[f|l] to the list of aarch64 entrypoints.
Xiang1 Zhang [Tue, 15 Dec 2020 01:51:21 +0000 (17:51 -0800)]
[Debugify] Support checking Machine IR debug info
Add mir-check-debug pass to check MIR-level debug info.
For IR-level, currently, LLVM have debugify + check-debugify to generate
and check debug IR. Much like the IR-level pass debugify, mir-debugify
inserts sequentially increasing line locations to each MachineInstr in a
Module, But there is no equivalent MIR-level check-debugify pass, So now
we support it at "mir-check-debug".
Reviewed By: djtodoro
Differential Revision: https://reviews.llvm.org/D91595
Siva Chandra [Tue, 15 Dec 2020 01:51:13 +0000 (17:51 -0800)]
[libc][NFC] Skip adding dummy targets for skipped unit tests.
Xiang1 Zhang [Tue, 15 Dec 2020 01:42:21 +0000 (17:42 -0800)]
Revert "[Debugify] Support checking Machine IR debug info"
This reverts commit
57a3d9ec4a8c1422f07264bed9f12a4ea416707e.
Cheng Wang [Fri, 4 Dec 2020 10:21:48 +0000 (18:21 +0800)]
[libc] Add memcmp implementation.
Reviewed By: gchatelet
Differential Revision: https://reviews.llvm.org/D93009
Xiang1 Zhang [Tue, 15 Dec 2020 01:28:34 +0000 (17:28 -0800)]
[Debugify] Support checking Machine IR debug info
Add mir-check-debug pass to check MIR-level debug info.
For IR-level, currently, LLVM have debugify + check-debugify to generate
and check debug IR. Much like the IR-level pass debugify, mir-debugify
inserts sequentially increasing line locations to each MachineInstr in a
Module, But there is no equivalent MIR-level check-debugify pass, So now
we support it at "mir-check-debug".
Reviewed By: djtodoro
Differential Revision: https://reviews.llvm.org/D95195
Craig Topper [Tue, 15 Dec 2020 01:19:53 +0000 (17:19 -0800)]
[RISCV] Prevent assertion in the assembler if vmerge or vfmerge are given a V0 destination.
Craig Topper [Tue, 15 Dec 2020 00:48:56 +0000 (16:48 -0800)]
[RISCV] Handle Match_InvalidSImm5 in RISCVAsmParser::MatchAndEmitInstruction
Craig Topper [Tue, 15 Dec 2020 00:48:20 +0000 (16:48 -0800)]
[RISCV] Teach debug output from assembly parser to print register names instead of enum values.
Alexander Kornienko [Mon, 14 Dec 2020 22:06:36 +0000 (23:06 +0100)]
Remove the ast_type_traits namespace.
This is the final cleanup after https://reviews.llvm.org/D74499
Reviewed By: steveire
Differential Revision: https://reviews.llvm.org/D93244
Siva Chandra Reddy [Tue, 15 Dec 2020 01:12:08 +0000 (17:12 -0800)]
[libc][Obvious] Mark functions in DummyFEnv.h as static inline.
Jon Chesterfield [Tue, 15 Dec 2020 01:10:41 +0000 (01:10 +0000)]
[amdgpu] Default to code object v3
[amdgpu] Default to code object v3
v4 is not yet readily available, and doesn't appear
to be implemented in the back end
Reviewed By: t-tye
Differential Revision: https://reviews.llvm.org/D93258
Reid Kleckner [Tue, 15 Dec 2020 00:56:04 +0000 (16:56 -0800)]
Revert "ADT: Migrate users of AlignedCharArrayUnion to std::aligned_union_t, NFC"
We determined that the MSVC implementation of std::aligned* isn't suited
to our needs. It doesn't support 16 byte alignment or higher, and it
doesn't really guarantee 8 byte alignment. See
https://github.com/microsoft/STL/issues/1533
Also reverts "ADT: Change AlignedCharArrayUnion to an alias of std::aligned_union_t, NFC"
Also reverts "ADT: Remove AlignedCharArrayUnion, NFC" to bring back
AlignedCharArrayUnion.
This reverts commit
4d8bf870a82765eb0d4fe53c82f796b957c05954.
This reverts commit
d10f9863a5ac1cb681af07719650c44b48f289ce.
This reverts commit
4b5dc150b9862271720b3d56a3e723a55dd81838.
Changpeng Fang [Tue, 15 Dec 2020 00:34:32 +0000 (16:34 -0800)]
AMDGPU: If a store defines (alias) a load, it clobbers the load.
Summary:
If a store defines (must alias) a load, it clobbers the load.
Fixes: SWDEV-258915
Reviewers:
arsenm
Differential Revision:
https://reviews.llvm.org/D92951
Nemanja Ivanovic [Tue, 15 Dec 2020 00:07:45 +0000 (18:07 -0600)]
[PowerPC] Temporarily disable asan longjmp tests
Commit
bfdc19e77868b849b5c636bf0512970264aef571 seems to have broken
some PPC bots with a couple of asan test cases. Disable those test
cases for now until I can resolve the issue.
Rong Xu [Mon, 14 Dec 2020 23:54:28 +0000 (15:54 -0800)]
[PGO] Verify BFI counts after loading profile data
This patch adds the functionality to compare BFI counts with real
profile
counts right after reading the profile. It will print remarks under
-Rpass-analysis=pgo, or the internal option -pass-remarks-analysis=pgo.
Differential Revision: https://reviews.llvm.org/D91813
Harald van Dijk [Mon, 14 Dec 2020 23:47:27 +0000 (23:47 +0000)]
[X86] Fix variadic argument handling for x32
The X86-64 ABI defines va_list as
typedef struct {
unsigned int gp_offset;
unsigned int fp_offset;
void *overflow_arg_area;
void *reg_save_area;
} va_list[1];
This means the size, alignment, and reg_save_area offset will depend on
whether we are in LP64 or in ILP32 mode, so this commit adds the checks.
Additionally, the VAARG_64 pseudo-instruction assumed 64-bit pointers, so
this commit adds a VAARG_X32 pseudo-instruction that behaves just like
VAARG_64, except for assuming 32-bit pointers.
Some of these changes were originally done by
Michael Liao <michael.hliao@gmail.com>.
Fixes https://bugs.llvm.org/show_bug.cgi?id=48428.
Reviewed By: RKSimon
Differential Revision: https://reviews.llvm.org/D93160
Nico Weber [Mon, 14 Dec 2020 23:24:50 +0000 (18:24 -0500)]
[lld/mac] implement -compatibility_version, -current_version
Differential Revision: https://reviews.llvm.org/D93237
Peter Collingbourne [Mon, 14 Dec 2020 21:57:59 +0000 (13:57 -0800)]
scudo: Remove positional template arguments for secondary cache. NFCI.
Make these arguments named constants in the Config class instead
of being positional arguments to MapAllocatorCache. This makes the
configuration easier to follow.
Eventually we should follow suit with the other classes but this is
a start.
Differential Revision: https://reviews.llvm.org/D93251
Sanjay Patel [Mon, 14 Dec 2020 23:30:40 +0000 (18:30 -0500)]
[VectorCombine] add alignment test for gep load; NFC
Nico Weber [Mon, 14 Dec 2020 23:23:15 +0000 (18:23 -0500)]
[gn build] (semi-manually) port
19d57b5c42b
Nico Weber [Mon, 14 Dec 2020 23:22:54 +0000 (18:22 -0500)]
[gn build] (semi-manually) port
7ad49aec125
Eugene Zhulenev [Mon, 14 Dec 2020 22:55:46 +0000 (14:55 -0800)]
[mlir] Fix opaque struct typedef in AsyncRuntime header
Differential Revision: https://reviews.llvm.org/D93250
Richard Uhler [Mon, 14 Dec 2020 22:48:57 +0000 (14:48 -0800)]
[mlir] Add section page for Rationale docs.
With a brief overview and summary of each of the Rationale docs.
Differential Revision: https://reviews.llvm.org/D93245
Gulfem Savrun Yeniceri [Mon, 14 Dec 2020 21:56:11 +0000 (13:56 -0800)]
[clang][IR] Add support for leaf attribute
This patch adds support for leaf attribute as an optimization hint
in Clang/LLVM.
Differential Revision: https://reviews.llvm.org/D90275
Louis Dionne [Mon, 14 Dec 2020 21:58:52 +0000 (16:58 -0500)]
[libc++] Remove unnecessary static assertion in allocate_shared
Checking that `T` is constructible from `Args...` is technically not
required by the Standard, although any implementation will obviously
error out if that's not satisfied. However, this check is incompatible
with using Allocator construction in the control block (upcoming change
as part of implementing P0674), so I'm removing it now to reduce the
upcoming diff as much as possible.
Differential Revision: https://reviews.llvm.org/D93246
Louis Dionne [Mon, 14 Dec 2020 22:40:56 +0000 (17:40 -0500)]
[libc++] NFCI: Return pointer instead of reference from __shared_ptr_emplace helper method
This makes __get_alloc consistent with __get_elem, and will reduce the
diff required to implement P0674R1.
Sanjay Patel [Mon, 14 Dec 2020 22:20:15 +0000 (17:20 -0500)]
[VectorCombine] make load transform poison-safe
As noted in D93229, the transform from scalar load to vector load
potentially leaks poison from the extra vector elements that are
being loaded.
We could use freeze here (and x86 codegen at least appears to be
the same either way), but we already have a shuffle in this logic
to optionally change the vector size, so let's allow that
instruction to serve both purposes.
Differential Revision: https://reviews.llvm.org/D93238
Duncan P. N. Exon Smith [Mon, 14 Dec 2020 22:41:12 +0000 (14:41 -0800)]
Adapt lldb to
a40db5502b2515a6f2f1676b5d7a655ae0f41179
The bots just told me about a place in LLDB I missed in
a40db5502b2515a6f2f1676b5d7a655ae0f41179 when changing
`HeaderSearch::LoadedModuleMaps`, but I think this will fix it.
Duncan P. N. Exon Smith [Mon, 14 Dec 2020 22:28:59 +0000 (14:28 -0800)]
Add comment to closing brace of anonymous namespace, NFC
Duncan P. N. Exon Smith [Mon, 14 Dec 2020 22:36:59 +0000 (14:36 -0800)]
AST: Silence an instance of -Wsign-compare, NFC
Looks this this was added by
68f53960e17d93c3a2727164dac4e54140bd98ba.
Duncan P. N. Exon Smith [Wed, 9 Dec 2020 22:46:34 +0000 (14:46 -0800)]
Lex: Migrate HeaderSearch::LoadedModuleMaps to FileEntryRef
Migrate `HeaderSearch::LoadedModuleMaps` and a number of APIs over to
`FileEntryRef`. This should have no functionality change. Note that two
`FileEntryRef`s hash the same if they point at the same `FileEntry`.
Differential Revision: https://reviews.llvm.org/D92975
Craig Topper [Mon, 14 Dec 2020 21:51:00 +0000 (13:51 -0800)]
[LoopIdiomRecognize] Teach detectShiftUntilZeroIdiom to recognize loops where the counter is decrementing.
This adds support for loops like
unsigned clz(unsigned x) {
unsigned w = sizeof (x) * CHAR_BIT;
while (x) {
w--;
x >>= 1;
}
return w;
}
and
unsigned clz(unsigned x) {
unsigned w = sizeof (x) * CHAR_BIT - 1;
while (x >>= 1) {
w--;
}
return w;
}
To support these we look for add x, -1 as well as add x, 1 that
we already matched. If the value was -1 we need to subtract from
the initial counter value instead of adding to it.
Fixes PR48404.
Differential Revision: https://reviews.llvm.org/D92745
River Riddle [Mon, 14 Dec 2020 22:14:22 +0000 (14:14 -0800)]
[mlir][OpDefGen] Add support for generating local functions for shared utilities
This revision adds a new `StaticVerifierFunctionEmitter` class that emits local static functions in the .cpp file for shared operation verification. This class deduplicates shared operation verification code by emitting static functions alongside the op definitions. These methods are local to the definition file, and are invoked within the operation verify methods. The first bit of shared verification is for the type constraints used when verifying operands and results. An example is shown below:
```
static LogicalResult localVerify(...) {
...
}
LogicalResult OpA::verify(...) {
if (failed(localVerify(...)))
return failure();
...
}
LogicalResult OpB::verify(...) {
if (failed(localVerify(...)))
return failure();
...
}
```
This allowed for saving >400kb of code size from a downstream TensorFlow project (~15% of MLIR code size).
Differential Revision: https://reviews.llvm.org/D91381
Stanislav Mekhanoshin [Wed, 25 Nov 2020 23:27:49 +0000 (15:27 -0800)]
[AMDGPU] Use multi-dword flat scratch for spilling
Differential Revision: https://reviews.llvm.org/D93067
Louis Dionne [Fri, 11 Dec 2020 17:20:06 +0000 (12:20 -0500)]
[libc++] Refactor allocate_shared to use an allocation guard
This commit is a step towards making it easier to add support for arrays
in allocate_shared. Adding support for arrays will require writing multiple
functions, and the current complexity of writing allocate_shared is
prohibitive for understanding.
Differential Revision: https://reviews.llvm.org/D93130
Bardia Mahjour [Mon, 14 Dec 2020 21:54:20 +0000 (16:54 -0500)]
Revert "[DDG] Data Dependence Graph - DOT printer"
This reverts commit
fd4a10732c8bd646ccc621c0a9af512be252f33a, to
investigate the failure on windows: http://lab.llvm.org:8011/#/builders/127/builds/3274
Christian Sigg [Mon, 14 Dec 2020 21:45:37 +0000 (22:45 +0100)]
Revert "[mlir] Remove methods from mlir::OpState that just forward to mlir::Operation."
This reverts commit
6f271e921ba48f4c4fa54bbd2c7a4c548ca5e59e.
Differential Revision: https://reviews.llvm.org/D93242
Philip Reames [Mon, 14 Dec 2020 21:42:25 +0000 (13:42 -0800)]
Speculative fix for build bot failures
(The clang build fails for me locally, so this is based on built bot output and a guess as to root cause.)
f5fe849 made the execution of LAA conditional, so I'm guessing that's the root cause.
Bardia Mahjour [Mon, 14 Dec 2020 21:34:48 +0000 (16:34 -0500)]
[DDG] Data Dependence Graph - DOT printer
This patch implements a DDG printer pass that generates a graph in
the DOT description language, providing a more visually appealing
representation of the DDG. Similar to the CFG DOT printer, this
functionality is provided under an option called -dot-ddg and can
be generated in a less verbose mode under -dot-ddg-only option.
Differential Revision: https://reviews.llvm.org/D90159
Javier Setoain [Mon, 14 Dec 2020 21:30:53 +0000 (21:30 +0000)]
[mlir][ArmSVE][RFC] Add an ArmSVE dialect
This revision starts an Arm-specific ArmSVE dialect discussed in the discourse RFC thread:
https://llvm.discourse.group/t/rfc-vector-dialects-neon-and-sve/2284
Reviewed By: rriddle
Differential Revision: https://reviews.llvm.org/D92172
Matt Arsenault [Thu, 19 Nov 2020 23:53:28 +0000 (18:53 -0500)]
OpaquePtr: Require byval on x86_intrcc parameter 0
Currently the backend special cases x86_intrcc and treats the first
parameter as byval. Make the IR require byval for this parameter to
remove this special case, and avoid the dependence on the pointee
element type.
Fixes bug 46672.
I'm not sure the IR is enforcing all the calling convention
constraints. clang seems to ignore the attribute for empty parameter
lists, but the IR tolerates it.
Matt Arsenault [Mon, 14 Dec 2020 21:13:29 +0000 (16:13 -0500)]
clang: Add byval on x86_intrcc parameter 0
This will allow removing the special case treatment of the parameter
and avoid depending on the pointer's element type.
Louis Dionne [Thu, 10 Dec 2020 23:28:13 +0000 (18:28 -0500)]
[libc++] Split allocator_traits and pointer_traits out of <memory>
In addition to making the code a lot easier to grasp by localizing many
helper functions to the only file where they are actually needed, this
will allow creating helper functions that depend on allocator_traits
outside of <memory>.
This is done as part of implementing array support in allocate_shared,
which requires non-trivial array initialization algorithms that would be
better to keep out of <memory> for sanity. It's also a first step towards
splitting up our monolithic headers into finer grained ones, which will
make it easier to reuse functionality across the library. For example,
it's just weird that we had to define `addressof` inside <type_traits>
to avoid circular dependencies -- instead it's better to implement those
in true helper headers.
Differential Revision: https://reviews.llvm.org/D93074
Zequan Wu [Sat, 12 Dec 2020 01:21:23 +0000 (17:21 -0800)]
[NFC] cleanup cg-profile emission on TargetLowerinng
Differential Revision: https://reviews.llvm.org/D93150
Hafiz Abid Qadeer [Mon, 14 Dec 2020 19:11:51 +0000 (19:11 +0000)]
Add initial support for multilibs in Baremetal toolchain.
This patch add support of riscv multilibs in the Baremetal toolchain. It is
a bit different to what is done in GNU.cpp as we are not iterating a
GNU sysroot to find the multilibs. This is intended for an llvm only
toolchain. We are not checking for the presence of any runtime bits to
enable a specific multilib.
I have structured the patch so that other targets for which
there is no multilibs support yet in Baremetal.cpp (e.g. arm-none-eabi)
will not be affected. Patch also allows some multilibs reuse.
Long term, I would like to go in the direction of data-driven specification of
multilib directories and flags.
Reviewed By: jroelofs
Differential Revision: https://reviews.llvm.org/D93138
Guozhi Wei [Mon, 14 Dec 2020 20:48:55 +0000 (12:48 -0800)]
[MBP] Prevent rotating a chain contains entry block
The entry block should always be the first BB in a function.
So we should not rotate a chain contains the entry block.
Differential Revision: https://reviews.llvm.org/D92882
Philip Reames [Mon, 14 Dec 2020 20:42:19 +0000 (12:42 -0800)]
[LAA] Relax restrictions on early exits in loop structure
his is a preparation patch for supporting multiple exits in the loop vectorizer, by itself it should be mostly NFC. This patch moves the loop structure checks from LAA to their respective consumers (where duplicates don't already exist). Moving the checks does end up changing some of the optimization warnings and debug output slightly, but nothing that appears to be a regression.
Why do this? Well, after auditing the code, I can't actually find anything in LAA itself which relies on having all instructions within a loop execute an equal number of times. This patch simply makes this explicit so that if one consumer - say LV in the near future (hopefully) - wants to handle a broader class of loops, it can do so.
Differential Revision: https://reviews.llvm.org/D92066
River Riddle [Mon, 14 Dec 2020 20:32:21 +0000 (12:32 -0800)]
[mlir] Change the internal representation of FrozenRewritePatternList to use shared_ptr
This will allow for caching pattern lists across multiple pass instances, such as when multithreading. This is an extremely important invariant for PDL patterns, which are compiled at runtime when the FrozenRewritePatternList is built.
Differential Revision: https://reviews.llvm.org/D93146
Christian Sigg [Mon, 14 Dec 2020 07:34:39 +0000 (08:34 +0100)]
[mlir] Remove methods from mlir::OpState that just forward to mlir::Operation.
All call sites have been converted in previous changes.
Reviewed By: mehdi_amini
Differential Revision: https://reviews.llvm.org/D93176
Michael Kruse [Mon, 14 Dec 2020 17:05:51 +0000 (11:05 -0600)]
[flang] Fix copy elision assumption.
Before this patch, the Restorer depended on copy elision to happen.
Without copy elision, the function ScopedSet calls the move constructor
before its dtor. The dtor will prematurely restore the reference to the
original value.
Instead of relying the compiler to not use the Restorer's copy
constructor, delete its copy and assign operators. Hence, callers cannot
move or copy a Restorer object anymore, and have to explicitly provide
the reset state. ScopedSet avoids calling move/copy operations by
relying on unnamed return value optimization, which is mandatory in
C++17.
Reviewed By: klausler
Differential Revision: https://reviews.llvm.org/D88797
River Riddle [Mon, 14 Dec 2020 19:53:43 +0000 (11:53 -0800)]
[mlir][OpAsmParser] Add support for parsing integer literals without going through IntegerAttr
Some operations use integer literals as part of their custom format that don't necessarily map to an internal IntegerAttr. This revision exposes the same `parseInteger` functions as the DialectAsmParser to allow for these operations to parse integer literals without incurring the otherwise unnecessary roundtrip through IntegerAttr.
Differential Revision: https://reviews.llvm.org/D93152
River Riddle [Mon, 14 Dec 2020 19:53:34 +0000 (11:53 -0800)]
[mlir][OpFormat] Add support for emitting newlines from the custom format of an operation
This revision adds a new `printNewline` hook to OpAsmPrinter that allows for printing a newline within the custom format of an operation, that is then indented to the start of the operation. Support for the declarative assembly format is also added, in the form of a `\n` literal.
Differential Revision: https://reviews.llvm.org/D93151
Artem Belevich [Tue, 8 Dec 2020 23:05:33 +0000 (15:05 -0800)]
[CUDA] Do not diagnose host/device variable access in dependent types.
`isCUDADeviceBuiltinSurfaceType()`/`isCUDADeviceBuiltinTextureType()` do not
work on dependent types as they rely on specific type attributes.
Differential Revision: https://reviews.llvm.org/D92893
Sanjay Patel [Mon, 14 Dec 2020 15:59:26 +0000 (10:59 -0500)]
[VectorCombine] add test for load with offset; NFC
Reid Kleckner [Mon, 14 Dec 2020 19:22:57 +0000 (11:22 -0800)]
[Hexagon] Tweak _MSC_VER workaround version
My bot runs VS 2019, but it could not compile this code.
Message:
[55/2465] Building CXX object lib\Target\Hexagon\CMakeFiles\LLVMHexagonCodeGen.dir\HexagonVectorCombine.cpp.obj
FAILED: lib/Target/Hexagon/CMakeFiles/LLVMHexagonCodeGen.dir/HexagonVectorCombine.cpp.obj
...
C:\Program Files (x86)\Microsoft Visual Studio\2019\Professional\VC\Tools\MSVC\14.23.28105\include\map(71): error C2976: 'std::map': too few template arguments
C:\Program Files (x86)\Microsoft Visual Studio\2019\Professional\VC\Tools\MSVC\14.23.28105\include\map(71): note: see declaration of 'std::map'
The version in the path, 14.23, corresponds to _MSC_VER 1923, so raise
the version floor to 1924.
I have not tested with versions between 1924 and 1928 (latest), but the
latest works with the variadic version.
Alina Sbirlea [Mon, 14 Dec 2020 19:19:01 +0000 (11:19 -0800)]
[NFC] Remove stray comment.
Christian Sigg [Mon, 14 Dec 2020 07:32:31 +0000 (08:32 +0100)]
[flang] Use mlir::OpState::operator->() to get to methods of mlir::Operation.
This is a preparation step to remove those methods from OpState.
Reviewed By: ftynse
Differential Revision: https://reviews.llvm.org/D93194
Craig Topper [Mon, 14 Dec 2020 18:04:44 +0000 (10:04 -0800)]
[RISCV] Move vtype decoding and printing from RISCVInstPrinter to RISCVBaseInfo. Share with the assembly parser's debug output
This moves the vtype decoding and printing to RISCVBaseInfo. This keeps all of
the decoding code in the same area as the encoding code. This will make it
easier to change the decoding for the 1.0 spec in the future.
We're now sharing the printing with the debug output for operands in the
assembler. This also fixes that debug output to include the tail and mask
agnostic bits. Since the printing code works on the vtype immediate value, we
now encode the immediate during parsing and store just the immediate in the
operand.
Kuba Mracek [Mon, 14 Dec 2020 18:48:48 +0000 (10:48 -0800)]
[sanitizer] Restrict querying VM size on Darwin only to iOS devices
We currently do this for SANITIZER_IOS, which includes devices *and* simulators. This change opts out the check for simulators to unify the behavior with macOS, because VM size is really a property of the host OS, and not the simulator.
<rdar://problem/
72129387>
Differential Revision: https://reviews.llvm.org/D93140
Thomas Raoux [Fri, 11 Dec 2020 15:03:30 +0000 (07:03 -0800)]
[mlir][linalg] Fix bug in elementwise vectorization
Fix a bug causing to pick the wrong vector size to broadcast to when the source
vectors have different ranks.
Differential Revision: https://reviews.llvm.org/D93118
Jonas Paulsson [Sat, 12 Dec 2020 02:22:08 +0000 (03:22 +0100)]
[SystemZ] Improve handling of backchain offset.
- New function SDValue getBackchainAddress() used by
lowerDYNAMIC_STACKALLOC() and lowerSTACKRESTORE() to properly handle the
backchain offset also with packed-stack.
- Make a common function getBackchainOffset() for the computation of the
backchain offset and use in some places (NFC).
Review: Ulrich Weigand
Differential Revision: https://reviews.llvm.org/D93171
Sylvain Audi [Mon, 14 Dec 2020 18:32:38 +0000 (13:32 -0500)]
Revert "[clang-scan-deps] Support clang-cl"
Reverting, as it breaks build on mac.
This reverts commit
640ad769110f76d3391667249478ece88c835529.
Arthur Eubanks [Mon, 14 Dec 2020 17:56:22 +0000 (09:56 -0800)]
[Wasm][LTO][NPM] Use NPM for LTO with ENABLE_EXPERIMENTAL_NEW_PASS_MANAGER
Reviewed By: MaskRay
Differential Revision: https://reviews.llvm.org/D92867
Michael Liao [Sun, 13 Dec 2020 04:49:26 +0000 (23:49 -0500)]
[amdgpu] Fix a crash case when `V_CNDMASK` could be simplified.
- Once an instruction is simplified, foldable candidates from it should
be invalidated or skipped as the operand index is no longer valid.
Differential Revision: https://reviews.llvm.org/D93174
Roman Lebedev [Mon, 14 Dec 2020 18:00:34 +0000 (21:00 +0300)]
[NFCI][Thumb2] Regenerate MVE tests i missed in
59560e85897afc50090b6c3d920bacfd28b49d06
Tony [Mon, 14 Dec 2020 17:45:44 +0000 (17:45 +0000)]
[NFC] Remove trailing whitespace in llvm/CMakeLists.txt
Differential Revision: https://reviews.llvm.org/D93234
Cameron Desrochers [Mon, 14 Dec 2020 17:34:55 +0000 (12:34 -0500)]
[TableGen] Fixed 64-bit filters being sliced to 32 bits in FixedLenDecoderEmitter
When using the FixedLenDecoderEmitter, llvm-tblgen emits tables with (OPC_ExtractField, OPC_ExtractFilterValue) opcode sequences to match the contiguous fixed bits of a given instruction's encoding. This encoding is represented in a 64-bit integer. However, the filter values were represented in a 32-bit integer. As such, instructions with fixed 64-bit encodings resulted in a table with an OPC_ExtractField for all 64 bits, followed by an OPC_ExtractFilterValue containing just the low 32 bits of their encoding, causing the filter never to match.
The exact point at which the slicing occurred was during the map insertion at line 630.
Differential Revision: https://reviews.llvm.org/D92423
LemonBoy [Mon, 14 Dec 2020 17:38:12 +0000 (09:38 -0800)]
lld/ELF: Parse MSP430 BFD/emulation names
Follow the naming set by TI's own GCC-based toolchain.
Also, force the `osabi` field to `ELFOSABI_STANDALONE`, this matches GNU LD's output (the patching is done in `elf32_msp430_post_process_headers`).
Reviewed By: MaskRay
Differential Revision: https://reviews.llvm.org/D92931
Nemanja Ivanovic [Mon, 14 Dec 2020 17:33:46 +0000 (11:33 -0600)]
[PowerPC] Restore stack ptr from frame ptr with setjmp
If a function happens to:
- call setjmp
- do a 16-byte stack allocation
- call a function that sets up a stack frame and longjmp's back
The stack pointer that is restores by setjmp will no longer point to a valid
back chain. According to the ABI, stack accesses in such a function are to be
frame pointer based - so it is an error (quite obviously) to restore the stack
from the back chain.
We already restore the stack from the frame pointer when there are calls to
fast_cc functions. We just need to also do that when there are calls to setjmp.
This patch simply does that.
This was pointed out by the Julia team.
Differential revision: https://reviews.llvm.org/D92906
ergawy [Mon, 14 Dec 2020 16:40:34 +0000 (11:40 -0500)]
[MLIR][SPIRV] Refactoring serialization and deserialization
This commit splits SPIR-V's serialization and deserialization code
into separate libraries. The motiviation being that the serializer
is used more often the deserializer and therefore lumping them
together unnecessarily increases binary size for the most common
case.
This commit also moves these libraries into the Target/ directory
to follow MLIR convention.
Reviewed By: antiagainst
Differential Revision: https://reviews.llvm.org/D91548
Gabor Marton [Wed, 9 Dec 2020 20:40:53 +0000 (21:40 +0100)]
[ASTImporter] Fix import of a typedef that has an attribute
The import of a typedefs with an attribute uses clang::Decl::setAttrs().
But that needs the ASTContext which we can get only from the
TranslationUnitDecl. But we can get the TUDecl only thourgh the
DeclContext, which is not set by the time of the setAttrs call.
Fix: import the attributes only after the DC is surely imported.
Btw, having the attribute import initiated from GetImportedOrCreateDecl was
fundamentally flawed. Now that is implicitly fixed.
Differential Revision: https://reviews.llvm.org/D92962
Roman Lebedev [Mon, 14 Dec 2020 14:44:17 +0000 (17:44 +0300)]
[SimplifyCFG] FoldBranchToCommonDest(): temporairly put back restrictions on liveout uses of bonus instructions (PR48450)
Even though
d38205144febf4dc42c9270c6aa3d978f1ef65e1 was mostly a correct
fix for the external non-PHI users, it's not a *generally* correct fix,
because the 'placeholder' values in those trivial PHI's we create
shouldn't be *always* 'undef', but the PHI itself for the backedges,
else we end up with wrong value, as the `@pr48450_2` test shows.
But we can't just do that, because we can't check that the PHI
can be it's own incoming value when coming from certain predecessor,
because we don't have a dominator tree.
So until we can address this correctness problem properly,
ensure that we don't perform the transformation
if there are such problematic external uses.
Making dominator tree available there is going to be involved,
since `-simplifycfg` pass currently does not preserve/update domtree...
Roman Lebedev [Mon, 14 Dec 2020 13:37:43 +0000 (16:37 +0300)]
[NFC][SimplifyCFG] FoldBranchToCommonDest(): pull out 'common successor' into a variable
Makes it easier to use it elsewhere
Roman Lebedev [Mon, 14 Dec 2020 12:30:38 +0000 (15:30 +0300)]
[NFC][SimplifyCFG] Add another miscompiled test for PR48450
Arthur O'Dwyer [Tue, 8 Dec 2020 21:15:01 +0000 (16:15 -0500)]
[libc++] ADL-proof <functional> by adding _VSTD:: qualification on calls.
- std::reference_wrapper
- std::function
- std::mem_fn
While I'm here, remove _VSTD:: qualification from calls to `declval`
because it takes no arguments and thus isn't susceptible to ADL.
Differential Revision: https://reviews.llvm.org/D92884
Arthur O'Dwyer [Sat, 12 Dec 2020 01:30:28 +0000 (20:30 -0500)]
[libc++] Consistently replace `::new(__p) T` with `::new ((void*)__p) T`. NFCI.
Everywhere, normalize the whitespace to `::new (EXPR) T`.
Everywhere, normalize the spelling of the cast to `(void*)EXPR`.
Without the cast to `(void*)`, the expression triggers ADL on GCC.
(I think this is a GCC bug: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98249)
Even if it doesn't trigger ADL, it still seems incorrect to use any argument
that's not exactly `(void*)` because that opens the possibility of overload
resolution picking a user-defined overload of `operator new`, which would be
wrong.
Differential Revision: https://reviews.llvm.org/D93153
Sylvain Audi [Fri, 30 Oct 2020 15:21:58 +0000 (11:21 -0400)]
[clang-scan-deps] Support clang-cl
clang-scan-deps contains some command line parsing and modifications.
This patch adds support for clang-cl command options.
Differential Revision: https://reviews.llvm.org/D92191
Siva Chandra Reddy [Mon, 14 Dec 2020 16:42:42 +0000 (08:42 -0800)]
[libc][Obvious] Include <fenv.h> from DummyFenv.h.
Stanislav Mekhanoshin [Tue, 24 Nov 2020 18:42:43 +0000 (10:42 -0800)]
[SLP] Control maximum vectorization factor from TTI
D82227 has added a proper check to limit PHI vectorization to the
maximum vector register size. That unfortunately resulted in at
least a couple of regressions on SystemZ and x86.
This change reverts PHI handling from D82227 and replaces it with
a more general check in SLPVectorizerPass::tryToVectorizeList().
Moved to tryToVectorizeList() it allows to restart vectorization
if initial chunk fails.
However, this function is more general and handles not only PHI
but everything which SLP handles. If vectorization factor would
be limited to maximum vector register size it would limit much
more vectorization than before leading to further regressions.
Therefore a new TTI callback getMaximumVF() is added with the
default 0 to preserve current behavior and limit nothing. Then
targets can decide what is better for them.
The callback gets ElementSize just like a similar getMinimumVF()
function and the main opcode of the chain. The latter is to avoid
regressions at least on the AMDGPU. We can have loads and stores
up to 128 bit wide, and <2 x 16> bit vector math on some
subtargets, where the rest shall not be vectorized. I.e. we need
to differentiate based on the element size and operation itself.
Differential Revision: https://reviews.llvm.org/D92059
Raul Tambre [Mon, 14 Dec 2020 16:41:30 +0000 (18:41 +0200)]
Revert "Re-apply "[CMake][compiler-rt][AArch64] Avoid preprocessing LSE builtins separately""
This reverts commit
03ebe1937192c247c4a7b8ec19dde2cf9845c914.
It's still breaking bots, e.g. http://green.lab.llvm.org/green/job/clang-stage1-RA/17027/console although it doesn't change any actual code.
The compile errors don't make much sense either. Revert for now.
Differential Revision: https://reviews.llvm.org/D93228
Jay Foad [Thu, 10 Dec 2020 16:49:48 +0000 (16:49 +0000)]
[AMDGPU] Make use of HasSMemRealTime predicate. NFC.
We have this subtarget feature so it makes sense to use it here. This is
NFC because it's always defined by default on GFX8+.
Differential Revision: https://reviews.llvm.org/D93202
Kazushi (Jam) Marukawa [Mon, 7 Dec 2020 11:44:05 +0000 (20:44 +0900)]
[VE] Add logical mask intrinsic instructions
Add andm, orm, xorm, eqvm, nndm, negm, pcvm, lzvm, and tovm intrinsic
instructions, a few pseudo instructions to expand logical intrinsic
using VM512, a mechnism to expand such pseudo instructions, and
regression tests. Also, assign vector mask types and vector mask
register classes correctly. This is required to use VM512 registers
as function arguments.
Reviewed By: simoll
Differential Revision: https://reviews.llvm.org/D93093
Simon Pilgrim [Mon, 14 Dec 2020 14:23:27 +0000 (14:23 +0000)]
[X86] LowerBUILD_VECTOR - track zero/nonzero elements with APInt masks. NFCI.
Prep work for undef/zero 'upper elements' handling as proposed in D92645.