Dylan Baker [Tue, 10 Nov 2020 00:19:50 +0000 (16:19 -0800)]
Bump version for 21.0 devel
Anuj Phogat [Thu, 5 Nov 2020 18:33:44 +0000 (10:33 -0800)]
intel: Pointer to SCISSOR_RECT array should be 64B aligned
v2: Apply the workaround to all gen hardawre
Ref: GEN:BUG:
1409725701
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7463>
Arcady Goldmints-Orlov [Mon, 26 Oct 2020 04:03:04 +0000 (00:03 -0400)]
broadcom/compiler: Allow spills of temporaries from TMU reads
Since spills and fills use the TMU, special care has to be taken to
avoid putting one between a TMU setup instruction and the corresponding
reads or writes. This change adds logic to move fills up and move spills
down to avoid interrupting such sequences.
This allows compiling 6 more programs from shader-db. Other stats:
total spills in shared programs: 446 -> 446 (0.00%)
spills in affected programs: 0 -> 0
helped: 0
HURT: 0
total fills in shared programs: 606 -> 610 (0.66%)
fills in affected programs: 38 -> 42 (10.53%)
helped: 0
HURT: 2
total instructions in shared programs: 19330 -> 19363 (0.17%)
instructions in affected programs: 3299 -> 3332 (1.00%)
helped: 0
HURT: 5
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6606>
Samuel Pitoiset [Fri, 6 Nov 2020 15:43:41 +0000 (16:43 +0100)]
nir/algebraic: optimize bitfield_select(a, b, 0) to iand(a, b)
(src0 & src1) | (~src0 & src2) to (src0 & src1).
fossils-db (Polaris10):
Totals from 873 (0.63% of 138014) affected shaders:
SGPRs: 33781 -> 33733 (-0.14%)
VGPRs: 37704 -> 37520 (-0.49%); split: -0.51%, +0.02%
CodeSize: 3861460 -> 3853424 (-0.21%); split: -0.21%, +0.00%
MaxWaves: 5306 -> 5305 (-0.02%)
Instrs: 743798 -> 743486 (-0.04%); split: -0.04%, +0.00%
Cycles:
10962244 ->
10960936 (-0.01%); split: -0.01%, +0.00%
VMEM: 128309 -> 128350 (+0.03%); split: +0.33%, -0.30%
SMEM: 44797 -> 44113 (-1.53%); split: +0.02%, -1.54%
Copies: 71875 -> 71674 (-0.28%); split: -0.31%, +0.03%
PreSGPRs: 23484 -> 23479 (-0.02%)
PreVGPRs: 34582 -> 34529 (-0.15%)
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7479>
Boris Brezillon [Mon, 9 Nov 2020 08:20:07 +0000 (09:20 +0100)]
pan/bi: Add support for load_instance_id
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7472>
Boris Brezillon [Fri, 6 Nov 2020 13:08:33 +0000 (14:08 +0100)]
pan/bi: Add support for load_vertex_id
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7472>
Boris Brezillon [Fri, 6 Nov 2020 11:50:41 +0000 (12:50 +0100)]
panfrost: Allow linear ZS resources on Bifrost
Linear Z/S buffers should be handled correctly now.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7472>
Boris Brezillon [Fri, 6 Nov 2020 11:01:26 +0000 (12:01 +0100)]
pan/bi: Add support for ushr
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7472>
Boris Brezillon [Fri, 6 Nov 2020 10:51:48 +0000 (11:51 +0100)]
pan/bi: Add support for ishr
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7472>
Boris Brezillon [Fri, 6 Nov 2020 10:50:43 +0000 (11:50 +0100)]
pan/bi: Fix ARSHIFT definitions
src1 exists, and must be set to ZERO. If we don't add this source,
lane2 refers to src2 which does not exists.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7472>
Boris Brezillon [Fri, 6 Nov 2020 10:18:15 +0000 (11:18 +0100)]
pan/bi: Move bitwise op packing out of bi_pack_fma()
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7472>
Boris Brezillon [Fri, 6 Nov 2020 08:57:26 +0000 (09:57 +0100)]
pan/bi: Get rid of bi_emit_ld_uniform()
Now that we lower uniforms to UBO we can get rid of bi_emit_ld_uniform().
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7472>
Boris Brezillon [Fri, 6 Nov 2020 08:56:09 +0000 (09:56 +0100)]
pan/bi: Lower uniforms to UBO
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7472>
Boris Brezillon [Fri, 6 Nov 2020 08:55:02 +0000 (09:55 +0100)]
pan/bi: Add support for load_ubo
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7472>
Boris Brezillon [Thu, 5 Nov 2020 14:13:28 +0000 (15:13 +0100)]
pan/bi: Fix swizzle handling in bi_copy_src()
The number of src swizzle to initialize depends on the number of source
properties (size and number of components) not the destination ones.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7472>
Boris Brezillon [Thu, 5 Nov 2020 11:11:54 +0000 (12:11 +0100)]
pan/bi: Support centroid and sample interpolations
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7472>
Boris Brezillon [Thu, 5 Nov 2020 11:10:42 +0000 (12:10 +0100)]
pan/bi: Extract LD_VAR sample field from ins->load_vary.interp_mode
So we can extend bi_emit_ld_vary() to support centroid and sample modes.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7472>
Boris Brezillon [Wed, 4 Nov 2020 17:48:04 +0000 (18:48 +0100)]
panfrost: Expose GLES3 features on Bifrost when PAN_MESA_DEBUG=deqp
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7472>
Boris Brezillon [Mon, 9 Nov 2020 09:10:10 +0000 (10:10 +0100)]
panfrost: Force late pixel kill when depth/stencil is written from the FS
If we don't do that, pixels might be killed early thus preventing the
fragment shader from being called and updating the depth/stencil value.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7501>
SureshGuttula [Fri, 6 Nov 2020 18:05:28 +0000 (23:35 +0530)]
radeon/vcn : Corrected dpb_size calculation for VP9_2
Currently dpb_size for VP9 profile0 and profile2 is same eventhough
for profile2 dpb_size is multiplied by extra 3/2 and we are
seeing VM_L2_PROTECTION_FAULT error and ring vcn_dec timeout because
of less dpb_size for VP9_2.
This patch will correct dpb_size for VP9_2 and fixes the issue.
Signed-off-by: SureshGuttula <suresh.guttula@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7480>
Jason Ekstrand [Fri, 6 Nov 2020 05:19:31 +0000 (23:19 -0600)]
intel/nir: Lower 8-bit ops to 16-bit in NIR on Gen11+
Intel hardware supports 8-bit arithmetic but it's tricky and annoying:
- Byte operations don't actually execute with a byte type. The
execution type for byte operations is actually word. (I don't know
if this has implications for the HW implementation. Probably?)
- Destinations are required to be strided out to at least the
execution type size. This means that B-type operations always have
a stride of at least 2. This means wreaks havoc on the back-end in
multiple ways.
- Thanks to the strided destination, we don't actually save register
space by storing things in bytes. We could, in theory, interleave
two byte values into a single 2B-strided register but that's both a
pain for RA and would lead to piles of false dependencies pre-Gen12
and on Gen12+, we'd need some significant improvements to the SWSB
pass.
- Also thanks to the strided destination, all byte writes are treated
as partial writes by the back-end and we don't know how to copy-prop
them.
- On Gen11, they added a new hardware restriction that byte types
aren't allowed in the 2nd and 3rd sources of instructions. This
means that we have to emit B->W conversions all over to resolve
things. If we emit said conversions in NIR, instead, there's a
chance NIR can get rid of some of them for us.
We can get rid of a lot of this pain by just asking NIR to get rid of
8-bit arithmetic for us. It may lead to a few more conversions in some
cases but having back-end copy-prop actually work is probably a bigger
bonus. There is still a bit we have to handle in the back-end. In
particular, basic MOVs and conversions because 8-bit load/store ops
still require 8-bit types.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7482>
Jason Ekstrand [Fri, 6 Nov 2020 05:23:07 +0000 (23:23 -0600)]
intel/nir: Lower 8-bit scan/reduce ops to 16-bit
We can't really support these directly on any platform. May as well let
NIR lower them. The NIR lowering is potentially one more instruction
for scan/reduce ops thanks to not being able to do the B->W conversion
as part of SEL_EXEC. For imax/imin exclusive scan, it's yet another
instruction thanks to the extra imax/imin NIR has to insert to deal with
the fact that the first live channel will contain the identity value
which, when signed, will cast wrong. However, it does let us drop some
complexity from our back-end so it's probably worth it.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7482>
Jason Ekstrand [Fri, 6 Nov 2020 05:16:19 +0000 (23:16 -0600)]
intel/nir: Refactor lower_bit_size_callback
We want to use it for more than just ALU.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7482>
Jason Ekstrand [Fri, 6 Nov 2020 05:09:14 +0000 (23:09 -0600)]
nir/lower_bit_size: Add support for lowering subgroup ops
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7482>
Jason Ekstrand [Fri, 6 Nov 2020 04:53:52 +0000 (22:53 -0600)]
nir/lower_bit_size: Pass a nir_instr to the callback
This way we can start supporting more than just ALU ops.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7482>
Jason Ekstrand [Fri, 6 Nov 2020 17:59:16 +0000 (11:59 -0600)]
nir/lower_bit_size: Don't cast comparison results
Some ALU ops (comparisons being the primary example) have a fixed
bit-size destination and, in that case, we don't want to insert a
conversion on the destination.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7482>
Rhys Perry [Mon, 19 Oct 2020 17:02:35 +0000 (18:02 +0100)]
radv: implement VK_EXT_shader_image_atomic_int64
The extension is only exposed on ACO and LLVM 11+ because of a LLVM bug.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7234>
Rhys Perry [Mon, 19 Oct 2020 17:01:59 +0000 (18:01 +0100)]
ac/nir: implement 64-bit images
64-bit image atomics only work with LLVM 11+ because of a LLVM bug.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7234>
Rhys Perry [Mon, 19 Oct 2020 17:01:37 +0000 (18:01 +0100)]
aco: implement 64-bit images
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7234>
Rhys Perry [Tue, 20 Oct 2020 10:45:13 +0000 (11:45 +0100)]
amd/common: add PIPE_FORMAT_R64_{UINT,SINT} to GFX10 format table
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7234>
Rhys Perry [Tue, 20 Oct 2020 10:44:01 +0000 (11:44 +0100)]
util: add mapping from Vulkan to Gallium R64 integer formats
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7234>
Louis-Francis Ratté-Boulianne [Wed, 22 Jul 2020 20:21:32 +0000 (16:21 -0400)]
gallium: Fix NIR validation when lowering polygon stipple
The fmul operation takes the maximum number of components from either
of its operands. We only need to use 2 components from the fragment
coordinates.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7507>
Erik Faye-Lund [Tue, 8 Sep 2020 13:51:31 +0000 (15:51 +0200)]
gallium/util: do not pass undefined sample-count
We forgot to initialize the sample_count member here, leading to it
being undefined. This causes problems on MSVC when compiling in
debug-mode, where we get a run-time error for using an undefined
variable.
To avoid similar problems in the future if more fields are added,
let's initialize the whole struct to zero to start with. This also
allows us to remove a no-longer-needed zero-initialization.
Fixes:
cf170616daa ("gallium: Add a util_blitter path for using a custom VS and FS.")
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7503>
Samuel Pitoiset [Tue, 3 Nov 2020 17:50:32 +0000 (18:50 +0100)]
aco: optimize v_and(a, v_subbrev_co(0, 0, vcc)) -> v_cndmask(0, a, vcc)
fossils-db (Vega10):
Totals from 7786 (5.70% of 136546) affected shaders:
SGPRs: 517778 -> 518626 (+0.16%); split: -0.01%, +0.17%
VGPRs: 488252 -> 488084 (-0.03%); split: -0.04%, +0.01%
CodeSize:
42282068 ->
42250152 (-0.08%); split: -0.16%, +0.09%
MaxWaves: 35697 -> 35716 (+0.05%); split: +0.06%, -0.01%
Instrs: 8319309 -> 8304792 (-0.17%); split: -0.18%, +0.00%
Cycles:
88619440 ->
88489636 (-0.15%); split: -0.16%, +0.01%
VMEM: 2788278 -> 2780431 (-0.28%); split: +0.06%, -0.35%
SMEM: 570364 -> 569370 (-0.17%); split: +0.12%, -0.30%
VClause: 144906 -> 144908 (+0.00%); split: -0.05%, +0.05%
SClause: 302143 -> 302055 (-0.03%); split: -0.04%, +0.01%
Copies: 579124 -> 578779 (-0.06%); split: -0.14%, +0.08%
PreSGPRs: 327695 -> 328845 (+0.35%); split: -0.00%, +0.35%
PreVGPRs: 434280 -> 433954 (-0.08%)
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7438>
Jason Ekstrand [Tue, 17 Mar 2020 22:57:42 +0000 (17:57 -0500)]
spirv: Add support for SPV_EXT_shader_image_atomic_int64
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7509>
Jason Ekstrand [Tue, 17 Mar 2020 22:45:28 +0000 (17:45 -0500)]
nir: Allow 64-bit image atomics
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7509>
Jason Ekstrand [Tue, 2 Jun 2020 17:09:33 +0000 (12:09 -0500)]
compiler/types: Add 64-bit image types
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7509>
Jason Ekstrand [Tue, 17 Mar 2020 21:55:40 +0000 (16:55 -0500)]
util,gallium: Add new 64-bit integer formats
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7509>
Jason Ekstrand [Tue, 17 Mar 2020 22:37:46 +0000 (17:37 -0500)]
nir: Validate image atomic formats
GLSL requires that image atomics have formats and there are rules about
things matching properly. We should enforce those in NIR unless we have
reason to do otherwise.
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7509>
Jason Ekstrand [Fri, 5 Jun 2020 17:30:05 +0000 (12:30 -0500)]
nir: Print formats on image intrinsics as text
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7509>
Jason Ekstrand [Tue, 17 Mar 2020 22:49:59 +0000 (17:49 -0500)]
spirv: Update headers and metadata from latest Khronos commit
This corresponds to
5ab5c96198f30804a6a29961b8905f292a8ae600
("Reserve additional loop control bit for Intel extension (NoFusionINTEL) (#175)") in
https://github.com/KhronosGroup/SPIRV-Headers.
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7509>
Erik Faye-Lund [Fri, 3 Apr 2020 09:44:30 +0000 (11:44 +0200)]
libgl-gdi: support building without softpipe
While we do need *some* fallback-driver, there's no good reason to
*always* require that to be Softpipe. LLVMpipe for instance does the job
just fine.
This makes the minimal build a bit smaller on Windows.
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7506>
Alyssa Rosenzweig [Mon, 9 Nov 2020 13:11:10 +0000 (08:11 -0500)]
panfrost: Add missing Collabora copyright notices
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Acked-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7502>
Alyssa Rosenzweig [Mon, 9 Nov 2020 13:10:13 +0000 (08:10 -0500)]
pan/mdg: Add missing Collabora copyright notices
On a few of the older files.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Acked-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7502>
Erik Faye-Lund [Mon, 9 Nov 2020 13:58:24 +0000 (14:58 +0100)]
spirv: correct sematic-typo
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7504>
Daniel Stone [Mon, 9 Nov 2020 15:09:34 +0000 (15:09 +0000)]
CI: Disable Panfrost T760
For some unknown reason, both RK3288 Chromebooks went catatonic over the
weekend. Disable them until we can get them fixed.
Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7508>
Krunal Patel [Thu, 29 Oct 2020 09:18:16 +0000 (14:48 +0530)]
radeon/vcn: Bitrate not updated when changing framerate
Issue: Encoding parameters not updated after changing FrameRate
Root Cause:
In radeon_enc_begin_frame, there is a parameter need_rate_control
which was enabled only if the bitrate is changed. Due to this the
radeon_enc_rc_layer_init was not updating the encoder parameters with new
framerate, peak_bits_per_picture_integer and avg_target_bits_per_picture
Fix:
Added the condition where we will check if there is a change in
other parameters and enable rate control. Eventually updating the
encoder parameters with new framerate and bitrate.
Signed-off-by: Krunal Patel <krunalkumarmukeshkumar.patel@amd.corp-partner.google.com>
Reviewed-by: Boyuan Zhang boyuan.zhang@amd.com
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7363>
Alejandro Piñeiro [Mon, 9 Nov 2020 10:31:06 +0000 (11:31 +0100)]
v3dv/device: do nothing when asked physical device pci bus properties
When calling GetPhysicalDeviceProperties2 we were ignoring and logging
the structures for extensions not supported. But for the case of
VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_PCI_BUS_INFO_PROPERTIES_EXT we
already know that we are not going to support it, so let's just do
nothing (not even logging) when passed.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7497>
Alejandro Piñeiro [Mon, 9 Nov 2020 10:47:35 +0000 (11:47 +0100)]
v3dv/util: log debug ignored stype only on debug builds
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7497>
Alejandro Piñeiro [Sun, 8 Nov 2020 21:44:40 +0000 (22:44 +0100)]
v3dv/util: remove several logging functions
We already have vk_error to report errors, they add little specific
v3dv wrapping over a simple fprintf, and they are not used really
often.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7497>
Bas Nieuwenhuizen [Thu, 29 Oct 2020 01:33:31 +0000 (02:33 +0100)]
radv: Fix exporting/importing multisample images.
Otherwise FMASK metadata segfaults and on import we disable it ...
CC: mesa-stable
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7358>
Mike Blumenkrantz [Fri, 17 Jul 2020 13:51:03 +0000 (09:51 -0400)]
zink: add some spirv builder functions for barriers
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7486>
Mike Blumenkrantz [Thu, 5 Nov 2020 17:59:39 +0000 (12:59 -0500)]
zink: add a quadop function in spirv_builder
this takes 4 operands like the unop/binop/triop functions we already have
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7486>
Mike Blumenkrantz [Thu, 16 Jul 2020 12:52:24 +0000 (08:52 -0400)]
zink: use same function for all pipe_context::delete_*_state shader methods
we don't currently do anything special with any of these, so it'd be better
to not have the same code copy/pasted around
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7485>
Duncan Hopkins [Wed, 4 Nov 2020 17:42:29 +0000 (17:42 +0000)]
zink: make physical device functions use a dynamic function pointers.
vkGetPhysicalDeviceFeatures2 and vkGetPhysicalDeviceProperties2 are not present on some MoltenVK versions.
VK_KHR_get_physical_device_properties2 exposes the KHR versions of the same functions.
These cannot be used via static linking, so we have to dynamically detect the loader version and then the extension
to work out which pointers to use.
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7447>
Bas Nieuwenhuizen [Wed, 23 Sep 2020 00:14:30 +0000 (02:14 +0200)]
radv: Fix budget calculations with large BAR.
If we don't have a non-visible VRAM heap, we should be counting
our non-visible VRAM allocations to the visible-VRAM heap.
CC: mesa-stable
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6827>
Bas Nieuwenhuizen [Wed, 23 Sep 2020 00:13:00 +0000 (02:13 +0200)]
radv: Skip tiny non-visible VRAM heap.
When I enable "Above 4G decoding" in my BIOS I still get 16 MiB of
non-visible VRAM on my 8G VRAM GPU ...
CC: mesa-stable
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6827>
Dylan Baker [Sat, 7 Nov 2020 04:50:18 +0000 (20:50 -0800)]
docs: update calendar and link releases notes for 20.2.2
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7493>
Dylan Baker [Sat, 7 Nov 2020 04:45:27 +0000 (20:45 -0800)]
dcs: Add sha256 sums for 20.2.2
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7493>
Dylan Baker [Fri, 6 Nov 2020 23:40:06 +0000 (15:40 -0800)]
docs: add release notes for 20.2.2
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7493>
Vinson Lee [Tue, 27 Oct 2020 22:46:26 +0000 (15:46 -0700)]
st/nine: Remove unnecessary NULL check.
resource cannot be NULL at this point since it has already been
dereferenced earlier.
Fix defect reported by Coverity Scan.
Dereference before null check (REVERSE_INULL)
check_after_deref: Null-checking resource suggests that it may be
null, but it has already been dereferenced on all paths leading to
the check.
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Axel Davy <davyaxel0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7343>
Mike Blumenkrantz [Wed, 15 Jul 2020 17:51:18 +0000 (13:51 -0400)]
zink: implement ARB_texture_query_lod
just needed hooking up the spirv function to the tex op
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7484>
Eric Anholt [Thu, 29 Oct 2020 17:29:28 +0000 (10:29 -0700)]
ci/deqp: Switch to a new dEQP runner written in Rust.
I found the C++ runner hard to develop on, and we had stability issues and
outstanding feature needs that made me want something I felt good about
hacking on. Thus, Rewrite It In Rust of the deqp runner.
The new runner includes:
- Skip lists don't reshuffle the test list.
- Known-flake handling without resorting to skip lists (fixing our main CI
reliability issue on a3xx right now).
- Per-thread Vulkan shader caches should speed up VK CI runtime.
- Tracking of crashes separate from fails (so we can see progress on that
front).
- Logging of deqp stderr spam (particularly assertion failures!) in the CI
log.
- Integrated QPA filtering so we don't have bash perf issues for it.
- Logging of what caselist to go look at for a given error report (in red,
so it's easier to find in your CI log).
- The code is 1/3 unit tests, and easy to extend for more coverage.
- Non-LAVA CI runs create a failures.csv in artifacts that you can check
in as your deqp-*-fails.txt file.
- Test runtime is included in results.csv so you can debug how to speed up
your CI job.
- Pretty summary at the end of the run of slow/flaky/failed tests.
Since this is a new runner with a different RNG, the test groups are
shuffled one more time. This seems to result in some panfrost T720
stability issues (See its new deqp-panfrost-t720-flakes.txt), and one new
flake in freedreno a630.
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7434>
Eric Anholt [Fri, 30 Oct 2020 23:31:22 +0000 (16:31 -0700)]
ci/bare-metal: Reset colors at the end of a line of serial output.
We don't want the next line of our timestamp and other context to inherit
colors set by the serial command (visible with the new dEQP runner)
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7434>
Eric Anholt [Fri, 30 Oct 2020 23:30:10 +0000 (16:30 -0700)]
ci/bare-metal: Apply autopep8 to the bare-metal scripts.
Let's follow proper python formatting (easy now that vscode does it for
me)
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7434>
Eric Anholt [Thu, 5 Nov 2020 23:50:13 +0000 (15:50 -0800)]
turnip: Fix image size for 3D vkGetImageSubresourceLayout.
Fixes most subcases of dEQP-VK.image.subresource_layout.3d.* The remaining
failures appear to be in snorm, which 2D also fails on (and the blob
reports as not supported for this test).
We don't currently have these tests in CI, but they'll appear with
1.2.4.0.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7467>
Rhys Perry [Fri, 7 Aug 2020 18:24:17 +0000 (19:24 +0100)]
spirv: fix GLSLstd450Modf/GLSLstd450Frexp when the destination is vector
We can't write to an individual component in a function_temp vector, so we
have to use vtn_variable_store() which does a load+insert+store.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3484
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6231>
Duncan Hopkins [Wed, 14 Aug 2019 10:11:19 +0000 (11:11 +0100)]
zink: For MoltenVk added vkFlushMappedMemoryRanges() to vkMapMemory() to fix empty mapped memory.
On MoltenVK/MacOS when mapping memory that should already have content it does not appear until flushed.
This noticably effects vertex attribute uploads to descrete devices.
Did also try to add the Coherent memory flag, which did work, until there the Coherent type could only be used for transfer usage only.
This is a known limitation of MoltenVK.
See https://github.com/KhronosGroup/MoltenVK/blob/master/Docs/MoltenVK_Runtime_UserGuide.md#known-moltenvk-limitations
Seen when using MoltenVK 1.0.121, 1.2.131
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7470>
Duncan Hopkins [Thu, 5 Nov 2020 11:17:40 +0000 (11:17 +0000)]
zink: have_triangle_fans support.
MoltenVK, at least upto 1.2.141, does not render triangle fans. This is reflected in the portability EXTX extension.
This code get the extensions properties and features and then sets the have_triangle_fans.
This extension is not avaiable on all systems, so an amout of the code has to be protected by the define VK_EXTX_PORTABILITY_SUBSET_EXTENSION_NAME.
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7457>
Duncan Hopkins [Thu, 5 Nov 2020 11:00:01 +0000 (11:00 +0000)]
zink: add support to device info for macro guards and just VkPhysicalDevice*Features with out the have_.
Extends the flexability of the device info script.
Allows #if defined()/#endif guards around particular data, for platform or version specific structures.
Allows for feature structures to be retreved without having to have a have_ variable as well. Helps if there is more than one feature in the structure.
These changes help towards allowing the use of the portability set extensions.
Reviewed-by: Hoe Hao Cheng <haochengho12907@gmail.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7457>
Daniel Schürmann [Fri, 10 Jul 2020 11:37:36 +0000 (13:37 +0200)]
nir/lcssa: consider loops with no back-edge invariant
Polaris:
Totals from 6233 (4.52% of 138014) affected shaders:
SpillSGPRs: 47860 -> 48976 (+2.33%)
CodeSize:
69764704 ->
69120700 (-0.92%); split: -0.97%, +0.04%
Instrs:
13801184 ->
13594107 (-1.50%)
Cycles:
1628800928 ->
1516137888 (-6.92%)
VMEM: 910459 -> 910208 (-0.03%); split: +0.00%, -0.03%
SMEM: 436625 -> 435194 (-0.33%); split: +0.06%, -0.38%
SClause: 534750 -> 534620 (-0.02%); split: -0.03%, +0.00%
Copies: 1587121 -> 1542867 (-2.79%); split: -2.81%, +0.03%
Branches: 545016 -> 509354 (-6.54%)
PreSGPRs: 618545 -> 619354 (+0.13%); split: -0.09%, +0.22%
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5924>
Duncan Hopkins [Wed, 4 Nov 2020 15:41:11 +0000 (15:41 +0000)]
zink: Added inbuilt debug logging from the VK_LAYER_LUNARG_standard_validation layer.
Set the ZINK_DEBUG environment variable to 'validation' to automatically setup.
The debug util extnsion callback is used to capture information and logs the results to the error stream.
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7431>
Iago Toral Quiroga [Fri, 6 Nov 2020 13:07:45 +0000 (14:07 +0100)]
zink: fix pNext chain for resource memory allocation
This only links the VkImportMemoryFdInfoKHR struct into the pNext
chain when VkExportMemoryAllocateInfo is also included, which was
the original behavior before the regression.
Fixes:
92022f2846e00 (zink: add VK_STRUCTURE_TYPE_WSI_MEMORY_ALLOCATE_INFO_MESA for WSI allocations)
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3755
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7474>
Duncan Hopkins [Fri, 6 Nov 2020 08:02:21 +0000 (08:02 +0000)]
zink: return fail if create_instance fails
If create_instance() fails, returns to MESA as failed instead of contining in an bad state.
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7471>
Anthoine Bourgeois [Tue, 3 Nov 2020 17:13:50 +0000 (18:13 +0100)]
docs/features.txt: VK_EXT_separate_stencil_usage not exposed on RADV
Signed-off-by: Anthoine Bourgeois <anthoine.bourgeois@gmail.com>
Reported-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Fixes:
3d58ab7576d ("docs/features: Minor update extensions support")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7466>
Lucas Stach [Sat, 31 Oct 2020 07:34:28 +0000 (08:34 +0100)]
gallium: document convention for get_handle calls on multi-planar resources
There are resources that may have more planes than chained resources. The
frontend has no way of figuring out which (if any) chained resource is the
right one to call resource_get_handle with and until a (now reverted)
change to the dri frontend it just always called with the first resource.
The convention of calling with the first resource of a chain allows the
pipe driver, which has the necessary information of how resources and
planes map to each other for a specific format/modifier combination, to do
the necessary walking. Document this as the official calling convention
of this function.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7419>
Lucas Stach [Sun, 1 Nov 2020 15:53:19 +0000 (16:53 +0100)]
etnaviv: rework ZSA into a derived state
The ZSA state is not fully self contained, as other states (mostly
shader using discard or writing depth information) have an influence
on whether we can use early Z test/write.
Rework the ZSA state into a derived state that gets updated whenever
a new ZSA or SHADER state is bound. This way we can automatically
enable/disable early Z as needed.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7396>
Lucas Stach [Sun, 1 Nov 2020 15:49:18 +0000 (16:49 +0100)]
etnaviv: expose shader discard usage in etna_shader_variant
The information about a shader using discard/kill is interesting
to other parts of the driver, as depth states need to programmed
differently depending on this. As we don't want to deal with
NIR/TGSI differences in other parts of the driver, track this
usage in the common etna_shader_variant.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7396>
Lucas Stach [Sun, 1 Nov 2020 22:11:16 +0000 (23:11 +0100)]
etnaviv: update headers from rnndb
Update to etna_viv commit
c8ba5e0ba5da.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7396>
Lucas Stach [Sun, 1 Nov 2020 15:46:23 +0000 (16:46 +0100)]
etnaviv: flush depth cache when changing depth config
Some depth config states changes require the depth cache to be
flushed, leading to a GPU hang if not done. As the conditions that
require the flush are not toally clear, better be safe than sorry
and always flush the cache on depth state changes.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7396>
Lucas Stach [Sun, 1 Nov 2020 15:00:55 +0000 (16:00 +0100)]
etnaviv: emit RA_EARLY_DEPTH on dirty ZSA
The RA_EARLY_DEPTH is a depth state and so must be emitted on
dirty ZSA, instead of dirty SHADER.
Fixes:
785e2707b0d1 (etnaviv: Fix disabling early-z rejection on GC7000L)
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7396>
Tapani Pälli [Mon, 2 Nov 2020 12:56:40 +0000 (14:56 +0200)]
mesa/st: use a lock to protect access to variants when updating them
Multiple threads may access st_update_* function at same time. Issues
happen when the threads modify lists managed by shader compiler.
Issues were found with script that runs multithread tests 1000 times in
a row with MESA_GLSL_CACHE_DISABLE=1 set. Problems start when 2
simultaneous st_create_[vp|fp]_variant calls start to compile a new
shader variant for the same program and various nir passes use and
modify same exec_lists.
Example failure:
deqp-egl: ../src/compiler/glsl/list.h:575: exec_list_validate: Assertion `node->next->prev == node' failed.
v2: instead of introducing new mutex, lock shared state
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7418>
Samuel Pitoiset [Wed, 4 Nov 2020 12:56:41 +0000 (13:56 +0100)]
nir/algebraic: distribute imul(iadd(a, b), c) when b and c are constants
This distributes imul(iadd(a, b), c) to iadd(imul(a, c), b * c)
when both b and c are constants. This might allow some compiler
backends to create more MADs.
For ACO, this allows to combine more DS additions.
fossilds-db (Vega10):
Totals from 673 (0.49% of 136546) affected shaders:
VGPRs: 44548 -> 44516 (-0.07%); split: -0.11%, +0.04%
CodeSize: 8301552 -> 8286220 (-0.18%); split: -0.19%, +0.01%
MaxWaves: 2731 -> 2735 (+0.15%); split: +0.26%, -0.11%
Instrs: 1642684 -> 1638725 (-0.24%); split: -0.24%, +0.00%
Cycles:
20846156 ->
20793444 (-0.25%); split: -0.25%, +0.00%
VMEM: 108870 -> 108106 (-0.70%); split: +0.03%, -0.73%
SMEM: 35718 -> 35674 (-0.12%); split: +0.22%, -0.34%
VClause: 20603 -> 20622 (+0.09%); split: -0.01%, +0.10%
SClause: 48527 -> 48539 (+0.02%)
Copies: 156735 -> 156742 (+0.00%); split: -0.05%, +0.05%
PreSGPRs: 43169 -> 43166 (-0.01%); split: -0.02%, +0.02%
PreVGPRs: 41369 -> 41330 (-0.09%)
shader-db results on Intel:
Ice Lake
total instructions in shared programs:
20027588 ->
20027446 (<.01%)
instructions in affected programs: 71766 -> 71624 (-0.20%)
helped: 70
HURT: 0
helped stats (abs) min: 1 max: 7 x̄: 2.03 x̃: 1
helped stats (rel) min: 0.10% max: 2.50% x̄: 0.29% x̃: 0.15%
95% mean confidence interval for instructions value: -2.42 -1.64
95% mean confidence interval for instructions %-change: -0.38% -0.20%
Instructions are helped.
total cycles in shared programs:
977525222 ->
977494323 (<.01%)
cycles in affected programs: 8884593 -> 8853694 (-0.35%)
helped: 56
HURT: 16
helped stats (abs) min: 2 max: 7852 x̄: 681.29 x̃: 400
helped stats (rel) min: <.01% max: 19.84% x̄: 2.79% x̃: 0.41%
HURT stats (abs) min: 2 max: 1212 x̄: 453.31 x̃: 120
HURT stats (rel) min: 0.05% max: 1.09% x̄: 0.32% x̃: 0.11%
95% mean confidence interval for cycles value: -802.75 -55.56
95% mean confidence interval for cycles %-change: -3.19% -1.01%
Cycles are helped.
total sends in shared programs: 1032273 -> 1032272 (<.01%)
sends in affected programs: 41 -> 40 (-2.44%)
helped: 1
HURT: 0
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7445>
Serge Martin [Fri, 6 Nov 2020 05:08:51 +0000 (15:08 +1000)]
clover: implements clSetContextDestructorCallback
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7468>
Dave Airlie [Fri, 6 Nov 2020 03:56:13 +0000 (13:56 +1000)]
clover: add empty cl 3.0 dispatch entries.
This just fills out the dispatch table blanks.
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7468>
Dave Airlie [Fri, 6 Nov 2020 04:03:21 +0000 (14:03 +1000)]
clover/spirv: hook up spir-v environment for 3.0
For now just use the 1.2 env.
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7468>
Dave Airlie [Fri, 6 Nov 2020 04:00:05 +0000 (14:00 +1000)]
clover/llvm: add 3.0 versioning.
Just adds the 3.0 versioning to the compiler interface.
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7468>
Dave Airlie [Fri, 6 Nov 2020 03:55:53 +0000 (13:55 +1000)]
clover: access 3.0 and deprecated 2.2 API
Adds the api defines to open up deprecaated 2.2 and new 3.0 APIs.
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7468>
Dave Airlie [Fri, 6 Nov 2020 03:14:07 +0000 (13:14 +1000)]
vtn/opencl: add ctz support
ctz is a CL2.0 opcode but 3.0 requires it as well so just add support
for it.
Tested against CTS integer_ops integer_ctz test.
(long line broken up)
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7468>
Dave Airlie [Wed, 7 Oct 2020 00:19:09 +0000 (10:19 +1000)]
CL: update CL headers to 3.0
This just updates the headers from Khronos.
Change the cl_mem initialisers, not sure what totally correct answer is.
Acked-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7468>
Adam Jackson [Wed, 18 Dec 2019 18:40:22 +0000 (13:40 -0500)]
docs: Add MESA_pack_invert and ANGLE_pack_reverse_row_order
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3156>
Adam Jackson [Wed, 18 Dec 2019 15:40:38 +0000 (10:40 -0500)]
mesa: Implement GL_ANGLE_pack_reverse_row_order
Identical to GL_MESA_pack_invert in effect, just need to check for a
different enum value for GLES vs GL. The spec claims that "OpenGL 1.5 or
OpenGL ES 1.0 are required", but ReadPixels isn't a thing for ES1 so we
only enable it for ES2+.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3156>
Adam Jackson [Wed, 18 Dec 2019 17:58:36 +0000 (12:58 -0500)]
mesa: Enable GL_MESA_pack_invert unconditionally
This newly enables the extension for r100 and vieux. As far as I can
tell, that's safe to do. vieux's ReadPixels is just _mesa_readpixels,
which clearly already handles it correctly because the extension is
enabled for classic swrast. r100 has some custom acceleration paths
before falling down to _mesa_readpixels, which winds its way through to
r100_blit, which already has code to handle pack->Invert being set.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3156>
Vinson Lee [Tue, 27 Oct 2020 02:43:44 +0000 (19:43 -0700)]
v3dv: Remove unsigned comparison to zero.
subpass_idx is of type uint32_t.
Fix defects reported by Coverity Scan.
Macro compares unsigned to 0 (NO_EFFECT)
unsigned_compare: This greater-than-or-equal-to-zero comparison of
an unsigned value is always true. subpass_idx >= 0U.
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7325>
Jason Ekstrand [Fri, 10 Jul 2020 20:32:43 +0000 (15:32 -0500)]
nir: Handle ray-tracing intrinsics and storage classes in copy-prop etc.
We need to consider shader calls as potential writes to their payloads.
For other ray-tracing intrinsics, we may not have a shader payload
pointer and have to treat them more like a barrier. We also need to
ensure that global and SSBO reads/writes aren't propagated across shader
call intrinsics.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6479>
Jason Ekstrand [Thu, 14 May 2020 19:40:48 +0000 (14:40 -0500)]
spirv,nir: Add ray-tracing intrinsics
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6479>
Jason Ekstrand [Wed, 5 Aug 2020 19:50:36 +0000 (14:50 -0500)]
nir,spirv: Add support for the ShaderCallKHR scope
It's currently entirely trivial.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6479>
Jason Ekstrand [Wed, 29 Jul 2020 20:06:34 +0000 (15:06 -0500)]
spirv: Implement the new ray-tracing storage classes
The SPV_KHR_ray_tracing extension adds 6 new storage classes which is a
bit on the ridiculous side. In order to avoid adding that many variable
modes to NIR, we make a few simplifying assumptions:
1. CallableData and RayPayload data actually lives on the stack
somewhere, presumably in the caller's stack. We assume that these
are no different from global variables and use nir_var_shader_temp
for them. We still need a separate storage class for the incoming
variants but only so we can figure out which one the incoming one
is and lower it to something useful.
2. There's no difference between incoming CallableData and RayPaolad
data. We can use a single storage class for both.
3. ShaderRecordBuffer data is just a global memory access. This lets
us avoid NIR variables entirely and just fetch the pointer via the
shader_record_ptr system value and it's accessed using a 64-bit
global memory pointer.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6479>
Jason Ekstrand [Wed, 29 Jul 2020 19:00:29 +0000 (14:00 -0500)]
nir: Add new variable modes for ray-tracing
If we were desperate to reduce bits, we could probably also use
shader_in/out for hit attributes as they really are an output from
intersection shaders and read-only in any-hit and closest-hit shaders.
However, other passes such as nir_gether_info like to assume that
anything with nir_var_shader_in/out is indexed using vec4 locations for
interface matching. It's easier to just add a new variable mode.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6479>
Jason Ekstrand [Thu, 18 Jun 2020 17:50:21 +0000 (12:50 -0500)]
nir: Add intrinsics for object to/from world RT sysvals
These are a bit more tricky than most because they're matrix system
values. We make the intentional choice here to not bother with allowing
indirect addressing of columns for these. Since they're system values,
they may be magically constructed somehow or come from weird hardware so
it's easier on back-ends to just handle any indirects with bcsel.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6479>