Peter Crosthwaite [Wed, 10 Jul 2013 04:21:42 +0000 (14:21 +1000)]
target-arm/helper.c: OMAP/StrongARM cp15 crn=0 cleanup
The if block detecting OMAP/StrongARM modifies the id_cp_reginfo
.access fields in place. So there is no need to replicate the call
to define_arm_cp_reg(). Dropped, and let the OMAP case fall through
to the normal behaviour after the in-place modification.
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Message-id:
72aae9b8ebbc9a76d2b06faf8666ef8a4b34b92a.
1373429432.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Mans Rullgard [Mon, 15 Jul 2013 13:35:25 +0000 (14:35 +0100)]
target-arm: explicitly decode SEVL instruction
The ARMv8 SEVL instruction is in the architectural hint space already
emulated as nop. This makes the decoding of SEVL explicit for clarity.
Signed-off-by: Mans Rullgard <mans@mansr.com>
Message-id:
1370606786-5650-3-git-send-email-mans@mansr.com
[PMM: added 'SEVL' to the TODO comment]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Mans Rullgard [Mon, 15 Jul 2013 13:35:25 +0000 (14:35 +0100)]
target-arm: implement LDA/STL instructions
This adds support for the ARMv8 load acquire/store release instructions.
Since qemu does nothing special for memory barriers, these can be
emulated like their non-acquire/release counterparts.
Signed-off-by: Mans Rullgard <mans@mansr.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Mans Rullgard [Mon, 15 Jul 2013 13:35:25 +0000 (14:35 +0100)]
target-arm: add feature flag for ARMv8
Signed-off-by: Mans Rullgard <mans@mansr.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Anthony Liguori [Fri, 12 Jul 2013 19:37:47 +0000 (14:37 -0500)]
ioport: remove LITTLE_ENDIAN mark for portio
Setting it to LE forces a byte swap when host != guest endian but
this makes no sense at all.
Herve made the suggestion upon observing that word writes/reads
were broken into byte writes/reads in such a way as to assume
devices are interpret registers as LE.
However, even if this were a problem, marking the region as LE is
not useful because what's essentially happening here is that LE is
open coded. So by marking it LE in MemoryRegionOps, we're doing a
superflous swap.
Now, the portio code is suspicious to begin with. The dispatch
layer really has no purpose in splitting I/O requests in the first
place...
Cc: Hervé Poussineau <hpoussin@reactos.org>
Cc: Alex Graf <agraf@suse.de>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Anthony Liguori [Fri, 12 Jul 2013 12:58:31 +0000 (07:58 -0500)]
Merge remote-tracking branch 'agraf/ppc-for-upstream' into staging
# By Alexander Graf (16) and others
# Via Alexander Graf
* agraf/ppc-for-upstream: (22 commits)
PPC: dbdma: Support more multi-issue DMA requests
PPC: Add timer handler for newworld mac-io
PPC: dbdma: Support unaligned DMA access
PPC: dbdma: Wait for DMA until we have data
PPC: dbdma: Move processing to io
PPC: dbdma: macio: Add DMA callback
PPC: dbdma: Move static bh variable to device struct
PPC: dbdma: Introduce kick function
PPC: dbdma: Move defines into header file
PPC: dbdma: Allow new commands in RUN state
PPC: dbdma: Fix debug print
PPC: Mac: Add debug prints in macio and dbdma code
PPC: dbdma: Replace tabs with spaces
PPC: Macio: Replace tabs with spaces
PPC: g3beige: Move secondary IDE bus to mac-io
PPC: Mac: Fix guest exported tbfreq values
target-ppc: Add POWER8 v1.0 CPU model
pseries: move interrupt controllers to hw/intc/
spapr: Respect -bios command line option for SLOF
spapr: Use named enum for function remove_hpte
...
Message-id:
1373562085-29728-1-git-send-email-agraf@suse.de
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Alexander Graf [Sun, 30 Jun 2013 13:29:13 +0000 (15:29 +0200)]
PPC: dbdma: Support more multi-issue DMA requests
A DMA request can happen for data that hasn't been completely been
provided by the IDE core yet. For example
- DBDMA request for 0x1000 bytes
- IDE request for 1 sector
- DBDMA wants to read 0x1000 bytes (8 sectors) from bdrv
- breakage
Instead, we should truncate our bdrv request to the maximum number
of sectors we're allowed to read at that given time. Once that transfer
is through, we will fall into our recently introduced waiting logic.
- DBDMA requests for 0x1000 bytes
- IDE request for 1 sector
- DBDMA wants to read MIN(0x1000, 1 * 512) bytes
- DBDMA finishes reading, indicates to IDE core that transfer is complete
- IDE request for 7 sectors
- DBDMA finishes the DMA
Reported-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Alexander Graf <agraf@suse.de>
Alexander Graf [Sun, 30 Jun 2013 03:15:14 +0000 (05:15 +0200)]
PPC: Add timer handler for newworld mac-io
Mac OS X accesses fancy timer registers inside of the mac-io on bootup.
These really should be ticking at the mac-io bus frequency, but I don't
see anyone upset when we just make them as fast as we want to.
With this patch on top of my previous patch queue and latest OpenBIOS
I am able to boot Mac OS X 10.4 with -M mac99.
Signed-off-by: Alexander Graf <agraf@suse.de>
Alexander Graf [Fri, 28 Jun 2013 11:30:01 +0000 (13:30 +0200)]
PPC: dbdma: Support unaligned DMA access
The DBDMA engine really just reads bytes from a producing device (IDE
in our case) and shoves these bytes into memory. It doesn't care whether
any alignment takes place or not.
Our code today however assumes that block accesses always happen on
sector (512 byte) boundaries. This is a fair assumption for most cases.
However, Mac OS X really likes to do unaligned, incomplete accesses
that it finishes with the next DMA request.
So we need to read / write the unaligned bits independent of the actual
asynchronous request, because that one can only handle 512-byte-aligned
data. We also need to cache these unaligned sectors until the next DMA
request, at which point the data might be successfully flushed from the
pipe.
Signed-off-by: Alexander Graf <agraf@suse.de>
Alexander Graf [Sun, 30 Jun 2013 00:54:35 +0000 (02:54 +0200)]
PPC: dbdma: Wait for DMA until we have data
We should only start processing DMA requests when we have data to process.
Hold off working through the DMA shuffling until the IDE core told us that
it's ready.
This is required because the guest can program the DMA engine or the IDE
transfer first. Both are legal.
Signed-off-by: Alexander Graf <agraf@suse.de>
Alexander Graf [Sun, 30 Jun 2013 00:47:20 +0000 (02:47 +0200)]
PPC: dbdma: Move processing to io
Soon we will introduce intermediate processing pauses which will
allow the bottom half to restart a DMA request that couldn't be
fulfilled yet.
For that to work, move the processing variable into the io struct
which is what DMA providers work with.
While touching it, also change it into a bool
Signed-off-by: Alexander Graf <agraf@suse.de>
Alexander Graf [Sun, 30 Jun 2013 00:36:14 +0000 (02:36 +0200)]
PPC: dbdma: macio: Add DMA callback
We need to know when the IDE core starts a DMA transfer. Add a notifier
function so we have the chance to start transmitting data.
Signed-off-by: Alexander Graf <agraf@suse.de>
Alexander Graf [Sun, 30 Jun 2013 00:22:41 +0000 (02:22 +0200)]
PPC: dbdma: Move static bh variable to device struct
The DBDMA controller has a bottom half to asynchronously process DMA
request queues.
This bh was stored as a gross static variable. Move it into the device
struct instead.
While at it, move all users of it to the new generic kick function.
Signed-off-by: Alexander Graf <agraf@suse.de>
Alexander Graf [Sun, 30 Jun 2013 00:18:54 +0000 (02:18 +0200)]
PPC: dbdma: Introduce kick function
The DBDMA engine really is running all the time, waiting for input. However
we don't want to waste cycles constantly polling.
So introduce a kick function that data providers can call to notify the
DBDMA controller of new input.
Signed-off-by: Alexander Graf <agraf@suse.de>
Alexander Graf [Sun, 30 Jun 2013 00:06:35 +0000 (02:06 +0200)]
PPC: dbdma: Move defines into header file
We usually keep struct and constant definitions in header files. Move
them there to stay consistent and to make access to fields easier.
Signed-off-by: Alexander Graf <agraf@suse.de>
Alexander Graf [Sat, 29 Jun 2013 23:53:51 +0000 (01:53 +0200)]
PPC: dbdma: Allow new commands in RUN state
The DBDMA controller can not change its command stream while it's
actively streaming data, true. But the fact that it's in RUN state
doesn't actually indicate anything. It could just as well be in
WAIT while in RUN. And then it's legal to change commands.
This fixes a real world issue I've encountered with Mac OS X.
Signed-off-by: Alexander Graf <agraf@suse.de>
Alexander Graf [Sat, 29 Jun 2013 23:53:05 +0000 (01:53 +0200)]
PPC: dbdma: Fix debug print
There was a debug print that didn't compile for me because the format
and the arguments weren't in sync. Fix it up.
Signed-off-by: Alexander Graf <agraf@suse.de>
Alexander Graf [Sat, 29 Jun 2013 23:23:45 +0000 (01:23 +0200)]
PPC: Mac: Add debug prints in macio and dbdma code
The macio code is basically undebuggable as it stands today, with no
debug prints anywhere whatsoever. DBDMA was better, but I needed a
few more to create reasonable logs that tell me where breakage is.
Add a DPRINTF macro in the macio source file and add a bunch of debug
prints that are all disabled by default of course.
Signed-off-by: Alexander Graf <agraf@suse.de>
Alexander Graf [Sat, 29 Jun 2013 23:45:22 +0000 (01:45 +0200)]
PPC: dbdma: Replace tabs with spaces
s/^I/ /g on the file with a few manual tweaks to align things.
Signed-off-by: Alexander Graf <agraf@suse.de>
Alexander Graf [Sat, 29 Jun 2013 23:43:17 +0000 (01:43 +0200)]
PPC: Macio: Replace tabs with spaces
s/^I/ /g on the file.
Signed-off-by: Alexander Graf <agraf@suse.de>
Alexander Graf [Mon, 24 Jun 2013 19:40:50 +0000 (21:40 +0200)]
PPC: g3beige: Move secondary IDE bus to mac-io
On a real G3 Beige the secondary IDE bus lives on the mac-io chip, not
on some random PCI device. Move it there to become more compatible.
While at it, also clean up the IDE channel connection logic.
Signed-off-by: Alexander Graf <agraf@suse.de>
Alexander Graf [Sat, 29 Jun 2013 15:34:58 +0000 (17:34 +0200)]
PPC: Mac: Fix guest exported tbfreq values
We can tell the guest the frequency of its time base through fwcfg.
However, we tell it a different value from the speed tb actually runs
at. Let's fix it and make the tbfreq initialization and the fwcfg exposure
use the same values.
Signed-off-by: Alexander Graf <agraf@suse.de>
Prerna Saxena [Thu, 4 Jul 2013 06:42:32 +0000 (12:12 +0530)]
target-ppc: Add POWER8 v1.0 CPU model
This patch adds CPU PVR definition for POWER8,
and enables QEMU to launch guests on POWER8 hardware.
Signed-off-by: Prerna Saxena <prerna@linux.vnet.ibm.com>
Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Reviewed-by: Paul Mackerras <paulus@samba.org>
Reviewed-by: Andreas Farber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Alexey Kardashevskiy [Sat, 6 Jul 2013 13:53:58 +0000 (23:53 +1000)]
pseries: move interrupt controllers to hw/intc/
Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Reviewed-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Andreas Färber [Wed, 3 Jul 2013 19:26:50 +0000 (21:26 +0200)]
spapr: Respect -bios command line option for SLOF
Allow the user to override the firmware file name rather than always
using "slof.bin".
Reported-by: Dinar Valeev <k0da@opensuse.org>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Stefan Weil [Mon, 24 Jun 2013 17:48:47 +0000 (19:48 +0200)]
spapr: Use named enum for function remove_hpte
The function returned a target_ulong which was made from unnamed enum
values. The target_ulong was then assigned to an int variable which
was used in a switch statement.
Using a named enum in both cases makes reviews easier.
Signed-off-by: Stefan Weil <sw@weilnetz.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Stefan Weil [Sat, 29 Jun 2013 13:47:26 +0000 (15:47 +0200)]
spapr: Fix compiler warnings for some versions of gcc
i686-w64-mingw32-gcc (GCC) 4.6.3 from Debian wheezy reports these warnings:
hw/ppc/spapr_hcall.c:188:1: warning:
control reaches end of non-void function [-Wreturn-type]
hw/ppc/spapr_pci.c:454:1: warning:
control reaches end of non-void function [-Wreturn-type]
Both warnings are fixed by using g_assert_not_reached instead of assert.
A second line with assert(0) in spapr_pci.c which did not raise a compiler
warning was modified, too, because g_assert_not_reached documents the
purpose of that statement and is not removed in release builds.
Signed-off-by: Stefan Weil <sw@weilnetz.de>
Acked-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Alexander Graf <agraf@suse.de>
Julio Guerra [Mon, 24 Jun 2013 21:15:54 +0000 (23:15 +0200)]
e600 core for MPC86xx processors
MPC86xx processors are based on the e600 core, which is not the case
in qemu where it is based on the 7400 processor.
This patch creates the e600 core and instantiates the MPC86xx
processors based on it. Therefore, adding the high BATs, the SPRG
4..7 registers, which are e600-specific [1], and a HW MMU model (as 7400).
This allows to define the MPC8610 processor too.
Tested with a kernel using the HW TLB misses.
[1] http://cache.freescale.com/files/32bit/doc/ref_manual/E600CORERM.pdf
Signed-off-by: Julio Guerra <guerr@julio.in>
Signed-off-by: Alexander Graf <agraf@suse.de>
Anthony Liguori [Wed, 10 Jul 2013 19:34:32 +0000 (14:34 -0500)]
Merge remote-tracking branch 'luiz/queue/qmp' into staging
# By Kevin Wolf (4) and others
# Via Luiz Capitulino
* luiz/queue/qmp:
add timestamp to error_report()
qapi-schema: Use existing type for drive-backup arguments
qapi-schema: Use BlockdevSnapshot type for blockdev-snapshot-sync
qapi.py: Allow top-level type reference for command definitions
qapi.py: Avoid code duplication
qemu-char: Fix ringbuf option size
Message-id:
1373478767-20965-1-git-send-email-lcapitulino@redhat.com
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Seiji Aguchi [Thu, 4 Jul 2013 03:02:46 +0000 (23:02 -0400)]
add timestamp to error_report()
[Issue]
When we offer a customer support service and a problem happens
in a customer's system, we try to understand the problem by
comparing what the customer reports with message logs of the
customer's system.
In this case, we often need to know when the problem happens.
But, currently, there is no timestamp in qemu's error messages.
Therefore, we may not be able to understand the problem based on
error messages.
[Solution]
Add a timestamp to qemu's error message logged by
error_report() with g_time_val_to_iso8601().
Signed-off-by: Seiji Aguchi <seiji.aguchi@hds.com>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Signed-off-by: Luiz Capitulino <lcapitulino@redhat.com>
Kevin Wolf [Tue, 9 Jul 2013 08:05:35 +0000 (10:05 +0200)]
qapi-schema: Use existing type for drive-backup arguments
This removes duplicated definitions and documentation by reusing the
existing data type.
Signed-off-by: Kevin Wolf <kwolf@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Signed-off-by: Luiz Capitulino <lcapitulino@redhat.com>
Kevin Wolf [Mon, 1 Jul 2013 14:31:52 +0000 (16:31 +0200)]
qapi-schema: Use BlockdevSnapshot type for blockdev-snapshot-sync
We don't have to duplicate the definition any more now that we may refer
to a type instead.
Signed-off-by: Kevin Wolf <kwolf@redhat.com>
Reviewed-by: Michael Roth <mdroth@linux.vnet.ibm.com>
Signed-off-by: Luiz Capitulino <lcapitulino@redhat.com>
Kevin Wolf [Mon, 1 Jul 2013 14:31:51 +0000 (16:31 +0200)]
qapi.py: Allow top-level type reference for command definitions
If 'data' for a command definition isn't a dict, but a string, it is
taken as a (struct) type name and the fields of this struct are directly
used as parameters.
This is useful for transactionable commands that can use the same type
definition for both the transaction action and the arguments of the
standalone command.
Signed-off-by: Kevin Wolf <kwolf@redhat.com>
Reviewed-by: Michael Roth <mdroth@linux.vnet.ibm.com>
Signed-off-by: Luiz Capitulino <lcapitulino@redhat.com>
Kevin Wolf [Mon, 1 Jul 2013 14:31:50 +0000 (16:31 +0200)]
qapi.py: Avoid code duplication
The code that interprets the read JSON expression and appends types to
the respective global variables was duplicated. We can avoid that by
splitting off the part that reads from the file.
Signed-off-by: Kevin Wolf <kwolf@redhat.com>
Reviewed-by: Michael Roth <mdroth@linux.vnet.ibm.com>
Signed-off-by: Luiz Capitulino <lcapitulino@redhat.com>
Markus Armbruster [Thu, 27 Jun 2013 14:22:07 +0000 (16:22 +0200)]
qemu-char: Fix ringbuf option size
Any attempt to use it trips an "opt->desc->type == QEMU_OPT_NUMBER"
assertion. Broken in commit
1da48c65.
Cc: qemu-stable@nongnu.org
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Signed-off-by: Luiz Capitulino <lcapitulino@redhat.com>
Anthony Liguori [Wed, 10 Jul 2013 15:54:16 +0000 (10:54 -0500)]
Merge remote-tracking branch 'afaerber/tags/qom-cpu-for-anthony' into staging
QOM CPUState refactorings
* Fix for OpenRISCCPU subclasses
* Fix for gdbstub CPU selection
* Move linux-user CPU functions into new header
* CPUState part 10 refactoring: first_cpu, next_cpu, cpu_single_env et al.
* Fix some targets to consistently inline TCG code generation
* Centrally log CPU reset
# gpg: Signature made Wed 10 Jul 2013 07:52:39 AM CDT using RSA key ID
3E7E013F
# gpg: Can't check signature: public key not found
# By Andreas Färber (41) and others
# Via Andreas Färber
* afaerber/tags/qom-cpu-for-anthony: (43 commits)
cpu: Move reset logging to CPUState
target-ppc: Change LOG_MMU_STATE() argument to CPUState
target-i386: Change LOG_PCALL_STATE() argument to CPUState
log: Change log_cpu_state[_mask]() argument to CPUState
target-i386: Change do_smm_enter() argument to X86CPU
target-i386: Change do_interrupt_all() argument to X86CPU
target-xtensa: Change gen_intermediate_code_internal() arg to XtensaCPU
target-unicore32: Change gen_intermediate_code_internal() signature
target-sparc: Change gen_intermediate_code_internal() argument to SPARCCPU
target-sh4: Change gen_intermediate_code_internal() argument to SuperHCPU
target-s390x: Change gen_intermediate_code_internal() argument to S390CPU
target-ppc: Change gen_intermediate_code_internal() argument to PowerPCCPU
target-mips: Change gen_intermediate_code_internal() argument to MIPSCPU
target-microblaze: Change gen_intermediate_code_internal() argument types
target-m68k: Change gen_intermediate_code_internal() argument to M68kCPU
target-lm32: Change gen_intermediate_code_internal() argument to LM32CPU
target-i386: Change gen_intermediate_code_internal() argument to X86CPU
target-cris: Change gen_intermediate_code_internal() argument to CRISCPU
target-arm: Change gen_intermediate_code_internal() argument to ARMCPU
target-alpha: Change gen_intermediate_code_internal() argument to AlphaCPU
...
Anthony Liguori [Wed, 10 Jul 2013 15:54:09 +0000 (10:54 -0500)]
Merge remote-tracking branch 'riku/linux-user-for-upstream' into staging
# By Andreas Schwab (2) and others
# Via Riku Voipio
* riku/linux-user-for-upstream:
linux-user: Do not ignore mmap failure from host
linux-user: improve target_to_host_sock_type conversion
user-exec.c: Set is_write correctly in the ARM cpu_signal_handler()
linux-user: Fix sys_utimensat (would not compile on old glibc)
linux-user: fix signal number range check
linux-user: add SIOCADDRT/SIOCDELRT support
linux-user: handle /proc/$$ like /proc/self
Message-id: cover.
1373051589.git.riku.voipio@linaro.org
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Anthony Liguori [Wed, 10 Jul 2013 15:53:55 +0000 (10:53 -0500)]
Merge remote-tracking branch 'rth/tcg-next' into staging
# By Richard Henderson
# Via Richard Henderson
* rth/tcg-next:
tcg-arm: Implement tcg_register_jit
tcg-i386: Use QEMU_BUILD_BUG_ON instead of assert for frame size
tcg: Move the CIE and FDE header definitions to common code
tcg: Fix high_pc fields in .debug_info
tcg-arm: Use AT_PLATFORM to detect the host ISA
tcg-arm: Simplify logic in detecting the ARM ISA in use
tcg-arm: Rename use_armv5_instructions to use_armvt5_instructions
tcg-arm: Make use of conditional availability of opcodes for divide
tcg: Simplify logic using TCG_OPF_NOT_PRESENT
tcg: Allow non-constant control macros
tcg-ppc64: Don't implement rem
tcg-ppc: Don't implement rem
tcg-arm: Don't implement rem
tcg: Split rem requirement from div requirement
tcg: Add myself to general TCG maintainership
Message-id:
1373379515-28596-1-git-send-email-rth@twiddle.net
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Peter Crosthwaite [Tue, 18 Jun 2013 09:18:59 +0000 (19:18 +1000)]
qom: Fix class cast of NULL classes
Its clear from the implementation that class casting is supposed to work
with a NULL class argument. Guard all dereferences of the class argument
against NULL accordingly.
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Message-id:
94cd5ba46b74eea289a7e582635820c1c54e66fa.
1371546907.git.peter.crosthwaite@xilinx.com
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Andreas Färber [Sun, 16 Jun 2013 05:49:48 +0000 (07:49 +0200)]
cpu: Move reset logging to CPUState
x86 was using additional CPU_DUMP_* flags, so make that configurable in
CPUClass::reset_dump_flags.
This adds reset logging for alpha, unicore32 and xtensa.
Acked-by: Michael Walle <michael@walle.cc> (for lm32)
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Andreas Färber [Tue, 2 Jul 2013 22:52:23 +0000 (00:52 +0200)]
target-ppc: Change LOG_MMU_STATE() argument to CPUState
Choose CPUState rather than PowerPCCPU since doing a CPU() cast on the
macro argument would hide type mismatches.
Signed-off-by: Andreas Färber <afaerber@suse.de>
Andreas Färber [Tue, 2 Jul 2013 23:07:10 +0000 (01:07 +0200)]
target-i386: Change LOG_PCALL_STATE() argument to CPUState
Since log_cpu_state_mask() argument was changed to CPUState,
CPUArchState is no longer needed.
Choose CPUState rather than X86CPU to not hide type mismatches with CPU().
Signed-off-by: Andreas Färber <afaerber@suse.de>
Andreas Färber [Sun, 16 Jun 2013 05:28:50 +0000 (07:28 +0200)]
log: Change log_cpu_state[_mask]() argument to CPUState
Since commit
878096eeb278a8ac1ccd6667af73e026f29b4cf5 (cpu: Turn
cpu_dump_{state,statistics}() into CPUState hooks) CPUArchState is no
longer needed.
Add documentation and make the functions available through qemu/log.h
outside NEED_CPU_H to allow use in qom/cpu.c. Moving them to qom/cpu.h
was not yet possible due to convoluted include paths, so that some
devices grow an implicit and unneeded dependency on qom/cpu.h for now.
Acked-by: Michael Walle <michael@walle.cc> (for lm32)
Reviewed-by: Richard Henderson <rth@twiddle.net>
[AF: Simplified mb_cpu_do_interrupt() and do_interrupt_all() changes]
Signed-off-by: Andreas Färber <afaerber@suse.de>
Andreas Färber [Wed, 3 Jul 2013 00:45:17 +0000 (02:45 +0200)]
target-i386: Change do_smm_enter() argument to X86CPU
Prepares for log_cpu_state_mask() changing argument to CPUState.
Signed-off-by: Andreas Färber <afaerber@suse.de>
Andreas Färber [Wed, 3 Jul 2013 00:00:09 +0000 (02:00 +0200)]
target-i386: Change do_interrupt_all() argument to X86CPU
Prepares for log_cpu_state() changing argument to CPUState.
Signed-off-by: Andreas Färber <afaerber@suse.de>
Andreas Färber [Fri, 21 Jun 2013 20:33:01 +0000 (22:33 +0200)]
target-xtensa: Change gen_intermediate_code_internal() arg to XtensaCPU
Also use bool type while at it.
Prepares for moving singlestep_enabled field to CPUState.
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Andreas Färber [Fri, 21 Jun 2013 20:29:57 +0000 (22:29 +0200)]
target-unicore32: Change gen_intermediate_code_internal() signature
Use UniCore32CPU and bool.
Prepares for moving singlestep_enabled field to CPUState.
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Andreas Färber [Fri, 21 Jun 2013 20:27:28 +0000 (22:27 +0200)]
target-sparc: Change gen_intermediate_code_internal() argument to SPARCCPU
Also use bool type while at it.
Prepares for moving singlestep_enabled field to CPUState.
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Andreas Färber [Fri, 21 Jun 2013 20:24:41 +0000 (22:24 +0200)]
target-sh4: Change gen_intermediate_code_internal() argument to SuperHCPU
Also use bool type while at it.
Prepares for moving singlestep_enabled field to CPUState.
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Andreas Färber [Fri, 21 Jun 2013 20:22:09 +0000 (22:22 +0200)]
target-s390x: Change gen_intermediate_code_internal() argument to S390CPU
Also use bool type while at it.
Prepares for moving singlestep_enabled field to CPUState.
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Andreas Färber [Fri, 21 Jun 2013 20:19:32 +0000 (22:19 +0200)]
target-ppc: Change gen_intermediate_code_internal() argument to PowerPCCPU
Also use bool type while at it.
Prepares for moving singlestep_enabled field to CPUState.
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Andreas Färber [Fri, 21 Jun 2013 20:17:17 +0000 (22:17 +0200)]
target-mips: Change gen_intermediate_code_internal() argument to MIPSCPU
Also use bool type while at it.
Prepares for moving singlestep_enabled field to CPUState.
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Andreas Färber [Fri, 21 Jun 2013 20:14:44 +0000 (22:14 +0200)]
target-microblaze: Change gen_intermediate_code_internal() argument types
Use MicroBlazeCPU and bool.
Prepares for changing log_cpu_state() argument to CPUState and for
moving singlestep_enabled field to CPUState.
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Andreas Färber [Fri, 21 Jun 2013 20:11:36 +0000 (22:11 +0200)]
target-m68k: Change gen_intermediate_code_internal() argument to M68kCPU
Also use bool type while at it.
Prepares for moving singlestep_enabled field to CPUState.
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Andreas Färber [Fri, 21 Jun 2013 20:09:30 +0000 (22:09 +0200)]
target-lm32: Change gen_intermediate_code_internal() argument to LM32CPU
Also use bool type while at it.
Prepares for moving singlestep_enabled field to CPUState.
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Andreas Färber [Fri, 21 Jun 2013 20:09:01 +0000 (22:09 +0200)]
target-i386: Change gen_intermediate_code_internal() argument to X86CPU
Also use bool type while at it.
Prepares for moving singlestep_enabled field to CPUState.
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Andreas Färber [Fri, 21 Jun 2013 20:04:49 +0000 (22:04 +0200)]
target-cris: Change gen_intermediate_code_internal() argument to CRISCPU
Also use bool type while at it.
Prepares for moving singlestep_enabled field to CPUState.
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Andreas Färber [Fri, 21 Jun 2013 19:57:04 +0000 (21:57 +0200)]
target-arm: Change gen_intermediate_code_internal() argument to ARMCPU
Also use bool type while at it.
Prepares for moving singlestep_enabled field to CPUState.
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Andreas Färber [Fri, 21 Jun 2013 20:01:20 +0000 (22:01 +0200)]
target-alpha: Change gen_intermediate_code_internal() argument to AlphaCPU
Also use bool argument while at it.
Prepares for moving singlestep_enabled field to CPUState.
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Andreas Färber [Tue, 2 Jul 2013 18:05:21 +0000 (20:05 +0200)]
target-xtensa: gen_intermediate_code_internal() should be inlined
Cc: qemu-stable@nongnu.org
Reported-by: Richard Henderson <rth@twiddle.net>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Andreas Färber [Tue, 2 Jul 2013 18:04:28 +0000 (20:04 +0200)]
target-moxie: gen_intermediate_code_internal() should be inlined
Cc: qemu-stable@nongnu.org
Reported-by: Richard Henderson <rth@twiddle.net>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Andreas Färber [Tue, 2 Jul 2013 18:03:00 +0000 (20:03 +0200)]
target-microblaze: gen_intermediate_code_internal() should be inlined
Cc: qemu-stable@nongnu.org
Reported-by: Richard Henderson <rth@twiddle.net>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Andreas Färber [Tue, 2 Jul 2013 17:35:02 +0000 (19:35 +0200)]
target-lm32: gen_intermediate_code_internal() should be inlined
Cc: qemu-stable@nongnu.org
Reported-by: Richard Henderson <rth@twiddle.net>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Acked-by: Michael Walle <michael@walle.cc>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Andreas Färber [Tue, 2 Jul 2013 17:30:14 +0000 (19:30 +0200)]
target-cris: gen_intermediate_code_internal() should be inlined
Cc: qemu-stable@nongnu.org
Reported-by: Richard Henderson <rth@twiddle.net>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Andreas Färber [Wed, 26 Jun 2013 15:51:27 +0000 (17:51 +0200)]
target-i386: Don't overuse CPUArchState
Use CPUX86State instead in dump support code.
Signed-off-by: Andreas Färber <afaerber@suse.de>
Andreas Färber [Fri, 21 Jun 2013 15:17:00 +0000 (17:17 +0200)]
target-s390x: Change handle_{hypercall,diag}() argument to S390CPU
This allows to get rid of the last remaining ENV_GET_CPU() in
target-s390x/ by using CPU() cast directly on the argument.
Cc: Jason J. Herne <jjherne@us.ibm.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Andreas Färber [Fri, 21 Jun 2013 15:04:45 +0000 (17:04 +0200)]
target-s390x: Don't overuse ENV_GET_CPU()
Commit
3474b679486caa8f6448bae974e131370f360c13 (Utilize selective
runtime reg sync for hot code paths) introduced two uses of
ENV_GET_CPU() inside target-s390x/ KVM code. In one case we can use a
direct CPU() cast instead.
Cc: Jason J. Herne <jjherne@us.ibm.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Andreas Färber [Fri, 21 Jun 2013 15:00:04 +0000 (17:00 +0200)]
target-ppc: Don't overuse ENV_GET_CPU()
Commit
b632a148b677b773ff155f9de840b37a653567b9 (target-ppc: QOM method
dispatch for MMU fault handling) introduced a use of ENV_GET_CPU()
inside target-ppc/ code. Use ppc_env_get_cpu() instead.
Purely cosmetic, non-functional change to aid in locating and removing
ENV_GET_CPU() usages.
Signed-off-by: Andreas Färber <afaerber@suse.de>
Andreas Färber [Sun, 16 Jun 2013 15:10:28 +0000 (17:10 +0200)]
timer/arm_mptimer: Build arm_mptimer only once
Since current_cpu is CPUState it no longer depends on CPUARMState.
Signed-off-by: Andreas Färber <afaerber@suse.de>
Andreas Färber [Sun, 16 Jun 2013 15:04:21 +0000 (17:04 +0200)]
intc/openpic: Build openpic only once
Since current_cpu is CPUState it no longer depends on CPUPPCState.
Move ppce500_set_mpic_proxy() to a new hw/ppc/ppc_e500.h because
hw/ppc/ppc.h is too heavily using CPUPPCState and PowerPCCPU.
Signed-off-by: Andreas Färber <afaerber@suse.de>
Andreas Färber [Sun, 16 Jun 2013 14:42:03 +0000 (16:42 +0200)]
intc/arm_gic: Build arm_gic only once
Since current_cpu is CPUState it no longer needs CPUArchState.
Signed-off-by: Andreas Färber <afaerber@suse.de>
Andreas Färber [Sun, 9 Jun 2013 17:51:23 +0000 (19:51 +0200)]
bsd-user: Change thread_env to CPUState
Signed-off-by: Andreas Färber <afaerber@suse.de>
Andreas Färber [Sun, 9 Jun 2013 17:47:04 +0000 (19:47 +0200)]
linux-user: Change thread_env to CPUState
Signed-off-by: Andreas Färber <afaerber@suse.de>
Andreas Färber [Wed, 29 May 2013 20:29:20 +0000 (22:29 +0200)]
cpu: Make first_cpu and next_cpu CPUState
Move next_cpu from CPU_COMMON to CPUState.
Move first_cpu variable to qom/cpu.h.
gdbstub needs to use CPUState::env_ptr for now.
cpu_copy() no longer needs to save and restore cpu_next.
Acked-by: Paolo Bonzini <pbonzini@redhat.com>
[AF: Rebased, simplified cpu_copy()]
Signed-off-by: Andreas Färber <afaerber@suse.de>
Andreas Färber [Mon, 24 Jun 2013 21:53:10 +0000 (23:53 +0200)]
linux-user: Clean up do_syscall() Coding Style for TARGET_NR_exit
In particular fix 6-/10-char indentation.
Signed-off-by: Andreas Färber <afaerber@suse.de>
Andreas Färber [Mon, 27 May 2013 12:40:48 +0000 (14:40 +0200)]
kvm: Change kvm_remove_all_breakpoints() argument to CPUState
Acked-by: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Andreas Färber [Mon, 27 May 2013 03:17:50 +0000 (05:17 +0200)]
cpu: Replace cpu_single_env with CPUState current_cpu
Move it to qom/cpu.h.
Signed-off-by: Andreas Färber <afaerber@suse.de>
Andreas Färber [Wed, 19 Jun 2013 15:37:31 +0000 (17:37 +0200)]
kvm: Free current_cpu identifier
Since CPU loops are done as last step in kvm_{insert,remove}_breakpoint()
and kvm_remove_all_breakpoints(), we do not need to distinguish between
invoking CPU and iterated CPUs and can thereby free the identifier for
use as a global variable.
Acked-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Andreas Färber [Fri, 10 May 2013 14:34:06 +0000 (16:34 +0200)]
cpu: Drop unnecessary dynamic casts in *_env_get_cpu()
A transition from CPUFooState to FooCPU can be considered safe,
just like FooCPU::env access in the opposite direction.
The only benefit of the FOO_CPU() casts would be protection against
bogus CPUFooState pointers, but then surrounding code would likely
break, too.
This should slightly improve interrupt etc. performance when going from
CPUFooState to FooCPU.
For any additional CPU() casts see
3556c233d931ad5ffa46a35cb25cfc057732ebb8
(qom: allow turning cast debugging off).
Reported-by: Anthony Liguori <aliguori@us.ibm.com>
Acked-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Peter Maydell [Fri, 28 Jun 2013 13:22:32 +0000 (14:22 +0100)]
linux-user: Move cpu_clone_regs() and cpu_set_tls() into linux-user
The functions cpu_clone_regs() and cpu_set_tls() are not purely CPU
related -- they are specific to the TLS ABI for a a particular OS.
Move them into the linux-user/ tree where they belong.
target-lm32 had entirely unused implementations, since it has no
linux-user target; just drop them.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Acked-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Andreas Färber [Tue, 9 Jul 2013 18:50:52 +0000 (20:50 +0200)]
Revert "gdbstub: Simplify find_cpu()"
This reverts commit
c52a6b67c1d7c6fc9fb2e3ba988d7b978e1487d3, which
replaced cpu_index() with cpu_index field, leading to deviation from
thread ID for NTPL and off-by-one otherwise.
Reported-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Markus Armbruster [Thu, 4 Jul 2013 13:09:23 +0000 (15:09 +0200)]
vl: Tighten parsing of -machine option phandle_start
Make it QEMU_OPT_NUMBER, so it gets parsed by generic code, which
actually bothers to check for errors, rather than its user, which
doesn't.
Cc: Alexander Graf <agraf@suse.de>
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Acked-by: Alexander Graf <agraf@suse.de>
Message-id:
1372943363-24081-8-git-send-email-armbru@redhat.com
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Markus Armbruster [Thu, 4 Jul 2013 13:09:22 +0000 (15:09 +0200)]
Simplify -machine option queries with qemu_get_machine_opts()
The previous two commits fixed bugs in -machine option queries. I
can't find fault with the remaining queries, but let's use
qemu_get_machine_opts() everywhere, for consistency, simplicity and
robustness.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-id:
1372943363-24081-7-git-send-email-armbru@redhat.com
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Markus Armbruster [Thu, 4 Jul 2013 13:09:21 +0000 (15:09 +0200)]
microblaze: Fix latent bug with default DTB lookup
microblaze_load_kernel() fails to call
qemu_find_file(QEMU_FILE_TYPE_BIOS, dtb_filename) when no -machine
options are given. This can't normally happen, because -machine
option kernel is mandatory for this target. Fix it anyway, by using
qemu_get_machine_opts().
Cc: Peter Crosthwaite <peter.crosthwaite@petalogix.com>
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-id:
1372943363-24081-6-git-send-email-armbru@redhat.com
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Markus Armbruster [Thu, 4 Jul 2013 13:09:20 +0000 (15:09 +0200)]
Fix -machine options accel, kernel_irqchip, kvm_shadow_mem
Multiple -machine options with the same ID are merged. All but the
one without an ID are to be silently ignored.
In most places, we query these options with a null ID. This is
correct.
In some places, we instead query whatever options come first in the
list. This is wrong. When the -machine processed first happens to
have an ID, options are taken from that ID, and the ones specified
without ID are silently ignored.
Example:
$ upstream-qemu -nodefaults -S -display none -monitor stdio -machine id=foo -machine accel=kvm,usb=on
$ upstream-qemu -nodefaults -S -display none -monitor stdio -machine id=foo,accel=kvm,usb=on -machine accel=xen
$ upstream-qemu -nodefaults -S -display none -monitor stdio -machine accel=xen -machine id=foo,accel=kvm,usb=on
$ qemu-system-x86_64 -nodefaults -S -display none -monitor stdio -machine accel=kvm,usb=on
QEMU 1.5.50 monitor - type 'help' for more information
(qemu) info kvm
kvm support: enabled
(qemu) info usb
(qemu) q
$ qemu-system-x86_64 -nodefaults -S -display none -monitor stdio -machine id=foo -machine accel=kvm,usb=on
QEMU 1.5.50 monitor - type 'help' for more information
(qemu) info kvm
kvm support: disabled
(qemu) info usb
(qemu) q
$ qemu-system-x86_64 -nodefaults -S -display none -monitor stdio -machine id=foo,accel=kvm,usb=on -machine accel=xen
QEMU 1.5.50 monitor - type 'help' for more information
(qemu) info kvm
kvm support: enabled
(qemu) info usb
USB support not enabled
(qemu) q
$ qemu-system-x86_64 -nodefaults -S -display none -monitor stdio -machine accel=xen -machine id=foo,accel=kvm,usb=on
xc: error: Could not obtain handle on privileged command interface (2 = No such file or directory): Internal error
xen be core: can't open xen interface
failed to initialize Xen: Operation not permitted
Option usb is queried correctly, and the one without an ID wins,
regardless of option order.
Option accel is queried incorrectly, and which one wins depends on
option order and ID.
Affected options are accel (and its sugared forms -enable-kvm and
-no-kvm), kernel_irqchip, kvm_shadow_mem.
Additionally, option kernel_irqchip is normally on by default, except
it's off when no -machine options are given. Bug can't bite, because
kernel_irqchip is used only when KVM is enabled, KVM is off by
default, and enabling always creates -machine options. Downstreams
that enable KVM by default do get bitten, though.
Use qemu_get_machine_opts() to fix these bugs.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-id:
1372943363-24081-5-git-send-email-armbru@redhat.com
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Markus Armbruster [Thu, 4 Jul 2013 13:09:19 +0000 (15:09 +0200)]
vl: New qemu_get_machine_opts()
To be used in the next few commits to fix or clean up queries of
"machine" options (-machine and its sugared forms).
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-id:
1372943363-24081-4-git-send-email-armbru@redhat.com
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Markus Armbruster [Thu, 4 Jul 2013 13:09:18 +0000 (15:09 +0200)]
qemu-option: Fix qemu_opts_set_defaults() for corner cases
Commit 4f6dd9a changed the initialization of opts in opts_parse() to
this:
if (defaults) {
if (!id && !QTAILQ_EMPTY(&list->head)) {
opts = qemu_opts_find(list, NULL);
} else {
opts = qemu_opts_create(list, id, 0);
}
} else {
opts = qemu_opts_create(list, id, 1);
}
Same as before for !defaults.
If defaults is true, and params has no ID, and options exist, we use
the first assignment. It sets opts to null if all options have an ID.
opts_parse() then returns null. qemu_opts_set_defaults() asserts the
value is non-null. It's the only caller that passes true for
defaults.
To reproduce, try "-M xenpv -machine id=foo" (yes, "id=foo" is silly,
but it shouldn't crash).
I believe the function attempts to do the following:
If options don't yet exist, create new options
Else, if defaults, modify the existing options
Else, if list->merge_lists, modify the existing options
Else, fail
A straightforward call of qemu_opts_create() does exactly that.
Cc: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-id:
1372943363-24081-3-git-send-email-armbru@redhat.com
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Markus Armbruster [Thu, 4 Jul 2013 13:09:17 +0000 (15:09 +0200)]
qemu-option: Fix qemu_opts_find() for null id arguments
Crashes when the first list member has an ID. Admittedly nonsensical
reproducer:
$ qemu-system-x86_64 -nodefaults -machine id=foo -machine ""
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id:
1372943363-24081-2-git-send-email-armbru@redhat.com
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Stefan Weil [Fri, 5 Jul 2013 17:07:16 +0000 (19:07 +0200)]
exec: Remove unused global variable phys_ram_fd
It seems to be unused since several years (commit
be995c27640a82c7056b6f53d02ec823570114e5 in 2006).
Signed-off-by: Stefan Weil <sw@weilnetz.de>
Reviewed-by: Andreas Färber <afaerber@suse.de>
Message-id:
1373044036-14443-1-git-send-email-sw@weilnetz.de
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
M. Mohan Kumar [Thu, 4 Jul 2013 09:21:18 +0000 (14:51 +0530)]
hw/9pfs: Fix memory leak in error path
Fix few more memory leaks in virtio-9p-device.c detected using valgrind.
Signed-off-by: M. Mohan Kumar <mohan@in.ibm.com>
Message-id:
1372929678-14341-1-git-send-email-mohan@in.ibm.com
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Stefan Weil [Sun, 16 Jun 2013 10:02:40 +0000 (12:02 +0200)]
fsdev: Fix potential memory leak
This leak was reported by cppcheck.
Signed-off-by: Stefan Weil <sw@weilnetz.de>
Reviewed-by: M. Mohan Kumar <mohan@in.ibm.com>
Message-id:
1371376960-18192-1-git-send-email-sw@weilnetz.de
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
MRatnikov [Sun, 7 Jul 2013 21:03:02 +0000 (01:03 +0400)]
Extend support of SMBUS(module pm_smbus.c) HST_STS register.
Previous realization doesn't consider flags in the status register.
Add DS and INTR bits of HST_STS register set after transaction execution.
Update bits resetting in HST_STS register. Update error processing:
if DEV_ERR bit set transaction isn't execution.
Signed-off-by: MRatnikov <m.o.ratnikov@gmail.com>
Message-id:
1373230982-9190-1-git-send-email-m.o.ratnikov@gmail.com
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Paolo Bonzini [Wed, 3 Jul 2013 16:29:45 +0000 (20:29 +0400)]
trap signals for "-serial mon:stdio"
With mon:stdio you can exit the VM by switching to the monitor and
sending the "quit" command. It is then useful to pass Ctrl-C to the
VM instead of exiting.
This in turn lets us stop tying the default signal handling behavior
to -nographic, removing gratuitous differences between "-display none"
and "-nographic".
This patch changes behavior for "-display none -serial mon:stdio", as
expected, but not for "-display none -serial stdio".
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id:
1372868986-25988-1-git-send-email-mjt@msgid.tls.msk.ru
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Richard Henderson [Sat, 22 Jun 2013 02:10:16 +0000 (19:10 -0700)]
configure: Simplify alternate .text segment
For bsd-user and linux-user emulation modes QEMU needs to be linked at an
alternate .text segment address, so that it's out of the way of the guest
executable. Instead of including modified linker scripts for each arch,
just set the address with -Ttext-segment if supported, or by using sed to
edit the default linker script.
Cc: Ed Maste <emaste@freebsd.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Acked-by: Ed Maste <emaste@freebsd.org>
Signed-off-by: Ed Maste <emaste@freebsd.org>
Message-id:
1371867016-7660-1-git-send-email-rth@twiddle.net
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Dongxue Zhang [Tue, 2 Jul 2013 09:11:55 +0000 (17:11 +0800)]
target-openrisc: Fix typename in openrisc_cpu_class_by_name()
Commit
478032a93d908e59085c1ac56f10979942e7dc4f (target-openrisc:
Rename CPU subtypes) suffixed CPU sub-types with "-or32-cpu" but forgot
to update openrisc_cpu_class_by_name(), so that it was still looking for
the types without suffix.
Make target-openrisc running OK by adding the suffix to the model name.
This means it is no longer possible to use -cpu or1200-or32-cpu or
-cpu any-or32-cpu though.
Cc: qemu-stable@nongnu.org
Signed-off-by: Dongxue Zhang <elta.era@gmail.com>
Tested-by: Jia Liu <proljc@gmail.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Richard Henderson [Wed, 5 Jun 2013 14:55:33 +0000 (07:55 -0700)]
tcg-arm: Implement tcg_register_jit
Allows unwinding past the code_gen_buffer.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Richard Henderson [Wed, 5 Jun 2013 14:56:29 +0000 (07:56 -0700)]
tcg-i386: Use QEMU_BUILD_BUG_ON instead of assert for frame size
We can check the condition at compile time, rather than run time.
Reviewed-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Richard Henderson [Wed, 5 Jun 2013 14:39:57 +0000 (07:39 -0700)]
tcg: Move the CIE and FDE header definitions to common code
These will necessarily be the same layout for all hosts. This limits
the amount of boilerplate required to implement jit debug for a host.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Richard Henderson [Fri, 24 May 2013 21:16:14 +0000 (14:16 -0700)]
tcg: Fix high_pc fields in .debug_info
I don't think the debugger actually looks at this for anything,
using the correct .debug_frame contents, but might as well get
it all correct.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Richard Henderson [Thu, 6 Jun 2013 17:46:35 +0000 (10:46 -0700)]
tcg-arm: Use AT_PLATFORM to detect the host ISA
With this we can generate armv7 insns even when the OS compiles for a
lower common denominator. The macros are arranged so that when we do
compile for a given ISA, all of the runtime checks for that ISA are
optimized away.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>