George Rimar [Mon, 26 Mar 2018 08:58:16 +0000 (08:58 +0000)]
This is PR36799.
Currently, we might have a bug with scripts like below:
.foo : ALIGN(8)
{
*(.foo)
} > ram
because do not expand the memory region when doing ALIGN.
This might result in file range overlaps. The patch fixes the issue.
Differential revision: https://reviews.llvm.org/D44730
llvm-svn: 328479
Martin Storsjo [Mon, 26 Mar 2018 08:41:10 +0000 (08:41 +0000)]
[ARM] Simplify constructing the ARMArchFeature string. NFC.
Differential Revision: https://reviews.llvm.org/D44819
llvm-svn: 328478
Eric Fiselier [Mon, 26 Mar 2018 07:06:25 +0000 (07:06 +0000)]
Fix test case initialization issues in permissions test
llvm-svn: 328477
Eric Fiselier [Mon, 26 Mar 2018 06:23:55 +0000 (06:23 +0000)]
Implement filesystem::perm_options specified in NB comments.
The NB comments for filesystem changed permissions and added
a new enum `perm_options` which control how the permissions
are applied.
This implements than NB resolution
llvm-svn: 328476
Eric Fiselier [Mon, 26 Mar 2018 05:46:57 +0000 (05:46 +0000)]
Make filesystem tests generic between experimental and std versions.
As I move towards implementing std::filesystem, there is a need to
make the existing tests run against both the std and experimental versions.
Additionally, it's helpful to allow running the tests against other
implementations of filesystem.
This patch converts the test to easily target either. First, it
adds a filesystem_include.hpp header which is soley responsible
for selecting and including the correct implementation. Second,
it converts existing tests to use this header instead of including
filesystem directly.
llvm-svn: 328475
Craig Topper [Mon, 26 Mar 2018 05:05:12 +0000 (05:05 +0000)]
[X86] Fix the SchedRW for intrinsic register form of SQRT/RCP/RSQRT.
llvm-svn: 328474
Craig Topper [Mon, 26 Mar 2018 05:05:10 +0000 (05:05 +0000)]
[X86] Merge the SSE and AVX versions of fp divs and sqrts in the SandyBridge/Haswell/Broadwell/Skylake scheduler models.
I've used Agner's data as best I could to get the values to converge on.
llvm-svn: 328473
Craig Topper [Mon, 26 Mar 2018 04:20:36 +0000 (04:20 +0000)]
[X86] Add itinerary to intrinsic version of sqrtss, rcpss, and rsqrtss instructions.
llvm-svn: 328472
Craig Topper [Mon, 26 Mar 2018 02:17:15 +0000 (02:17 +0000)]
[X86] Correct the itineraries for the dot production instructions.
llvm-svn: 328471
Craig Topper [Mon, 26 Mar 2018 02:17:14 +0000 (02:17 +0000)]
[X86] Use the same itinerary for VCVTDQ2PD as the SSE version so that the generated scheduler classes will merge.
llvm-svn: 328470
Craig Topper [Mon, 26 Mar 2018 02:17:13 +0000 (02:17 +0000)]
[X86] Swap the itineraries on the memory and register forms of CVTDQ2PD.
They were backwards.
llvm-svn: 328469
Craig Topper [Mon, 26 Mar 2018 02:17:12 +0000 (02:17 +0000)]
[X86] Give VMOVSX/ZX the same itinerary as the SSE version so they'll reuse the same generated scheduler class.
llvm-svn: 328468
Vitaly Buka [Mon, 26 Mar 2018 01:29:48 +0000 (01:29 +0000)]
[sanitizer] Make test compatible with Darwin
llvm-svn: 328467
Craig Topper [Sun, 25 Mar 2018 23:52:06 +0000 (23:52 +0000)]
[X86] Give vpmsadbw the same itinerary as the SSE version so they'll be able to share the same generated scheduler class.
llvm-svn: 328466
Craig Topper [Sun, 25 Mar 2018 23:40:56 +0000 (23:40 +0000)]
[X86] Move (v)movss to port 5 only for Skylake. Move (v)movups/d to port 015 for Skylake.
This matches Agner's data and is consistent with what the EVEX instructions were doing on SKX.
llvm-svn: 328465
Erik Pilkington [Sun, 25 Mar 2018 22:50:33 +0000 (22:50 +0000)]
[demangler] Use a back-patching scheme to resolve forward references.
Strictly in a conversion operator's type, a <template-param> refers to a
<template-arg> that is further ahead in the mangled name. Instead of
doing a second parse to resolve these, introduce a
ForwardTemplateReference Node and back-patch the referenced
<template-arg> when we're in the right context.
This is also a correctness fix, previously we would only do a second
parse if the <template-param> was out of bounds in the current set of
<template-args>. This lead to misdemangles (gasp!) when the conversion
operator was a member of a templated struct, for instance.
llvm-svn: 328464
Erik Pilkington [Sun, 25 Mar 2018 22:49:57 +0000 (22:49 +0000)]
[demangler] Tweak how parameter pack sizes are determined.
Rather than eagerly propagating up parameter pack sizes in Node ctors,
find the parameter pack size during printing. This is being done to
support back-patching forward referencing <template-param>s.
llvm-svn: 328463
Erik Pilkington [Sun, 25 Mar 2018 22:49:16 +0000 (22:49 +0000)]
[demangler] Support for clang's enable_if attribute.
Fixes PR33569.
llvm-svn: 328462
Sanjay Patel [Sun, 25 Mar 2018 21:16:33 +0000 (21:16 +0000)]
[PatternMatch] allow undef elements when matching vector FP +0.0
This continues the FP constant pattern matching improvements from:
https://reviews.llvm.org/rL327627
https://reviews.llvm.org/rL327339
https://reviews.llvm.org/rL327307
Several integer constant matchers also have this ability. I'm
separating matching of integer/pointer null from FP positive zero
and renaming/commenting to make the functionality clearer.
llvm-svn: 328461
Simon Pilgrim [Sun, 25 Mar 2018 20:16:53 +0000 (20:16 +0000)]
[X86] Use WriteResPair for WriteIDiv to cleanup sched defs. NFCI.
llvm-svn: 328460
Simon Pilgrim [Sun, 25 Mar 2018 19:20:08 +0000 (19:20 +0000)]
[SchedModel] Remove instregex entries that don't match any instructions
This patch throws a fatal error if an instregex entry doesn't actually match any instructions. This is part of the work to reduce the compile time impact of increased instregex usage (PR35955), although the x86 models seem to be relatively clean.
All the cases I encountered have now been fixed in trunk and this will ensure they don't get reintroduced.
Differential Revision: https://reviews.llvm.org/D44687
llvm-svn: 328459
Simon Pilgrim [Sun, 25 Mar 2018 19:17:17 +0000 (19:17 +0000)]
[X86][SkylakeClient] Fix missing comma
llvm-svn: 328458
Simon Pilgrim [Sun, 25 Mar 2018 19:07:17 +0000 (19:07 +0000)]
[ARM] Remove sched model instregex entries that don't match any instructions (D44687)
Reviewed by @javed.absar
llvm-svn: 328457
Simon Pilgrim [Sun, 25 Mar 2018 18:49:48 +0000 (18:49 +0000)]
[X86] Add missing full stop to comment. NFCI.
llvm-svn: 328456
Sanjay Patel [Sun, 25 Mar 2018 17:48:20 +0000 (17:48 +0000)]
[InstSimplify, InstCombine] add/update tests with FP +0.0 vector with undef; NFC
llvm-svn: 328455
Craig Topper [Sun, 25 Mar 2018 17:33:14 +0000 (17:33 +0000)]
[X86][SkylakeClient] Fix a set of regular expressions that were checking for optionally starting with 'Y' instead of 'V'
These bad regexs were introduced by r328435
llvm-svn: 328454
Simon Pilgrim [Sun, 25 Mar 2018 17:28:06 +0000 (17:28 +0000)]
[X86][MMX] MOVQ2DQ/MOVDQ2Q are better described as WriteVecMove than WriteMove
Not that it makes a difference to current cost values, but will when we try to better model GPR-SIMD transfer costs
llvm-svn: 328453
Simon Pilgrim [Sun, 25 Mar 2018 17:25:37 +0000 (17:25 +0000)]
[X86][SkylakeServer] Merge multiple instregex. NFCI
llvm-svn: 328452
Craig Topper [Sun, 25 Mar 2018 15:58:12 +0000 (15:58 +0000)]
[X86] Update cost model for Goldmont. Add fsqrt costs for Silvermont
Add fdiv costs for Goldmont using table 16-17 of the Intel Optimization Manual. Also add overrides for FSQRT for Goldmont and Silvermont.
Reviewers: RKSimon
Reviewed By: RKSimon
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D44644
llvm-svn: 328451
Sanjay Patel [Sun, 25 Mar 2018 14:24:32 +0000 (14:24 +0000)]
[InstCombine] adjust test comments; NFC
llvm-svn: 328450
Sanjay Patel [Sun, 25 Mar 2018 14:19:25 +0000 (14:19 +0000)]
[InstCombine] consolidate casted icmp vector tests
We have thorough coverage of predicates and scalar types,
so we just need a sampling of vector tests to show that
things are working or not with vectors types.
llvm-svn: 328449
Sanjay Patel [Sun, 25 Mar 2018 14:01:42 +0000 (14:01 +0000)]
[InstCombine] peek through more icmp of FP cast + bitcast
This is an extension of rL328426 as noted in D44367.
llvm-svn: 328448
Yaron Keren [Sun, 25 Mar 2018 13:12:05 +0000 (13:12 +0000)]
Remove reference to stale (2009) python version.
llvm-svn: 328447
Simon Pilgrim [Sun, 25 Mar 2018 10:21:19 +0000 (10:21 +0000)]
[X86] Add the ability to override memory folding latency to schedules and add 1uop for memory folds for Intel models
The Intel models need an extra 1uop for memory folded instructions, plus a lot of instructions take a non-default memory latency which should allow us to use the multiclass a lot more to tidy things up.
Differential Revision: https://reviews.llvm.org/D44840
llvm-svn: 328446
Eric Fiselier [Sun, 25 Mar 2018 03:00:42 +0000 (03:00 +0000)]
avoid new/delete ellision in construct.pass.cpp
llvm-svn: 328445
Craig Topper [Sun, 25 Mar 2018 01:28:43 +0000 (01:28 +0000)]
[X86] Consistently prefix all defs in X86ScheduleSLM.td with 'SLM'.
llvm-svn: 328444
Martin Storsjo [Sat, 24 Mar 2018 23:00:00 +0000 (23:00 +0000)]
[X86] Update a partially stale comment, since SVN r328386. NFC.
llvm-svn: 328443
Craig Topper [Sat, 24 Mar 2018 22:58:03 +0000 (22:58 +0000)]
[SchedModel] Remove an unneeded temporary vector.
llvm-svn: 328442
Craig Topper [Sat, 24 Mar 2018 22:58:02 +0000 (22:58 +0000)]
[SchedModel] Use std::move in a couple places to reduce copying
llvm-svn: 328441
Craig Topper [Sat, 24 Mar 2018 22:58:00 +0000 (22:58 +0000)]
[SchedModel] Use std::move to replace a vector instead of vector::swap
We don't really care about the old vector value so we don't care to swap it.
llvm-svn: 328440
Eric Fiselier [Sat, 24 Mar 2018 22:14:02 +0000 (22:14 +0000)]
Fix module.modulemap after r328395
This patch removes the MachineValueType module since the
header was removed in r328395.
llvm-svn: 328439
Craig Topper [Sat, 24 Mar 2018 21:57:35 +0000 (21:57 +0000)]
[SchedModel] Remove std::vectors that were created with 1 element and then passed to an ArrayRef parameter.
ArrayRef can capture a single element. We don't need a vector for that.
llvm-svn: 328438
Simon Pilgrim [Sat, 24 Mar 2018 21:22:32 +0000 (21:22 +0000)]
[SchedModel] Record::getName() returns StringRef - avoid std::string creation. NFCI.
llvm-svn: 328437
Simon Pilgrim [Sat, 24 Mar 2018 21:04:20 +0000 (21:04 +0000)]
[SchedModel] Avoid std::string creation for instregex patterns that don't contain regex metas. NFCI.
llvm-svn: 328436
Simon Pilgrim [Sat, 24 Mar 2018 20:40:14 +0000 (20:40 +0000)]
[X86][SkylakeClient] Merge xmm/ymm instructions instregex entries to reduce regex matches to reduce compile time
llvm-svn: 328435
Simon Pilgrim [Sat, 24 Mar 2018 19:37:28 +0000 (19:37 +0000)]
[X86][Broadwell] Merge xmm/ymm instructions instregex entries to reduce regex matches to reduce compile time
llvm-svn: 328434
Mandeep Singh Grang [Sat, 24 Mar 2018 18:37:19 +0000 (18:37 +0000)]
[RISCV] Use init_array instead of ctors for RISCV target, by default
Summary:
LLVM defaults to the newer .init_array/.fini_array scheme for static
constructors rather than the less desirable .ctors/.dtors (the UseCtors
flag defaults to false). This wasn't being respected in the RISC-V
backend because it fails to call TargetLoweringObjectFileELF::InitializeELF with the the appropriate
flag for UseInitArray.
This patch fixes this by implementing RISCVELFTargetObjectFile and overriding its Initialize method to call
InitializeELF(TM.Options.UseInitArray).
Reviewers: asb, apazos
Reviewed By: asb
Subscribers: mgorny, rbar, johnrusso, simoncook, jordy.potman.lists, sabuasal, niosHD, kito-cheng, shiva0217, llvm-commits
Differential Revision: https://reviews.llvm.org/D44750
llvm-svn: 328433
Simon Pilgrim [Sat, 24 Mar 2018 18:36:01 +0000 (18:36 +0000)]
[X86][Haswell] Merge xmm/ymm instructions instregex entries to reduce regex matches to reduce compile time
llvm-svn: 328432
Simon Pilgrim [Sat, 24 Mar 2018 18:12:59 +0000 (18:12 +0000)]
[X86][SandyBridge] Merge xmm/ymm instructions instregex entries to reduce regex matches to reduce compile time
llvm-svn: 328431
Mandeep Singh Grang [Sat, 24 Mar 2018 17:34:37 +0000 (17:34 +0000)]
[Hexagon] Change std::sort to llvm::sort in response to r327219
Summary:
r327219 added wrappers to std::sort which randomly shuffle the container before sorting.
This will help in uncovering non-determinism caused due to undefined sorting
order of objects having the same key.
To make use of that infrastructure we need to invoke llvm::sort instead of std::sort.
Note: This patch is one of a series of patches to replace *all* std::sort to llvm::sort. Refer the comments section in D44363 for a list of all the required patches.
Reviewers: kparzysz
Reviewed By: kparzysz
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D44857
llvm-svn: 328430
Mandeep Singh Grang [Sat, 24 Mar 2018 17:15:04 +0000 (17:15 +0000)]
[AMDGPU] Change std::sort to llvm::sort in response to r327219
Summary:
r327219 added wrappers to std::sort which randomly shuffle the container before sorting.
This will help in uncovering non-determinism caused due to undefined sorting
order of objects having the same key.
To make use of that infrastructure we need to invoke llvm::sort instead of std::sort.
Reviewers: tstellar, RKSimon, arsenm
Reviewed By: arsenm
Subscribers: arsenm, kzhuravl, wdng, nhaehnle, yaxunl, dstuttard, tpr, llvm-commits, t-tye
Differential Revision: https://reviews.llvm.org/D44856
llvm-svn: 328429
Andrea Di Biagio [Sat, 24 Mar 2018 16:05:36 +0000 (16:05 +0000)]
[llvm-mca] run clang-format on all files.
This also addresses Simon's review comment in D44839.
llvm-svn: 328428
Andrea Di Biagio [Sat, 24 Mar 2018 15:48:25 +0000 (15:48 +0000)]
[llvm-mca] Remove unused field in InstrBuilder. NFC
llvm-svn: 328427
Sanjay Patel [Sat, 24 Mar 2018 15:45:02 +0000 (15:45 +0000)]
[InstCombine] peek through FP casts for sign-bit compares (PR36682)
This pattern came up in PR36682:
https://bugs.llvm.org/show_bug.cgi?id=36682
https://godbolt.org/g/LhuD9A
Equality checks are planned as a follow-up enhancement.
Differential Revision: https://reviews.llvm.org/D44367
llvm-svn: 328426
Sanjay Patel [Sat, 24 Mar 2018 15:41:59 +0000 (15:41 +0000)]
[InstCombine] fix formatting; NFC
llvm-svn: 328425
Simon Pilgrim [Sat, 24 Mar 2018 15:05:12 +0000 (15:05 +0000)]
[X86][AES] Ensure we're testing both non-VEX/VEX variants of AES instructions on AVX targets
Add skylake server tests as well
llvm-svn: 328424
Simon Pilgrim [Sat, 24 Mar 2018 14:51:52 +0000 (14:51 +0000)]
[X86][SSE] Ensure we're testing both non-VEX/VEX variants of SSE instructions on AVX targets
And ensure we don't use later instruction sets in SSE schedule tests
llvm-svn: 328423
Sanjay Patel [Sat, 24 Mar 2018 14:45:41 +0000 (14:45 +0000)]
[InstCombine] add multi-use/vector tests for intrinsic shrinking; NFC
llvm-svn: 328422
Simon Pilgrim [Sat, 24 Mar 2018 13:47:48 +0000 (13:47 +0000)]
[X86][AVX1] Ensure we don't use later instruction sets in AVX1 schedule tests
llvm-svn: 328421
Simon Pilgrim [Sat, 24 Mar 2018 13:47:01 +0000 (13:47 +0000)]
[X86][AVX2] Ensure we don't use later instruction sets in AVX2 schedule tests
llvm-svn: 328420
George Rimar [Sat, 24 Mar 2018 13:10:19 +0000 (13:10 +0000)]
[ELF] - Do not ignore discarding of .rela.plt/.rela.dyn, allow doing custom layout for them.
Currently when we build input sections list in linker script
we ignore all rel[a] sections. That was done to support
scripts like .rela.dyn : { *(.rela.data) } for emit relocs.
Though as a result following scripts were also silently ignored:
/DISCARD/ : { *(.rela.plt)
/DISCARD/ : { *(.rela.dyn)
and we produced output with this sections. That is not ideal.
The solution this patch suggests is simple: do not ignore synthetic
rel[a] sections. That way we can enable common discarding logic
for them and report a proper error.
Differential revision: https://reviews.llvm.org/D41640
llvm-svn: 328419
Jonathan Coe [Sat, 24 Mar 2018 10:49:17 +0000 (10:49 +0000)]
[clang-tidy] Enable Python 3 support for add_new_check.py
Summary: In Python 3, filters are lazily evaluated and strings are not bytes.
Reviewers: ilya-biryukov
Reviewed By: ilya-biryukov
Subscribers: xazax.hun, cfe-commits
Differential Revision: https://reviews.llvm.org/D44217
llvm-svn: 328418
Vitaly Buka [Sat, 24 Mar 2018 08:13:18 +0000 (08:13 +0000)]
[sanitizer] Fix Darwin build
llvm-svn: 328417
Craig Topper [Sat, 24 Mar 2018 07:48:54 +0000 (07:48 +0000)]
[X86] Add a new disassembler opcode map for 3DNow. Stop treating 3DNow as an attribute.
This reduces the size of llvm-mc by at least 150k since we no longer have to multiply the attribute across 7 tables.
llvm-svn: 328416
Vitaly Buka [Sat, 24 Mar 2018 07:45:24 +0000 (07:45 +0000)]
Mmap interceptor providing mprotect support
Summary:
- Intercepting mprotect calls.
- Fixing forgotten flag check.
Patch by David CARLIER
Reviewers: vitalybuka, vsk
Subscribers: delcypher, srhines, kubamracek, llvm-commits, #sanitizers
Differential Revision: https://reviews.llvm.org/D44777
llvm-svn: 328415
Vitaly Buka [Sat, 24 Mar 2018 07:31:59 +0000 (07:31 +0000)]
[sanitizer] Fix strlcpy and strlcat interceptors on Darwin
llvm-svn: 328414
Craig Topper [Sat, 24 Mar 2018 07:15:47 +0000 (07:15 +0000)]
[X86] Use unique_ptr to simplify memory management. NFC
llvm-svn: 328413
Craig Topper [Sat, 24 Mar 2018 07:15:46 +0000 (07:15 +0000)]
[X86] Use X86_INSTR_MRM_MAPPING macro instead of listing all MRM_C0-MRM_FF format encodings. NFC
llvm-svn: 328412
Craig Topper [Sat, 24 Mar 2018 07:15:45 +0000 (07:15 +0000)]
[X86] Remove an unnecessary switch around two other switches. NFC
The outer switch only had one valid block so didn't provide any value.
llvm-svn: 328411
Craig Topper [Sat, 24 Mar 2018 06:04:12 +0000 (06:04 +0000)]
[X86] Merge the Has3DNow0F0FOpcode TSFlag into the OpMap encoding. NFC
The 3DNow instructions are encoded a little weird, but we can still represent it as an opcode map.
llvm-svn: 328410
Zhihao Yuan [Sat, 24 Mar 2018 04:32:11 +0000 (04:32 +0000)]
[C++17] Fix class template argument deduction for default constructors without an initializer
Summary:
As the title says, this makes following code compile:
```
template<typename> struct Foo {};
Foo() -> Foo<void>;
Foo f; // ok
```
Thanks Nicolas Lesser for coining the fix.
Reviewers: rsmith, lichray
Reviewed By: rsmith, lichray
Subscribers: lichray, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D38216
llvm-svn: 328409
Eric Christopher [Sat, 24 Mar 2018 02:56:58 +0000 (02:56 +0000)]
Add REQUIRES lines for the targets being checked in this test.
llvm-svn: 328408
Alex Shlyapnikov [Sat, 24 Mar 2018 02:10:49 +0000 (02:10 +0000)]
[HWASan] Fix use-after-free.cc test on x86-64
Differential Revision: https://reviews.llvm.org/D44705
llvm-svn: 328407
George Karpenkov [Sat, 24 Mar 2018 01:53:12 +0000 (01:53 +0000)]
[analyzer] Do not crash in CallEvent.getReturnType()
When the call expression is not available.
llvm-svn: 328406
Craig Topper [Sat, 24 Mar 2018 01:52:01 +0000 (01:52 +0000)]
[X86] Add a DAG combine to simplify PMULDQ/PMULUDQ nodes
These nodes only use the lower 32 bits of their inputs so we can use SimplifyDemandedBits to simplify them.
Differential Revision: https://reviews.llvm.org/D44375
llvm-svn: 328405
Richard Trieu [Sat, 24 Mar 2018 00:52:44 +0000 (00:52 +0000)]
[ODRHash] Support pointer and reference types.
llvm-svn: 328404
Alex Shlyapnikov [Sat, 24 Mar 2018 00:40:51 +0000 (00:40 +0000)]
Remove duplicated const qualifier.
llvm-svn: 328403
Rafael Espindola [Sat, 24 Mar 2018 00:35:11 +0000 (00:35 +0000)]
Add a SectionBase::getVA helper. NFC.
There were a few too many places duplicating this.
llvm-svn: 328402
Rui Ueyama [Sat, 24 Mar 2018 00:25:24 +0000 (00:25 +0000)]
Do not add a dummy entry to SharedFile::Verdefs. NFC.
Previously, we used 0 as an alias for VER_NDX_GLOBAL and had a dummy
entry in SharedFile::Verdefs so that the access to the array is within
its boundary. But that's not straightforwad. We can just stop doing both.
llvm-svn: 328401
Eric Christopher [Sat, 24 Mar 2018 00:07:38 +0000 (00:07 +0000)]
Allow FDE references outside the +/-2GB range supported by PC relative
offsets for code models other than small/medium. For JIT application,
memory layout is less controlled and can result in truncations
otherwise.
Patch based on one by Olexa Bilaniuk!
llvm-svn: 328400
David Blaikie [Sat, 24 Mar 2018 00:06:14 +0000 (00:06 +0000)]
Remove unused header from EntryExitInstrumenter
Fixes layering, since Transforms/Utils doesn't depend on CodeGen, so
shouldn't include headers from it.
llvm-svn: 328399
Craig Topper [Sat, 24 Mar 2018 00:02:46 +0000 (00:02 +0000)]
[X86] Correct the value AdSizeX in X86II enum. NFC
Should be NFC since nothing used the enum value. The instruction descriptions are generated from tablegen which had the correct value.
llvm-svn: 328398
David Blaikie [Fri, 23 Mar 2018 23:58:31 +0000 (23:58 +0000)]
Fix layering by moving ValueTypes.h from CodeGen to IR
ValueTypes.h is implemented in IR already.
llvm-svn: 328397
David Blaikie [Fri, 23 Mar 2018 23:58:27 +0000 (23:58 +0000)]
Fix layering of CodeGen/TargetOpcodes.def by moving it to Support
It's also used by utils/TableGen so needs to reside somewhere common to
TableGen and CodeGen.
llvm-svn: 328396
David Blaikie [Fri, 23 Mar 2018 23:58:25 +0000 (23:58 +0000)]
Fix layering of MachineValueType.h by moving it from CodeGen to Support
This is used by llvm tblgen as well as by LLVM Targets, so the only
common place is Support for now. (maybe we need another target for these
sorts of things - but for now I'm at least making them correct & we can
make them better if/when people have strong feelings)
llvm-svn: 328395
David Blaikie [Fri, 23 Mar 2018 23:58:21 +0000 (23:58 +0000)]
Fix layering by moving Support/CodeGenCWrappers.h to Target
This includes llvm-c/TargetMachine.h which is logically part of
libTarget (since libTarget implements llvm-c/TargetMachine.h's
functions).
llvm-svn: 328394
David Blaikie [Fri, 23 Mar 2018 23:58:20 +0000 (23:58 +0000)]
Fix layering by moving X86DisassemblerDecoderCommon to Support
This is used from llvm tblgen and the X86Disassembler - the only common
library (apart from TableGen, which probably doesn't make sense to have
as a dependency from a release tool (rather than a use-while-building-llvm
tool) of LLVM)
llvm-svn: 328393
David Blaikie [Fri, 23 Mar 2018 23:58:19 +0000 (23:58 +0000)]
Move TargetLoweringObjectFile from CodeGen to Target to fix layering
It's implemented in Target & include from other Target headers, so the
header should be in Target.
llvm-svn: 328392
Rafael Espindola [Fri, 23 Mar 2018 23:55:49 +0000 (23:55 +0000)]
Move a Repl access.
Since SectionBase::getOutputSection handles ICF replaces and
SectionBase::getOffset was handling it in some cases, it is more
consistent to have getOffset always handle it.
llvm-svn: 328391
Rafael Espindola [Fri, 23 Mar 2018 23:53:01 +0000 (23:53 +0000)]
Drop redundant ->Repl.
SectionBase::getOutputSection handles replacement sections, so this
code doesn't have to.
llvm-svn: 328390
Jim Ingham [Fri, 23 Mar 2018 23:44:52 +0000 (23:44 +0000)]
Add support for __attribute__(trivial_abi).
<rdar://problem/
36035075>, <rdar://problem/
36035039>
llvm-svn: 328389
Eric Fiselier [Fri, 23 Mar 2018 23:42:30 +0000 (23:42 +0000)]
Partially Revert "Workaround GCC bug PR78489 - SFINAE order is not respected."
This partially reverts commit r328261. The GCC bug has been fixed in
trunk and has never existed in a released version. Therefore the changes
to variant are unneeded.
However, the additional tests have been left in place.
llvm-svn: 328388
Philip Reames [Fri, 23 Mar 2018 23:41:47 +0000 (23:41 +0000)]
[GuardWidening] Group code by class [NFC]
llvm-svn: 328387
Reid Kleckner [Fri, 23 Mar 2018 23:38:53 +0000 (23:38 +0000)]
[X86] Fix Windows `i1 zeroext` conventions to use i8 instead of i32
Both GCC and MSVC only look at the low byte of a boolean when it is
passed.
llvm-svn: 328386
Alex Shlyapnikov [Fri, 23 Mar 2018 23:38:04 +0000 (23:38 +0000)]
[HWASan] Port HWASan to Linux x86-64 (compiler-rt)
Summary:
Porting HWASan to Linux x86-64, first of the three patches, compiler-rt part.
The approach is similar to ARM case, trap signal is used to communicate
memory tag check failure. int3 instruction is used to generate a signal,
access parameters are stored in nop [eax + offset] instruction immediately
following the int3 one
Had to add HWASan init on malloc because, due to much less interceptors
defined (most other sanitizers intercept much more and get initalized
via one of those interceptors or don't care about malloc), HWASan was not
initialized yet when libstdc++ was trying to allocate memory for its own
fixed-size heap, which led to CHECK-fail in AllocateFromLocalPool.
Also added the CHECK() failure handler with more detailed message and
stack reporting.
Reviewers: eugenis
Subscribers: kubamracek, dberris, mgorny, kristof.beyls, delcypher, #sanitizers, llvm-commits
Differential Revision: https://reviews.llvm.org/D44705
llvm-svn: 328385
Matt Morehouse [Fri, 23 Mar 2018 23:35:28 +0000 (23:35 +0000)]
[libFuzzer] Use OptForFuzzing attribute with -fsanitize=fuzzer.
Summary:
Disables certain CMP optimizations to improve fuzzing signal under -O1
and -O2.
Switches all fuzzer tests to -O2 except for a few leak tests where the
leak is optimized out under -O2.
Reviewers: kcc, vitalybuka
Reviewed By: vitalybuka
Subscribers: cfe-commits, llvm-commits
Differential Revision: https://reviews.llvm.org/D44798
llvm-svn: 328384
Jason Molenda [Fri, 23 Mar 2018 23:32:16 +0000 (23:32 +0000)]
Remove CommandObjectStats.cpp & CleanUpTest.cpp from
installing in the man page directory.
llvm-svn: 328383
Jason Molenda [Fri, 23 Mar 2018 22:50:23 +0000 (22:50 +0000)]
Put CommandObjectStats.cpp in lldb-core target, remove CommandObjectStats.h from targets.
llvm-svn: 328382
Rui Ueyama [Fri, 23 Mar 2018 22:48:17 +0000 (22:48 +0000)]
Remove "FIXME" from a comment.
A bug in BFD linker is not our FIXME item.
llvm-svn: 328381
David Blaikie [Fri, 23 Mar 2018 22:16:59 +0000 (22:16 +0000)]
Change for an LLVM header file move
llvm-svn: 328380