Arnd Bergmann [Tue, 18 Mar 2014 15:25:47 +0000 (16:25 +0100)]
Merge branch 'cleanup/kconfig' into next/drivers
This resolves a conflict between the new sti reset
controller driver and the Kconfig cleanup.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Tue, 18 Mar 2014 15:20:12 +0000 (16:20 +0100)]
Merge tag 'sti-reset-for-v3.15' of git://git.stlinux.com/devel/kernel/linux-sti into next/drivers
Merge "STi Reset controller support" from Srinivas Kandagatla:
* tag 'sti-reset-for-v3.15' of git://git.stlinux.com/devel/kernel/linux-sti:
ARM: STi: Add reset controller support to mach-sti Kconfig
drivers: reset: stih416: add softreset controller
drivers: reset: stih415: add softreset controller
drivers: reset: Reset controller driver for STiH416
drivers: reset: Reset controller driver for STiH415
drivers: reset: STi SoC system configuration reset controller support
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Tue, 18 Mar 2014 15:19:44 +0000 (16:19 +0100)]
Merge branch 'sti/dt' into next/drivers
This is apparently a dependency for the STi reset controller driver.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Mon, 17 Mar 2014 10:14:34 +0000 (11:14 +0100)]
Merge tag 'mvebu-drivers-3.15-2' of git://git.infradead.org/linux-mvebu into next/drivers
Merge "mvebu drivers for v3.15" from Jason Cooper:
pull request #1:
- mvebu mbus
- use of_find_matching_node_and_match
- rtc
- use PTR_ERR_OR_ZERO in isl12057
- work around issue in mv where date returned is 2038
- kirkwood -> mach-mvebu
- various Kconfig oneliners to allow building kirkwood in -mvebu/
pull request #2:
- reset
- re-use qnap-poweroff driver for Synology NASs
* tag 'mvebu-drivers-3.15-2' of git://git.infradead.org/linux-mvebu:
Power: Reset: Generalize qnap-poweroff to work on Synology devices.
drivers: Enable building of Kirkwood drivers for mach-mvebu
rtc: mv: reset date if after year 2038
rtc: isl12057: use PTR_ERR_OR_ZERO to fix coccinelle warnings
bus: mvebu-mbus: make use of of_find_matching_node_and_match
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Mon, 17 Mar 2014 09:26:40 +0000 (10:26 +0100)]
Merge tag 'socfpga_updates_for_3.15_v2' of git://git.rocketboards.org/linux-socfpga-next into next/drivers
Merge "SOCFPGA updates for 3.15 version 2" from Dinh Nguyen:
*Update SOCFPGA DTS to include ethernet, sd/mmc, and clock fixes
*Add stmmac ethernet glue layer
*Update socfpga_defconfig to include sd/mmc, and micrel_phy
* tag 'socfpga_updates_for_3.15_v2' of git://git.rocketboards.org/linux-socfpga-next:
dts: socfpga: Add sysmgr node so the gmac can use to reference
dts: socfpga: Add support for SD/MMC on the SOCFPGA platform
dts: socfpga: Update clock entry to support multiple parents
ARM: socfpga: Update socfpga_defconfig
dts: socfpga: Add DTS entry for adding the stmmac glue layer for stmmac.
net: stmmac: Add SOCFPGA glue driver
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Olof Johansson [Mon, 17 Mar 2014 07:50:41 +0000 (00:50 -0700)]
Merge tag 'renesas-clock4-for-v3.15' of git://git./linux/kernel/git/horms/renesas into next/drivers
Merge "Fourth Round of Renesas ARM Based SoC Clock Updates for v3.15" from
Simon Horman:
r8a7791 (R-Car M2) SoC
* Correct SCIFA3-5 clocks
* tag 'renesas-clock4-for-v3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: r8a7791: Fix SCIFA3-5 clocks
Signed-off-by: Olof Johansson\ 1 <olof@lixom.net\ 1>
Olof Johansson [Mon, 17 Mar 2014 07:48:44 +0000 (00:48 -0700)]
Merge tag 'renesas-clock3-for-v3.15' of git://git./linux/kernel/git/horms/renesas into next/drivers
Merge "Third Round of Renesas ARM Based SoC Clock Updates for v3.15" from Simon
Horman:
r7s72100 (RZ/A1H) SoC
* Correct bus clock calculation
* tag 'renesas-clock3-for-v3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: r7s72100: fix bus clock calculation
Signed-off-by: Olof Johansson <olof@lixom.net>
Olof Johansson [Mon, 17 Mar 2014 07:47:52 +0000 (00:47 -0700)]
Merge tag 'renesas-clock2-for-v3.15' of git://git./linux/kernel/git/horms/renesas into next/drivers
Merge "Second Round of Renesas ARM Based SoC Clock Updates for v3.15" from
Simon Horman:
r8a7790 (R-Car H2) SoC
- Add sound SCU clock support
r8a7791 (R-Car M2) SoC
- Remove legacy clock aliases for DT devices
* tag 'renesas-clock2-for-v3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: r8a7790: add sound SCU clock support
ARM: shmobile: r8a7791: Remove legacy clock aliases for DT devices
Signed-off-by: Olof Johansson <olof@lixom.net>
Olof Johansson [Mon, 17 Mar 2014 07:36:37 +0000 (00:36 -0700)]
Merge tag 'renesas-clock-for-v3.15' of git://git./linux/kernel/git/horms/renesas into next/drivers
Merge "Renesas ARM Based SoC Clock Updates for v3.15" from Simon Horman:
* r7s72100 SoC (RZ/A1H)
- Add clock for SH Ethernet
- Add RSPI clocks
* r8a7791 (R-Car M2)
- Add QSPI and SDHI clocks
* r8a7790 (R-Car H2)
- Add audio clock
- Remove legacy DT clocks
- Correct SYS DMAC clock defines
* tag 'renesas-clock-for-v3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: Remove legacy r8a7790 DT clocks
ARM: shmobile: Add r8a7791 legacy SDHI clocks
ARM: shmobile: r8a7790: Correct SYS DMAC clock defines
ARM: shmobile: r7s72100: Add clock for r7s72100-ether
ARM: shmobile: r8a7791 clock: add QSPI clocks
ARM: shmobile: r7s72100 clock: Add RSPI clocks for DT
ARM: shmobile: r7s72100 clock: Add RSPI clocks
ARM: shmobile: r8a7790: add audio clock
ARM: shmobile: r8a7778: add audio clock in new style
Signed-off-by: Olof Johansson <olof@lixom.net>
Geert Uytterhoeven [Wed, 12 Mar 2014 18:40:39 +0000 (19:40 +0100)]
ARM: shmobile: r8a7791: Fix SCIFA3-5 clocks
The MSTP clocks for SCIFA3-5 are MSTP1106-1108, not MSTP1105-1107
Also reinsert them at the correct position to preserve sort order.
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Stephen Gallimore [Mon, 18 Nov 2013 10:34:32 +0000 (10:34 +0000)]
ARM: STi: Add reset controller support to mach-sti Kconfig
This patch selects reset controller support for ARCH_STI and
selects the reset controllers for STiH415 and STiH416 SoCs.
Signed-off-by: Stephen Gallimore <stephen.gallimore@st.com>
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
Srinivas Kandagatla [Tue, 12 Nov 2013 10:28:03 +0000 (10:28 +0000)]
drivers: reset: stih416: add softreset controller
This patch adds softreset controller for STiH416 SOC, soft reset
controller is based on system configuration registers which are mapped
via regmap. This reset controller does not have any feedback or
acknowledgement. With this patch a new device "st,stih416-softreset" is
registered with system configuration registers based reset controller
that controls the softreset state of the hardware such as Ethernet, IRB.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
Srinivas Kandagatla [Tue, 12 Nov 2013 10:22:56 +0000 (10:22 +0000)]
drivers: reset: stih415: add softreset controller
This patch adds softreset controller for STiH415 SOC, soft reset
controller is based on system configuration registers which are mapped
via regmap. This reset controller does not have any feedback or
acknowledgement. With this patch a new device "st,stih415-softreset" is
registered with system configuration registers based reset controller
that controls the softreset state of the hardware such as Ethernet, IRB.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
Stephen Gallimore [Wed, 7 Aug 2013 15:57:26 +0000 (16:57 +0100)]
drivers: reset: Reset controller driver for STiH416
This patch adds a reset controller platform driver for the STiH416
SoC. This initial version provides a compatible driver for the
"st,stih416-powerdown" device, which registers a system configuration
register based reset controller that controls the powerdown state of
hardware such as the on-chip USB host controllers.
Signed-off-by: Stephen Gallimore <stephen.gallimore@st.com>
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
Stephen Gallimore [Wed, 7 Aug 2013 15:31:25 +0000 (16:31 +0100)]
drivers: reset: Reset controller driver for STiH415
This patch adds a reset controller platform driver for the STiH415
SoC. This initial version provides a compatible driver for the
"st,stih415-powerdown" device, which registers a system configuration
register based reset controller that controls the powerdown state of
hardware such as the on-chip USB host controllers.
Signed-off-by: Stephen Gallimore <stephen.gallimore@st.com>
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
Stephen Gallimore [Wed, 7 Aug 2013 14:53:12 +0000 (15:53 +0100)]
drivers: reset: STi SoC system configuration reset controller support
This patch adds a reset controller implementation for STMicroelectronics
STi family SoCs; it allows a group of related reset like controls found
in multiple system configuration registers to be represented by a single
controller device. System configuration registers are accessed through
the regmap framework and the mfd/syscon driver.
The implementation optionally supports waiting for the reset action to
be acknowledged in a separate status register and supports both
active high and active low reset lines. These properties are common across
all the reset channels in a specific reset controller instance, hence
all channels in a paritcular controller are expected to behave in the
same way.
Signed-off-by: Stephen Gallimore <stephen.gallimore@st.com>
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
Srinivas Kandagatla [Mon, 11 Nov 2013 13:20:44 +0000 (13:20 +0000)]
ARM: STi: STIH416: Add IR support.
This patch adds IRB support to STiH416 platforms.
Tested on B2000 and B2020 development board
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
Srinivas Kandagatla [Mon, 11 Nov 2013 13:19:18 +0000 (13:19 +0000)]
ARM: STi: STIH415: Add IR support.
This patch adds IRB support to STiH415 platforms.
Tested on B2000 and B2020 development boards.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
Srinivas Kandagatla [Wed, 29 Jan 2014 16:20:12 +0000 (16:20 +0000)]
ARM: STi: STiH416: Add ethernet support.
This patch adds support to STiH416 SOC, which has two ethernet
snps,dwmac controllers version 3.710. With this patch B2000 and B2020
boards can boot with ethernet in MII and RGMII modes.
Tested on both B2020 and B2000.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
Srinivas Kandagatla [Wed, 29 Jan 2014 16:19:44 +0000 (16:19 +0000)]
ARM: STi: STiH415: Add ethernet support.
This patch adds support to STiH415 SOC, which has two ethernet
snps,dwmac controllers version 3.610. With this patch B2000 and B2020
boards can boot with ethernet in MII and RGMII modes.
Tested on both B2020 and B2000.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
Srinivas Kandagatla [Tue, 11 Mar 2014 09:36:14 +0000 (09:36 +0000)]
ARM: STi: STiH416: Add soft reset controller support.
This patch adds soft reset controller support for STiH415 and adds new
softreset lines required for other device tree nodes in the header file.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
Srinivas Kandagatla [Tue, 11 Mar 2014 09:35:12 +0000 (09:35 +0000)]
ARM: STi: STiH416: Add reset controller support.
This patch adds a reset controller node to the SOC device tree and also
adds new header files with reset lines required for other device tree
nodes.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
Srinivas Kandagatla [Tue, 11 Mar 2014 09:32:49 +0000 (09:32 +0000)]
ARM: STi: STiH415: Add soft reset controller support.
This patch adds soft reset controller support for STiH415 and adds new
softreset lines required for other device tree nodes in the header file.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
Srinivas Kandagatla [Tue, 11 Mar 2014 09:24:55 +0000 (09:24 +0000)]
ARM: STi: STiH415: Add reset controller support.
This patch adds a reset controller node to the SOC device tree and also
adds new header files with reset lines required for other device tree
nodes.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
Srinivas Kandagatla [Wed, 8 Jan 2014 12:49:57 +0000 (12:49 +0000)]
ARM: STi: STiH415: Add interrupt support for pin controller
This patch adds interrupt support for STiH415 pin controllers.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
Srinivas Kandagatla [Wed, 8 Jan 2014 12:47:52 +0000 (12:47 +0000)]
ARM: STi: STiH416: Add interrupt support for pin controller
This patch adds interrupt support for STiH416 pin controllers.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
Dinh Nguyen [Mon, 10 Mar 2014 04:12:14 +0000 (23:12 -0500)]
dts: socfpga: Add sysmgr node so the gmac can use to reference
commit[7e0b4cd dts: socfpga: Add DTS entry for adding the stmmac glue
layer for stmmac.] references the sysmgr through its phandle. This patch
adds the appropriate sysmgr node for the gmac to use.
Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
Dinh Nguyen [Tue, 18 Feb 2014 02:31:02 +0000 (20:31 -0600)]
dts: socfpga: Add support for SD/MMC on the SOCFPGA platform
Introduce "altr,socfpga-dw-mshc" to enable Altera's SOCFPGA platform
specific implementation of the dw_mmc driver.
Also add the "syscon" binding to the "altr,sys-mgr" node. The clock
driver can use the syscon driver to toggle the register for the SD/MMC
clock phase shift settings.
Finally, fix an indentation error for the sysmgr node.
Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
Acked-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Tested-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Chris Ball <chris@printf.net>
Olof Johansson [Sun, 9 Mar 2014 07:32:26 +0000 (23:32 -0800)]
Merge tag 'omap-for-v3.15/crossbar-signed' of git://git./linux/kernel/git/tmlind/linux-omap into next/drivers
Merge OMAP crossbar support from Tony Lindgren:
Add support for GIC crossbar that routes interrupts on newer omaps.
Looks like people wanted these merged via the omap tree as it's
the only user for the GIC crossbar.
* tag 'omap-for-v3.15/crossbar-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: DRA: Enable Crossbar IP support for DRA7XX
ARM: OMAP4+: Correct Wakeup-gen code to use physical irq number
DRIVERS: IRQCHIP: CROSSBAR: Add support for Crossbar IP
DRIVERS: IRQCHIP: IRQ-GIC: Add support for routable irqs
Signed-off-by: Olof Johansson <olof@lixom.net>
Olof Johansson [Sun, 9 Mar 2014 06:03:58 +0000 (22:03 -0800)]
Merge tag 'mvebu-watchdog-3.15-2' of git://git.infradead.org/linux-mvebu into next/drivers
mvebu watchdog driver changes for v3.15 (incremental #2)
- remove warnings by using %pa for phys_addr_t
* tag 'mvebu-watchdog-3.15-2' of git://git.infradead.org/linux-mvebu:
watchdog: orion_wdt: Use %pa to print 'phys_addr_t'
Signed-off-by: Olof Johansson <olof@lixom.net>
Arnd Bergmann [Thu, 6 Mar 2014 04:53:03 +0000 (05:53 +0100)]
Merge tag 'armsoc/for-3.15/drivers' of git://github.com/broadcom/mach-bcm into next/drivers
Merge "ARM: mach-bcm: bcm281xx clock driver" from Matt Porter:
This pull request contains the Broadcom bcm281xx
clock driver series. This series is being merged
through the arm-soc tree because there is an
ordering dependency where the driver *must* be
merged before the related dts changes. This is
a result of the bcm281xx dts already containing
dummy fixed clock nodes that must be updated.
* tag 'armsoc/for-3.15/drivers' of git://github.com/broadcom/mach-bcm:
clk: bcm281xx: don't disable unused peripheral clocks
clk: bcm281xx: add initial clock framework support
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Wolfram Sang [Fri, 28 Feb 2014 09:32:55 +0000 (10:32 +0100)]
ARM: shmobile: r7s72100: fix bus clock calculation
The picture in the datasheet is a little misleading, yet the divider of
the bus_clk is 1/3 and not 2/3.
Signed-off-by: Wolfram Sang <wsa@sang-engineering.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Andrew Lunn [Wed, 19 Feb 2014 20:02:35 +0000 (06:02 +1000)]
Power: Reset: Generalize qnap-poweroff to work on Synology devices.
The Synology NAS devices use a very similar mechanism to QNAP NAS
devices to power off. Both send a single charactor command to a PIC,
over the second serial port. However the baud rate and the command
differ. Generalize the driver to support this.
Signed-off-by: Ben Peddell <klightspeed@killerwolves.net>
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Acked-by: Jason Cooper <jason@lakedaemon.net>
Cc: Anton Vorontsov <anton@enomsg.org>
Cc: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
Cc: David Woodhouse <dwmw2@infradead.org>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Dinh Nguyen [Wed, 19 Feb 2014 20:56:38 +0000 (14:56 -0600)]
dts: socfpga: Update clock entry to support multiple parents
The periph_pll and sdram_pll can have multiple parents. Update the device tree
to list all the possible parents for the PLLs. Add an entry for the the
f2s_sdram_ref_clk, which is a possible parent for the sdram_pll.
Also remove the clock-frequency entry in the f2s_periph_ref_clk, as this
property should be placed in dts file.
Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
Cc: Mike Turquette <mturquette@linaro.org>
Cc: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Dinh Nguyen [Wed, 17 Jul 2013 21:17:16 +0000 (16:17 -0500)]
ARM: socfpga: Update socfpga_defconfig
CONFIG_MICREL_PHY=y
CONFIG_EXT3_FS=y
CONFIG_NFS_FS=y
CONFIG_ROOT_NFS=y
CONFIG_MMC=y
CONFIG_MMC_DW=y
Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
Dinh Nguyen [Thu, 6 Feb 2014 22:48:43 +0000 (16:48 -0600)]
dts: socfpga: Add DTS entry for adding the stmmac glue layer for stmmac.
This patch adds the dts bindings documenation for the Altera SOCFPGA glue
layer for the Synopsys STMMAC ethernet driver.
Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
Acked-by: David S. Miller <davem@davemloft.net>
---
v3: Remove stray empty line at end of socfpga_cyclone5_socdk.dts
v2: Use the dwmac-sti as an example for a glue layer and split patch up
to have dts as a separate patch. Also cc dts maintainers since there is
a new binding.
Tony Lindgren [Fri, 28 Feb 2014 21:35:02 +0000 (13:35 -0800)]
Merge branch 'crossbar_3.14_rc1' of git://github.com/Sricharanti/sricharan into omap-for-v3.15/crossbar
Dinh Nguyen [Thu, 6 Feb 2014 22:19:50 +0000 (16:19 -0600)]
net: stmmac: Add SOCFPGA glue driver
Like the STi series SOCs, Altera's SOCFPGA also needs a glue layer on top of the
Synopsys gmac IP.
This patch adds the platform driver for the glue layer which configures the IP
before the generic STMMAC driver takes over.
Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
Acked-by: David S. Miller <davem@davemloft.net>
---
v3: Remove stray empty line at end of dwmac-socfpga.c.
v2: Use the dwmac-sti as an example for a glue layer and split patch up
to have dts as a separate patch. Also cc dts maintainers since there is
a new binding.
Fabio Estevam [Tue, 25 Feb 2014 16:17:33 +0000 (13:17 -0300)]
watchdog: orion_wdt: Use %pa to print 'phys_addr_t'
When building an ARM multi_v7_defconfig with LPAE option selected we get the
following build warning:
drivers/watchdog/orion_wdt.c:272:2: warning: format '%x' expects argument of type 'unsigned int', but argument 4 has type 'phys_addr_t' [-Wformat=]
Fix it by using %pa to print 'phys_addr_t'.
Reported-by: Olof's autobuilder <build@lixom.net>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Acked-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Acked-by: Wim Van Sebroeck <wim@iguana.be>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Punit Agrawal [Wed, 19 Feb 2014 12:17:03 +0000 (12:17 +0000)]
drivers: cci: Export CCI PMU revision
The event numbering changed between revision r0 and r1 of the CCI
PMU. Expose this to userspace to allow tooling to handle the
differences in event numbers.
Suggested-by: Drew Richardson <Drew.Richardson@arm.com>
Signed-off-by: Punit Agrawal <punit.agrawal@arm.com>
Reviewed-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Punit Agrawal [Wed, 19 Feb 2014 12:17:02 +0000 (12:17 +0000)]
drivers: cci: Extend support to CCI revisions > r1p2
The driver queries the CCI IP revision to distinguish between r0 and r1
scheme for event numbers and currently supports upto version r1p2. To
minimise code churn every time there's a new version of the IP, assume
that event numbering doesn't change for revisions > r1p0 (which is
the case).
The driver will still need an update for future revisions that change
the event numbers.
Signed-off-by: Punit Agrawal <punit.agrawal@arm.com>
Reviewed-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Tue, 25 Feb 2014 17:10:24 +0000 (18:10 +0100)]
Merge tag 'qcom-drivers-for-3.15' of git://git./linux/kernel/git/galak/linux-qcom into next/drivers
Merge "qcom driver changes for v3.15" from Kumar Gala:
We've split Qualcomm MSM support into legacy and multiplatform. These
drivers are only relevant on the multiplatform supported SoCs so switch the
Kconfig depends to ARCH_QCOM.
* tag 'qcom-drivers-for-3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/galak/linux-qcom:
gpio: msm: switch Kconfig to ARCH_QCOM depends
hwrng: msm: switch Kconfig to ARCH_QCOM depends
power: reset: msm - switch Kconfig to ARCH_QCOM depends
drm/msm: drop ARCH_MSM Kconfig depend
tty: serial: msm: Enable building msm_serial for ARCH_QCOM
Arnd Bergmann [Tue, 25 Feb 2014 17:09:27 +0000 (18:09 +0100)]
Merge branch 'qcom/cleanup' into next/drivers
* qcom/cleanup:
ARM: qcom: Rename various msm prefixed functions to qcom
clocksource: qcom: split building of legacy vs multiplatform support
ARM: qcom: Split Qualcomm support into legacy and multiplatform
clocksource: qcom: Move clocksource code out of mach-msm
ARM: msm: kill off hotplug.c
ARM: msm: Remove pen_release usage
ARM: dts: msm: split out msm8660 and msm8960 soc into dts include
This cleanup branch is a dependency for the following qcom driver changes.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Mon, 24 Feb 2014 21:19:24 +0000 (22:19 +0100)]
irqchip: VIC: export vic_init_cascaded
vic_init_cascaded is called by integrator impd1 code that can
be a loadable module, so the function has to be exported.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Arnd Bergmann [Tue, 25 Feb 2014 16:50:08 +0000 (17:50 +0100)]
Merge tag 'mvebu-watchdog-3.15' of git://git.infradead.org/linux-mvebu into next/drivers
mvebu watchdog driver changes for v3.15
- orion watchdog
- cleanup and extend driver to support Armada 370 and Armada XP
Depends:
- tags/irqchip-mvebu-fixes-3.14 (already pulled by tglx)
- both are based on v3.14-rc1
* tag 'mvebu-watchdog-3.15' of git://git.infradead.org/linux-mvebu:
watchdog: orion: Enable the build on ARCH_MVEBU
watchdog: orion: Add support for Armada 370 and Armada XP SoC
watchdog: orion: Add per-compatible watchdog start implementation
watchdog: orion: Add per-compatible clock initialization
watchdog: orion: Introduce per-compatible of_device_id data
watchdog: orion: Introduce an orion_watchdog device structure
watchdog: orion: Remove unneeded BRIDGE_CAUSE clear
watchdog: orion: Make RSTOUT register a separate resource
watchdog: orion: Handle the interrupt so it's properly acked
watchdog: orion: Make sure the watchdog is initially stopped
watchdog: orion: Remove unused macros
watchdog: orion: Use atomic access for shared registers
watchdog: orion: Add clock error handling
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Tue, 25 Feb 2014 16:49:13 +0000 (17:49 +0100)]
Merge tag 'irqchip-mvebu-fixes-3.14' of git://git.infradead.org/linux-mvebu into next/drivers
irqchip mvebu fixes for v3.14
- orion:
- fixes for clearing bridge cause register, and clearing stale interrupts
* tag 'irqchip-mvebu-fixes-3.14' of git://git.infradead.org/linux-mvebu:
irqchip: orion: Fix getting generic chip pointer.
irqchip: orion: clear stale interrupts in irq_startup
irqchip: orion: use handle_edge_irq on bridge irqs
irqchip: orion: clear bridge cause register on init
This is a dependency for the mvebu watchdog changes.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Tue, 25 Feb 2014 16:42:59 +0000 (17:42 +0100)]
Merge tag 'davinci-for-v3.15/nand' of git://git./linux/kernel/git/nsekhar/linux-davinci into next/drivers
A patch to break dependency of DaVinci NAND
driver with mach-davinci. Required for reuse
of driver on other platforms (keystone).
* tag 'davinci-for-v3.15/nand' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci:
ARM: davinci: aemif: get rid of davinci-nand driver dependency on aemif
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Kumar Gala [Tue, 11 Feb 2014 20:08:06 +0000 (14:08 -0600)]
gpio: msm: switch Kconfig to ARCH_QCOM depends
We've split Qualcomm MSM support into legacy and multiplatform. The gpio
msm-v2 driver is only relevant on the multiplatform supported SoCs so
switch the Kconfig depends to ARCH_QCOM.
CC: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Alexandre Courbot <gnurou@gmail.com>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
Alex Elder [Fri, 14 Feb 2014 18:29:19 +0000 (12:29 -0600)]
clk: bcm281xx: don't disable unused peripheral clocks
Add the CLK_IGNORE_UNUSED flag when setting up a peripheral clock.
This prevents unused clocks from getting disabled, and by doing
this we can use the common clock code even before we've resolved
all the spots that need to get a reference to their clock.
Signed-off-by: Alex Elder <elder@linaro.org>
Reviewed-by: Matt Porter <mporter@linaro.org>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Matt Porter <mporter@linaro.org>
Alex Elder [Fri, 14 Feb 2014 18:29:18 +0000 (12:29 -0600)]
clk: bcm281xx: add initial clock framework support
Add code for device tree support of clocks in the BCM281xx family of
SoCs. Machines in this family use peripheral clocks implemented by
"Kona" clock control units (CCUs). (Other Broadcom SoC families use
Kona style CCUs as well, but support for them is not yet upstream.)
A BCM281xx SoC has multiple CCUs, each of which manages a set of
clocks on the SoC. A Kona peripheral clock is composite clock that
may include a gate, a parent clock multiplexor, and zero, one
or two dividers. There is a variety of gate types, and many gates
implement hardware-managed gating (often called "auto-gating").
Most dividers divide their input clock signal by an integer value
(one or more). There are also "fractional" dividers which allow
division by non-integer values. To accomodate such dividers,
clock rates and dividers are generally maintained by the code in
"scaled" form, which allows integer and fractional dividers to
be handled in a uniform way.
If present, the gate for a Kona peripheral clock must be enabled
when a change is made to its multiplexor or one of its dividers.
Additionally, dividers and multiplexors have trigger registers which
must be used whenever the divider value or selected parent clock is
changed. The same trigger is often used for a divider and
multiplexor, and a BCM281xx peripheral clock occasionally has two
triggers.
The gate, dividers, and parent clock selector are treated in this
code as "components" of a peripheral clock. Their functionality is
implemented directly--e.g. the common clock framework gate
implementation is not used for a Kona peripheral clock gate. (This
has being considered though, and the intention is to evolve this
code to leverage common code as much as possible.)
The source code is divided into three general portions:
drivers/clk/bcm/clk-kona.h
drivers/clk/bcm/clk-kona.c
These implement the basic Kona clock functionality,
including the clk_ops methods and various routines to
manipulate registers and interpret their values. This
includes some functions used to set clocks to a desired
initial state (though this feature is only partially
implemented here).
drivers/clk/bcm/clk-kona-setup.c
This contains generic run-time initialization code for
data structures representing Kona CCUs and clocks. This
encapsulates the clock structure initialization that can't
be done statically. Note that there is a great deal of
validity-checking code here, making explicit certain
assumptions in the code. This is mostly useful for adding
new clock definitions and could possibly be disabled for
production use.
drivers/clk/bcm/clk-bcm281xx.c
This file defines the specific CCUs used by BCM281XX family
SoCs, as well as the specific clocks implemented by each.
It declares a device tree clock match entry for each CCU
defined.
include/dt-bindings/clock/bcm281xx.h
This file defines the selector (index) values used to
identify a particular clock provided by a CCU. It consists
entirely of C preprocessor constants, to be used by both the
C source and device tree source files.
Signed-off-by: Alex Elder <elder@linaro.org>
Reviewed-by: Tim Kryger <tim.kryger@linaro.org>
Reviewed-by: Matt Porter <mporter@linaro.org>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Matt Porter <mporter@linaro.org>
Andrew Lunn [Sat, 22 Feb 2014 19:15:00 +0000 (20:15 +0100)]
drivers: Enable building of Kirkwood drivers for mach-mvebu
With the move of kirkwood into mach-mvebu, drivers Kconfig need
tweeking to allow the kirkwood specific drivers to be built.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Mark Brown <broonie@linaro.org>
Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Tested-by: Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
Cc: Viresh Kumar <viresh.kumar@linaro.org>
Cc: Rafael J. Wysocki <rjw@rjwysocki.net>
Cc: Richard Purdie <rpurdie@rpsys.net>
Cc: Bryan Wu <cooloney@gmail.com>
Cc: Zhang Rui <rui.zhang@intel.com>
Cc: Eduardo Valentin <eduardo.valentin@ti.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Kuninori Morimoto [Wed, 19 Feb 2014 03:28:11 +0000 (19:28 -0800)]
ARM: shmobile: r8a7790: add sound SCU clock support
This is needed to use SRC (= Sampling Rate Converter).
MSTP1017 is defined top of MSTPxxx list to avoid runtime error,
since it is parent clock of MSTP1031 - MSTP1022
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Laurent Pinchart [Wed, 19 Feb 2014 17:03:31 +0000 (18:03 +0100)]
ARM: shmobile: r8a7791: Remove legacy clock aliases for DT devices
Now that the r8a7791 DT platforms use the common clock framework,
there's no need to manually create clock aliases for devices
instantiated through DT, as those devices will reference their clocks
directly in the device tree. Remove those aliases.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Magnus Damm [Wed, 12 Feb 2014 04:09:37 +0000 (13:09 +0900)]
ARM: shmobile: Remove legacy r8a7790 DT clocks
The DT device case is handled by CCF these days, so get
rid of DT devices from the legacy clocks for r8a7790.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Magnus Damm [Wed, 12 Feb 2014 04:26:01 +0000 (13:26 +0900)]
ARM: shmobile: Add r8a7791 legacy SDHI clocks
Add legacy r8a7791 SDHI clocks. This to allow the SDHI devices
to be used by legacy Koelsch board support.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Simon Horman [Thu, 6 Feb 2014 00:25:01 +0000 (09:25 +0900)]
ARM: shmobile: r8a7790: Correct SYS DMAC clock defines
This brings the implementation into line with the documentation.
This problem was introduced when SYS DMAC clock defines were added by
ac991dce6498b5fc ("ARM: shmobile: r8a7790: Add clock index macros for DT
sources") in v3.13-rc2. I do not believe this results in any problems as
these defines do not appear to be used anywhere yet.
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Simon Horman [Sun, 15 Dec 2013 07:24:53 +0000 (16:24 +0900)]
ARM: shmobile: r7s72100: Add clock for r7s72100-ether
Acked-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Geert Uytterhoeven [Tue, 4 Feb 2014 15:24:00 +0000 (16:24 +0100)]
ARM: shmobile: r8a7791 clock: add QSPI clocks
The QSPI clock divider value depends on the MD1, MD2, and MD3 mode
switches.
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Geert Uytterhoeven [Tue, 4 Feb 2014 15:23:58 +0000 (16:23 +0100)]
ARM: shmobile: r7s72100 clock: Add RSPI clocks for DT
Add DT-style ("%08x.spi") clocks, as Genmai doesn't use the common
clock framework yet.
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Geert Uytterhoeven [Tue, 4 Feb 2014 15:23:55 +0000 (16:23 +0100)]
ARM: shmobile: r7s72100 clock: Add RSPI clocks
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Kuninori Morimoto [Tue, 14 Jan 2014 02:25:39 +0000 (18:25 -0800)]
ARM: shmobile: r8a7790: add audio clock
Current audio clock doesn't have dependency to device/driver,
but, it is not good design for DT support.
To avoid branch merge conflict issue,
it uses this load map, and this patch is 1) part.
1) add old/new style clock in platform
2) add new style clock method in driver
3) remove old tyle clock from platform
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Kuninori Morimoto [Tue, 14 Jan 2014 02:25:27 +0000 (18:25 -0800)]
ARM: shmobile: r8a7778: add audio clock in new style
Current audio clock doesn't have dependency to device/driver,
but, it is not good design for DT support.
To avoid branch merge conflict issue,
it uses this load map, and this patch is 1) part.
1) add new style clock in platform
2) add new style clock method in driver
3) remove old tyle clock from platform
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Ivan Khoronzhuk [Thu, 30 Jan 2014 11:03:40 +0000 (13:03 +0200)]
ARM: davinci: aemif: get rid of davinci-nand driver dependency on aemif
The problem that the set timings code contains the call of Davinci
platform function davinci_aemif_setup_timing() which is not
accessible if kernel is built for another platform like Keystone.
The Keysone platform is going to use TI AEMIF driver.
If TI AEMIF is used we don't need to set timings and bus width.
It is done by AEMIF driver.
To get rid of davinci-nand driver dependency on aemif platform code
we moved aemif code to davinci platform.
The platform AEMIF code (aemif.c) has to be removed once Davinci
will be converted to DT and use ti-aemif.c driver.
Acked-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
[nsekhar@ti.com: fixed checkpatch error and a build breakage due to
missing include, rebased onto l2-mtd/master]
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Ezequiel Garcia [Mon, 10 Feb 2014 23:00:35 +0000 (20:00 -0300)]
watchdog: orion: Enable the build on ARCH_MVEBU
After adding support for Armada 370/XP SoC let's enable the build on
these platforms.
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Tested-by: Willy Tarreau <w@1wt.eu>
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Acked-by: Wim Van Sebroeck <wim@iguana.be>
Tested-By: Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Ezequiel Garcia [Mon, 10 Feb 2014 23:00:31 +0000 (20:00 -0300)]
watchdog: orion: Add support for Armada 370 and Armada XP SoC
Using the added infrastructure for handling SoC differences,
this commit adds support for the watchdog controller available
in Armada 370 and Armada XP SoCs.
Also, and because the AXP clock initialization uses of_clk_get_by_name,
this commit changes the orion clock initialization to use clk_get() and
adds a proper clk_put() on the common exit/error paths.
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Tested-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Tested-by: Willy Tarreau <w@1wt.eu>
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Acked-by: Wim Van Sebroeck <wim@iguana.be>
Tested-By: Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Ezequiel Garcia [Mon, 10 Feb 2014 23:00:30 +0000 (20:00 -0300)]
watchdog: orion: Add per-compatible watchdog start implementation
To handle differences between SoCs this commit adds per-compatible
string start() function for the watchdog kick-off. This is preparation
work and makes no functionality changes to the current driver.
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Tested-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Tested-by: Willy Tarreau <w@1wt.eu>
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Acked-by: Wim Van Sebroeck <wim@iguana.be>
Tested-By: Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Ezequiel Garcia [Mon, 10 Feb 2014 23:00:29 +0000 (20:00 -0300)]
watchdog: orion: Add per-compatible clock initialization
Following the introduction of the compatible-data field,
it's now possible to further abstract the clock initialization.
This will allow to support SoC with a different clock setup.
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Tested-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Tested-by: Willy Tarreau <w@1wt.eu>
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Acked-by: Wim Van Sebroeck <wim@iguana.be>
Tested-By: Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Ezequiel Garcia [Mon, 10 Feb 2014 23:00:28 +0000 (20:00 -0300)]
watchdog: orion: Introduce per-compatible of_device_id data
This commit adds an orion_watchdog_data structure to hold compatible-data
information. This allows to remove the driver-wide definition and to
be able to add support for multiple compatible-strings in the future.
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Tested-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Tested-by: Willy Tarreau <w@1wt.eu>
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Acked-by: Wim Van Sebroeck <wim@iguana.be>
Tested-By: Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Ezequiel Garcia [Mon, 10 Feb 2014 23:00:27 +0000 (20:00 -0300)]
watchdog: orion: Introduce an orion_watchdog device structure
In order to prepare to support multiple compatible-strings, this
commit adds a device structure to hold the driver's state.
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Tested-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Tested-by: Willy Tarreau <w@1wt.eu>
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Acked-by: Wim Van Sebroeck <wim@iguana.be>
Tested-By: Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Ezequiel Garcia [Mon, 10 Feb 2014 23:00:26 +0000 (20:00 -0300)]
watchdog: orion: Remove unneeded BRIDGE_CAUSE clear
After adding the IRQ request, the BRIDGE_CAUSE bit should be cleared by the
bridge interrupt controller. There's no longer a need to do it in the watchdog
driver, so we can simply remove it.
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Tested-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Tested-by: Willy Tarreau <w@1wt.eu>
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Acked-by: Wim Van Sebroeck <wim@iguana.be>
Tested-By: Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Ezequiel Garcia [Mon, 10 Feb 2014 23:00:25 +0000 (20:00 -0300)]
watchdog: orion: Make RSTOUT register a separate resource
In order to support other SoC, it's required to distinguish
the 'control' timer register, from the 'rstout' register
that enables system reset on watchdog expiration.
To prevent a compatibility break, this commit adds a fallback
to a hardcoded RSTOUT address.
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Tested-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Tested-by: Willy Tarreau <w@1wt.eu>
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Acked-by: Wim Van Sebroeck <wim@iguana.be>
Tested-By: Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Ezequiel Garcia [Mon, 10 Feb 2014 23:00:24 +0000 (20:00 -0300)]
watchdog: orion: Handle the interrupt so it's properly acked
DT-enabled plaforms, where the irqchip driver for the brigde interrupt
controller is available, can handle the watchdog IRQ properly. Therefore,
request the interrupt and add a dummy handler that merely calls panic().
This is done in order to have an initial 'ack' of the interruption,
which clears the watchdog state.
Furthermore, since some platforms don't have such IRQ, this commit
makes the interrupt specification optional.
Tested-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Tested-by: Willy Tarreau <w@1wt.eu>
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Acked-by: Wim Van Sebroeck <wim@iguana.be>
Tested-By: Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Ezequiel Garcia [Mon, 10 Feb 2014 23:00:23 +0000 (20:00 -0300)]
watchdog: orion: Make sure the watchdog is initially stopped
Having the watchdog initially fully stopped is important to avoid
any spurious watchdog triggers, in case the registers are not in
its reset state.
If the watchdog rstout is enabled and the watchdog counter running,
this initial stop is not performed, to comply with the 'nowayout'
parameter.
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Tested-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Tested-by: Willy Tarreau <w@1wt.eu>
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Acked-by: Wim Van Sebroeck <wim@iguana.be>
Tested-By: Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Ezequiel Garcia [Mon, 10 Feb 2014 23:00:22 +0000 (20:00 -0300)]
watchdog: orion: Remove unused macros
These are not used anywhere so it's safe to remove them.
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Tested-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Tested-by: Willy Tarreau <w@1wt.eu>
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Acked-by: Wim Van Sebroeck <wim@iguana.be>
Tested-By: Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Ezequiel Garcia [Mon, 10 Feb 2014 23:00:21 +0000 (20:00 -0300)]
watchdog: orion: Use atomic access for shared registers
Since the timer control register is shared with the clocksource driver,
use the recently introduced atomic_io_clear_set() to access such register.
Given the watchdog core already provides serialization for all the
watchdog ops, this commit allows to remove the spinlock entirely.
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Tested-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Tested-by: Willy Tarreau <w@1wt.eu>
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Acked-by: Wim Van Sebroeck <wim@iguana.be>
Tested-By: Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Ezequiel Garcia [Mon, 10 Feb 2014 23:00:20 +0000 (20:00 -0300)]
watchdog: orion: Add clock error handling
This commit adds a check for clk_prepare_enable success and introduces
an error path to disable the clock properly.
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Tested-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Tested-by: Willy Tarreau <w@1wt.eu>
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Acked-by: Wim Van Sebroeck <wim@iguana.be>
Tested-By: Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Thomas Petazzoni [Tue, 18 Feb 2014 13:26:06 +0000 (14:26 +0100)]
rtc: mv: reset date if after year 2038
Dates after January, 19th 2038 are badly handled by userspace due to
the time being stored on 32 bits. This causes issues on some Marvell
platform on which the RTC is initialized by default to a date that's
beyond 2038, causing a really weird behavior of the RTC.
In order to avoid that, reset the date to a sane value if the RTC is
beyond 2038.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Olof Johansson [Fri, 21 Feb 2014 22:45:36 +0000 (14:45 -0800)]
Merge tag 'integrator-for-v3.15-1' of git://git./linux/kernel/git/linusw/linux-integrator into next/drivers
Merge "Integrator/Versatile base patch stack for the v3.15 series"
from Linus Walleij:
"this is a set of patches I have sent for review and failed to get ACKs
from the proper subsystem maintainers after repeated pings. However I
now need to have this rotated in linux-next as a base for multiplatform,
so please pull it in, it is all ARM drivers anyway. Russell pointed out
some things and these have been fixed and iterated in this series."
- Move integrator clock definitions to the device tree, alter
clock and timer drivers accordingly.
- Alter the VIC irqchip driver to support cascaded VICs off
a parent IRQ controller.
- Update the IM-PD1 plugin code to use managed resources.
- Register the VIC on the IM-PD1.
- Select the PL061 GPIO block for the IM-PD1 on the
Integrator/AP.
* tag 'integrator-for-v3.15-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator:
ARM: integrator: select GPIO block
ARM: integrator: register the IM-PD1 VIC
ARM: integrator: use managed resources for the IM-PD1
irqchip: support cascaded VICs
irqchip: vic: update the base IRQ member correctly
clk: versatile: respect parent rate in ICST clock
clk: versatile: pass a parent to the ICST clock
ARM: integrator: switch to fetch clocks from device tree
ARM: SP804: make Integrator/CP timer pick clock from DT
ARM: integrator: define clocks in the device trees
Signed-off-by: Olof Johansson <olof@lixom.net>
Andrew Lunn [Thu, 6 Feb 2014 23:41:58 +0000 (00:41 +0100)]
irqchip: orion: Fix getting generic chip pointer.
Enabling SPARSE_IRQ shows up a bug in the irq-orion bridge interrupt
handler. The bridge interrupt is implemented using a single generic
chip. Thus the parameter passed to irq_get_domain_generic_chip()
should always be zero.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Fixes:
9dbd90f17e4f ("irqchip: Add support for Marvell Orion SoCs")
Cc: <stable@vger.kernel.org> # v3.11+
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Kumar Gala [Thu, 30 Jan 2014 20:43:49 +0000 (14:43 -0600)]
hwrng: msm: switch Kconfig to ARCH_QCOM depends
We've split Qualcomm MSM support into legacy and multiplatform. The RNG
driver is only relevant on the multiplatform supported SoCs so switch the
Kconfig depends to ARCH_QCOM.
Acked-by: Herbert Xu <herbert@gondor.apana.org.au>
CC: Stanimir Varbanov <svarbanov@mm-sol.com>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
Olof Johansson [Thu, 20 Feb 2014 08:34:58 +0000 (00:34 -0800)]
Merge tag 'renesas-soc-for-v3.15' of git://git./linux/kernel/git/horms/renesas into next/drivers
Merge "Renesas ARM Based SoC Updates for v3.15" from Simon Horman:
* r7s72100 SoC (RZ/A1H)
- Add i2c clocks (portion missing from previous patch due to miss-merge)
* r8a7791 (R-Car M2)
- Add SATA clocks
- Add ZS clock
- Wait for status on all MSTP clocks
-- Add I2C and VIN clocks
* r8a7790 (R-Car H2)
- Add PCI USB host clock support
- Add Audio DMAC, SATA and VIN clocks
- Add Audio DMAC support
* r8a7779 (R-Car H1)
- Wait for status on selected MSTP clocks
* tag 'renesas-soc-for-v3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: r8a7790: Add PCI USB host clock support
ARM: shmobile: r7s72100: really add i2c clocks
ARM: shmobile: r8a7791: Add SATA clocks
ARM: shmobile: r8a7791: Add ZS clock
ARM: shmobile: r8a7790: Add SATA clocks
ARM: shmobile: r8a7790: Add VIN clock support
ARM: shmobile: r8a7790: add Audio DMAC support
ARM: shmobile: r8a7790: add Audio DMAC clock
ARM: shmobile: r8a7791: Wait for status on all MSTP clocks
ARM: shmobile: r8a7791: Add VIN clocks
ARM: shmobile: r8a7791: Add I2C clocks
ARM: shmobile: r8a7790: Wait for status on all MSTP clocks
ARM: shmobile: r8a7779: Wait for status on selected MSTP clocks
ARM: shmobile: wait for MSTP clock status to toggle, when enabling it
Rob Herring [Thu, 5 Dec 2013 16:10:34 +0000 (10:10 -0600)]
ARM: virt: select ARM_AMBA
Guests can use AMBA bus devices such as the PL011 uart, so enable the
AMBA bus for mach-virt.
Signed-off-by: Rob Herring <robh@kernel.org>
Cc: Russell King <linux@arm.linux.org.uk>
Rob Herring [Thu, 5 Dec 2013 16:04:54 +0000 (10:04 -0600)]
ARM: virt: make mach-virt just a kconfig option
The mach code for mach-virt is no longer needed, so we can remove all of
mach-virt except the kconfig entry.
Signed-off-by: Rob Herring <robh@kernel.org>
Cc: Russell King <linux@arm.linux.org.uk>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Rob Herring [Fri, 31 Jan 2014 21:06:40 +0000 (15:06 -0600)]
ARM: vt8500: enable V6K instead of plain V6
The wm8750 is an ARM1176 which has all the V6K extensions except for SMP,
so V6K should be selected instead. Dropping the select will use the
default for ARCH_MULTI_V6 which is V6K.
Signed-off-by: Rob Herring <robh@kernel.org>
Cc: Tony Prisk <linux@prisktech.co.nz>
Rob Herring [Fri, 31 Jan 2014 21:05:57 +0000 (15:05 -0600)]
ARM: cns3xxx: enable V6K instead of plain V6
The cns3xxx is an ARM11MPCore which has all the V6K extensions, so V6K
should be selected instead. Dropping the select will use the default for
ARCH_MULTI_V6 which is V6K.
Signed-off-by: Rob Herring <robh@kernel.org>
Cc: Anton Vorontsov <anton@enomsg.org>
Rob Herring [Fri, 31 Jan 2014 21:05:00 +0000 (15:05 -0600)]
ARM: bcm2835: enable V6K instead of plain V6
The bcm2835 is an ARM1176 which has all the V6K extensions except for SMP,
so V6K should be selected instead. Dropping the select will use
the default for ARCH_MULTI_V6 which is V6K.
Signed-off-by: Rob Herring <robh@kernel.org>
Tested-by: Stephen Warren <swarren@wwwdotorg.org>
Rob Herring [Fri, 31 Jan 2014 20:26:04 +0000 (14:26 -0600)]
ARM: Select V6K instead of V6 by default for multi-platform
MULTI_V6 should default to V6K as it is more optimal than V6. Any
platform which is not V6K should select CPU_V6 which will enable the
less optimal code paths.
Signed-off-by: Rob Herring <robh@kernel.org>
Cc: Anton Vorontsov <anton@enomsg.org>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Jamie Iles <jamie@jamieiles.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Rob Herring [Fri, 31 Jan 2014 21:36:10 +0000 (15:36 -0600)]
ARM: select MIGHT_HAVE_CACHE_L2X0 for V6 and V7 multi-platform
Many V6 and V7 platforms have an L2x0 cache, so make
CONFIG_MIGHT_HAVE_CACHE_L2X0 visible for V6 and V7 multi-platform
builds.
Signed-off-by: Rob Herring <robh@kernel.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Rob Herring [Fri, 31 Jan 2014 21:32:02 +0000 (15:32 -0600)]
ARM: select HAVE_SMP for V7 multi-platform
All V7 platforms can run SMP kernels, so make CONFIG_SMP visible for V7
multi-platform builds.
Signed-off-by: Rob Herring <robh@kernel.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Rob Herring [Fri, 22 Nov 2013 15:29:37 +0000 (09:29 -0600)]
ARM: centralize common multi-platform kconfig options
Multi-platform requires various kconfig options to be selected, so
platforms don't need to select them individually.
Signed-off-by: Rob Herring <robh@kernel.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Cc: Russell King <linux@arm.linux.org.uk>
Acked-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swarren@wwwdotorg.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Linus Torvalds [Tue, 18 Feb 2014 18:04:09 +0000 (10:04 -0800)]
Merge tag 'ext4_for_linus_stable' of git://git./linux/kernel/git/tytso/ext4
Pull ext4 fixes from Ted Ts'o:
"Miscellaneous ext4 bug fixes for v3.14"
* tag 'ext4_for_linus_stable' of git://git.kernel.org/pub/scm/linux/kernel/git/tytso/ext4:
jbd2: fix use after free in jbd2_journal_start_reserved()
ext4: don't leave i_crtime.tv_sec uninitialized
ext4: fix online resize with a non-standard blocks per group setting
ext4: fix online resize with very large inode tables
ext4: don't try to modify s_flags if the the file system is read-only
ext4: fix error paths in swap_inode_boot_loader()
ext4: fix xfstest generic/299 block validity failures
Fengguang Wu [Tue, 18 Feb 2014 18:00:21 +0000 (18:00 +0000)]
rtc: isl12057: use PTR_ERR_OR_ZERO to fix coccinelle warnings
drivers/rtc/rtc-isl12057.c:278:1-3: WARNING: PTR_RET can be used
Use PTR_ERR_OR_ZERO rather than if(IS_ERR(...)) + PTR_ERR
Generated by: coccinelle/api/ptr_ret.cocci
CC: Arnaud Ebalard <arno@natisbad.org>
CC: Jason Cooper <jason@lakedaemon.net>
Signed-off-by: Fengguang Wu <fengguang.wu@intel.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Dan Carpenter [Tue, 18 Feb 2014 01:33:01 +0000 (20:33 -0500)]
jbd2: fix use after free in jbd2_journal_start_reserved()
If start_this_handle() fails then it leads to a use after free of
"handle".
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: "Theodore Ts'o" <tytso@mit.edu>
Cc: stable@vger.kernel.org
Linus Torvalds [Mon, 17 Feb 2014 21:51:00 +0000 (13:51 -0800)]
Merge branch 'for-linus' of git://git./linux/kernel/git/sage/ceph-client
Pull Ceph fixes from Sage Weil:
"We have some patches fixing up ACL support issues from Zheng and
Guangliang and a mount option to enable/disable this support. (These
fixes were somewhat delayed by the Chinese holiday.)
There is also a small fix for cached readdir handling when directories
are fragmented"
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/sage/ceph-client:
ceph: fix __dcache_readdir()
ceph: add acl, noacl options for cephfs mount
ceph: make ceph_forget_all_cached_acls() static inline
ceph: add missing init_acl() for mkdir() and atomic_open()
ceph: fix ceph_set_acl()
ceph: fix ceph_removexattr()
ceph: remove xattr when null value is given to setxattr()
ceph: properly handle XATTR_CREATE and XATTR_REPLACE
Linus Torvalds [Mon, 17 Feb 2014 21:50:11 +0000 (13:50 -0800)]
Merge branch 'for-linus' of git://git.samba.org/sfrench/cifs-2.6
Pull CIFS fixes from Steve French:
"Three cifs fixes, the most important fixing the problem with passing
bogus pointers with writev (CVE-2014-0069).
Two additional cifs fixes are still in review (including the fix for
an append problem which Al also discovered)"
* 'for-linus' of git://git.samba.org/sfrench/cifs-2.6:
CIFS: Fix too big maxBuf size for SMB3 mounts
cifs: ensure that uncached writes handle unmapped areas correctly
[CIFS] Fix cifsacl mounts over smb2 to not call cifs
David Howells [Mon, 17 Feb 2014 15:01:47 +0000 (15:01 +0000)]
FS-Cache: Handle removal of unadded object to the fscache_object_list rb tree
When FS-Cache allocates an object, the following sequence of events can
occur:
-->fscache_alloc_object()
-->cachefiles_alloc_object() [via cache->ops->alloc_object]
<--[returns new object]
-->fscache_attach_object()
<--[failed]
-->cachefiles_put_object() [via cache->ops->put_object]
-->fscache_object_destroy()
-->fscache_objlist_remove()
-->rb_erase() to remove the object from fscache_object_list.
resulting in a crash in the rbtree code.
The problem is that the object is only added to fscache_object_list on
the success path of fscache_attach_object() where it calls
fscache_objlist_add().
So if fscache_attach_object() fails, the object won't have been added to
the objlist rbtree. We do, however, unconditionally try to remove the
object from the tree.
Thanks to NeilBrown for finding this and suggesting this solution.
Reported-by: NeilBrown <neilb@suse.de>
Signed-off-by: David Howells <dhowells@redhat.com>
Tested-by: (a customer of) NeilBrown <neilb@suse.de>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Dave Jones [Mon, 17 Feb 2014 21:21:24 +0000 (16:21 -0500)]
reiserfs: fix utterly brain-damaged indentation.
This has been this way for years, and every time I stumble across it I
lose my lunch. After coming across it for the nth time in the Coverity
results, I had to overcome the bystander effect and do something about
it.
This ignores the 79 column limit in favor of making it look like C
instead of gibberish.
The correct thing to do here would be to lose some of the indentation by
breaking this function up into several smaller ones. I might do that at
some point if I have the stomach to look at this again.
(Also some of those overlong ternary operations would likely be more
readable as regular if's)
Signed-off-by: Dave Jones <davej@fedoraproject.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Linus Torvalds [Mon, 17 Feb 2014 20:42:45 +0000 (12:42 -0800)]
Merge tag 'dma-buf-for-3.14' of git://git./linux/kernel/git/sumits/dma-buf
Pull dma-buf fix from Sumit Semwal:
"Just some debugfs output updates.
There's another patch related to dma-buf, but it'll get upstreamed via
Greg KH's pull request"
* tag 'dma-buf-for-3.14' of git://git.kernel.org/pub/scm/linux/kernel/git/sumits/dma-buf:
dma-buf: update debugfs output
Linus Torvalds [Mon, 17 Feb 2014 20:40:36 +0000 (12:40 -0800)]
Merge branch 'for-linus' of git://git./linux/kernel/git/egtvedt/linux-avr32
Pull AVR32 fixes from Hans-Christian Egtvedt.
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/egtvedt/linux-avr32:
avr32: add generic vga.h to Kbuild
avr32: add generic ioremap_wc() definition in io.h
avr32: Makefile: add '-D__linux__' flag for gcc-4.4.7 use
avr32: fix missing module.h causing build failure in mimc200/fram.c
Yan, Zheng [Thu, 13 Feb 2014 11:40:26 +0000 (19:40 +0800)]
ceph: fix __dcache_readdir()
If directory is fragmented, readdir() read its dirfrags one by one.
After reading all dirfrags, the corresponding dentries are sorted in
(frag_t, off) order in the dcache. If dentries of a directory are all
cached, __dcache_readdir() can use the cached dentries to satisfy
readdir syscall. But when checking if a given dentry is after the
position of readdir, __dcache_readdir() compares numerical value of
frag_t directly. This is wrong, it should use ceph_frag_compare().
Signed-off-by: Yan, Zheng <zheng.z.yan@intel.com>