Marijn Suijten [Sun, 30 Oct 2022 07:32:24 +0000 (08:32 +0100)]
arm64: dts: qcom: sm6350: Add pinctrl for SDHCI 2
Use the generic pin functions specifically for sdc2.
Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Reviewed-by: Luca Weiss <luca.weiss@fairphone.com>
Tested-by: Luca Weiss <luca.weiss@fairphone.com> # sm7225-fairphone-fp4
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221030073232.22726-3-marijn.suijten@somainline.org
Marijn Suijten [Sun, 30 Oct 2022 07:32:23 +0000 (08:32 +0100)]
arm64: dts: qcom: sm6350: Add resets for SDHCI 1/2
Make sure the SDHCI hardware is properly reset before interacting with
it, to protect against any possibly indeterminate state left by the
bootloader.
Suggested-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Reviewed-by: Luca Weiss <luca.weiss@fairphone.com>
Tested-by: Luca Weiss <luca.weiss@fairphone.com> # sm7225-fairphone-fp4
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221030073232.22726-2-marijn.suijten@somainline.org
Luca Weiss [Fri, 28 Oct 2022 07:54:05 +0000 (09:54 +0200)]
arm64: dts: qcom: pm6150l: add temp sensor and thermal zone config
Add temp-alarm device tree node and a default configuration for the
corresponding thermal zone for this PMIC. Temperatures are based on
downstream values, except for trip2 where 125°C is used instead of 145°C
due to limitations without a configured ADC.
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221028075405.124809-2-luca.weiss@fairphone.com
Luca Weiss [Fri, 28 Oct 2022 07:54:04 +0000 (09:54 +0200)]
arm64: dts: qcom: pm6350: add temp sensor and thermal zone config
Add temp-alarm device tree node and a default configuration for the
corresponding thermal zone for this PMIC. Temperatures are based on
downstream values, except for trip2 where 125°C is used instead of 145°C
due to limitations without a configured ADC.
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221028075405.124809-1-luca.weiss@fairphone.com
Douglas Anderson [Tue, 25 Oct 2022 23:52:39 +0000 (16:52 -0700)]
arm64: dts: qcom: sc7280: Villager doesn't have NVME
The sc7280-herobrine-villager derivative doesn't have NVME enabled so
we shouldn't mark the PCIe nodes as "okay" since they're just for
boards that have NVME.
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221025164915.1.I38e2545eda2b3bd3fef6b41c98f451e32851ae70@changeid
Stephen Boyd [Tue, 25 Oct 2022 18:07:03 +0000 (11:07 -0700)]
arm64: dts: qcom: Remove fingerprint node from herobrine-r1
It turns out that only a few people have the fingerprint sensor hooked
up on their board. Leaving this enabled is slowing down boot for
everyone else because the driver slowly fails to probe while trying to
communicate with a sensor that isn't there. Remove the node to speed up
boot, developers with the board can manually enable it themselves.
Reported-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221025180703.1806234-1-swboyd@chromium.org
Krzysztof Kozlowski [Tue, 18 Oct 2022 15:54:49 +0000 (11:54 -0400)]
arm64: dts: qcom: msm8994: Align TLMM pin configuration with DT schema
DT schema expects TLMM pin configuration nodes to be named with
'-state' suffix and their optional children with '-pins' suffix.
Order the "function" and "pins" property to match other DTS.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221018155450.39816-2-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Tue, 18 Oct 2022 15:54:48 +0000 (11:54 -0400)]
arm64: dts: qcom: msm8994: Correct SPI10 CS pin
The GPIO55 is part of SPI10 pins, not its chip-select. Probably the
intention was to use one of dedicated chip-select GPIOs: 47 or 67.
GPIO47 is used for UART2, so choose GPIO67.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221018155450.39816-1-krzysztof.kozlowski@linaro.org
Manikanta Pubbisetty [Mon, 17 Oct 2022 12:53:46 +0000 (18:23 +0530)]
arm64: dts: qcom: sc7280: Add nodes to support WoW on WCN6750
Add DT nodes to support WoW (Wake on Wireless) feature on WCN6750
WiFi hardware on SC7280 SoC.
Signed-off-by: Manikanta Pubbisetty <quic_mpubbise@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221017125346.3691-3-quic_mpubbise@quicinc.com
Johan Hovold [Wed, 26 Oct 2022 15:25:11 +0000 (17:25 +0200)]
arm64: dts: qcom: sm6350: drop bogus DP PHY clock
The QMP pipe clock is used by the USB part of the PHY so drop the
corresponding properties from the DP child node.
Fixes:
23737b9557fe ("arm64: dts: qcom: sm6350: Add USB1 nodes")
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221026152511.9661-3-johan+linaro@kernel.org
Johan Hovold [Wed, 26 Oct 2022 15:25:10 +0000 (17:25 +0200)]
arm64: dts: qcom: sm8250: drop bogus DP PHY clock
The QMP pipe clock is used by the USB part of the PHY so drop the
corresponding properties from the DP child node.
Fixes:
5aa0d1becd5b ("arm64: dts: qcom: sm8250: switch usb1 qmp phy to USB3+DP mode")
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221026152511.9661-2-johan+linaro@kernel.org
Manivannan Sadhasivam [Thu, 3 Nov 2022 09:58:10 +0000 (15:28 +0530)]
arm64: dts: qcom: sc8280xp-x13s: Add thermal zone support
Add thermal zone support by making use of the thermistor SYS_THERM6.
Based on experiments, this thermistor seems to reflect the actual
surface temperature of the laptop.
For the cooling device, all BIG CPU cores are throttled down to keep the
temperature at a sane level.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221103095810.64606-13-manivannan.sadhasivam@linaro.org
Manivannan Sadhasivam [Thu, 3 Nov 2022 09:58:09 +0000 (15:28 +0530)]
arm64: dts: qcom: sc8280xp-x13s: Add PM8280_{1/2} ADC_TM5 channels
Add ADC_TM5 channels of PM8280_{1/2} for monitoring the temperature from
external thermistors connected to AMUX pins. The temperature measurements
are collected from the PMK8280's VADC channels that expose the
measurements from secondary PMICs PM8280_{1/2}.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221103095810.64606-12-manivannan.sadhasivam@linaro.org
Manivannan Sadhasivam [Thu, 3 Nov 2022 09:58:08 +0000 (15:28 +0530)]
arm64: dts: qcom: sc8280xp-x13s: Add PMR735A VADC channel
Add VADC channel of PMR735A for measuring the on-chip die temperature.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221103095810.64606-11-manivannan.sadhasivam@linaro.org
Manivannan Sadhasivam [Thu, 3 Nov 2022 09:58:07 +0000 (15:28 +0530)]
arm64: dts: qcom: sc8280xp-x13s: Add PM8280_{1/2} VADC channels
Add VADC channels of PM8280_{1/2} PMICs for measuring the on-chip die
temperature and external thermistors connected to the AMUX pins.
The measurements are collected by the primary PMIC PMK8280 from the
secondary PMICs PM8280_{1/2} and exposed over the PMK8280's VADC channels.
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221103095810.64606-10-manivannan.sadhasivam@linaro.org
Manivannan Sadhasivam [Thu, 3 Nov 2022 09:58:06 +0000 (15:28 +0530)]
arm64: dts: qcom: sc8280xp-x13s: Add PMK8280 VADC channels
Add VADC channels for measuring the on-chip die temperature and external
crystal osciallator temperature of PMK8280.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221103095810.64606-9-manivannan.sadhasivam@linaro.org
Manivannan Sadhasivam [Thu, 3 Nov 2022 09:58:05 +0000 (15:28 +0530)]
arm64: dts: qcom: sc8280xp-x13s: Enable PMK8280 RESIN input
Enable resetting the PMK8280 through RESIN block in SC8280XP X13s.
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221103095810.64606-8-manivannan.sadhasivam@linaro.org
Manivannan Sadhasivam [Thu, 3 Nov 2022 09:58:04 +0000 (15:28 +0530)]
arm64: dts: qcom: sc8280xp-pmics: Add support for TM5 block in PMK8280
Thermal Monitoring block ADC5 (TM5) in PMK8280 can be used to monitor the
temperature from secondary PMICs like PM8280.
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221103095810.64606-7-manivannan.sadhasivam@linaro.org
Manivannan Sadhasivam [Thu, 3 Nov 2022 09:58:03 +0000 (15:28 +0530)]
arm64: dts: qcom: sc8280xp-pmics: Add PMK8280 ADC7 block
Add support for ADC7 block available in PMK8280 for reading the
temperature via the AMUX pins.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221103095810.64606-6-manivannan.sadhasivam@linaro.org
Manivannan Sadhasivam [Thu, 3 Nov 2022 09:58:02 +0000 (15:28 +0530)]
arm64: dts: qcom: sc8280xp-pmics: Add support for PMK8280 RESIN input
The RESIN input can be used to reset the PMK8280 PMIC. Enabling the
RESIN block allows the PMK8280 to detect reset input via RESIN_N pin.
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221103095810.64606-5-manivannan.sadhasivam@linaro.org
Manivannan Sadhasivam [Thu, 3 Nov 2022 09:58:01 +0000 (15:28 +0530)]
arm64: dts: qcom: sc8280xp-pmics: Add thermal zones for PM8280_{1/2} PMICs
Add thermal zones for the PM8280_{1/2} PMICs by using the temperature
alarm blocks as the thermal sensors. Temperature trip points are
inherited from PM8350 PMIC.
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221103095810.64606-4-manivannan.sadhasivam@linaro.org
Manivannan Sadhasivam [Thu, 3 Nov 2022 09:58:00 +0000 (15:28 +0530)]
arm64: dts: qcom: sc8280xp-pmics: Add temp alarm for PM8280_{1/2} PMICs
Add support for temperature alarm feature in the PM8280_{1/2} PMICs.
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221103095810.64606-3-manivannan.sadhasivam@linaro.org
Manivannan Sadhasivam [Thu, 3 Nov 2022 09:57:59 +0000 (15:27 +0530)]
dt-bindings: iio: qcom: adc7-pm8350: Allow specifying SID for channels
As per the new ADC7 architecture used by the Qualcomm PMICs, each PMIC
has the static Slave ID (SID) assigned by default. The primary PMIC
PMK8350 is responsible for collecting the temperature/voltage data from
the slave PMICs and exposing them via it's registers.
For getting the measurements from the slave PMICs, PMK8350 uses the
channel ID encoded with the SID of the relevant PMIC. So far, the
dt-binding for the slave PMIC PM8350 assumed that there will be only
one PM8350 in a system. So it harcoded SID 1 with channel IDs.
But this got changed in platforms such as Lenovo X13s where there are a
couple of PM8350 PMICs available. So to address multiple PM8350s, change
the binding to accept the SID specified by the user and use it for
encoding the channel ID.
It should be noted that, even though the SID is static it is not
globally unique. Only the primary PMIC has the unique SID id 0.
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221103095810.64606-2-manivannan.sadhasivam@linaro.org
Dmitry Baryshkov [Fri, 4 Nov 2022 13:23:16 +0000 (16:23 +0300)]
dt-bindings: qcom: add another exception to the device naming rule
The 'qcom,dsi-ctrl-6g-qcm2290' compatibility string was added in the
commit
ee1f09678f14 ("drm/msm/dsi: Add support for qcm2290 dsi
controller") in February 2022, but was not properly documented in the
bindings. Adding this compatibility string to
display/msm/dsi-controller-main.yaml caused a warning from
qcom-soc.yaml. Fix the warning by adding an exception to the mentioned
file.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221104132316.1028137-1-dmitry.baryshkov@linaro.org
Vincent Knecht [Fri, 4 Nov 2022 13:24:00 +0000 (14:24 +0100)]
arm64: dts: qcom: msm8916-alcatel-idol347: add LED indicator
Add si-en,sn3190 LED controller to enable white LED indicator.
This requires adding the additional "enable" gpio that the OEM
choose to use, despite it not being mentioned in si-en,sn3190
datasheet nor supported by the driver.
Signed-off-by: Vincent Knecht <vincent.knecht@mailoo.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221104132400.1763218-4-vincent.knecht@mailoo.org
Vincent Knecht [Fri, 4 Nov 2022 13:23:59 +0000 (14:23 +0100)]
arm64: dts: qcom: msm8916-alcatel-idol347: add GPIO torch LED
Add support for torch LED on GPIO 32.
Signed-off-by: Vincent Knecht <vincent.knecht@mailoo.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221104132400.1763218-3-vincent.knecht@mailoo.org
Dmitry Torokhov [Thu, 27 Oct 2022 07:46:51 +0000 (00:46 -0700)]
arm64: dts: qcom: sc7280: fix codec reset line polarity for CRD 1.0/2.0
The driver for the codec, when resetting the chip, first drives the line
low, and then high. This means that the line is active low. Change the
annotation in the DTS accordingly.
Fixes:
f8b4eb64f200 ("arm64: dts: qcom: sc7280: Add wcd9385 codec node for CRD 1.0/2.0 and IDP boards")
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221027074652.1044235-5-dmitry.torokhov@gmail.com
Dmitry Torokhov [Thu, 27 Oct 2022 07:46:50 +0000 (00:46 -0700)]
arm64: dts: qcom: sc7280: fix codec reset line polarity for CRD 3.0/3.1
The driver for the codec, when resetting the chip, first drives the line
low, and then high. This means that the line is active low. Change the
annotation in the DTS accordingly.
Fixes:
0a3a56a93fd9 ("arm64: dts: qcom: sc7280: Add wcd9385 codec node for CRD 3.0/3.1")
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221027074652.1044235-4-dmitry.torokhov@gmail.com
Dmitry Torokhov [Thu, 27 Oct 2022 07:46:49 +0000 (00:46 -0700)]
arm64: dts: qcom: sm8250-mtp: fix reset line polarity
The driver for the codec, when resetting the chip, first drives the line
low, and then high. This means that the line is active low. Change the
annotation in the DTS accordingly.
Fixes:
36c9d012f193 ("arm64: dts: qcom: use GPIO flags for tlmm")
Fixes:
5a263cf629a8 ("arm64: dts: qcom: sm8250-mtp: Add wcd9380 audio codec node")
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221027074652.1044235-3-dmitry.torokhov@gmail.com
Dmitry Torokhov [Thu, 27 Oct 2022 07:46:47 +0000 (00:46 -0700)]
arm64: dts: qcom: msm8996: fix sound card reset line polarity
When resetting the block, the reset line is being driven low and then
high, which means that the line in DTS should be annotated as "active
low". It will become important when wcd9335 driver will be converted
to gpiod API that respects declared line polarities.
Fixes:
f3eb39a55a1f ("arm64: dts: db820c: Add sound card support")
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221027074652.1044235-1-dmitry.torokhov@gmail.com
Krzysztof Kozlowski [Wed, 26 Oct 2022 20:03:57 +0000 (16:03 -0400)]
arm64: dts: qcom: sm8450-qrd: add SDHCI for microSD
Based on downstream DTS, it seems that SM8450 QRD has microSD card slot.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221026200357.391635-5-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Wed, 26 Oct 2022 20:03:56 +0000 (16:03 -0400)]
arm64: dts: qcom: sm8450-hdk: add SDHCI for microSD
The HDK8450 has microSD card slot.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221026200357.391635-4-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Wed, 26 Oct 2022 20:03:55 +0000 (16:03 -0400)]
arm64: dts: qcom: sm8450: disable SDHCI SDR104/SDR50 on all boards
SDHCI on SM8450 HDK also has problems with SDR104/SDR50:
mmc0: card never left busy state
mmc0: error -110 whilst initialising SD card
so I think it is safe to assume this issue affects all SM8450 boards.
Move the quirk disallowing these modes to the SoC DTSI, to spare people
working on other boards the misery of debugging this issue.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221026200357.391635-3-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Wed, 26 Oct 2022 20:03:54 +0000 (16:03 -0400)]
arm64: dts: qcom: sm8450: move SDHCI pin configuration to DTSI
The SDHCI pin configuration/mux nodes are actually common to all
upstreamed boards, so define them in SoC DTSI to reduce code
duplication.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221026200357.391635-2-krzysztof.kozlowski@linaro.org
Johan Hovold [Mon, 24 Oct 2022 09:15:07 +0000 (11:15 +0200)]
arm64: dts: qcom: sm8450: fix UFS PHY registers
The sizes of the UFS PHY register regions are too small and does
specifically not cover all registers used by the Linux driver.
As Linux maps these regions as full pages this is currently not an issue
on Linux, but let's update the sizes to match the vendor driver.
Fixes:
07fa917a335e ("arm64: dts: qcom: sm8450: add ufs nodes")
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221024091507.20342-5-johan+linaro@kernel.org
Johan Hovold [Mon, 24 Oct 2022 09:15:06 +0000 (11:15 +0200)]
arm64: dts: qcom: sm8350: fix UFS PHY registers
The sizes of the UFS PHY register regions are too small and does
specifically not cover all registers used by the Linux driver.
As Linux maps these regions as full pages this is currently not an issue
on Linux, but let's update the sizes to match the vendor driver.
Fixes:
59c7cf814783 ("arm64: dts: qcom: sm8350: Add UFS nodes")
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221024091507.20342-4-johan+linaro@kernel.org
Johan Hovold [Mon, 24 Oct 2022 09:15:05 +0000 (11:15 +0200)]
arm64: dts: qcom: sm8250: fix UFS PHY registers
The sizes of the UFS PHY register regions are too small and does
specifically not cover all registers used by the Linux driver.
As Linux maps these regions as full pages this is currently not an issue
on Linux, but let's update the sizes to match the vendor driver.
Fixes:
b7e2fba06622 ("arm64: dts: qcom: sm8250: Add UFS controller and PHY")
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221024091507.20342-3-johan+linaro@kernel.org
Johan Hovold [Mon, 24 Oct 2022 09:15:04 +0000 (11:15 +0200)]
arm64: dts: qcom: sm8150: fix UFS PHY registers
The sizes of the UFS PHY register regions are too small and does
specifically not cover all registers used by the Linux driver.
As Linux maps these regions as full pages this is currently not an issue
on Linux, but let's update the sizes to match the vendor driver.
Fixes:
3834a2e92229 ("arm64: dts: qcom: sm8150: Add ufs nodes")
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221024091507.20342-2-johan+linaro@kernel.org
Krzysztof Kozlowski [Mon, 24 Oct 2022 00:23:56 +0000 (20:23 -0400)]
arm64: dts: qcom: msm8916: align TLMM pin configuration with DT schema
DT schema expects TLMM pin configuration nodes to be named with
'-state' suffix and their optional children with '-pins' suffix.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221024002356.28261-2-krzysztof.kozlowski@linaro.org
Harry Austen [Sun, 23 Oct 2022 20:46:00 +0000 (20:46 +0000)]
arm64: dts: qcom: msm8996: add support for oneplus3(t)
Add initial support for OnePlus 3 and 3T mobile phones. They are based
on the MSM8996 SoC.
Co-developed-by: Yassine Oudjana <y.oudjana@protonmail.com>
Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com>
Signed-off-by: Harry Austen <hpausten@protonmail.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221023204505.115141-5-hpausten@protonmail.com
Harry Austen [Sun, 23 Oct 2022 20:45:49 +0000 (20:45 +0000)]
dt-bindings: arm: qcom: add oneplus3(t) devices
Add compatible strings for the OnePlus 3 and 3T phones which utilise the
Qualcomm MSM8996 SoC.
Signed-off-by: Harry Austen <hpausten@protonmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221023204505.115141-4-hpausten@protonmail.com
Harry Austen [Sun, 23 Oct 2022 20:45:38 +0000 (20:45 +0000)]
arm64: dts: qcom: msm8996: add blsp1_i2c6 node
Add support for the sixth I2C interface on the MSM8996 SoC.
Signed-off-by: Harry Austen <hpausten@protonmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221023204505.115141-3-hpausten@protonmail.com
Harry Austen [Sun, 23 Oct 2022 20:45:27 +0000 (20:45 +0000)]
arm64: dts: qcom: msm8996: standardize blsp indexing
Use one-based indexing throughout the file for BLSP devices to avoid
confusion. Most of the node names and labels are consistent already.
This patch just fixes a few pinconf node names to match the one-based
indexing used in the label names.
Signed-off-by: Harry Austen <hpausten@protonmail.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221023204505.115141-2-hpausten@protonmail.com
Krzysztof Kozlowski [Thu, 20 Oct 2022 22:53:09 +0000 (18:53 -0400)]
arm64: dts: qcom: msm8996: align TLMM pin configuration with DT schema
DT schema expects TLMM pin configuration nodes to be named with
'-state' suffix and their optional children with '-pins' suffix.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221020225309.32116-2-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Thu, 20 Oct 2022 22:53:08 +0000 (18:53 -0400)]
arm64: dts: qcom: msm8996-sony-xperia-tone: drop incorrect wlan pin input
Pin configuration has no "input-high" property, so drop it from node
described as Wifi host wake up pin.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221020225309.32116-1-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Thu, 20 Oct 2022 22:51:35 +0000 (18:51 -0400)]
arm64: dts: qcom: sc7180: align TLMM pin configuration with DT schema
DT schema expects TLMM pin configuration nodes to be named with
'-state' suffix and their optional children with '-pins' suffix.
Merge subnodes named 'pinconf' and 'pinmux' into one entry, add function
where missing (required by bindings for GPIOs) and reorganize overriding
pins by boards.
Split the SPI and UART configuration into separate nodes
1. SPI (MOSI, MISO, SCLK), SPI chip-select, SPI chip-select via GPIO,
2. UART per each pin: TX, RX and optional CTS/RTS.
This allows each board to customize them easily without adding any new
nodes.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Tested-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221020225135.31750-4-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Thu, 20 Oct 2022 22:51:34 +0000 (18:51 -0400)]
arm64: dts: qcom: sc7180: revert "arm64: dts: qcom: sc7180: Avoid glitching SPI CS at bootup on trogdor"
This reverts commit
e440e30e26dd6b0424002ad0ddcbbcea783efd85 because it
is not a reliable way of fixing SPI CS glitch and it depends on specific
Linux kernel pin controller driver behavior.
This behavior of kernel driver was changed in commit
b991f8c3622c
("pinctrl: core: Handling pinmux and pinconf separately") thus
effectively the DTS fix stopped being effective.
Proper solution for the glitching SPI chip select must be implemented in
the drivers, not via ordering of entries in DTS, and is already
introduced in commit
d21f4b7ffc22 ("pinctrl: qcom: Avoid glitching lines
when we first mux to output").
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Tested-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221020225135.31750-3-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Thu, 20 Oct 2022 22:51:33 +0000 (18:51 -0400)]
arm64: dts: qcom: sc7180-trogdor-homestar: fully configure secondary I2S pins
The Trogdor Homestar DTSI adds additional GPIO52 pin to secondary I2S pins
("sec_mi2s_active") and configures it to "mi2s_1" function.
The Trogdor DTSI (which is included by Homestar) configures drive
strength and bias for all "sec_mi2s_active" pins, thus the intention was
to apply this configuration also to GPIO52 on Homestar.
Reported-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Fixes:
be0416a3f917 ("arm64: dts: qcom: Add sc7180-trogdor-homestar")
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221020225135.31750-2-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Tue, 18 Oct 2022 23:03:52 +0000 (19:03 -0400)]
arm64: dts: qcom: sm8450: Add GPI DMA compatible fallback
Use SM6350 as fallback for GPI DMA, to indicate devices are compatible
and that drivers can bind with only one compatible.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221018230352.1238479-6-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Tue, 18 Oct 2022 23:03:51 +0000 (19:03 -0400)]
arm64: dts: qcom: sm8350: Add GPI DMA compatible fallback
Use SM6350 as fallback for GPI DMA, to indicate devices are compatible
and that drivers can bind with only one compatible.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221018230352.1238479-5-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Tue, 18 Oct 2022 23:03:50 +0000 (19:03 -0400)]
arm64: dts: qcom: sc7280: Add GPI DMA compatible fallback
Use SM6350 as fallback for GPI DMA, to indicate devices are compatible
and that drivers can bind with only one compatible.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221018230352.1238479-4-krzysztof.kozlowski@linaro.org
Jami Kettunen [Sun, 16 Oct 2022 18:03:29 +0000 (19:03 +0100)]
arm64: dts: qcom: msm8998-oneplus-common: enable RRADC
Enable the Round Robin ADC for the OnePlus 5/5T.
Signed-off-by: Jami Kettunen <jami.kettunen@somainline.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221016180330.1912214-6-caleb.connolly@linaro.org
Caleb Connolly [Sun, 16 Oct 2022 18:03:28 +0000 (19:03 +0100)]
arm64: dts: qcom: sdm845-xiaomi-beryllium: enable rradc
Enable the PMI8998 RRADC.
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221016180330.1912214-5-caleb.connolly@linaro.org
Caleb Connolly [Sun, 16 Oct 2022 18:03:27 +0000 (19:03 +0100)]
arm64: dts: qcom: sdm845-db845c: enable rradc
Enable the Round Robin ADC for the db845c.
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221016180330.1912214-4-caleb.connolly@linaro.org
Caleb Connolly [Sun, 16 Oct 2022 18:03:26 +0000 (19:03 +0100)]
arm64: dts: qcom: sdm845-oneplus: enable rradc
Enable the RRADC for the OnePlus 6.
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221016180330.1912214-3-caleb.connolly@linaro.org
Caleb Connolly [Sun, 16 Oct 2022 18:03:25 +0000 (19:03 +0100)]
arm64: dts: qcom: pmi8998: add rradc node
Add a DT node for the Round Robin ADC found in the PMI8998 PMIC.
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221016180330.1912214-2-caleb.connolly@linaro.org
Dzmitry Sankouski [Wed, 12 Oct 2022 18:54:11 +0000 (21:54 +0300)]
arm64: dts: qcom: starqltechn: add initial device tree for starqltechn
New device support - Samsung S9 (SM-G9600) phone
What works:
- simple framebuffer
- storage (both main and sdcard)
- ramoops
Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221012185411.1282838-3-dsankouski@gmail.com
Dzmitry Sankouski [Wed, 12 Oct 2022 18:54:10 +0000 (21:54 +0300)]
dt-bindings: arm: add samsung,starqltechn board based on sdm845 chip
Add samsung,starqltechn board (Samsung Galaxy S9) binding.
Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221012185411.1282838-2-dsankouski@gmail.com
Krzysztof Kozlowski [Tue, 27 Sep 2022 15:34:21 +0000 (17:34 +0200)]
arm64: dts: qcom: sm8250: align LPASS pin configuration with DT schema
DT schema expects LPASS pin configuration nodes to be named with
'-state' suffix and their optional children with '-pins' suffix.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220927153429.55365-5-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Tue, 27 Sep 2022 15:34:20 +0000 (17:34 +0200)]
arm64: dts: qcom: sm8250: correct LPASS pin pull down
The pull-down property is actually bias-pull-down.
Fixes:
3160c1b894d9 ("arm64: dts: qcom: sm8250: add lpass lpi pin controller node")
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220927153429.55365-4-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Tue, 27 Sep 2022 15:34:19 +0000 (17:34 +0200)]
arm64: dts: qcom: sc7280: align LPASS pin configuration with DT schema
DT schema expects LPASS pin configuration nodes to be named with
'-state' suffix and their optional children with '-pins' suffix.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220927153429.55365-3-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Tue, 27 Sep 2022 15:34:18 +0000 (17:34 +0200)]
arm64: dts: qcom: sc7280: drop clock-cells from LPASS TLMM
The LPASS pin-controller is not a clock provider:
qcom/sc7280-herobrine-herobrine-r1.dtb: pinctrl@33c0000: '#clock-cells' does not match any of the regexes: '-state$', 'pinctrl-[0-9]+'
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220927153429.55365-2-krzysztof.kozlowski@linaro.org
Marijn Suijten [Mon, 26 Sep 2022 19:01:48 +0000 (21:01 +0200)]
arm64: dts: qcom: sm6125-seine: Configure additional trinket thermistors
In addition to PMIC-specific (pm6125) thermistors downstream extends
this set with the rf-pa0/rf-pa1, quiet, camera-flash and UFS/eMMC
thermistors in sm6125 (trinket) board and seine-specific DT files. All
thermistors report sensible temperature readings in userspace.
The sensors are also added to their respective Thermal Monitor node,
with thermal zones to match where applicable: emmc-ufs and camera-flash
are not available on the TM5 block, hence cannot be configured with a
tripping point and will not have a thermal zone.
Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220926190148.283805-6-marijn.suijten@somainline.org
Marijn Suijten [Mon, 26 Sep 2022 19:01:47 +0000 (21:01 +0200)]
arm64: dts: qcom: sm6125-seine: Include PM6125 and configure PON
The Sony Xperia Seine board uses the PM6125; include it and configure
the PON buttons that provide the power and volume-up key.
Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220926190148.283805-5-marijn.suijten@somainline.org
Marijn Suijten [Mon, 26 Sep 2022 19:01:46 +0000 (21:01 +0200)]
arm64: dts: qcom: Add PM6125 PMIC
This PMIC is commonly used on boards with an SM6125 SoC and looks very
similar in layout to the PM6150.
Downstream declares more nodes to be available, but these have been
omitted from this patch: the pwm/lpg block is unused on my reference
device making it impossible to test/validate, and the spmi-clkdiv does
not have a single device-tree binding using this driver yet, hence
inclusion is better postponed until ie. audio which uses these clocks is
brought up.
Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220926190148.283805-4-marijn.suijten@somainline.org
Marijn Suijten [Mon, 26 Sep 2022 19:01:45 +0000 (21:01 +0200)]
arm64: dts: qcom: pm660: Use unique ADC5_VCOIN address in node name
The register address in the node name is shadowing vph_pwr@83, whereas
the ADC5_VCOIN register resolves to 0x85. Fix this copy-paste
discrepancy.
Fixes:
4bf097540506 ("arm64: dts: qcom: pm660: Add VADC and temp alarm nodes")
Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220926190148.283805-3-marijn.suijten@somainline.org
Marijn Suijten [Mon, 26 Sep 2022 19:01:44 +0000 (21:01 +0200)]
dt-bindings: mfd: qcom-spmi-pmic: Add pm6125 compatible
Document support for the pm6125, typically paired with the sm6125 SoC.
Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220926190148.283805-2-marijn.suijten@somainline.org
Dmitry Baryshkov [Sat, 24 Sep 2022 09:43:47 +0000 (12:43 +0300)]
arm64: dts: qcom: msm8996: change HDMI PHY node name to generic one
Change HDMI PHY node name from custom 'hdmi-phy' to the generic 'phy'.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220924094347.178666-3-dmitry.baryshkov@linaro.org
Krzysztof Kozlowski [Sun, 18 Sep 2022 09:54:30 +0000 (10:54 +0100)]
dt-bindings: arm: qcom: document Google Cheza
Document Google Cheza board compatibles recently added.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220918095430.18068-1-krzysztof.kozlowski@linaro.org
Iskren Chernev [Mon, 19 Sep 2022 18:06:18 +0000 (21:06 +0300)]
arm64: dts: qcom: sm4250: Add support for oneplus-billie2
Add initial support for OnePlus Nord N100, based on SM4250. Currently
working:
- boots
- usb
- built-in flash storage (UFS)
- SD card reader
Signed-off-by: Iskren Chernev <iskren.chernev@gmail.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220919180618.1840194-9-iskren.chernev@gmail.com
Iskren Chernev [Mon, 19 Sep 2022 18:06:17 +0000 (21:06 +0300)]
arm64: dts: qcom: sm4250: Add soc dtsi
The SM4250 is a downclocked version of the SM6115.
Signed-off-by: Iskren Chernev <iskren.chernev@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220919180618.1840194-8-iskren.chernev@gmail.com
Iskren Chernev [Mon, 19 Sep 2022 18:06:16 +0000 (21:06 +0300)]
arm64: dts: qcom: sm6115: Add basic soc dtsi
Add support for Qualcomm SM6115 SoC. This includes:
- GCC
- Pinctrl
- RPM (CC+PD)
- USB
- MMC
- UFS
Signed-off-by: Iskren Chernev <iskren.chernev@gmail.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220919180618.1840194-7-iskren.chernev@gmail.com
Iskren Chernev [Mon, 19 Sep 2022 18:06:13 +0000 (21:06 +0300)]
dt-bindings: arm: qcom: Add compatible for oneplus,billie2 phone
oneplus,billie2 (OnePlus Nord N100) is based on QualComm Snapdragon
SM4250 SoC.
Add support for the same in dt-bindings.
Signed-off-by: Iskren Chernev <iskren.chernev@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Caleb Connolly <caleb@connolly.tech>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220919180618.1840194-4-iskren.chernev@gmail.com
Johan Hovold [Mon, 24 Oct 2022 12:58:43 +0000 (14:58 +0200)]
arm64: dts: qcom: sc8280xp: add TCSR node
Add the TCSR node which is needed for PCIe configuration.
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221024125843.25261-1-johan+linaro@kernel.org
Nikita Travkin [Thu, 20 Oct 2022 11:56:08 +0000 (11:56 +0000)]
arm64: dts: qcom: msm8916-samsung-a2015: Add vibrator
Both a2015 devices use motor drivers controlled with PWM signal.
A5 additionally has a fixed regulator that powers the driver and is
controlled by enable signal. A3 routes that enable signal to the
motor driver itself.
To simplify the description, add the motor to the common dtsi and
assume a regulator is used for both.
Signed-off-by: Nikita Travkin <nikita@trvn.ru>
[Rename the nodes to be reusable in msm8916-sansung-e2015]
Signed-off-by: Lin, Meng-Bo <linmengbo0689@protonmail.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221020115255.2026-1-linmengbo0689@protonmail.com
Bryan O'Donoghue [Tue, 28 Jun 2022 12:04:35 +0000 (13:04 +0100)]
arm64: dts: qcom: msm8916: Fix lpass compat string to match yaml
The documented yaml compat string for the apq8016 is
"qcom,apq8016-lpass-cpu" not "qcom,lpass-cpu-apq8016". Looking at the other
lpass compat strings the general form is "qcom,socnum-lpass-cpu".
We need to fix both the driver and dts to match.
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220628120435.3044939-3-bryan.odonoghue@linaro.org
Vladimir Lypak [Sun, 16 Oct 2022 16:15:53 +0000 (18:15 +0200)]
arm64: dts: qcom: msm8953: add MDSS
Add the MDSS, MDP and DSI nodes that are found on msm8953 SoC.
Signed-off-by: Vladimir Lypak <vladimir.lypak@gmail.com>
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221016161554.673006-4-luca@z3ntu.xyz
Vladimir Lypak [Sun, 16 Oct 2022 16:15:52 +0000 (18:15 +0200)]
arm64: dts: qcom: msm8953: add APPS IOMMU
Add the nodes describing the iommu and its context banks that are found
on msm8953 SoCs.
Signed-off-by: Vladimir Lypak <vladimir.lypak@gmail.com>
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221016161554.673006-3-luca@z3ntu.xyz
Caleb Connolly [Sun, 16 Oct 2022 17:29:43 +0000 (18:29 +0100)]
arm64: dts: qcom: sdm845-*: fix uart6 aliases
Some devices have been using hsuart0 as an alias for the bluetooth UART,
rename this to serial1
Signed-off-by: Caleb Connolly <caleb@connolly.tech>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221016172944.1892206-4-kc@postmarketos.org
Dylan Van Assche [Sun, 16 Oct 2022 17:29:42 +0000 (18:29 +0100)]
arm64: dts: qcom: sdm845-shift-axolotl: fix Bluetooth
Add serial1 alias, firmware name and use 4 pin UART pinmux.
Signed-off-by: Dylan Van Assche <me@dylanvanassche.be>
Signed-off-by: Caleb Connolly <caleb@connolly.tech>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221016172944.1892206-3-kc@postmarketos.org
Caleb Connolly [Sun, 16 Oct 2022 17:29:41 +0000 (18:29 +0100)]
arm64: dts: qcom: sdm845: commonize bluetooth UART pinmux
The 4-pin configuration for UART6 is used for all or almost all SDM845
devices with built in Bluetooth. Move the pinmux configuration to
sdm845.dtsi in preparation to be removed from individual devices in
future patches.
Suggested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Caleb Connolly <caleb@connolly.tech>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221016172944.1892206-2-kc@postmarketos.org
Luca Weiss [Sun, 16 Oct 2022 09:00:31 +0000 (11:00 +0200)]
arm64: dts: qcom: sc7280: Fix cpufreq-epss compatible
The bindings require a SoC-specific compatible to be used next to
qcom,cpufreq-epss. Add it to make dtbs_check happy.
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221016090035.565350-2-luca@z3ntu.xyz
Krzysztof Kozlowski [Thu, 13 Oct 2022 21:06:11 +0000 (17:06 -0400)]
arm64: dts: qcom: msm8998: align TLMM pin configuration with DT schema
DT schema expects TLMM pin configuration nodes to be named with
'-state' suffix and their optional children with '-pins' suffix.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221013210612.95994-3-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Thu, 13 Oct 2022 21:06:10 +0000 (17:06 -0400)]
arm64: dts: qcom: msm8998-oneplus-cheeseburger: fix backlight pin function
There is no "normal" function, so use "gpio" for backlight button pin
configuration.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221013210612.95994-2-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Thu, 13 Oct 2022 21:06:09 +0000 (17:06 -0400)]
arm64: dts: qcom: msm8998: add gpio-ranges to TLMM
Qualcomm pinctrl bindings and drivers expect gpio-ranges property.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221013210612.95994-1-krzysztof.kozlowski@linaro.org
Luca Weiss [Wed, 12 Oct 2022 21:56:13 +0000 (23:56 +0200)]
arm64: dts: qcom: msm8996: remove bogus ufs_variant node
This ufs_variant node seems to be a remnant from downstream devicetree.
As it doesn't seem to be used by anything upstream, remove it from the
dtsi.
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221012215613.32054-1-luca@z3ntu.xyz
Krzysztof Kozlowski [Tue, 11 Oct 2022 19:02:30 +0000 (15:02 -0400)]
arm64: dts: qcom: sdm630: align TLMM pin configuration with DT schema
DT schema expects TLMM pin configuration nodes to be named with
'-state' suffix and their optional children with '-pins' suffix. All
nodes for GPIOs must also define the function property.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221011190231.76784-3-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Tue, 11 Oct 2022 19:02:29 +0000 (15:02 -0400)]
arm64: dts: qcom: sdm630: correct I2C8 pin functions
The I2C8 pins are split into i2c8_a (GPIO30 and GPIO31) and i2c8_b
(GPIO44 and GPIO52). Correct the name of function for I2C8 pins.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221011190231.76784-2-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Tue, 11 Oct 2022 19:02:28 +0000 (15:02 -0400)]
arm64: dts: qcom: sdm630: add UART pin functions
Configure UART1 and UART2 pins to respective functions in default state,
otherwise the pins might stay as GPIOs.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221011190231.76784-1-krzysztof.kozlowski@linaro.org
Dmitry Torokhov [Thu, 29 Sep 2022 01:15:56 +0000 (18:15 -0700)]
arm64: dts: qcom: msm8916-samsung-a2015: fix polarity of "enable" line of NFC chip
According to s3fwrn5 driver code the "enable" GPIO line is driven "high"
when chip is not in use (mode is S3FWRN5_MODE_COLD), and is driven "low"
when chip is in use.
s3fwrn5_phy_power_ctrl():
...
gpio_set_value(phy->gpio_en, 1);
...
if (mode != S3FWRN5_MODE_COLD) {
msleep(S3FWRN5_EN_WAIT_TIME);
gpio_set_value(phy->gpio_en, 0);
msleep(S3FWRN5_EN_WAIT_TIME);
}
Therefore the line described by "en-gpios" property should be annotated
as "active low".
The wakeup gpio appears to have correct polarity (active high).
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220929011557.4165216-2-dmitry.torokhov@gmail.com
Krzysztof Kozlowski [Wed, 28 Sep 2022 15:25:01 +0000 (17:25 +0200)]
dt-bindings: qcom: document preferred compatible naming
Compatibles can come in two formats. Either "vendor,ip-soc" or
"vendor,soc-ip". Qualcomm bindings were mixing both of usages, so add a
DT schema file documenting preferred policy and enforcing it for all new
compatibles, except few existing patterns.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220928152501.490840-1-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Wed, 28 Sep 2022 15:20:24 +0000 (17:20 +0200)]
arm64: dts: qcom: msm8996: align node names with DT schema
New slimbus DT schema expect only SLIMbus bus nodes to be named
"slimbus". In case of Qualcomm SLIMbus NGD, the bus node is what was
called "ngd".
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220928152027.489543-9-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Wed, 28 Sep 2022 15:20:23 +0000 (17:20 +0200)]
arm64: dts: qcom: sdm845: align node names with DT schema
New slimbus DT schema expect only SLIMbus bus nodes to be named
"slimbus". In case of Qualcomm SLIMbus NGD, the bus node is what was
called "ngd".
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Tested-by: Steev Klimaszewski <steev@kali.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220928152027.489543-8-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Wed, 28 Sep 2022 15:20:22 +0000 (17:20 +0200)]
arm64: dts: qcom: msm8996: drop unused slimbus dmas
Bindings document only two DMA channels. Linux driver also does not use
remaining rx2/tx2.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220928152027.489543-7-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Wed, 28 Sep 2022 15:20:21 +0000 (17:20 +0200)]
arm64: dts: qcom: sdm845: drop unused slimbus dmas
Bindings document only two DMA channels. Linux driver also does not use
remaining rx2/tx2.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Tested-by: Steev Klimaszewski <steev@kali.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220928152027.489543-6-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Wed, 28 Sep 2022 15:20:20 +0000 (17:20 +0200)]
arm64: dts: qcom: mms8996: correct slimbus children unit addresses
Correct slimbus address/size cells to match bindings.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220928152027.489543-5-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Wed, 28 Sep 2022 15:20:19 +0000 (17:20 +0200)]
arm64: dts: qcom: sdm845: correct slimbus children unit addresses
slimbus uses address-cells=2, so correct children unit addresses.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Tested-by: Steev Klimaszewski <steev@kali.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220928152027.489543-4-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Wed, 28 Sep 2022 15:20:18 +0000 (17:20 +0200)]
arm64: dts: qcom: msm8996: drop unused slimbus reg-mames
Drop undocumented reg-names from slimbus node - there is only one
address range and Linux implementation does not use it.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220928152027.489543-3-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Wed, 28 Sep 2022 15:20:17 +0000 (17:20 +0200)]
arm64: dts: qcom: sdm845: drop unused slimbus properties
Drop properties from slimbus node: unneeded status and
downstream-related qcom,apps-ch-pipes/qcom,ea-pc (not documented, not
used).
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Tested-by: Steev Klimaszewski <steev@kali.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220928152027.489543-2-krzysztof.kozlowski@linaro.org
Robert Marko [Tue, 27 Sep 2022 20:14:15 +0000 (22:14 +0200)]
arm64: dts: qcom: cp01-c1: use "okay" instead of "ok"
Use "okay" instead of "ok" in USB nodes as "ok" is deprecated.
Signed-off-by: Robert Marko <robimarko@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220927201415.1265191-2-robimarko@gmail.com
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