platform/kernel/u-boot.git
12 years agoam335x evm: Enable support for spi0
Tom Rini [Wed, 8 Aug 2012 21:35:55 +0000 (14:35 -0700)]
am335x evm: Enable support for spi0

Signed-off-by: Tom Rini <trini@ti.com>
12 years agoam33xx: Add support, update omap3 McSPI driver
Tom Rini [Wed, 8 Aug 2012 21:29:51 +0000 (14:29 -0700)]
am33xx: Add support, update omap3 McSPI driver

Signed-off-by: Tom Rini <trini@ti.com>
12 years agoam335x evm: Enable MMC1 pinmux
Tom Rini [Wed, 8 Aug 2012 17:32:09 +0000 (10:32 -0700)]
am335x evm: Enable MMC1 pinmux

MMC1 is available in profile 2 on the GP EVM and is exposed on the
expansion header on beaglebone.

Signed-off-by: Tom Rini <trini@ti.com>
12 years agoam33xx: Correct MMC1, remove MMC2 support
Tom Rini [Wed, 8 Aug 2012 17:31:08 +0000 (10:31 -0700)]
am33xx: Correct MMC1, remove MMC2 support

- Correct the MMC1 base offset
- Remove MMC2 (that area is reserved and not MMC2).
- Add the real BOOT_DEVICE_MMC2 value

Signed-off-by: Tom Rini <trini@ti.com>
12 years agoam335x evm: Initial support for AM335x GP EVM Profiles
Tom Rini [Wed, 8 Aug 2012 16:03:07 +0000 (09:03 -0700)]
am335x evm: Initial support for AM335x GP EVM Profiles

The AM335x GP EVM can have one of 8 different profiles selected.  Each
profile has a different set of peripherals and requires different pinmux
configurations that conflict with other profiles.  i2c1 is an example of
a conflicted mux currently.

Signed-off-by: Tom Rini <trini@ti.com>
12 years agosc_sps_1: Adjust board config to use 'mxs' SoC code
Otavio Salvador [Thu, 9 Aug 2012 04:12:44 +0000 (04:12 +0000)]
sc_sps_1: Adjust board config to use 'mxs' SoC code

Fix build failure due the move of mx28 code to 'mxs' SoC.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Acked-by: Stefano Babic <sbabic@denx.de>
12 years agortc: imxdi: Initial support
Benoît Thébaudeau [Wed, 8 Aug 2012 04:52:47 +0000 (04:52 +0000)]
rtc: imxdi: Initial support

Add support for Freescale's i.MX DryIce RTC, present on i.MX25.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
12 years agoMX28: Add SchulerControl SC_SPS_1 platform
Marek Vasut [Tue, 7 Aug 2012 00:01:52 +0000 (00:01 +0000)]
MX28: Add SchulerControl SC_SPS_1 platform

This i.MX28 platform supports the following:
* 2x FEC ethernet
* USB on USBH0
* I2C EEPROM
* SPI NVRAM
* LEDs

Signed-off-by: Marek Vasut <marex@denx.de>
12 years agoi.MX28: bug fixes in PMU configuration code
Stathis Voukelatos [Tue, 7 Aug 2012 14:56:14 +0000 (15:56 +0100)]
i.MX28: bug fixes in PMU configuration code

Signed-off-by: Stathis Voukelatos <stathis.voukelatos@linn.co.uk>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
12 years agoMX28: Move the u-boot.bd info CPUDIR/SOCDIR
Marek Vasut [Sun, 5 Aug 2012 00:36:16 +0000 (00:36 +0000)]
MX28: Move the u-boot.bd info CPUDIR/SOCDIR

This gets us rid of duplication of the same file.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
12 years agovision2: do not overwrite the console
Fabio Estevam [Sun, 5 Aug 2012 07:31:34 +0000 (07:31 +0000)]
vision2: do not overwrite the console

On this board, the console is always set to the serial line.
Do not allow to overwrite it when video is enabled.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
12 years agomx51evk: do not overwrite the console
Fabio Estevam [Sun, 5 Aug 2012 07:31:33 +0000 (07:31 +0000)]
mx51evk: do not overwrite the console

On this board, the console is always set to the serial line.
Do not allow to overwrite it when video is enabled.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
12 years agoMX5: mx53loco: do not overwrite the console
Stefano Babic [Sun, 5 Aug 2012 00:18:53 +0000 (00:18 +0000)]
MX5: mx53loco: do not overwrite the console

On this board, the console is always set to the serial line.
Do not allow to overwrite it when video is enabled.

Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Fabio Estevam <fabio.estevam@freescale.com>
Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
12 years agoMX28: Fix MXS MMC DMA issues
Marek Vasut [Fri, 6 Jul 2012 21:25:57 +0000 (21:25 +0000)]
MX28: Fix MXS MMC DMA issues

The DMA didn't work properly because the DMA descriptor wasn't
properly cleaned after it was used once. Also, the DMA_ENABLE bit
was enabled/disabled too late.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <festevam@freescale.com>
Cc: Andy Fleming <afleming@freescale.com>
12 years agoMX28: Transfer small blocks via PIO in MXS MMC
Marek Vasut [Fri, 6 Jul 2012 21:25:56 +0000 (21:25 +0000)]
MX28: Transfer small blocks via PIO in MXS MMC

Large blocks (> 512b) shall be transfered via DMA to make
things a bit faster.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <festevam@freescale.com>
Cc: Andy Fleming <afleming@freescale.com>
12 years agoMX28: Split out the PIO and DMA transfer functions
Marek Vasut [Fri, 6 Jul 2012 21:25:55 +0000 (21:25 +0000)]
MX28: Split out the PIO and DMA transfer functions

Move DMA and PIO data transfer parts into separate functions.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <festevam@freescale.com>
Cc: Andy Fleming <afleming@freescale.com>
12 years agoMX28: Fix up the MMC driver DMA mode
Marek Vasut [Fri, 6 Jul 2012 21:25:54 +0000 (21:25 +0000)]
MX28: Fix up the MMC driver DMA mode

The DMA mode didn't properly configure the DMA_ENABLE bit in CTRL1.
Also, it was using SSP0 DMA channel for all SSP devices.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <festevam@freescale.com>
Cc: Andy Fleming <afleming@freescale.com>
12 years agomxs: rename mx28.c to mxs.c as it is common to i.MX233 and i.MX28 SoCs
Otavio Salvador [Sun, 5 Aug 2012 09:05:34 +0000 (09:05 +0000)]
mxs: rename mx28.c to mxs.c as it is common to i.MX233 and i.MX28 SoCs

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
12 years agomxs: Clarify why we poweroff in case of brownout in 5v conflict
Otavio Salvador [Sun, 5 Aug 2012 09:05:33 +0000 (09:05 +0000)]
mxs: Clarify why we poweroff in case of brownout in 5v conflict

If VDDIO has a brownout, then the VDD5V_GT_VDDIO becomes unreliable
but this wasn't clear on code so a comment has been added to clarify
it.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
12 years agomxs: Reowork SPL to use 'mxs' prefix for methods
Otavio Salvador [Sun, 5 Aug 2012 09:05:32 +0000 (09:05 +0000)]
mxs: Reowork SPL to use 'mxs' prefix for methods

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
12 years agomxs: prefix register structs with 'mxs' prefix
Otavio Salvador [Sun, 5 Aug 2012 09:05:31 +0000 (09:05 +0000)]
mxs: prefix register structs with 'mxs' prefix

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
12 years agomxs: prefix register acessor macros with 'mxs' prefix
Otavio Salvador [Sun, 5 Aug 2012 09:05:30 +0000 (09:05 +0000)]
mxs: prefix register acessor macros with 'mxs' prefix

As the register accessing mode is the same for all i.MXS SoCs we ought
to use 'mxs' prefix intead of 'mx28'.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
12 years agomxs: reorganize source directory for easy sharing of code in i.MXS SoCs
Otavio Salvador [Sun, 5 Aug 2012 09:05:29 +0000 (09:05 +0000)]
mxs: reorganize source directory for easy sharing of code in i.MXS SoCs

Most code can be shared between i.MX23 and i.MX28 as both are from
i.MXS family; this source directory structure makes easy to share code
among them.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Acked-by: Stefano Babic <sbabic@denx.de>
12 years agomx28evk: Turn on caches
Fabio Estevam [Tue, 31 Jul 2012 08:10:06 +0000 (08:10 +0000)]
mx28evk: Turn on caches

Turn on data and instruction caches.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
12 years agoMX28: use a clear name for DDR2 initialization
Otavio Salvador [Sat, 28 Jul 2012 11:44:20 +0000 (11:44 +0000)]
MX28: use a clear name for DDR2 initialization

The mx28 prefix has been added to the initialization data and function
so it is clear by which SoC it is used as i.MX233 will have a specific
one. While on that, we also change it to static.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Acked-by: Marek Vasut <marex@denx.de>
12 years agoAdd support for Bluegiga APX4 Development Kit
Veli-Pekka Peltola [Mon, 9 Jul 2012 03:14:50 +0000 (03:14 +0000)]
Add support for Bluegiga APX4 Development Kit

This adds support for Bluegiga APX4 Development Kit. It is built around
Freescale i.MX28. Currently supported features are: ethernet, I2C, MMC,
RTC and USB. APX4 has only one ethernet port.

Signed-off-by: Veli-Pekka Peltola <veli-pekka.peltola@bluegiga.com>
Signed-off-by: Lauri Hintsala <lauri.hintsala@bluegiga.com>
Cc: Stefano Babic <sbabic@denx.de>
12 years agoMX28: extend print_cpuinfo() to use chip information
Otavio Salvador [Sat, 28 Jul 2012 11:43:47 +0000 (11:43 +0000)]
MX28: extend print_cpuinfo() to use chip information

The information now is gathered from HW_DIGCTL_CHIPID register and
includes the chip modem and revision on the output.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
12 years agoMX28: SPI: Add DMA transfer support
Marek Vasut [Mon, 9 Jul 2012 00:48:33 +0000 (00:48 +0000)]
MX28: SPI: Add DMA transfer support

The DMA transfers happen only if the transfered data are larger
than 512 bytes. Otherwise PIO is used. This is a small speed
optimization.

The DMA transfer doesn't work if unaligned transfer is requested
due to the limitation of the DMA controller. This has to be fixed
by introducing generic bounce buffer. Therefore the DMA feature
is now disabled by default.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
12 years agoMX28: SPI: Pull out the PIO transfer function
Marek Vasut [Mon, 9 Jul 2012 00:48:32 +0000 (00:48 +0000)]
MX28: SPI: Pull out the PIO transfer function

Pull out all the PIO transfer logic into separate function,
so DMA can be added.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
12 years agoMX28: SPI: Refactor spi_xfer a bit
Marek Vasut [Mon, 9 Jul 2012 00:48:31 +0000 (00:48 +0000)]
MX28: SPI: Refactor spi_xfer a bit

This makes it easier to adapt for addition of DMA support.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
12 years agoimx: Use a clear identification of an unidentified CPU type
Otavio Salvador [Sat, 30 Jun 2012 05:07:32 +0000 (05:07 +0000)]
imx: Use a clear identification of an unidentified CPU type

In case an unidentified CPU type is detected it now returns
i.MX??, in a const char.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
12 years agoat91: Add support for taskit AT91SAM9G20 boards.
Markus Hubig [Tue, 7 Aug 2012 15:43:23 +0000 (17:43 +0200)]
at91: Add support for taskit AT91SAM9G20 boards.

This adds support for the AT91SAM9G20 boards by taskit GmbH.
Both boards, Stamp9G20 and PortuxG20, are integrated in one
file. PortuxG20 is basically a SBC built around the Stamp9G20.

Signed-off-by: Markus Hubig <mhubig@imko.de>
Cc: Andreas Bießmann <andreas.devel@googlemail.com>
Signed-off-by: Andreas Bießmann <andreas.deve@googlemail.com>
12 years agoEnable the EMAC clock in at91_macb_hw_init().
Markus Hubig [Tue, 7 Aug 2012 15:43:22 +0000 (17:43 +0200)]
Enable the EMAC clock in at91_macb_hw_init().

Signed-off-by: Markus Hubig <mhubig@imko.de>
Cc: Andreas Bießmann <andreas.devel@googlemail.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
12 years agoMAINTAINERS: fix Andreas Bießmann AVR32 entry
Andreas Bießmann [Tue, 7 Aug 2012 15:43:21 +0000 (17:43 +0200)]
MAINTAINERS: fix Andreas Bießmann AVR32 entry

The grasshopper board is a avr32 based device and belongs therefore to the avr32
section.

Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
12 years agoMAINTAINERS: fix entry of Ilko Iliev
Andreas Bießmann [Tue, 7 Aug 2012 15:43:20 +0000 (17:43 +0200)]
MAINTAINERS: fix entry of Ilko Iliev

These boards have ARM cores, move to the ARM section.

Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
12 years agoarm : Atmel : add at91sam9x5ek board support
Bo Shen [Thu, 5 Jul 2012 17:21:46 +0000 (17:21 +0000)]
arm : Atmel : add at91sam9x5ek board support

Add at91sam9x5ek board support, this board support the following SoCs
  AT91SAM9G15, AT91SAM9G25, AT91SAM9G35, AT91SAM9X25, AT91SAM9X35

Using at91sam9x5ek_nandflash to configure for the board
Now only supports NAND with software ECC boot up

Signed-off-by: Bo Shen <voice.shen@atmel.com>
[move MAINTAINERS entry to right place]
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
12 years agodoc/git-mailrc: update at91 and avr32
Andreas Bießmann [Mon, 2 Jul 2012 04:51:39 +0000 (04:51 +0000)]
doc/git-mailrc: update at91 and avr32

Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
12 years agoam335x_evm: enable SMSC PHY driver
Ilya Yanok [Tue, 7 Aug 2012 00:50:08 +0000 (00:50 +0000)]
am335x_evm: enable SMSC PHY driver

Beaglebone uses SMSC PHY which works incorrectly with generic PHY
driver so enable SMSC PHY driver to fix networking problems on
Beaglebone.

Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
12 years agoOMAP3: fix DRAM size for IGEP-based boards.
Enric Balletbò i Serra [Sun, 5 Aug 2012 00:55:56 +0000 (00:55 +0000)]
OMAP3: fix DRAM size for IGEP-based boards.

The total RAM size of the IGEP-based boards is 512MiB not 1GiB, the
LPDDR memory consist on two dies of 256MiB.

Signed-off-by: Enric Balletbo i Serra <eballetbo@gmail.com>
Tested-by: Javier Martinez Canillas <javier@dowhile0.org>
12 years agoDaVinci DA8xx: fix set_cpu_clk_info()
Laurence Withers [Mon, 30 Jul 2012 23:30:37 +0000 (23:30 +0000)]
DaVinci DA8xx: fix set_cpu_clk_info()

For the DA8xx family of SoCs, the set_cpu_clk_info() function was not
initialising the DSP frequency, leading to 'bdinfo' command output such as:

  [...snip...]
  ARM frequency = 300 MHz
  DSP frequency = -536870913 MHz
  DDR frequency = 300 MHz

This commit provides a separate implementation of set_cpu_clk_info() for
the DA8xx SoCs that initialises the DSP frequency to zero (since
currently the DSP is not enabled by U-Boot on any DA8xx platform). The
separate implementation is justified because there is no common code
between DA8xx and the other SoC families. It is now much easier to
understand the flow of the two separate functions.

Signed-off-by: Laurence Withers <lwithers@guralp.com>
Cc: Tom Rini <trini@ti.com>
Cc: Hadli, Manjunath <manjunath.hadli@ti.com>
Cc: Heiko Schocher <hs@denx.de>
12 years agoDaVinci DA8xx: replace magic number for DDR speed
Laurence Withers [Mon, 30 Jul 2012 23:30:36 +0000 (23:30 +0000)]
DaVinci DA8xx: replace magic number for DDR speed

Replace a magic number for the DDR2/mDDR PHY clock ID with a proper
definition. In addition, don't request this clock ID on DA830 hardware,
which does not have a DDR2/mDDR PHY (or associated PLL controller).

Signed-off-by: Laurence Withers <lwithers@guralp.com>
Cc: Tom Rini <trini@ti.com>
Cc: Prabhakar Lad <prabhakar.csengg@gmail.com>
12 years agoDaVinci DA850: UART2 clock ID comes from ASYNC3
Laurence Withers [Mon, 30 Jul 2012 23:30:35 +0000 (23:30 +0000)]
DaVinci DA850: UART2 clock ID comes from ASYNC3

On the DA830, UART2's clock is derived from PLL controller 0 output 2.
On the DA850, it is in the ASYNC3 group, and may be switched between PLL
controller 0 or 1. Fix the definition of the ID to match.

Signed-off-by: Laurence Withers <lwithers@guralp.com>
Cc: Tom Rini <trini@ti.com>
Cc: Prabhakar Lad <prabhakar.csengg@gmail.com>
12 years agoDaVinci DA8xx: tidy up clock ID definition
Laurence Withers [Mon, 30 Jul 2012 23:30:34 +0000 (23:30 +0000)]
DaVinci DA8xx: tidy up clock ID definition

Tidy up the clock IDs defined for the DA8xx SOCs. With this new structure in
place, it is clear how to define new clock IDs, and how these map to the
numbers presented in the technical reference manual.

Signed-off-by: Laurence Withers <lwithers@guralp.com>
Cc: Tom Rini <trini@ti.com>
Cc: Prabhakar Lad <prabhakar.csengg@gmail.com>
Signed-off-by: Tom Rini <trini@ti.com>
12 years agodoc/git-mailrc: Update 'ti' alias
Tom Rini [Wed, 1 Aug 2012 12:30:40 +0000 (12:30 +0000)]
doc/git-mailrc: Update 'ti' alias

Remove Sandeep, thanks for all the hard work!

Signed-off-by: Tom Rini <trini@ti.com>
12 years agodm: Move OMAP GPIO driver to drivers/gpio/
Marek Vasut [Sat, 21 Jul 2012 05:02:23 +0000 (05:02 +0000)]
dm: Move OMAP GPIO driver to drivers/gpio/

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: U-Boot DM <u-boot-dm@lists.denx.de>
Cc: Tom Rini <trini@ti.com>
Acked-by: Tom Rini <trini@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
12 years agodm: Select CONFIG_SPL_GPIO_SUPPORT on OMAP
Marek Vasut [Sat, 21 Jul 2012 05:02:27 +0000 (05:02 +0000)]
dm: Select CONFIG_SPL_GPIO_SUPPORT on OMAP

This fixes the breakage with SPL on most OMAP boards after the GPIO
driver was moved.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: U-Boot DM <u-boot-dm@lists.denx.de>
Cc: Tom Rini <trini@ti.com>
Acked-by: Tom Rini <trini@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
12 years agoam33xx: Rework pinmux functions
Tom Rini [Tue, 31 Jul 2012 17:50:01 +0000 (10:50 -0700)]
am33xx: Rework pinmux functions

- Move definition of the EEPROM contents to <asm/arch/sys_proto.h>
  - Make some defines a little less generic now.
- Pinmux must be done by done by SPL now.
- Create 3 pinmux functions, uart0, i2c0 and board.
- Add pinmux specific to Starter Kit EVM for MMC now.

Signed-off-by: Tom Rini <trini@ti.com>
12 years agoam33xx evm: Add CONFIG_CMD_EEPROM and related
Tom Rini [Tue, 31 Jul 2012 16:37:08 +0000 (09:37 -0700)]
am33xx evm: Add CONFIG_CMD_EEPROM and related

am33xx boards have at least one eeprom and in the case of beaglebones
with capes, more.

Signed-off-by: Tom Rini <trini@ti.com>
12 years agoam33xx: Add support for TI AM335x StarterKit EVM
Tom Rini [Tue, 31 Jul 2012 15:55:01 +0000 (08:55 -0700)]
am33xx: Add support for TI AM335x StarterKit EVM

- Board requires gpio0 #7 to be set to power DDR3.
- Board uses DDR3, add a way to determine which DDR type to call
  config_ddr with.
- Both of the above require filling in the header structure early, move
  it into the data section.

Signed-off-by: Tom Rini <trini@ti.com>
12 years agoam33xx: Remove board/ti/am335x/evm.c
Tom Rini [Mon, 30 Jul 2012 23:13:10 +0000 (16:13 -0700)]
am33xx: Remove board/ti/am335x/evm.c

The intention has always been (and boards are to support) an i2c EEPROM
that will identify what hardware they are, allowing a single binary to
support multiple boards.  As such, remove the 'evm.c' file as there is
nothing EVM centric in it currently, only SoC peripheral configuration.

Signed-off-by: Tom Rini <trini@ti.com>
12 years agoam33xx: Add DDR3 (Micron MT41J128M16JT-125) timings and support
Tom Rini [Mon, 30 Jul 2012 21:49:50 +0000 (14:49 -0700)]
am33xx: Add DDR3 (Micron MT41J128M16JT-125) timings and support

Signed-off-by: Tom Rini <trini@ti.com>
12 years agoam33xx: Rework config_ddr to make DDR3 support easier.
Tom Rini [Mon, 30 Jul 2012 21:13:56 +0000 (14:13 -0700)]
am33xx: Rework config_ddr to make DDR3 support easier.

In order to support DDR3 as well as DDR2, we need to perform the same
init sequence, but with different values.  So change config_ddr() to
toggle setting pointers/etc for what DDR2 wants, and then calling.

Signed-off-by: Tom Rini <trini@ti.com>
12 years agoam33xx: Move some variables in emif4.c, mark them static.
Tom Rini [Mon, 30 Jul 2012 21:13:16 +0000 (14:13 -0700)]
am33xx: Move some variables in emif4.c, mark them static.

We need vtpreg and ddrctrl but no longer need a second ddrregs.

Signed-off-by: Tom Rini <trini@ti.com>
12 years agoam33xx: Correct and clean up ddr_regs struct
Tom Rini [Mon, 30 Jul 2012 18:49:47 +0000 (11:49 -0700)]
am33xx: Correct and clean up ddr_regs struct

The ddr_regs struct was incorrectly offset after the dt0wiratio0 entry.
Correct this by documenting a missing register that will be used at some
point in the future (when write leveling is supported).  Further, the
cmdNcs{force,delay} fields are undocumented and we have been setting
them to zero, remove.  Next, setting of the
'DATAn_REG_PHY_USE_RANK0_DELAYS field belongs with the rest of the
ddr_data entries, so program it there.  Finally, comment on how we are
configuring the DATA1 registers that correspond to the DATA0 (dt0)
registers defined in the struct.

Signed-off-by: Tom Rini <trini@ti.com>
12 years agoam33xx: Do not touch 'ratio1' fields
Tom Rini [Tue, 24 Jul 2012 23:49:58 +0000 (16:49 -0700)]
am33xx: Do not touch 'ratio1' fields

The various ratio1 fields are not documented in any of the documentation
I can find.  Removing these and testing has yielded success, so remove
the code that sets them and move their locations into the reserved
fields.

Signed-off-by: Tom Rini <trini@ti.com>
12 years agoam33xx: Rework config_io_ctrl slightly
Tom Rini [Tue, 24 Jul 2012 23:31:26 +0000 (16:31 -0700)]
am33xx: Rework config_io_ctrl slightly

This function sets a number of related registers to the same value (the
registers in question all have the same field descriptions and are
related in operation).  Rather than defining a struct and setting the
value repeatedly, just pass in the value.

Signed-off-by: Tom Rini <trini@ti.com>
12 years agoam33xx: Use emif_regs struct for storing initialization values
Tom Rini [Tue, 24 Jul 2012 21:55:38 +0000 (14:55 -0700)]
am33xx: Use emif_regs struct for storing initialization values

Rather than defining our own structs to note what to use when
programming the EMIF and related re-use the emif_regs struct.

Signed-off-by: Tom Rini <trini@ti.com>
12 years agoam33xx: Turn a number of 'int' functions to 'void'
Tom Rini [Tue, 24 Jul 2012 21:54:41 +0000 (14:54 -0700)]
am33xx: Turn a number of 'int' functions to 'void'

A number of memory initalization functions were int and always returned
0.  Further it's not feasible to be doing error checking here, so simply
turn them into void functions.

Signed-off-by: Tom Rini <trini@ti.com>
12 years agoam33xx: Document what we're doing with ddrctrl->ddrckectrl
Tom Rini [Tue, 24 Jul 2012 21:03:24 +0000 (14:03 -0700)]
am33xx: Document what we're doing with ddrctrl->ddrckectrl

- Remove the call to set ddrctrl->ddrioctrl as it's all zeros.
- Comment what we're really setting in ddrctrl->ddrckectrl which is that
  we're operating in the normal mode where EMIF/PHY clock is controlled
  by the PHY.

Signed-off-by: Tom Rini <trini@ti.com>
12 years agoam335x: ddr_defs: Update EMIF parameters
Vaibhav Bedia [Fri, 20 Apr 2012 07:58:16 +0000 (13:28 +0530)]
am335x: ddr_defs: Update EMIF parameters

EMIF parameters are calculated based on the AC timing
parameters from the SDRAM datasheet and the DDR frequency.

Current values for these paramters in AM335x U-Boot code,
though reliable, are not fully optimal. The most optimal
settings can be derived based on the guidelines published
at [1]. A pre-computed set of values with the most optimum
settings for AM335x EVM and BeagleBone can be found at [2].

[1] http://processors.wiki.ti.com/index.php/AM335x_EMIF_Configuration_tips
[2] http://processors.wiki.ti.com/index.php/OMAP_and_Sitara_CCS_support#AM335x

Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
12 years agoam33xx: Clean up unused DDR defines, prefix more with 'DDR2'
Tom Rini [Tue, 24 Jul 2012 20:05:10 +0000 (13:05 -0700)]
am33xx: Clean up unused DDR defines, prefix more with 'DDR2'

- Remove a handful of unused defines.
- Prefix more values with 'DDR2' as DDR3 will require different values.

Signed-off-by: Tom Rini <trini@ti.com>
12 years agoam33xx: Move the call to ddr_pll_config, make it take the frequency
Tom Rini [Tue, 3 Jul 2012 16:20:06 +0000 (09:20 -0700)]
am33xx: Move the call to ddr_pll_config, make it take the frequency

Depending on if we have DDR2 or DDR3 on the board we will need to call
ddr_pll_config with a different value.  This call can be delayed
slightly to the point where we know which type of memory we have.

Signed-off-by: Tom Rini <trini@ti.com>
12 years agoam33xx: Pass to config_ddr the type of memory that is connected
Tom Rini [Tue, 3 Jul 2012 15:51:34 +0000 (08:51 -0700)]
am33xx: Pass to config_ddr the type of memory that is connected

We need to pass in the type of memory that is connected to the board.
The only reliable way to do this is to know what type of board we are
running on (which later will be knowable in s_init()).  For now, pass in
the value of DDR2.

Signed-off-by: Tom Rini <trini@ti.com>
12 years agoam33xx: Make config_cmd_ctrl / config_ddr_data take const structs
Tom Rini [Tue, 3 Jul 2012 15:48:46 +0000 (08:48 -0700)]
am33xx: Make config_cmd_ctrl / config_ddr_data take const structs

Rework the EMIF4/DDR code slightly to setup the structs that
config_cmd_ctrl and config_ddr_data take to be setup at compile time and
mark them as const.  This lets us simplify the calling path slightly as
well as making it easier to deal with DDR3.

Signed-off-by: Tom Rini <trini@ti.com>
12 years agoam33xx: Rework DDR2 EMIF initalization slightly
Tom Rini [Thu, 26 Jul 2012 14:49:23 +0000 (07:49 -0700)]
am33xx: Rework DDR2 EMIF initalization slightly

With the previous bugfix we now don't need to set two different REF_CTRL
values and instead set the final value.

Signed-off-by: Tom Rini <trini@ti.com>
12 years agoam33xx: Bugfix to config_sdram()
Tom Rini [Thu, 26 Jul 2012 00:04:12 +0000 (17:04 -0700)]
am33xx: Bugfix to config_sdram()

When we change SDRAM_CONFIG this triggers a refresh based on all of the
parameters that we have programmed so we must do this last.

Signed-off-by: Tom Rini <trini@ti.com>
12 years agoam33xx: Remove extra check in enable_ddr_clocks
Tom Rini [Tue, 3 Jul 2012 15:45:31 +0000 (08:45 -0700)]
am33xx: Remove extra check in enable_ddr_clocks

We do not need to check for EMIF_GCLK and L3_GCLK being active.  This
was a hold-over from bringup and no longer required.

Signed-off-by: Tom Rini <trini@ti.com>
12 years agoam33xx: Convert to using <asm/emif.h> to describe the EMIF
Tom Rini [Tue, 29 May 2012 16:02:15 +0000 (09:02 -0700)]
am33xx: Convert to using <asm/emif.h> to describe the EMIF

Signed-off-by: Tom Rini <trini@ti.com>
12 years agoam33xx: Remove DMM_BASE define
Tom Rini [Tue, 12 Jun 2012 21:48:29 +0000 (14:48 -0700)]
am33xx: Remove DMM_BASE define

The am33xx does not have a DMM, so don't define the base.

Signed-off-by: Tom Rini <trini@ti.com>
12 years agoam335x_evm: Update config for common usage
Tom Rini [Tue, 12 Jun 2012 21:54:32 +0000 (14:54 -0700)]
am335x_evm: Update config for common usage

- Add default commands
- Add HUSH parser
- Make environment, malloc areas larger
- Add ATAGS and OF_LIBFDT
- Add defaults to boot ramdisk and MMC, use uEnv.txt

Signed-off-by: Tom Rini <trini@ti.com>
12 years agoam33xx: Enable gpio0 clock
Tom Rini [Tue, 31 Jul 2012 14:22:47 +0000 (07:22 -0700)]
am33xx: Enable gpio0 clock

Signed-off-by: Tom Rini <trini@ti.com>
12 years agoOMAP3: igep00x0: add SPL support for IGEP-based boards
Javier Martinez Canillas [Sat, 28 Jul 2012 01:19:34 +0000 (01:19 +0000)]
OMAP3: igep00x0: add SPL support for IGEP-based boards

This patch adds SPL support for IGEP-based boards.
Tested on an IGEPv2 Rev.C board with Micron NAND Flash memory.

Signed-off-by: Javier Martinez Canillas <javier@dowhile0.org>
12 years agoOMAP3: mem: Add Numonyx OneNAND 200MHz timing information
Javier Martinez Canillas [Sat, 28 Jul 2012 01:19:33 +0000 (01:19 +0000)]
OMAP3: mem: Add Numonyx OneNAND 200MHz timing information

Signed-off-by: Javier Martinez Canillas <javier@dowhile0.org>
12 years agoOMAP3: igep00x0: Add config option to choose flash storage memory
Javier Martinez Canillas [Sat, 28 Jul 2012 01:19:32 +0000 (01:19 +0000)]
OMAP3: igep00x0: Add config option to choose flash storage memory

IGEP-based boards can have two different flash memories, a OneNAND or a
NAND device. Add a configuration option for to choose which memory to use.

Signed-off-by: Javier Martinez Canillas <javier@dowhile0.org>
Acked-by: Enric Balletbo i Serra <eballetbo@gmail.com>
12 years agoam335x_evm: CPSW support
Chandan Nath [Tue, 24 Jul 2012 12:22:20 +0000 (12:22 +0000)]
am335x_evm: CPSW support

This patch adds board-specific initialization for CPSW on
TI AM335X based boards. Tested on BeagleBone.

Signed-off-by: Chandan Nath <chandan.nath@ti.com>
[Ilya: split board-specific part into separate patch]
Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
12 years agoam335x_evm: read the on-board EEPROM
Ilya Yanok [Tue, 24 Jul 2012 12:22:19 +0000 (12:22 +0000)]
am335x_evm: read the on-board EEPROM

Read the on-board EEPROM during startup to detect the version
of the board we are running on (as for now only BeagleBone vs
EVM detection is supported).

Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
12 years agoam33xx: pin mux defintions for CPSW switch
Chandan Nath [Tue, 24 Jul 2012 12:22:18 +0000 (12:22 +0000)]
am33xx: pin mux defintions for CPSW switch

This patch adds pin mux settings for CPSW switch found on
TI AM335X based boards (MII and RGMII modes).

Signed-off-by: Chandan Nath <chandan.nath@ti.com>
[Ilya: split pinmux into separate patch]
Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
12 years agoam33xx: CPSW init and definitions
Chandan Nath [Tue, 24 Jul 2012 12:22:17 +0000 (12:22 +0000)]
am33xx: CPSW init and definitions

This patch adds platform-specific initialization for CPSW
switch on TI AM33XX SoCs.

Signed-off-by: Chandan Nath <chandan.nath@ti.com>
[Ilya: split init out of original patch]
Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
12 years agocpsw: add driver for cpsw ethernet device
Cyril Chemparathy [Tue, 24 Jul 2012 12:22:16 +0000 (12:22 +0000)]
cpsw: add driver for cpsw ethernet device

CPSW is an on-chip ethernet switch that is found on various SoCs from Texas
Instruments.  This patch adds a simple driver (based on the Linux driver) for
this hardware module.

This patch also adds support to clean and flush dcache during packet send
and receive.

Changes by Sandhya: Added support to clean and flush dcache during packet
    send/receive and added timeouts.

Signed-off-by: Cyril Chemparathy <cyril@ti.com>
Signed-off-by: Chandan Nath <chandan.nath@ti.com>
Signed-off-by: Satyanarayana, Sandhya <sandhya.satyanarayana@ti.com>
[Ilya: Cleaned cache handling, some style cleanup, some small
fixes, use of internal RAM for descriptors]
Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
12 years agobeagle: only call DSS code when #defined CONFIG_VIDEO_OMAP3
Peter Meerwald [Tue, 10 Jul 2012 06:07:34 +0000 (06:07 +0000)]
beagle: only call DSS code when #defined CONFIG_VIDEO_OMAP3

Signed-off-by: Peter Meerwald <p.meerwald@bct-electronic.com>
12 years agoserial/ns16550: ns16550 has a different register layout on SOC_DA8XX
Mikhail Kshevetskiy [Mon, 9 Jul 2012 08:52:43 +0000 (08:52 +0000)]
serial/ns16550: ns16550 has a different register layout on SOC_DA8XX

also fix NS16550_init() as we need 16x divider

Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@gmail.com>
Acked-by: Christian Riesch <christian.riesch@omicron.at>
Tested-by: Christian Riesch <christian.riesch@omicron.at>
Acked-by: Sughosh Ganu <urwithsughosh@gmail.com>
Tested-by: Sughosh Ganu <urwithsughosh@gmail.com>
12 years agoarm/davinci/da850: add uart0 pinmux
Mikhail Kshevetskiy [Mon, 9 Jul 2012 08:52:42 +0000 (08:52 +0000)]
arm/davinci/da850: add uart0 pinmux

Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@gmail.com>
Tested-by: Sughosh Ganu <urwithsughosh@gmail.com>
12 years agoarm/davinci: fix DDR2/mDDR memory controller initialization for Omap L138
Mikhail Kshevetskiy [Mon, 9 Jul 2012 08:52:41 +0000 (08:52 +0000)]
arm/davinci: fix DDR2/mDDR memory controller initialization for Omap L138

follow section 15.2.13.1 (Initializing Following Device Power Up or Reset) of
OMAP-L138 DSP+ARM Processor Technical Reference Manual

Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@gmail.com>
Acked-by: Christian Riesch <christian.riesch@omicron.at>
Tested-by: Christian Riesch <christian.riesch@omicron.at>
12 years agoRevert "arm: armv7: add compile option -mno-unaligned-access if available"
Albert ARIBAUD [Fri, 20 Jul 2012 06:51:26 +0000 (08:51 +0200)]
Revert "arm: armv7: add compile option -mno-unaligned-access if available"

This reverts commit 5347560f5427bcdd48a563b62180481606ac8044,
which was applied only to get release 2012.07 functional on as
many ARM targets as possible despite mis-aligned accesses.

12 years agoomap: am335x_evm: enable i2c1 channel
Steve Sakoman [Fri, 22 Jun 2012 07:45:57 +0000 (07:45 +0000)]
omap: am335x_evm: enable i2c1 channel

This patch sets up pinmux, enables fclk, and
defines CONFIG_I2C_MULTI_BUS

Signed-off-by: Steve Sakoman <steve@sakoman.com>
12 years agobeagle: removed unused pr_debug #define
Peter Meerwald [Mon, 2 Jul 2012 12:26:31 +0000 (12:26 +0000)]
beagle: removed unused pr_debug #define

Signed-off-by: Peter Meerwald <pmeerw@pmeerw.net>
12 years agobeagle: fix termination of buddy env setting
Peter Meerwald [Mon, 2 Jul 2012 03:43:31 +0000 (03:43 +0000)]
beagle: fix termination of buddy env setting

Signed-off-by: Peter Meerwald <p.meerwald@bct-electronic.com>
12 years agobeagle: make get_expansion_id(), get_board_revision(), beagle_display_init() static
Peter Meerwald [Mon, 2 Jul 2012 03:19:03 +0000 (03:19 +0000)]
beagle: make get_expansion_id(), get_board_revision(), beagle_display_init() static

Signed-off-by: Peter Meerwald <p.meerwald@bct-electronic.com>
12 years agoigep00x0: default mmcrootfstype to EXT4
Javier Martinez Canillas [Fri, 29 Jun 2012 02:45:41 +0000 (02:45 +0000)]
igep00x0: default mmcrootfstype to EXT4

omap2plus_defconfig now has built-in compile support for EXT4 enabled
by default now. So, we can use EXT4 as the default root file system
type for MMC.

Signed-off-by: Javier Martinez Canillas <javier@dowhile0.org>
Acked-by: Enric Balletbo i Serra <eballetbo@gmail.com>
12 years agoigep00x0: default to OMAP-specific serial driver
Javier Martinez Canillas [Fri, 29 Jun 2012 02:45:40 +0000 (02:45 +0000)]
igep00x0: default to OMAP-specific serial driver

An OMAP specific serial driver was merged on the Linux kenel a long
time ago. So, it makes sense to default the console name to OMAP
ttyO instead of the generic ttyS naming.

Signed-off-by: Javier Martinez Canillas <javier@dowhile0.org>
Acked-by: Enric Balletbo i Serra <eballetbo@gmail.com>
12 years agoda850/omap-l138: add support for direct NOR boot mode
Lad, Prabhakar [Sun, 24 Jun 2012 21:35:23 +0000 (21:35 +0000)]
da850/omap-l138: add support for direct NOR boot mode

This patch adds support for direct NOR boot mode on
da850/omap-l138. Added da850evm_direct_nor entry in
boards.cfg to allow to build targets.

Tested-by: Christian Riesch <christian.riesch@omicron.at>
Signed-off-by: Lad, Prabhakar <prabhakar.lad@ti.com>
Signed-off-by: Rajashekhara, Sudhakar <sudhakar.raj@ti.com>
Signed-off-by: Hadli, Manjunath <manjunath.hadli@ti.com>
12 years agoda850/omap-l138: Add support for NAND SPL
Lad, Prabhakar [Sun, 24 Jun 2012 21:35:22 +0000 (21:35 +0000)]
da850/omap-l138: Add support for NAND SPL

This patch adds configuration required for NAND SP
on DA850/OMAP-L138.

Tested-by: Christian Riesch <christian.riesch@omicron.at>
Signed-off-by: Lad, Prabhakar <prabhakar.lad@ti.com>
Signed-off-by: Rajashekhara, Sudhakar <sudhakar.raj@ti.com>
Signed-off-by: Hadli, Manjunath <manjunath.hadli@ti.com>
12 years agoda850/omap-l138: Fix NAND flash timings
Lad, Prabhakar [Sun, 24 Jun 2012 21:35:21 +0000 (21:35 +0000)]
da850/omap-l138: Fix NAND flash timings

Though Commit id a3f88293ddd13facd734769c1664d35ab4ed681f (da850evm:
setup the NAND flash timings) has configured the AEMIF timings, they
are not exactly in sync with the timings used in Linux. Linux is
configuring the timing register as 0x08222204, where as currently it
configured to 0x00100084 in U-Boot. This issue was found out when
support for NAND SPL is added in U-Boot. Without this patch U-Boot
does not come up with SPL.

Tested-by: Christian Riesch <christian.riesch@omicron.at>
Signed-off-by: Lad, Prabhakar <prabhakar.lad@ti.com>
Signed-off-by: Rajashekhara, Sudhakar <sudhakar.raj@ti.com>
Signed-off-by: Hadli, Manjunath <manjunath.hadli@ti.com>
12 years agoda850/omap-l138: Add support to read u-boot image from MMC/SD
Lad, Prabhakar [Sun, 24 Jun 2012 21:35:20 +0000 (21:35 +0000)]
da850/omap-l138: Add support to read u-boot image from MMC/SD

DA850/OMAP-L138 does not support strict MMC/SD boot mode. SPL will
be in SPI flash and U-Boot image will be in MMC/SD card. SPL will
do the low level initialization and then loads the u-boot image
from MMC/SD card.

Define CONFIG_SPL_MMC_LOAD macro in the DA850/OMAP-L138
configuration file to enable this feature.

Tested-by: Christian Riesch <christian.riesch@omicron.at>
Signed-off-by: Lad, Prabhakar <prabhakar.lad@ti.com>
Signed-off-by: Rajashekhara, Sudhakar <sudhakar.raj@ti.com>
Signed-off-by: Hadli, Manjunath <manjunath.hadli@ti.com>
12 years agoda850/omap-l138: Define SPI specific configs for SPL only when SPI is used
Lad, Prabhakar [Sun, 24 Jun 2012 21:35:19 +0000 (21:35 +0000)]
da850/omap-l138: Define SPI specific configs for SPL only when SPI is used

define SPI specific configs for SPL only when CONFIG_USE_SPIFLASH
config is defined

Tested-by: Christian Riesch <christian.riesch@omicron.at>
Signed-off-by: Lad, Prabhakar <prabhakar.lad@ti.com>
Signed-off-by: Rajashekhara, Sudhakar <sudhakar.raj@ti.com>
Signed-off-by: Hadli, Manjunath <manjunath.hadli@ti.com>
12 years agoarm, davinci: perform check for initializing global data and serial init
Lad, Prabhakar [Sun, 24 Jun 2012 21:35:18 +0000 (21:35 +0000)]
arm, davinci: perform check for initializing global data and serial init

initialize baudrate, flags, data and serial initialization,
only when CONFIG_SPL_LIBCOMMON_SUPPORT is defined.

Tested-by: Christian Riesch <christian.riesch@omicron.at>
Signed-off-by: Lad, Prabhakar <prabhakar.lad@ti.com>
Signed-off-by: Rajashekhara, Sudhakar <sudhakar.raj@ti.com>
Signed-off-by: Hadli, Manjunath <manjunath.hadli@ti.com>
Acked-by: Christian Riesch <christian.riesch@omicron.at>
12 years agoda850/omap-l138: Make MMC and NOR support mutually exclusive
Rajashekhara, Sudhakar [Sun, 24 Jun 2012 21:35:17 +0000 (21:35 +0000)]
da850/omap-l138: Make MMC and NOR support mutually exclusive

On Logic PD Rev.3 DA850/OMAP-L138 EVM, NOR and MMC/SD cannot
work together. This patch enables the MMC/SD support only
when NOR support is disabled. NOR Flash identification works
even without this patch, but erase and write will have issues.

Tested-by: Christian Riesch <christian.riesch@omicron.at>
Signed-off-by: Rajashekhara, Sudhakar <sudhakar.raj@ti.com>
Signed-off-by: Lad, Prabhakar <prabhakar.lad@ti.com>
Signed-off-by: Hadli, Manjunath <manjunath.hadli@ti.com>
12 years agoda850/omap-l138: modifications for Logic PD Rev.3 AM18xx EVM
Rajashekhara, Sudhakar [Sun, 24 Jun 2012 21:35:16 +0000 (21:35 +0000)]
da850/omap-l138: modifications for Logic PD Rev.3 AM18xx EVM

AHCLKR/UART1_RTS/GP0[11] pin needs to be configured for
MMC and NOR to work on DA850/OMAP-L138 Rev.3 EVM. When
GP0[11] is low, the SD0 interface will not work, but NOR
flash will. When GP0[11] is high, SD0 will work but NOR
flash will not.

Tested-by: Christian Riesch <christian.riesch@omicron.at>
Signed-off-by: Rajashekhara, Sudhakar <sudhakar.raj@ti.com>
Signed-off-by: Lad, Prabhakar <prabhakar.lad@ti.com>
Signed-off-by: Hadli, Manjunath <manjunath.hadli@ti.com>
12 years agoda850/omap-l138: Add MMC support for DA850/OMAP-L138
Lad, Prabhakar [Sun, 24 Jun 2012 21:35:15 +0000 (21:35 +0000)]
da850/omap-l138: Add MMC support for DA850/OMAP-L138

This patch adds support for MMC/SD on DA850/OMAP-L138.

Tested-by: Christian Riesch <christian.riesch@omicron.at>
Signed-off-by: Lad, Prabhakar <prabhakar.lad@ti.com>
Signed-off-by: Rajashekhara, Sudhakar <sudhakar.raj@ti.com>
Signed-off-by: Hadli, Manjunath <manjunath.hadli@ti.com>
12 years agoomap: am33xx: enable gpio support
Steve Sakoman [Mon, 4 Jun 2012 05:35:34 +0000 (05:35 +0000)]
omap: am33xx: enable gpio support

This patch uses the code in omap-common to support gpio modules 1-3
on am33xx based boards.

It adds base address and register definitions, enables clocks to the
modules, and enables building the common gpio code for CONFIG_AM33XX
as well as CONFIG_OMAP

Signed-off-by: Steve Sakoman <steve@sakoman.com>