Richard Uhler [Thu, 17 Dec 2020 18:37:26 +0000 (18:37 +0000)]
Add brief description of dialects doc section.
Reviewed By: jpienaar
Differential Revision: https://reviews.llvm.org/D93466
Baptiste Saleil [Thu, 17 Dec 2020 18:18:43 +0000 (13:18 -0500)]
[PowerPC] Rename the vector pair intrinsics and builtins to replace the _mma_ prefix by _vsx_
On PPC, the vector pair instructions are independent from MMA.
This patch renames the vector pair LLVM intrinsics and Clang builtins to replace the _mma_ prefix by _vsx_ in their names.
We also move the vector pair type/intrinsic/builtin tests to their own files.
Differential Revision: https://reviews.llvm.org/D91974
Kostya Kortchinsky [Fri, 11 Dec 2020 22:04:47 +0000 (14:04 -0800)]
[scudo][standalone] Allow the release of smaller sizes
Initially we were avoiding the release of smaller size classes due to
the fact that it was an expensive operation, particularly on 32-bit
platforms. With a lot of batches, and given that there are a lot of
blocks per page, this was a lengthy operation with little results.
There has been some improvements since then to the 32-bit release,
and we still have some criterias preventing us from wasting time
(eg, 9x% free blocks in the class size, etc).
Allowing to release blocks < 128 bytes helps in situations where a lot
of small chunks would not have been reclaimed if not for a forced
reclaiming.
Additionally change some `CHECK` to `DCHECK` and rearrange a bit the
code.
I didn't experience any regressions in my benchmarks.
Differential Revision: https://reviews.llvm.org/D93141
George [Thu, 17 Dec 2020 17:27:17 +0000 (09:27 -0800)]
Add call site location getter to C API
Reviewed By: ftynse
Differential Revision: https://reviews.llvm.org/D93334
LLVM GN Syncbot [Thu, 17 Dec 2020 17:28:45 +0000 (17:28 +0000)]
[gn build] Port
dae34463e3e
Andrew Litteken [Tue, 15 Sep 2020 23:05:38 +0000 (18:05 -0500)]
[IRSim][IROutliner] Adding the extraction basics for the IROutliner.
Extracting the similar regions is the first step in the IROutliner.
Using the IRSimilarityIdentifier, we collect the SimilarityGroups and
sort them by how many instructions will be removed. Each
IRSimilarityCandidate is used to define an OutlinableRegion. Each
region is ordered by their occurrence in the Module and the regions that
are not compatible with previously outlined regions are discarded.
Each region is then extracted with the CodeExtractor into its own
function.
We test that correctly extract in:
test/Transforms/IROutliner/extraction.ll
test/Transforms/IROutliner/address-taken.ll
test/Transforms/IROutliner/outlining-same-globals.ll
test/Transforms/IROutliner/outlining-same-constants.ll
test/Transforms/IROutliner/outlining-different-structure.ll
Recommit of
bf899e891387d07dfd12de195ce2a16f62afd5e0 fixing memory
leaks.
Reviewers: paquette, jroelofs, yroux
Differential Revision: https://reviews.llvm.org/D86975
Arthur Eubanks [Wed, 9 Dec 2020 19:51:00 +0000 (11:51 -0800)]
[gn build] Add symbol_level to adjust debug info level
is_debug by default makes symbol_level = 2 and !is_debug means by
default symbol_level = 0.
Reviewed By: thakis
Differential Revision: https://reviews.llvm.org/D92958
Fangrui Song [Thu, 17 Dec 2020 17:16:37 +0000 (09:16 -0800)]
[LangRef] Update new ssp/sspstrong/sspreq semantics after D91816
Reviewed By: nickdesaulniers
Differential Revision: https://reviews.llvm.org/D93422
Siva Chandra Reddy [Thu, 17 Dec 2020 17:12:51 +0000 (09:12 -0800)]
[libc][Obvious] Fix typo is wrappergen unittest.
Michał Górny [Thu, 17 Dec 2020 12:12:24 +0000 (13:12 +0100)]
[lldb] [Process/FreeBSDRemote] Use RegSetKind consistently [NFC]
Use RegSetKind enum for register sets everything, rather than int.
Always spell it as 'RegSetKind', without unnecessary 'enum'. Add
missing switch case. While at it, use uint32_t for regnums
consistently.
Differential Revision: https://reviews.llvm.org/D93450
Michał Górny [Wed, 16 Dec 2020 14:51:04 +0000 (15:51 +0100)]
[lldb] [Process/FreeBSDRemote] Replace GetRegisterSetCount()
Replace the wrong code in GetRegisterSetCount() with a constant return.
The original code passed register index in place of register set index,
effectively getting always true. Correcting the code to check for
register set existence is not possible as LLDB supports only eliminating
last register sets. Just return the full number for now which should
be NFC.
Differential Revision: https://reviews.llvm.org/D93396
Paula Toth [Thu, 17 Dec 2020 16:56:15 +0000 (08:56 -0800)]
[libc] Add python3 to libc buildbot depedencies.
Reviewed By: sivachandra
Differential Revision: https://reviews.llvm.org/D93463
Siva Chandra Reddy [Wed, 16 Dec 2020 19:30:37 +0000 (11:30 -0800)]
[libc] Refactor WrapperGen to make the flow cleaner.
Reviewed By: michaelrj
Differential Revision: https://reviews.llvm.org/D93417
Pavel Labath [Thu, 17 Dec 2020 16:10:17 +0000 (17:10 +0100)]
Revert "[lldb] Make CommandInterpreter's execution context the same as debugger's one."
This reverts commit
a01b26fb51c710a3a8ef88cc83b0701461f5b9ab, because it
breaks the "finish" command in some way -- the command does not
terminate after it steps out, but continues running the target. The
exact blast radius is not clear, but it at least affects the usage of
the "finish" command in TestGuiBasicDebug.py. The error is *not*
gui-related, as the same issue can be reproduced by running the same
steps outside of the gui.
There is some kind of a race going on, as the test fails only 20% of the
time on the buildbot.
Tomas Matheson [Thu, 17 Dec 2020 16:42:32 +0000 (11:42 -0500)]
Detect section type conflicts between functions and variables
If two variables are declared with __attribute__((section(name))) and
the implicit section types (e.g. read only vs writeable) conflict, an
error is raised. Extend this mechanism so that an error is raised if the
section type implied by a function's __attribute__((section)) conflicts
with that of another variable.
Valentin Clement [Thu, 17 Dec 2020 16:32:52 +0000 (11:32 -0500)]
[flang][openacc] Enforce restriction on routine directive and clauses
This patch add some checks for the restriction on the routine directive
and fix several issue at the same time.
Validity tests have been added in a separate file than acc-clause-validity.f90 since this one
became quite large. I plan to split the larger file once on-going review are done.
Reviewed By: sameeranjoshi
Differential Revision: https://reviews.llvm.org/D92672
Nabeel Omer [Thu, 17 Dec 2020 16:06:45 +0000 (16:06 +0000)]
[DebugInfo] Avoid re-ordering assignments in LCSSA
The LCSSA pass makes use of a function insertDebugValuesForPHIs() to
propogate dbg.value() intrinsics to newly inserted PHI instructions. Faulty
behaviour occurs when the parent PHI of a newly inserted PHI is not the
most recent assignment to a source variable. insertDebugValuesForPHIs ends
up propagating a value that isn't the most recent assignemnt.
This change removes the call to insertDebugValuesForPHIs() from LCSSA,
preventing incorrect dbg.value intrinsics from being propagated.
Propagating variable locations between blocks will occur later, during
LiveDebugValues.
Differential Revision: https://reviews.llvm.org/D92576
Jinsong Ji [Thu, 17 Dec 2020 15:13:45 +0000 (10:13 -0500)]
[PowerPC][NFC] Cleanup PPCCTRLoopsVerify pass
The PPCCTRLoop pass has been moved to HardwareLoops,
so the comments and some useless code are deprecated now.
Reviewed By: #powerpc, nemanjai
Differential Revision: https://reviews.llvm.org/D93336
Jon Chesterfield [Thu, 17 Dec 2020 16:09:32 +0000 (16:09 +0000)]
[amdgpu] Default to code object v3
[amdgpu] Default to code object v3
v4 is not yet readily available, and doesn't appear
to be implemented in the back end
Reviewed By: t-tye, yaxunl
Differential Revision: https://reviews.llvm.org/D93258
Lei Zhang [Thu, 17 Dec 2020 15:55:45 +0000 (10:55 -0500)]
[mlir][spirv] NFC: Shuffle code around to better follow convention
This commit shuffles SPIR-V code around to better follow MLIR
convention. Specifically,
* Created IR/, Transforms/, Linking/, and Utils/ subdirectories and
moved suitable code inside.
* Created SPIRVEnums.{h|cpp} for SPIR-V C/C++ enums generated from
SPIR-V spec. Previously they are cluttered inside SPIRVTypes.{h|cpp}.
* Fixed include guards in various header files (both .h and .td).
* Moved serialization tests under test/Target/SPIRV.
* Renamed TableGen backend -gen-spirv-op-utils into -gen-spirv-attr-utils
as it is only generating utility functions for attributes.
Reviewed By: mravishankar
Differential Revision: https://reviews.llvm.org/D93407
Bangtian Liu [Thu, 17 Dec 2020 15:58:45 +0000 (15:58 +0000)]
Ensure SplitEdge to return the new block between the two given blocks
This PR implements the function splitBasicBlockBefore to address an
issue
that occurred during SplitEdge(BB, Succ, ...), inside splitBlockBefore.
The issue occurs in SplitEdge when the Succ has a single predecessor
and the edge between the BB and Succ is not critical. This produces
the result ‘BB->Succ->New’. The new function splitBasicBlockBefore
was added to splitBlockBefore to handle the issue and now produces
the correct result ‘BB->New->Succ’.
Below is an example of splitting the block bb1 at its first instruction.
/// Original IR
bb0:
br bb1
bb1:
%0 = mul i32 1, 2
br bb2
bb2:
/// IR after splitEdge(bb0, bb1) using splitBasicBlock
bb0:
br bb1
bb1:
br bb1.split
bb1.split:
%0 = mul i32 1, 2
br bb2
bb2:
/// IR after splitEdge(bb0, bb1) using splitBasicBlockBefore
bb0:
br bb1.split
bb1.split
br bb1
bb1:
%0 = mul i32 1, 2
br bb2
bb2:
Differential Revision: https://reviews.llvm.org/D92200
Amy Huang [Thu, 17 Dec 2020 15:48:20 +0000 (07:48 -0800)]
[llvm-symbolizer][Windows] Add start line when searching in line table sections.
Fixes issue where if a line section doesn't start with a line number
then the addresses at the beginning of the section don't have line numbers.
For example, for a line section like this
```
0001:
00000010-
00000014, line/column/addr entries = 1
7
00000013 !
```
a line number wouldn't be found for addresses from 10 to 12.
This matches behavior when using the DIA SDK.
Differential Revision: https://reviews.llvm.org/D93306
Simon Pilgrim [Thu, 17 Dec 2020 15:51:13 +0000 (15:51 +0000)]
[SampleFDO] Fix uninitialized field warnings. NFCI.
Seems to have been caused by D93254 which added the SecHdrTableEntry::LayoutIndex field.
Valentin Clement [Thu, 17 Dec 2020 15:50:31 +0000 (10:50 -0500)]
[flang][openacc] Update serial construct clauses for OpenACC 3.1
Update the allowed clauses for the SERIAL construct for the new OpenACC 3.1
specification.
Reviewed By: sameeranjoshi
Differential Revision: https://reviews.llvm.org/D92123
Zequan Wu [Tue, 8 Dec 2020 00:37:14 +0000 (16:37 -0800)]
[Clang] Make nomerge attribute a function attribute as well as a statement attribute.
Differential Revision: https://reviews.llvm.org/D92800
Simon Pilgrim [Thu, 17 Dec 2020 15:22:52 +0000 (15:22 +0000)]
[TableGen] Return const std::string& in InstrMap getName()/getFilterClass() methods. NFCI.
Avoid temp std::string instances - we're never keeping these around, just printing them to streams, converting to StringRef etc.
Florian Hahn [Thu, 17 Dec 2020 14:42:12 +0000 (14:42 +0000)]
[InstCombine] Preserve !annotation on newly created instructions.
If the source instruction has !annotation metadata, all instructions
created during combining should also have it. Tell the builder to
add it.
The !annotation system was discussed on llvm-dev as part of
'RFC: Combining Annotation Metadata and Remarks'
(http://lists.llvm.org/pipermail/llvm-dev/2020-November/146393.html)
This patch is based on an earlier patch by Francis Visoiu Mistrih.
Reviewed By: thegameg, lebedev.ri
Differential Revision: https://reviews.llvm.org/D91444
Yvan Roux [Thu, 17 Dec 2020 15:08:23 +0000 (16:08 +0100)]
[ARM][MachineOutliner] Fix costs model.
Fix candidates calls costs models allocation and prepare stack fixups
handling.
Differential Revision: https://reviews.llvm.org/D92933
Simon Pilgrim [Thu, 17 Dec 2020 14:34:13 +0000 (14:34 +0000)]
[TableGen] Make InstrMap::getFilterClass() const. NFCI.
Reported by cppcheck.
I've run clang-format across all the InstrMap accessors as well.
Guillaume Chatelet [Thu, 17 Dec 2020 14:49:28 +0000 (15:49 +0100)]
Fix dead link
serge-sans-paille [Fri, 11 Dec 2020 10:34:54 +0000 (11:34 +0100)]
Remove Python2 fallback and only advertise Python3 in the doc
Differential Revision: https://www.youtube.com/watch?v=RsL0cipURA0
Adhemerval Zanella [Thu, 10 Dec 2020 14:06:49 +0000 (14:06 +0000)]
[lld] [ELF] AArch64: Handle DT_AARCH64_VARIANT_PCS
As indicated by AArch64 ELF specification, symbols with st_other
marked with STO_AARCH64_VARIANT_PCS indicates it may follow a variant
procedure call standard with different register usage convention
(for instance SVE calls).
Static linkers must preserve the marking and propagate it to the dynamic
symbol table if any reference or definition of the symbol is marked with
STO_AARCH64_VARIANT_PCS, and add a DT_AARCH64_VARIANT_PCS dynamic tag if
there are R_<CLS>_JUMP_SLOT relocations that reference that symbols.
It implements https://bugs.llvm.org/show_bug.cgi?id=48368.
Reviewed By: MaskRay
Differential Revision: https://reviews.llvm.org/D93045
Adhemerval Zanella [Thu, 10 Dec 2020 14:03:22 +0000 (14:03 +0000)]
[llvm-readobj/elf] - AArch64: Handle AARCH64_VARIANT_PCS for GNUStyle
It mimics the GNU readelf where it prints a [VARIANT_PCS] for symbols
with st_other with STO_AARCH64_VARIANT_PCS.
Reviewed By: grimar, MaskRay
Differential Revision: https://reviews.llvm.org/D93044
Adhemerval Zanella [Mon, 14 Dec 2020 17:24:53 +0000 (17:24 +0000)]
[obj2yaml][yaml2obj] - Add AArch64 STO_AARCH64_VARIANT_PCS support
Reviewed By: grimar, MaskRay
Differential Revision: https://reviews.llvm.org/D93235
Nathan James [Thu, 17 Dec 2020 14:09:08 +0000 (14:09 +0000)]
[clang-tidy][NFC] Reduce copies of Intrusive..FileSystem
Swapped a few instances where a move is more optimal or the target doesn't need to hold a reference.
Florian Hahn [Thu, 17 Dec 2020 13:42:29 +0000 (13:42 +0000)]
[SimplifyCFG] Preserve !annotation in FoldBranchToCommonDest.
When folding a branch to a common destination, preserve !annotation on
the created instruction, if the terminator of the BB that is going to be
removed has !annotation. This should ensure that !annotation is attached
to the instructions that 'replace' the original terminator.
Reviewed By: jdoerfert, lebedev.ri
Differential Revision: https://reviews.llvm.org/D93410
Jun Ma [Wed, 16 Dec 2020 07:05:49 +0000 (15:05 +0800)]
[InstCombine] Remove scalable vector restriction in InstCombineCasts
Differential Revision: https://reviews.llvm.org/D93389
Jez Ng [Thu, 17 Dec 2020 00:14:57 +0000 (19:14 -0500)]
[lld-macho] Use LC_LOAD_WEAK_DYLIB for dylibs with only weakrefs
Note that dylibs without *any* refs will still be loaded in the usual
(strong) fashion.
Reviewed By: #lld-macho, thakis
Differential Revision: https://reviews.llvm.org/D93435
Jez Ng [Wed, 16 Dec 2020 02:05:06 +0000 (21:05 -0500)]
[lld-macho] Add support for weak references
Weak references need not necessarily be satisfied at runtime (but they must
still be satisfied at link time). So symbol resolution still works as per usual,
but we now pass around a flag -- ultimately emitting it in the bind table -- to
indicate if a given dylib symbol is a weak reference.
ld64's behavior for symbols that have both weak and strong references is
a bit bizarre. For non-function symbols, it will emit a weak import. For
function symbols (those referenced by BRANCH relocs), it will emit a
regular import. I'm not sure what value there is in that behavior, and
since emulating it will make our implementation more complex, I've
decided to treat regular weakrefs like function symbol ones for now.
Fixes PR48511.
Reviewed By: #lld-macho, thakis
Differential Revision: https://reviews.llvm.org/D93369
Lucas Prates [Wed, 9 Dec 2020 16:13:36 +0000 (16:13 +0000)]
[ARM] Adding v8.7-A command-line support for the ARM target
This extends the command-line support for the 'armv8.7-a' architecture
name to the ARM target.
Based on a patch written by Momchil Velikov.
Reviewed By: ostannard
Differential Revision: https://reviews.llvm.org/D93231
Lucas Prates [Mon, 16 Nov 2020 14:48:22 +0000 (14:48 +0000)]
[ARM][AAarch64] Initial command-line support for v8.7-A
This introduces command-line support for the 'armv8.7-a' architecture name
(and an alias without the '-', as usual), and for the 'ls64' extension name.
Based on patches written by Simon Tatham.
Reviewed By: ostannard
Differential Revision: https://reviews.llvm.org/D91776
Lucas Prates [Mon, 16 Nov 2020 14:23:14 +0000 (14:23 +0000)]
[AArch64] Adding the v8.7-A LD64B/ST64B Accelerator extension
This adds support for the v8.7-A LD64B/ST64B Accelerator extension
through a subtarget feature called "ls64". It adds four 64-byte
load/store instructions with an operand in the new GPR64x8 register
class, and one system register that's part of the same extension.
Based on patches written by Simon Tatham.
Reviewed By: ostannard
Differential Revision: https://reviews.llvm.org/D91775
Lucas Prates [Thu, 12 Nov 2020 10:54:28 +0000 (10:54 +0000)]
[AArch64] Add a GPR64x8 register class
This adds a GPR64x8 register class that will be needed as the data
operand to the LD64B/ST64B family of instructions in the v8.7-A
Accelerator Extension, which load or store a contiguous range of eight
x-regs. It has to be its own register class so that register allocation
will have visibility of the full set of registers actually read/written
by the instructions, which will be needed when we add intrinsics and/or
inline asm access to this piece of architecture.
Patch written by Simon Tatham.
Reviewed By: ostannard
Differential Revision: https://reviews.llvm.org/D91774
Lucas Prates [Thu, 12 Nov 2020 09:50:58 +0000 (09:50 +0000)]
[ARM][AArch64] Adding basic support for the v8.7-A architecture
This introduces support for the v8.7-A architecture through a new
subtarget feature called "v8.7a". It adds two new "WFET" and "WFIT"
instructions, the nXS limited-TLB-maintenance qualifier for DSB and TLBI
instructions, a new CPU id register, ID_AA64ISAR2_EL1, and the new
HCRX_EL2 system register.
Based on patches written by Simon Tatham and Victor Campos.
Reviewed By: ostannard
Differential Revision: https://reviews.llvm.org/D91772
Lucas Prates [Mon, 30 Nov 2020 15:23:27 +0000 (15:23 +0000)]
[NFC][AArch64] Capturing multiple feature requirements in AsmParser messages
This enables the capturing of multiple required features in the AArch64
AsmParser's SysAlias error messages.
Reviewed By: ostannard
Differential Revision: https://reviews.llvm.org/D92388
Lucas Prates [Wed, 11 Nov 2020 16:38:54 +0000 (16:38 +0000)]
[NFC][AArch64] Move AArch64 MSR/MRS into a new decoder namespace
This removes the general forms of the AArch64 MSR and MRS instructions
from the same decoding table that contains many more specific
instructions that supersede them. They're now in a separate decoding
table of their own, called "Fallback", which is only consulted in the
event of the main decoder table failing to produce an answer.
This should avoid decoding conflicts on future specialized instructions
in the MSR space.
Patch written by Simon Tatham.
Reviewed By: ostannard
Differential Revision: https://reviews.llvm.org/D91771
Florian Hahn [Thu, 17 Dec 2020 12:59:02 +0000 (12:59 +0000)]
[IRBuilder] Generalize debug loc handling for arbitrary metadata.
This patch extends IRBuilder to allow adding/preserving arbitrary
metadata on created instructions.
Instead of using references to specific metadata nodes (like DebugLoc),
IRbuilder now keeps a vector of (metadata kind, MDNode *) pairs, which
are added to each created instruction.
The patch itself is a NFC and only moves the existing debug location
handling over to the new system. In a follow-up patch it will be used to
preserve !annotation metadata besides !dbg.
The current approach requires iterating over MetadataToCopy to avoid
adding duplicates, but given that the number of metadata kinds to
copy/preserve is going to be very small initially (0, 1 (for !dbg) or 2
(!dbg and !annotation)) that should not matter.
Reviewed By: lebedev.ri
Differential Revision: https://reviews.llvm.org/D93400
Guillaume Chatelet [Thu, 17 Dec 2020 13:16:14 +0000 (13:16 +0000)]
[libc] revamp memory function benchmark
The benchmarking infrastructure can now run in two modes:
- Sweep Mode: which generates a ramp of size values (same as before),
- Distribution Mode: allows the user to select a distribution for the size paramater that is representative from production.
The analysis tool has also been updated to handle both modes.
Differential Revision: https://reviews.llvm.org/D93210
Pavel Labath [Thu, 17 Dec 2020 13:17:03 +0000 (14:17 +0100)]
[lldb-vscode] Speculative fix for raciness in TestVSCode_attach
The test appears to expect the inferior to be stopped, but the custom
"attach commands" leave it in a running state.
It's unclear how this could have ever worked.
Alex Zinenko [Thu, 17 Dec 2020 13:09:11 +0000 (14:09 +0100)]
[mlir] Fix syntax error in markdown documentation
Michał Górny [Thu, 17 Dec 2020 12:54:59 +0000 (13:54 +0100)]
[lldb] [unittests] Filter FreeBSD through CMake rather than #ifdef
Michał Górny [Tue, 15 Dec 2020 15:15:22 +0000 (16:15 +0100)]
[lldb] [unittests] Add tests for NetBSD register offsets/sizes
Differential Revision: https://reviews.llvm.org/D93299
Cullen Rhodes [Wed, 9 Dec 2020 13:18:22 +0000 (13:18 +0000)]
[LV] Disable epilogue vectorization for scalable VFs
Epilogue vectorization doesn't support scalable vectorization factors
yet, disable it for now.
Reviewed By: sdesmalen, bmahjour
Differential Revision: https://reviews.llvm.org/D93063
Simon Pilgrim [Thu, 17 Dec 2020 12:06:28 +0000 (12:06 +0000)]
[DebugInfo] Fix MSVC build by adding back necessary reverse_iterator != operator
Put back the std::reverse_iterator<DWARFDie::iterator> != operator that was removed in D78938 to fix VS2019 builds
Sam McCall [Thu, 17 Dec 2020 11:41:44 +0000 (12:41 +0100)]
[clangd] Add llvm:: qualifier to work around GCC bug. NFC
Some old GCC versions seem to miss the default template parameter when
using the clang/Basic/LLVM.h forward declarations of SmallVector.
See D92788
Kerry McLaughlin [Thu, 17 Dec 2020 11:12:14 +0000 (11:12 +0000)]
[AArch64] Renamed sve-masked-scatter-legalise.ll. NFC.
Martin Storsjö [Tue, 15 Dec 2020 07:15:37 +0000 (09:15 +0200)]
[libcxx] Remove ifdefs in the message to static_assert. NFC.
Differential Revision: https://reviews.llvm.org/D93283
Alex Zinenko [Thu, 17 Dec 2020 11:19:52 +0000 (12:19 +0100)]
[mlir] Move LLVM Dialect Op documentation to ODS
This was long overdue. The initial documentation for the LLVM dialect was
introduced before ODS had support for long descriptions. This is now possible,
so the documentation is moved to ODS, which can serve as a single source of
truth. The high-level description of the dialect structure is updated to
reflect that.
Depends On: D93315
Reviewed By: rriddle, mehdi_amini
Differential Revision: https://reviews.llvm.org/D93425
Alex Zinenko [Tue, 15 Dec 2020 17:29:12 +0000 (18:29 +0100)]
[mlir] partially update LLVM dialect documentation
Rewrite the parts of the documentation that became stale: context/module
handling and type system. Expand the type system description.
Reviewed By: nicolasvasilache
Differential Revision: https://reviews.llvm.org/D93315
Kerry McLaughlin [Thu, 17 Dec 2020 10:36:52 +0000 (10:36 +0000)]
[SVE][CodeGen] Add bfloat16 support to scalable masked gather
Reviewed By: david-arm
Differential Revision: https://reviews.llvm.org/D93307
dfukalov [Wed, 9 Dec 2020 12:06:50 +0000 (15:06 +0300)]
[NFC] Reduce include files dependency and AA header cleanup (part 2).
Continuing work started in https://reviews.llvm.org/D92489:
Removed a bunch of includes from "AliasAnalysis.h" and "LoopPassManager.h".
Reviewed By: RKSimon
Differential Revision: https://reviews.llvm.org/D92852
Simon Pilgrim [Thu, 17 Dec 2020 11:02:34 +0000 (11:02 +0000)]
[X86] Remove extract_subvector(subv_broadcast_load()) fold.
This was needed in an earlier version of D92645, but isn't now - and I've just noticed that it was potentially flawed depending on the relevant widths of the broadcasted and extracted subvectors.
Krasimir Georgiev [Thu, 17 Dec 2020 10:48:42 +0000 (11:48 +0100)]
fix a -Wunused-variable warning in release build
Raphael Isemann [Thu, 17 Dec 2020 10:23:11 +0000 (11:23 +0100)]
[lldb] Add std::array to the supported template list of the CxxModuleHandler
Identical to the other patches that add STL containers to the supported
templated list.
Barry Revzin [Thu, 17 Dec 2020 10:41:35 +0000 (10:41 +0000)]
Make LLVM build in C++20 mode
Part of the <=> changes in C++20 make certain patterns of writing equality
operators ambiguous with themselves (sorry!).
This patch goes through and adjusts all the comparison operators such that
they should work in both C++17 and C++20 modes. It also makes two other small
C++20-specific changes (adding a constructor to a type that cases to be an
aggregate, and adding casts from u8 literals which no longer have type
const char*).
There were four categories of errors that this review fixes.
Here are canonical examples of them, ordered from most to least common:
// 1) Missing const
namespace missing_const {
struct A {
#ifndef FIXED
bool operator==(A const&);
#else
bool operator==(A const&) const;
#endif
};
bool a = A{} == A{}; // error
}
// 2) Type mismatch on CRTP
namespace crtp_mismatch {
template <typename Derived>
struct Base {
#ifndef FIXED
bool operator==(Derived const&) const;
#else
// in one case changed to taking Base const&
friend bool operator==(Derived const&, Derived const&);
#endif
};
struct D : Base<D> { };
bool b = D{} == D{}; // error
}
// 3) iterator/const_iterator with only mixed comparison
namespace iter_const_iter {
template <bool Const>
struct iterator {
using const_iterator = iterator<true>;
iterator();
template <bool B, std::enable_if_t<(Const && !B), int> = 0>
iterator(iterator<B> const&);
#ifndef FIXED
bool operator==(const_iterator const&) const;
#else
friend bool operator==(iterator const&, iterator const&);
#endif
};
bool c = iterator<false>{} == iterator<false>{} // error
|| iterator<false>{} == iterator<true>{}
|| iterator<true>{} == iterator<false>{}
|| iterator<true>{} == iterator<true>{};
}
// 4) Same-type comparison but only have mixed-type operator
namespace ambiguous_choice {
enum Color { Red };
struct C {
C();
C(Color);
operator Color() const;
bool operator==(Color) const;
friend bool operator==(C, C);
};
bool c = C{} == C{}; // error
bool d = C{} == Red;
}
Differential revision: https://reviews.llvm.org/D78938
Simon Pilgrim [Thu, 17 Dec 2020 10:12:51 +0000 (10:12 +0000)]
[X86] Add X86ISD::SUBV_BROADCAST_LOAD and begin removing X86ISD::SUBV_BROADCAST (PR38969)
Subvector broadcasts are only load instructions, yet X86ISD::SUBV_BROADCAST treats them more generally, requiring a lot of fallback tablegen patterns.
This initial patch replaces constant vector lowering inside lowerBuildVectorAsBroadcast with direct X86ISD::SUBV_BROADCAST_LOAD loads which helps us merge a number of equivalent loads/broadcasts.
As well as general plumbing/analysis additions for SUBV_BROADCAST_LOAD, I needed to wrap SelectionDAG::makeEquivalentMemoryOrdering so it can handle result chains from non generic LoadSDNode nodes.
Later patches will continue to replace X86ISD::SUBV_BROADCAST usage.
Differential Revision: https://reviews.llvm.org/D92645
Krasimir Georgiev [Thu, 17 Dec 2020 10:16:08 +0000 (11:16 +0100)]
[libc] add back math.h #include utils/FPUtil/ManipulationFunctions.h
This partially reverts
cee1e7d14f4628d6174b33640d502bff3b54ae45:
[libc][NFC][Obvious] Remove few unnecessary #include directives in tests.
That commit causes a test failure in our configuration:
[ RUN ] ILogbTest.SpecialNumbers_ilogb
third_party/llvm/llvm-project/libc/test/src/math/ILogbTest.h:28: FAILURE
Expected: FP_ILOGBNAN
Which is:
2147483647
To be equal to: func(__llvm_libc::fputil::FPBits<T>::buildNaN(1))
Which is: -
2147483648
Raphael Isemann [Thu, 17 Dec 2020 09:46:26 +0000 (10:46 +0100)]
[lldb] Unify the two CreateTypedef implementations in TypeSystemClang
To get LLDB one step closer to fulfil the software redundancy requirements of
modern aircrafts, we apparently decided to have two separately maintained
implementations of `CreateTypedef` in TypeSystemClang. Let's pass on the idea of
an LLDB-powered jetliner and deleted one implementation.
On a more serious note: This function got duplicated a long time ago when the
idea of CompilerType with a backing TypeSystemClang subclass happened
(
56939cb31061d24ae3d1fc62da38b57e78bb2556). One implementation was supposed to
be called from CompilerType::CreateTypedef and the other has just always been
around to create typedefs. By accident one of the implementations is only used
by the PDB parser while the CompilerType::CreateTypedef backend is used by the
rest of LLDB.
We also had some patches over the year that only fixed one of the two functions
(D18099 for example only fixed up the CompilerType::CreateTypedef
implementation). D51162 and D86140 both fixed the same missing `addDecl` call
for one of the two implementations.
This patch:
* deletes the `CreateTypedefType` function as its only used by the PDB parser
and the `CreateTypedef` implementation is anyway needed as it's the backend
implementation of CompilerType.
* replaces the calls in the PDB parser by just calling the CompilerType wrapper.
* moves the documentation to the remaining function.
* moves the check for empty typedef names that was only in the deleted
implementation to the other (I don't think this fixes anything as I believe
all callers are already doing the same check).
I'll fix up the usual stuff (not using StringRef, not doing early exit) in a NFC
follow-up.
This patch is not NFC as the PDB parser now calls the function that has the fix
from D18099.
Reviewed By: labath, JDevlieghere
Differential Revision: https://reviews.llvm.org/D93382
sameeran joshi [Fri, 4 Dec 2020 07:34:52 +0000 (13:04 +0530)]
[Flang][openmp]Fix crash in OpenMP semantic check( bug 48308)
Fixes the bug reported in https://bugs.llvm.org/show_bug.cgi?id=48308
Reviewed By: kiranchandramohan, clementval
Differential Revision: https://reviews.llvm.org/D92638
mydeveloperday [Thu, 17 Dec 2020 09:39:37 +0000 (09:39 +0000)]
[clang-format] PR35514 brace-init member initializers in function-try-blocks are not formatted correctly
https://bugs.llvm.org/show_bug.cgi?id=35514
Initializer lists with a try-block are incorrectly formatted.
e.g.
```
Foo(int abc, int def) try : _abc(abc), _def{def}, _ghi{1} {
callA();
callB();
} catch (std::exception&) {
}
```
is formatted as:
```
Foo(int abc, int def) try : _abc(abc), _def { def }
, _ghi{1} {
callA();
callB();
}
catch (std::exception&) {
}
```
This revision adds support in the parseTryCatch for braced initializers in the initializer list
Reviewed By: curdeius, HazardyKnusperkeks
Differential Revision: https://reviews.llvm.org/D93296
David Spickett [Tue, 15 Dec 2020 16:17:28 +0000 (16:17 +0000)]
[llvm][AArch64] Actually check expected FPU for CPUs
We were passing this as an argument but never using
it. ARM has always checked this.
Note that the FPU list is shared between ARM and AArch64
so there is no AArch64::getFPUName, just ARM::getFPUName.
Reviewed By: dmgreen
Differential Revision: https://reviews.llvm.org/D93387
Florian Hahn [Thu, 17 Dec 2020 08:47:46 +0000 (08:47 +0000)]
[InstCombine] Preserve !annotation for newly created instructions.
When replacing an instruction with !annotation with a newly created
replacement, add the !annotation metadata to the replacement.
This mostly covers cases where the new instructions are created using
the ::Create helpers. Instructions created by IRBuilder will be handled
by D91444.
Reviewed By: thegameg
Differential Revision: https://reviews.llvm.org/D93399
Andrzej Warzynski [Thu, 17 Dec 2020 09:04:41 +0000 (09:04 +0000)]
[clang][nfc] Update comment to match the opening `{`
Michał Górny [Sat, 28 Nov 2020 10:11:01 +0000 (11:11 +0100)]
[lldb] [POSIX-DYLD] Update the cached exe path after attach
Fix the POSIX-DYLD plugin to update the cached executable path after
attaching. Previously, the path was cached in DYLDRendezvous
constructor and not updated afterwards. This meant that if LLDB was
attaching to a process (e.g. via connecting to lldb-server), the code
stored the empty path before DidAttach() resolved it. The fix updates
the cached path in DidAttach().
This fixes a new instance of https://llvm.org/pr17880
Differential Revision: https://reviews.llvm.org/D92264
Michał Górny [Fri, 4 Dec 2020 17:56:46 +0000 (18:56 +0100)]
[lldb] [POSIX-DYLD] Add libraries from initial rendezvous brkpt hit
Explicitly consider the libraries reported on the initial rendezvous
breakpoint hit added. This is necessary on FreeBSD since the dynamic
loader issues only a single 'consistent' state rendezvous breakpoint hit
for all the libraries present in DT_NEEDED. It is also helpful on Linux
where it ensures that ld-linux is considered loaded as well
as the shared system libraries reported afterwards.
Reenable memory maps on FreeBSD since this fixed the issue triggered
by them.
Differential Revision: https://reviews.llvm.org/D92187
Alex Zinenko [Wed, 16 Dec 2020 17:32:26 +0000 (18:32 +0100)]
[mlir] Support index and memref types in llvm.mlir.cast
This operation is designed to support partial conversion, more specifically the
IR state in which some operations expect or produce built-in types and some
operations produce and expect LLVM dialect types. It is reasonable for it to
support cast between built-in types and any equivalent that could be produced
by the type conversion. (At the same time, we don't want the dialect to depend
on the type conversion as it could lead to a dependency cycle). Introduce
support for casting from index to any integer type and back, and from memref to
bare pointer or memref descriptor type and back.
Contrary to what the TODO in the code stated, there are no particular
precautions necessary to handle the bare pointer conversion for memerfs. This
conversion applies exclusively to statically-shaped memrefs, so we can always
recover the full descriptor contents from the type.
This patch simultaneously tightens the verification for other types to only
accept matching pairs of types, e.g., i64 and !llvm.i64, as opposed to the
previous implementation that only checked if the types were generally allowed
byt not for matching, e.g. i64 could be "casted" to !llvm.bfloat, which is not
the intended semantics.
Move the relevant test under test/Dialect/LLVMIR because it is not specific to
the conversion pass, but rather exercises an op in the dialect. If we decide
this op does not belong to the LLVM dialect, both the dialect and the op should
move together.
Reviewed By: silvas, ezhulenev
Differential Revision: https://reviews.llvm.org/D93405
QingShan Zhang [Thu, 17 Dec 2020 07:59:30 +0000 (07:59 +0000)]
Expand the fp_to_int/int_to_fp/fp_round/fp_extend as libcall for fp128
X86 and AArch64 expand it as libcall inside the target. And PowerPC also
want to expand them as libcall for P8. So, propose an implement in the
legalizer to common the logic and remove the code for X86/AArch64 to
avoid the duplicate code.
Reviewed By: Craig Topper
Differential Revision: https://reviews.llvm.org/D91331
Fangrui Song [Thu, 17 Dec 2020 07:28:32 +0000 (23:28 -0800)]
Use basic_string::find(char) instead of basic_string::find(const char *s, size_type pos=0)
Many (StringRef) cannot be detected by clang-tidy performance-faster-string-find.
Wei Mi [Mon, 14 Dec 2020 22:49:20 +0000 (14:49 -0800)]
[NFC][SampleFDO] Preparation to support multiple sections with the same type
in ExtBinary format.
Currently ExtBinary format doesn't support multiple sections with the same type
in the profile. We add the support in this patch. Previously we use the section
type to identify a section uniquely. Now we introduces a LayoutIndex in the
SecHdrTableEntry and use the LayoutIndex to locate the target section. The
allocations of NameTable and FuncOffsetTable are adjusted accordingly.
Currently it works as a NFC because it won't change anything for current layout.
The test for multiple sections support will be included in another patch where a
new type of profile containing multiple sections with the same type is
introduced.
Differential Revision: https://reviews.llvm.org/D93254
Xiang1 Zhang [Thu, 17 Dec 2020 04:23:29 +0000 (20:23 -0800)]
[Debugify] Support checking Machine IR debug info
Add mir-check-debug pass to check MIR-level debug info.
For IR-level, currently, LLVM have debugify + check-debugify to generate
and check debug IR. Much like the IR-level pass debugify, mir-debugify
inserts sequentially increasing line locations to each MachineInstr in a
Module, But there is no equivalent MIR-level check-debugify pass, So now
we support it at "mir-check-debug".
Reviewed By: djtodoro
Differential Revision: https://reviews.llvm.org/D91595
Kazu Hirata [Thu, 17 Dec 2020 05:57:48 +0000 (21:57 -0800)]
[GCN] Remove unused function handleNewInstruction (NFC)
The function was added without a user on Dec 22, 2016 in commit
7e274e02ae088923e67cd13b99d52644532ad1cc. It seems to be unused since
then.
Kazu Hirata [Thu, 17 Dec 2020 05:30:44 +0000 (21:30 -0800)]
[IR, CodeGen] Use llvm::is_contained (NFC)
Mircea Trofin [Wed, 16 Dec 2020 18:20:12 +0000 (10:20 -0800)]
[NFC] factor update test function test builder as a class
This allows us to have shared logic over multiple test runs, e.g. do we
have unused prefixes, or which function bodies have conflicting outputs
for a prefix appearing in different RUN lines.
This patch is just wrapping existing functionality, and replacing its uses.
A subsequent patch would then fold the current functionality into the newly
introduced class.
Differential Revision: https://reviews.llvm.org/D93413
Craig Topper [Thu, 17 Dec 2020 04:55:23 +0000 (20:55 -0800)]
[RISCV] Infer mask type from data type for vector vle and vse intrinsics.
The mask type should have the same number of elements as the data
type.
Similar to D93409 which did this for arithmetic intrinsics.
River Riddle [Thu, 17 Dec 2020 04:35:25 +0000 (20:35 -0800)]
[mlir][NFC] Remove StandardTypes.h now that all usages point to BuiltinTypes.h
Differential Revision: https://reviews.llvm.org/D93430
Craig Topper [Thu, 17 Dec 2020 04:04:48 +0000 (20:04 -0800)]
[RISCV] Infer mask type for vector intrinsics from the data type
We can use LLVMScalarOrSameVectorWidth<0, llvm_i1_ty> to infer the mask type from the anyvector_ty. This will save us from needing to pass it to getDeclaration when creating these intrinsics from clang.
No tests updates are needed because our declarations are exploiting a behavior in the IR parser where the declaration of an intrinsic doesn't need to mention all the types as long as there isn't a name conflict in the file.
Reviewed By: khchen
Differential Revision: https://reviews.llvm.org/D93409
Xiang1 Zhang [Thu, 17 Dec 2020 04:12:01 +0000 (20:12 -0800)]
Revert "[Debugify] Support checking Machine IR debug info"
This reverts commit
50aaa8c274910d78d7bf6c929a34fe58b1f45579.
Hsiangkai Wang [Wed, 16 Dec 2020 08:46:21 +0000 (16:46 +0800)]
[RISCV] Define vector widening mul intrinsics.
Define vector widening mul intrinsics and lower them to V instructions.
We work with @rogfer01 from BSC to come out this patch.
Authored-by: Roger Ferrer Ibanez <rofirrim@gmail.com>
Co-Authored-by: Hsiangkai Wang <kai.wang@sifive.com>
Differential Revision: https://reviews.llvm.org/D93381
Hsiangkai Wang [Wed, 16 Dec 2020 08:25:46 +0000 (16:25 +0800)]
[RISCV] Define vector mul/div/rem intrinsics.
Define vector mul/div/rem intrinsics and lower them to V instructions.
We work with @rogfer01 from BSC to come out this patch.
Authored-by: Roger Ferrer Ibanez <rofirrim@gmail.com>
Co-Authored-by: Hsiangkai Wang <kai.wang@sifive.com>
Differential Revision: https://reviews.llvm.org/D93380
Hsiangkai Wang [Tue, 15 Dec 2020 06:59:22 +0000 (14:59 +0800)]
[RISCV] V does not imply F.
If users want to use vector floating point instructions, they need to
specify 'F' extension additionally.
Differential Revision: https://reviews.llvm.org/D93282
Matt Arsenault [Thu, 15 Oct 2020 22:40:02 +0000 (18:40 -0400)]
AMDGPU: Remove SGPRSpillVGPRDefinedSet hack
These VGPRs should be reserved and therefore do not need "correct"
liveness. They should not have undef uses, which can still cause
issues.
Zakk Chen [Tue, 15 Dec 2020 14:53:16 +0000 (06:53 -0800)]
[RISCV] Define vle/vse intrinsics.
Define vle/vse intrinsics and lower to V instructions.
We work with @rogfer01 from BSC to come out this patch.
Authored-by: Roger Ferrer Ibanez <rofirrim@gmail.com>
Co-Authored-by: Zakk Chen <zakk.chen@sifive.com>
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D93359
Xiang1 Zhang [Tue, 15 Dec 2020 07:48:11 +0000 (23:48 -0800)]
[Debugify] Support checking Machine IR debug info
Add mir-check-debug pass to check MIR-level debug info.
For IR-level, currently, LLVM have debugify + check-debugify to generate
and check debug IR. Much like the IR-level pass debugify, mir-debugify
inserts sequentially increasing line locations to each MachineInstr in a
Module, But there is no equivalent MIR-level check-debugify pass, So now
we support it at "mir-check-debug".
Reviewed By: djtodoro
Differential Revision: https://reviews.llvm.org/D91595
Johannes Doerfert [Mon, 23 Nov 2020 17:48:59 +0000 (11:48 -0600)]
[OpenMP] Add initial support for `omp [begin/end] assumes`
The `assumes` directive is an OpenMP 5.1 feature that allows the user to
provide assumptions to the optimizer. Assumptions can refer to
directives (`absent` and `contains` clauses), expressions (`holds`
clause), or generic properties (`no_openmp_routines`, `ext_ABCD`, ...).
The `assumes` spelling is used for assumptions in the global scope while
`assume` is used for executable contexts with an associated structured
block.
This patch only implements the global spellings. While clauses with
arguments are "accepted" by the parser, they will simply be ignored for
now. The implementation lowers the assumptions directly to the
`AssumptionAttr`.
Reviewed By: ABataev
Differential Revision: https://reviews.llvm.org/D91980
Nico Weber [Thu, 17 Dec 2020 01:49:56 +0000 (20:49 -0500)]
[gn build] (manually) port
ddffcdf0a66
Arthur Eubanks [Wed, 16 Dec 2020 23:38:58 +0000 (15:38 -0800)]
[test] Cleanup some CGSCCPassManager tests
Don't iterate over SCC as we potentially modify it.
Verify module (and fix some broken ones).
Only run pass once and make sure that it's actually run.
Rename tests to just end in a number since I'm planning on adding a
bunch more which won't have good individual names. Instead, add comments
on the transformations that each test does.
Reviewed By: rnk
Differential Revision: https://reviews.llvm.org/D93427
Nathan James [Thu, 17 Dec 2020 00:24:58 +0000 (00:24 +0000)]
[clang-tidy] Add a diagnostic callback to parseConfiguration
Currently errors detected when parsing the YAML for .clang-tidy files are always printed to errs.
For clang-tidy binary workflows this usually isn't an issue, but using clang-tidy as a library for integrations may want to handle displaying those errors in their own specific way.
Reviewed By: aaron.ballman
Differential Revision: https://reviews.llvm.org/D92920
Tres Popp [Wed, 16 Dec 2020 21:08:34 +0000 (22:08 +0100)]
[mlir] Modify linalg loops test to have nested regions
Differential Revision: https://reviews.llvm.org/D93418
LLVM GN Syncbot [Thu, 17 Dec 2020 00:07:28 +0000 (00:07 +0000)]
[gn build] Port
ac068e014b2
Atmn [Sun, 6 Dec 2020 02:41:09 +0000 (21:41 -0500)]
[OpenMP][Libomptarget][NFC] Use CMake Variables
This patchs adds CMake variables to add subdirectories and include
directories for libomptarget and explicitly gives the location of source
files.
Differential Revision: https://reviews.llvm.org/D93290