arm64: dts: qcom: sm6350-lena: Flatten gpio-keys pinctrl state

Pinctrl states typically collate multiple related pins.  In the case of
gpio-keys there's no hardware-defined relation at all except all pins
representing a key; and especially on Sony's lena board there's only one
pin regardless. Flatten it similar to other boards [1].

As a drive-by fix, clean up the label string.

[1]: https://lore.kernel.org/linux-arm-msm/11174eb6-0a9d-7df1-6f06-da4010f76453@linaro.org/

Fixes: 2b8bbe985659 ("arm64: dts: qcom: sm6350-lena: Include pm6350 and configure buttons")
Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221222215906.324092-1-marijn.suijten@somainline.org

arm64: dts: qcom: sm8250: Add compat qcom,sm8250-dsi-ctrl

Add silicon specific compatible qcom,sm8250-dsi-ctrl to the
mdss-dsi-ctrl block. This allows us to differentiate the specific bindings
for sm8250 against the yaml documentation.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221223021025.1646636-19-bryan.odonoghue@linaro.org

arm64: dts: qcom: sdm845: Add compat qcom,sdm845-dsi-ctrl

Add silicon specific compatible qcom,sdm845-dsi-ctrl to the
mdss-dsi-ctrl block. This allows us to differentiate the specific bindings
for sdm845 against the yaml documentation.

Reviewed-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221223021025.1646636-18-bryan.odonoghue@linaro.org

arm64: dts: qcom: sdm660: Add compat qcom,sdm660-dsi-ctrl

Add silicon specific compatible qcom,sdm660-dsi-ctrl to the
mdss-dsi-ctrl block. This allows us to differentiate the specific bindings
for sdm660 against the yaml documentation.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221223021025.1646636-17-bryan.odonoghue@linaro.org

arm64: dts: qcom: sdm630: Add compat qcom,sdm660-dsi-ctrl

The sdm630 can use the sdm660 mdss-dsi-ctrl compat. Currently it has the
same set of binding dependencies as sdm660.

Suggested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221223021025.1646636-16-bryan.odonoghue@linaro.org

arm64: dts: qcom: sc7280: Add compat qcom,sc7280-dsi-ctrl

Add silicon specific compatible qcom,sc7280-dsi-ctrl to the
mdss-dsi-ctrl block. This allows us to differentiate the specific bindings
for sc7280 against the yaml documentation.

Reviewed-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221223021025.1646636-15-bryan.odonoghue@linaro.org

arm64: dts: qcom: sc7180: Add compat qcom,sc7180-dsi-ctrl

Add silicon specific compatible qcom,sc7180-dsi-ctrl to the
mdss-dsi-ctrl block. This allows us to differentiate the specific bindings
for sc7180 against the yaml documentation.

Reviewed-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221223021025.1646636-14-bryan.odonoghue@linaro.org

arm64: dts: qcom: msm8996: Add compat qcom,msm8996-dsi-ctrl

Add silicon specific compatible qcom,msm8996-dsi-ctrl to the
mdss-dsi-ctrl block. This allows us to differentiate the specific bindings
for msm8996 against the yaml documentation.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221223021025.1646636-13-bryan.odonoghue@linaro.org

arm64: dts: qcom: msm8953: Add compat qcom,msm8953-dsi-ctrl

Add silicon specific compatible qcom,msm8953-dsi-ctrl to the
mdss-dsi-ctrl block. This allows us to differentiate the specific bindings
for msm8953 against the yaml documentation.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221223021025.1646636-12-bryan.odonoghue@linaro.org

arm64: dts: qcom: msm8916: Add compat qcom,msm8916-dsi-ctrl

Add silicon specific compatible qcom,msm8916-dsi-ctrl to the
mdss-dsi-ctrl block. This allows us to differentiate the specific bindings
for msm8916 against the yaml documentation.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221223021025.1646636-11-bryan.odonoghue@linaro.org

arm64: dts: qcom: sm8350: align MMC node names with DT schema

The bindings expect "mmc" for MMC/SDHCI nodes:

  sm8350-sony-xperia-sagami-pdx214.dtb: sdhci@8804000: $nodename:0: 'sdhci@8804000' does not match '^mmc(@.*)?$'

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221223161835.112079-4-krzysztof.kozlowski@linaro.org

arm64: dts: qcom: sc7280: only enable IPA for boards with a modem

IPA is only needed on a platform if it includes a modem, and not all
SC7280 SoC variants do.  The file "sc7280-herobrine-lte-sku.dtsi" is
used to encapsulate definitions related to Chrome OS SC7280 devices
where a modem is present, and that's the proper place for the IPA
node to be enabled.

Currently IPA is enabled in "sc7280-idp.dtsi", which is included by
DTS files for Qualcomm reference platforms (all of which include the
modem).  That also includes "sc7280-herobrine-lte-sku.dtsi", so
enabling IPA there would make it unnecessary for "sc7280-idp.dtsi"
to enable it.

The only other place IPA is enabled is "sc7280-qcard.dtsi".
That file is included only by "sc7280-herobrine.dtsi", which
is (eventually) included only by these top-level DTS files:
  sc7280-herobrine-crd.dts
  sc7280-herobrine-herobrine-r1.dts
  sc7280-herobrine-evoker.dts
  sc7280-herobrine-evoker-lte.dts
  sc7280-herobrine-villager-r0.dts
  sc7280-herobrine-villager-r1.dts
  sc7280-herobrine-villager-r1-lte.dts
All of but two of these include "sc7280-herobrine-lte-sku.dtsi", and
for those cases, enabling IPA there means there is no need for it to
be enabled in "sc7280-qcard.dtsi".

The two remaining cases will no longer enable IPA as a result of
this change:
  sc7280-herobrine-evoker.dts
  sc7280-herobrine-villager-r1.dts
Both of these have "lte" counterparts, and are meant to represent
board variants that do *not* have a modem.

This is exactly the desired configuration.

Signed-off-by: Alex Elder <elder@linaro.org>
Reviewed-by: Sibi Sankar <quic_sibis@quicinc.com>
Tested-by: Sibi Sankar <quic_sibis@quicinc.com>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221224002126.1518552-1-elder@linaro.org

arm64: dts: qcom: sm8350-sony-xperia-sagami: specify which LDO modes are allowed

This board uses RPMH, specifies "regulator-allow-set-load" for LDOs,
but doesn't specify any modes with "regulator-allowed-modes":

  sm8350-sony-xperia-sagami-pdx214.dtb: regulators-0: ldo5: 'regulator-allowed-modes' is a dependency of 'regulator-allow-set-load'

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221228112456.31348-2-krzysztof.kozlowski@linaro.org

arm64: dts: qcom: sm8150: Wire up MDSS

Add required nodes for MDSS and hook up provided clocks in DISPCC.
This setup is almost identical to 8[23]50.

Tested-by: Marijn Suijten <marijn.suijten@somainline.org> # Xperia 5
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221229100511.979972-3-konrad.dybcio@linaro.org

arm64: dts: qcom: sm8150: Add DISPCC node

Years after the SoC support has been added, it's high time for it to
get dispcc going. Add the node to ensure that.

Tested-by: Marijn Suijten <marijn.suijten@somainline.org> # Xperia 5
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221229100511.979972-2-konrad.dybcio@linaro.org

arm64: dts: qcom: sm8250: add cache size

Add full cache description to DTS to avoid:
1. "Early cacheinfo failed" warnings,
2. Cache topology detection which leads to early memory allocations and
   "BUG: sleeping function called from invalid context" on PREEMPT_RT
   kernel:

  smp: Bringing up secondary CPUs ...
  Detected VIPT I-cache on CPU1
  BUG: sleeping function called from invalid context at kernel/locking/spinlock_rt.c:46
  in_atomic(): 1, irqs_disabled(): 128, non_block: 0, pid: 0, name: swapper/1
  preempt_count: 1, expected: 0
  RCU nest depth: 1, expected: 1
  3 locks held by swapper/1/0:
   #0: ffff5e337eee5f18 (&pcp->lock){+.+.}-{3:3}, at: get_page_from_freelist+0x20c/0xffc
   #1: ffffa9e24a900b18 (rcu_read_lock){....}-{1:3}, at: rt_spin_trylock+0x40/0xe4
   #2: ffff5e337efc8918 (&zone->lock){+.+.}-{3:3}, at: rmqueue_bulk+0x54/0x720
  irq event stamp: 0
  Call trace:
   __might_resched+0x17c/0x214
   rt_spin_lock+0x5c/0x100
   rmqueue_bulk+0x54/0x720
   get_page_from_freelist+0xcfc/0xffc
   __alloc_pages+0xec/0x1150
   alloc_page_interleave+0x1c/0xd0
   alloc_pages+0xec/0x160
   new_slab+0x330/0x454
   ___slab_alloc+0x5b8/0xba0
   __kmem_cache_alloc_node+0xf4/0x20c
   __kmalloc+0x60/0x100
   detect_cache_attributes+0x2a8/0x5a0
   update_siblings_masks+0x28/0x300
   store_cpu_topology+0x58/0x70
   secondary_start_kernel+0xc8/0x154

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221229132731.1193713-1-krzysztof.kozlowski@linaro.org

arm64: dts: qcom: Update cache properties

The DeviceTree Specification v0.3 specifies that the cache node
'compatible' and 'cache-level' properties are 'required'. Cf.
s3.8 Multi-level and Shared Cache Nodes
The 'cache-unified' property should be present if one of the
properties for unified cache is present ('cache-size', ...).

Update the Device Trees accordingly.

About msm8953.dtsi:
According to the Devicetree Specification v0.3,
s3.7.3 'Internal (L1) Cache Properties',
  cache-unified:
  If present, specifies the cache has a unified or-
  ganization. If not present, specifies that the
  cache has a Harvard architecture with separate
  caches for instructions and data.
Plus, the 'cache-level' property seems to be reserved to higher
cache levels (cf s3.8).

To describe a l1 data/instruction cache couple, no cache
information should be described. Remove the l1 cache nodes.

Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
[bjorn: Moved "qcom" to $subject prefix]
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221107155825.1644604-17-pierre.gondois@arm.com

arm64: dts: qcom: sm8350-sagami: Rectify GPIO keys

With enough pins set properly, the hardware buttons now also work
like a charm.

Fixes: c2721b0c23d9 ("arm64: dts: qcom: Add support for Xperia 1 III / 5 III")
Tested-by: Marijn Suijten <marijn.suijten@somainline.org> # On Xperia 1 III and Xperia 5 III
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221229102712.983306-1-konrad.dybcio@linaro.org

arm64: dts: qcom: sdm632: Add device tree for Motorola G7 Power

Add device tree for the Motorola G7 Power (ocean) smartphone. This
device is based on Snapdragon 632 (sdm632) SoC which is a variant of
MSM8953.

Signed-off-by: Gabriela David <ultracoolguy@disroot.org>
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221207-msm8953-6-1-next-dtbs-v3-v3-9-a64b3b0af0eb@z3ntu.xyz

arm64: dts: qcom: msm8953: Add device tree for Xiaomi Redmi 5 Plus

Add device tree for the Xiaomi Redmi 5 Plus (vince) smartphone. This
device is based on Snapdragon 625 (msm8953) SoC.

Signed-off-by: Eugene Lepshy <fekz115@gmail.com>
Co-developed-by: Gianluca Boiano <morf3089@gmail.com>
Signed-off-by: Gianluca Boiano <morf3089@gmail.com>
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221207-msm8953-6-1-next-dtbs-v3-v3-8-a64b3b0af0eb@z3ntu.xyz

arm64: dts: qcom: msm8953: Add device tree for Xiaomi Mi A1

Add device tree for the Xiaomi Mi A1 (tissot) smartphone. This device is
based on Snapdragon 625 (msm8953) SoC.

Co-developed-by: Anton Bambura <jenneron@protonmail.com>
Signed-off-by: Anton Bambura <jenneron@protonmail.com>
Signed-off-by: Danila Tikhonov <JIaxyga@protonmail.com>
Signed-off-by: Vladimir Lypak <vladimir.lypak@gmail.com>
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221207-msm8953-6-1-next-dtbs-v3-v3-7-a64b3b0af0eb@z3ntu.xyz

arm64: dts: qcom: msm8953: Add device tree for Xiaomi Redmi Note 4X

Add device tree for the Xiaomi Redmi Note 4X (mido) smartphone. This
device is based on Snapdragon 625 (msm8953) SoC.

Signed-off-by: Adam Skladowski <a39.skl@gmail.com>
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221207-msm8953-6-1-next-dtbs-v3-v3-6-a64b3b0af0eb@z3ntu.xyz

arm64: dts: qcom: msm8953: Add device tree for Xiaomi Mi A2 Lite

Add device tree for the Xiaomi Mi A2 Lite (daisy) smartphone. This
device is based on Snapdragon 625 (msm8953) SoC.

Signed-off-by: Alejandro Tafalla <atafalla@dnyon.com>
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221207-msm8953-6-1-next-dtbs-v3-v3-5-a64b3b0af0eb@z3ntu.xyz

arm64: dts: qcom: msm8953: Add device tree for Motorola G5 Plus

Add device tree for the Motorola G5 Plus (potter) smartphone. This
device is based on Snapdragon 625 (msm8953) SoC.

Signed-off-by: Sireesh Kodali <sireeshkodali1@gmail.com>
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221207-msm8953-6-1-next-dtbs-v3-v3-4-a64b3b0af0eb@z3ntu.xyz

arm64: dts: qcom: sdm450: Add device tree for Motorola Moto G6

Add device tree for the Motorola Moto G6 (ali) smartphone. This device
is based on Snapdragon 450 (sdm450) SoC which is a variant of MSM8953.

Signed-off-by: Julian Braha <julianbraha@gmail.com>
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221207-msm8953-6-1-next-dtbs-v3-v3-3-a64b3b0af0eb@z3ntu.xyz

arm64: dts: qcom: msm8953: Adjust reserved-memory nodes

Adjust node names so they're not just memory@ but actually show what
they're used for. Also add labels to most nodes so we can easily
reference them from devices.

Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221207-msm8953-6-1-next-dtbs-v3-v3-2-a64b3b0af0eb@z3ntu.xyz

arm64: dts: qcom: Re-enable resin on MSM8998 and SDM845 boards

resin node declaration was moved to pm8998.dtsi file (in disabled state).
MSM8998 and SDM845 boards defining resin node did not previously have
status="okay" and ended up disabled.
Re-enable it by using resin node link from pm8998.dtsi with status="okay".

Fixes: f86ae6f23a9e ("arm64: dts: qcom: sagit: add initial device tree for sagit")
Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com>
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Reported-by: Marijn Suijten <marijn.suijten@somainline.org>
Link: https://lore.kernel.org/linux-arm-msm/20221222115922.jlachctn4lxopp7a@SoMainline.org/
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221228115243.201038-1-dsankouski@gmail.com

arm64: dts: qcom: sc7280: Add wifi alias for SC7280-idp

Currently, depth-charge Chrome OS bootloader code used in the SC7280
SoC accesses the WiFi node using node names (wifi@<addr>). Since
depth-charge Chrome OS bootloader is a common code that is used in
SoCs having different WiFi chipsets, it is better if the depth-charge
Chrome OS bootloader code accesses the WiFi node using a WiFi alias.
The advantage of this method is that the depth-charge Chrome OS
bootloader code need not be changed for every new WiFi chip.
Therefore, add wifi alias entry for SC7280-idp device tree.

Signed-off-by: Youghandhar Chintala <quic_youghand@quicinc.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221228094104.356-1-quic_youghand@quicinc.com

arm64: dts: qcom: sc8280xp-x13s: move 'regulator-vph-pwr' node

Move the new 'regulator-vph-pwr' node before the wlan regulator node to
restore the root-node sort order (alphabetically by node name).

While at it, add a couple of newlines to separate the properties for
consistency with the other regulator nodes.

Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221228085614.15080-1-johan+linaro@kernel.org

arm64: dts: qcom: c630: Fix firmware paths

The firmware paths were pointing to qcom/manufacturer whereas other
devices have them under qcom/chipset/manufacturer, so fix this up on the
c630, so we follow the same standard setup.

Signed-off-by: Steev Klimaszewski <steev@kali.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221226004727.204986-1-steev@kali.org

arm64: dts: qcom: sdm845: Add Data Capture and Compare(DCC) support node

Add the DCC(Data Capture and Compare) device tree node entry along with
the address of the register region.

Signed-off-by: Souradeep Chowdhury <quic_schowdhu@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/4b4289063e1b3baf98b653274060f35a5c888609.1672148732.git.quic_schowdhu@quicinc.com

arm64: dts: qcom: sc7180: Add Data Capture and Compare(DCC) support node

Add the DCC(Data Capture and Compare) device tree node entry along with
the address of the register region.

Signed-off-by: Souradeep Chowdhury <quic_schowdhu@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/08e8dc0f58145915f19d953c487a0df20a1ced1f.1672148732.git.quic_schowdhu@quicinc.com

arm64: dts: qcom: sc7280: Add Data Capture and Compare(DCC) support node

Add the DCC(Data Capture and Compare) device tree node entry along with
the address of the register region.

Signed-off-by: Souradeep Chowdhury <quic_schowdhu@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/88ef6053ee56eb0613040ea1fe33439934810330.1672148732.git.quic_schowdhu@quicinc.com

arm64: dts: qcom: sm8150: Add Data Capture and Compare(DCC) support node

Add the DCC(Data Capture and Compare) device tree node entry along with
the addresses for register regions.

Signed-off-by: Souradeep Chowdhury <quic_schowdhu@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/4737bcbce591e59b2f29d9141c1a5e41e64cc4f4.1672148732.git.quic_schowdhu@quicinc.com

arm64: dts: qcom: sm8150: Enable split pagetables for Adreno SMMU

Allow the Adreno GPU to access split pagetables specifically on the
dedicated Adreno SMMU via the qcom,adreno-smmu compatible.

Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221213002626.260267-2-konrad.dybcio@linaro.org

arm64: dts: qcom: sm8450-hdk: Enable HDMI Display

Add the HDMI display nodes and link it to DSI.

Signed-off-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221207012803.114959-6-dmitry.baryshkov@linaro.org

arm64: dts: qcom: sm8450-hdk: Add LT9611uxc HDMI bridge

Add the LT9611uxc DSI-HDMI bridge and supplies

Signed-off-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221207012803.114959-5-dmitry.baryshkov@linaro.org

arm64: dts: qcom: sm8450-hdk: enable display hardware

Enable MDSS/DPU/DSI0 on SM8450-HDK device.

Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221207012803.114959-4-dmitry.baryshkov@linaro.org

arm64: dts: qcom: sm8450: add display hardware devices

Add devices tree nodes describing display hardware on SM8450:
- Display Clock Controller
- MDSS
- MDP
- two DSI controllers and DSI PHYs

This does not provide support for DP controllers present on SM8450.

Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221207012803.114959-3-dmitry.baryshkov@linaro.org

arm64: dts: qcom: sm8450: add RPMH_REGULATOR_LEVEL_LOW_SVS_D1

Add another power saving state used on SM8450. Unfortunately adding it
in proper place causes renumbering of all the opp states in sm8450.dtsi

Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221207012803.114959-2-dmitry.baryshkov@linaro.org

arm64: dts: qcom: sdm670-google-sargo: keep pm660 ldo8 on

According to the downstream device tree, the regulator that powers the
I/O for eMMC should not be turned off. Keep it always on just in case
the eMMC driver fails and doesn't enable it, or unloads and disables it.

Fixes: 07c8ded6e373 ("arm64: dts: qcom: add sdm670 and pixel 3a device trees")
Link: https://android.googlesource.com/kernel/msm/+/9ed6ddbe955d3b84d1416a1cf77e83904d1e8421/arch/arm64/boot/dts/google/sdm670-bonito-common.dtsi#105
Signed-off-by: Richard Acayan <mailingradian@gmail.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221205225237.200564-1-mailingradian@gmail.com

arm64: dts: qcom: sc8280xp-x13s: move 'thermal-zones' node

Move the 'thermal-zones' node after the regulator nodes to restore the
root-node sort order (alphabetically by node name).

Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221227170202.21618-1-johan+linaro@kernel.org

arm64: dts: qcom: sdm845: Fix some whitespace/newlines

Remove unnecessary newlines and fix up whitespace near the soundwire
controller node.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221212111037.98160-10-konrad.dybcio@linaro.org

arm64: dts: qcom: sm8150: Use lowercase hex

Use lowercase hex, as that's the preferred and overwhermingly present
style.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221212111037.98160-9-konrad.dybcio@linaro.org

arm64: dts: qcom: sm8250: Use lowercase hex

Use lowercase hex, as that's the preferred and overwhermingly present
style.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221212111037.98160-8-konrad.dybcio@linaro.org

arm64: dts: qcom: sdm845: Use lowercase hex

Use lowercase hex, as that's the preferred and overwhermingly present
style.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221212111037.98160-7-konrad.dybcio@linaro.org

arm64: dts: qcom: sdm660: Use lowercase hex

Use lowercase hex, as that's the preferred and overwhermingly present
style.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221212111037.98160-6-konrad.dybcio@linaro.org

arm64: dts: qcom: sdm630: Use lowercase hex

Use lowercase hex, as that's the preferred and overwhermingly present
style.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221212111037.98160-5-konrad.dybcio@linaro.org

arm64: dts: qcom: msm8998: Use lowercase hex

Use lowercase hex, as that's the preferred and overwhermingly present
style.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221212111037.98160-4-konrad.dybcio@linaro.org

arm64: dts: qcom: msm8996: Use lowercase hex

Use lowercase hex, as that's the preferred and overwhermingly present
style.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221212111037.98160-3-konrad.dybcio@linaro.org

arm64: dts: qcom: ipq6018: Use lowercase hex

Use lowercase hex, as that's the preferred and overwhermingly present
style.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221212111037.98160-2-konrad.dybcio@linaro.org

arm64: dts: qcom: msm8996: Add additional A2NoC clocks

On eMMC devices, the UFS clocks aren't started in the bootloader (or well,
at least it should not be, as that would just leak power..), which results
in platform reboots when trying to access the unclocked UFS hardware,
which unfortunately happens on each and every boot, as interconnect calls
sync_state and goes over each and every path.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> #db820c
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221210200353.418391-6-konrad.dybcio@linaro.org

arm64: dts: qcom: sm8150-kumano: Configure resin as volume up key

The volume-up button on both kumanos (Xperia 1 and Xperia 5) are mapped
to resin.

Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221210142525.16974-3-konrad.dybcio@linaro.org

arm64: dts: qcom: sm8150-kumano: Add NXP PN553 NFC

Add a node for NXP PN553 NFC (or PN557, unclear data), using the
nxp-nci driver.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Tested-by: Marijn Suijten <marijn.suijten@somainline.org> # On Xperia 1 and Xperia 5
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221210142525.16974-2-konrad.dybcio@linaro.org

arm64: dts: qcom: sm8150-kumano: Add GPIO keys

Configure hardware buttons (V-, Camera Shutter/Focus) on Kumano
devices.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Tested-by: Marijn Suijten <marijn.suijten@somainline.org> # On Xperia 1 and Xperia 5
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221210142525.16974-1-konrad.dybcio@linaro.org

arm64: dts: qcom: msm8996-tone: Move status last

Align the style with other boards.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221210141000.14344-2-konrad.dybcio@linaro.org

arm64: dts: qcom: msm8996-tone: Enable SDHCI1

With the recent patch that allowed us to reset the SDHCI controller from
Linux, things started working properly. Enable SDHCI1, and by extension
eMMC. Also, remove the now-useless cmdline SDHCI quirks.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221210141000.14344-1-konrad.dybcio@linaro.org

arm64: dts: qcom: sm8250: move sound and codec nodes out of soc

The sound and codec nodes are not a property of a soc, but rather board
as it describes the sound configuration.  It also does not have unit
address:

  sm8250-hdk.dtb: soc@0: sound: {} should not be valid under {'type': 'object'}

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221210115704.97614-4-krzysztof.kozlowski@linaro.org

arm64: dts: qcom: sdm845: move sound node out of soc

The sound node is not a property of a soc, but rather board as it
describes the sound configuration.  It also does not have unit address:

  sdm845-shift-axolotl.dtb: soc@0: sound: {} should not be valid under {'type': 'object'}

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221210115704.97614-3-krzysztof.kozlowski@linaro.org

arm64: dts: qcom: sdm845: move DSI/QUP/QSPI opp tables out of SoC node

The SoC node is a simple-bus and its schema expect to have nodes only
with unit addresses:

  sdm850-lenovo-yoga-c630.dtb: soc@0: opp-table-qup: {'compatible': ['operating-points-v2'], 'phandle': [[60]], 'opp-50000000':
  ... 'required-opps': [[55]]}} should not be valid under {'type': 'object'}

Move to top-level OPP tables:
 - DSI and QUP which are shared between multiple nodes,
 - QSPI which cannot be placed in its node due to address/size cells.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221210115704.97614-2-krzysztof.kozlowski@linaro.org

arm64: dts: qcom: sc7180: move QUP and QSPI opp tables out of SoC node

The SoC node is a simple-bus and its schema expect to have nodes only
with unit addresses:

  sc7180-trogdor-lazor-r3.dtb: soc@0: opp-table-qspi: {'compatible': ['operating-points-v2'], 'phandle': [[186]], 'opp-75000000':
    ...  'required-opps': [[47]]}} should not be valid under {'type': 'object'}

Move to top-level OPP tables:
 - QUP which is shared between multiple nodes,
 - QSPI which cannot be placed in its node due to address/size cells.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221210115704.97614-1-krzysztof.kozlowski@linaro.org

arm64: dts: qcom: sdm845: drop 0x from unit address

By coding style, unit address should not start with 0x.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221210113340.63833-1-krzysztof.kozlowski@linaro.org

arm64: dts: qcom: sm6350: Fix up the ramoops node

Fix up the ramoops node to make it match bindings and style:

- remove "removed-dma-pool"
- don't pad size to 8 hex digits
- change cc-size to ecc-size so that it's used
- increase ecc-size from to 16
- remove the zeroed ftrace-size

Fixes: 5f82b9cda61e ("arm64: dts: qcom: Add SM6350 device tree")
Reported-by: Luca Weiss <luca.weiss@fairphone.com>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221210102600.589028-1-konrad.dybcio@linaro.org

arm64: dts: qcom: Use plural _gpios node label for PMIC gpios

The gpio node in PMIC dts'es define access to multiple GPIOs.  Most Qcom
PMICs were already using the plural _gpios label to point to this node,
but a few PMICs were left behind including the recently-pulled
pm(i)8950.

Rename it from *_gpio to *_gpios for pm6125, pm6150(l), pm8005,
pm(i)8950, and pm(i)8998.

Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
Acked-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221209220450.1793421-1-marijn.suijten@somainline.org

arm64: dts: qcom: pmi8950: Correct rev_1250v channel label to mv

This was pointed out in review but never followed up on thanks to
sidetracked discussions about labels vs node names.

Fixes: 0d97fdf380b4 ("arm64: dts: qcom: Add configuration for PMI8950 peripheral")
Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Luca Weiss <luca@z3ntu.xyz>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221209215437.1783067-1-marijn.suijten@somainline.org

arm64: dts: qcom: sm8150-kumano: Panel framebuffer is 2.5k instead of 4k

The framebuffer configuration for kumano griffin, written in kumano dtsi
(which is overwritten in bahamut dts for its smaller panel) has to use a
1096x2560 configuration as this is what the panel (and framebuffer area)
has been initialized to.  Downstream userspace also has access to (and
uses) this 2.5k mode by default, and only switches the panel to 4k when
requested.

Fixes: d0a6ce59ea4e ("arm64: dts: qcom: sm8150: Add support for SONY Xperia 1 / 5 (Kumano platform)")
Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221209191733.1458031-1-marijn.suijten@somainline.org

arm64: dts: qcom: sc7180: Add pazquel360 touschreen

The touchscreen was supposed to have been added when pazquel360 first
was added upstream but was missed. Add it now.

Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221209091234.v3.4.Id132522bda31fd97684cb076a44a0907cd28097d@changeid

arm64: dts: qcom: sc7180: Start the trogdor eDP/touchscreen regulator on

Now that we've added the `off-on-delay-us` for the touchpanel
regulator, we can see that we're actually hitting that delay at
bootup. I saw about 200 ms of delay.

Let's avoid that delay by starting the regulator on. We'll only do
this for eDP devices for the time being.

NOTE: we _won't_ do this for homestar. Homestar's panel really likes
to be power cycled. It's why the Linux driver for this panel has a
pm_runtime_put_sync_suspend() when the panel is being unprepared but
the normal panel-edp driver doesn't. It's also why this hardware has a
separate power rail for eDP vs. touchscreen, unlike all the other
trogdor boards. We won't start homestar's regulator on. While this
could mean a slight delay on homestar, it is probably a _correct_
delay. The bootloader might have left the regulator on (it does so in
dev and recovery modes), so if we turned the regulator off at probe
time and we actually hit the delay then we were probably violating T12
in the panel spec.

Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221209091234.v3.3.I7050a61ba3a48e44b86053f265265b5e3c0cee31@changeid

arm64: dts: qcom: sc7180: Add trogdor eDP/touchscreen regulator off-on-time

In general, the timing diagrams for components specify a minimum time
for power cycling the component. When we remove power from a device we
need to let the device fully discharge and get to a quiescent state
before applying power again. If we power a device on too soon then it
might not have fully powered off and might be in a weird in-between /
invalid state.

eDP panels typically have a time that's at least 500 ms here. You can
see that in Linux's panel-edp driver nearly every device specifies a
"unprepare" time of at least 500 ms. This is a common minimum and the
500 ms is even in the example in the eDP spec.

In Linux, the "panel-edp" driver enforces this delay for its own
control of the regulator, but the "panel-edp" driver can't do anything
about other control of the regulator (for instance, by the touchpanel
driver).

Let's add 500 ms as a board constraint for the regulator that's used
for eDP/touchpanel on trogdor boards. If a given trogdor board stuffs
only panels that can use a shorter time or stuff some panels that need
a larger time then they can manually adjust this timing.

We'll only do this minimum delay for trogdor devices with eDP (ones
that use either bridge chip), not for devices with MIPI panels. MIPI
panels could have similar constraints but the 500 ms isn't necessarily
as standard and there are no known cases where this delay is needed.

For most trogdor boards, this doesn't actually seem to affect anything
when testing against shipping Linux. However, with pazqel360 it seems
that this does make a difference. It seems that the touchscreen on
this board _also_ needs some time for the regulator to discharge. That
time is much less than 500 ms, so we'll just put the eDP panel 500 ms
in there since the board constraint should be the "max" of the
components.

Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221209091234.v3.2.I65ac577411b017eff50e7a4fda254e5583ccdc48@changeid

arm64: dts: qcom: sc7180: Bump up trogdor ts_reset_l drive strength

On at least one board (pazquel360) the reset line for the touchscreen
was scoped and found to take almost 2 ms to fall when we drove it
low. This wasn't great because the Linux driver for the touchscreen
(the elants_i2c driver) thinks it can do a 500 us reset pulse. If we
bump the drive strength to 8 mA then the reset line went down in ~421
us.

NOTE: we could apply this fix just for pazquel360, but:
* Probably other trogdor devices have similar timings and it's just
  that nobody has noticed it before.
* There are other trogdor boards using the same elan driver that tries
  to do 500 us reset pulses.
* Bumping the drive strength to 8mA across the board won't hurt. This
  isn't a high speed signal or anything.

Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221209091234.v3.1.I39c387f1e3176fcf340039ec12d54047de9f8526@changeid

arm64: dts: qcom: sm7225-fairphone-fp4: configure flash LED

Configure the pm6150l flash node for the dual flash LEDs found on FP4.

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221209-fp4-pm6150l-flash-v1-3-531521eb2a72@fairphone.com

arm64: dts: qcom: pm6150l: add spmi-flash-led node

Add a node describing the flash block found on pm6150l.

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Acked-by: Pavel Machek <pavel@ucw.cz>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221209-fp4-pm6150l-flash-v1-2-531521eb2a72@fairphone.com

arm64: dts: qcom: sm6115: Add thermal zones

Add thermal zones associated with the on-SoC temperature sensors.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221209124026.178764-1-konrad.dybcio@linaro.org

arm64: dts: qcom: Add Lenovo Tab P11 (J606F/XiaoXin Pad) dts

Add an initial device tree for the Lenovo Tab P11. Currently it
enables:

- simplefb
- SD Card slot via SDHCI2
- gpio-keys & PON keys
- UFS
- RPM regulators
- USB2

This has been validated with a rev (62) device. You can check yours
next to the serial no. on the sticker in the lower portion of the
back side of your tablet.

To get a successful boot run:

cat arch/arm64/boot/Image.gz arch/arm64/boot/dts/qcom/\
sm6115p-lenovo-j606f.dtb > .Image.gz-dtb

~/mkbootimg/mkbootimg.py \
--kernel .Image.gz-dtb \
--ramdisk some/initrd.img \
--pagesize 4096 \
--base 0x0 \
--kernel_offset 0x8000 \
--ramdisk_offset 0x1000000 \
--tags_offset 0x100 \
--cmdline 'SOME_CMDLINE' \
--dtb_offset 0x1f00000 \
--header_version 1 \
--os_version 11 \
--os_patch_level 2022-11 \
-o j606f.img

fastboot flash boot j606f.img
fastboot flash dtbo empty.img
fastboot flash recovery empty.img
fastboot reboot

Where empty.img is 2 zero-bytes.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221208201401.530555-5-konrad.dybcio@linaro.org

dt-bindings: arm: qcom: Add SM6115(P) and Lenovo Tab P11

Document SM6115P, an APQ version of SM6115.

Document Lenovo Tab P11 (J606F) as a SM6115P device.

Add SM6115 to the msm-id list of shame.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221208201401.530555-4-konrad.dybcio@linaro.org

arm64: dts: qcom: sm6115: Provide real SMD RPM XO to SDC1/2

Since we have a functioning RPM clock driver, let's make use of it
and provide the real XO clock to clients, instead of the fixed-clock
stub.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221208201401.530555-3-konrad.dybcio@linaro.org

arm64: dts: qcom: sm6115: Provide xo clk to rpmcc

rpmcc used to rely on global clock lookup (and still does so for
backwards compat reasons) of "xo_board", which was common back
when we did not care about things like underscores in node names.
Nowadays it expects to be fed a reference to the fixed clock.
Satisfy that requirement to make sure rpm clock rates are not all
stuck at zero.

Fixes: 97e563bf5ba1 ("arm64: dts: qcom: sm6115: Add basic soc dtsi")
Reported-by: Adam Skladowski <a39.skl@gmail.com>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221208201401.530555-2-konrad.dybcio@linaro.org

arm64: dts: qcom: sm6115: Fix UFS node

In its current form, UFS did not even probe successfully - it failed
when trying to set XO (ref_clk) to 300 MHz instead of doing so to
the ICE clk. Moreover, the missing reg-names prevented ICE from
working or being discovered at all. Fix both of these issues.

As a sidenote, the log reveals that this SoC uses UFS ICE v3.1.0.

Fixes: 97e563bf5ba1 ("arm64: dts: qcom: sm6115: Add basic soc dtsi")
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Iskren Chernev <me@iskren.info>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221208201401.530555-1-konrad.dybcio@linaro.org

arm64: dts: qcom: sm7225-fairphone-fp4: Add pmk8350 PMIC

The PMK8350 (which is actually a PMK8003) is used for the RTC and has
ADC for thermals.

Since the adc_tm compatible used in PMK8350 is not yet supported, skip
configuring that and the associated thermal zone for now.

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221207084045.270172-1-luca.weiss@fairphone.com

arm64: dts: qcom: sdm670: add missing usb hstx nvmem cell

This nvmem cell is present on SDM670 as well as SDM845. Add it in SDM670
so there is proper tuning.

Signed-off-by: Richard Acayan <mailingradian@gmail.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221206231729.164453-3-mailingradian@gmail.com

arm64: dts: qcom: sdm670: add qfprom node

Some hardware quirks and capabilities can be determined by reading the
fuse-programmable read-only memory. Add the QFPROM node so consumers
know if they need to do anything extra to support the hardware.

Signed-off-by: Richard Acayan <mailingradian@gmail.com>
Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221206231729.164453-2-mailingradian@gmail.com

arm64: dts: qcom: sdm632-fairphone-fp3: Add NFC

Configure the node for the NQ310 chip found on this device, which is
compatible with generic nxp-nci-i2c driver.

Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221128173744.833018-2-luca@z3ntu.xyz

arm64: dts: qcom: msm8996-xiaomi-gemini: use preferred enable-gpios for LP5562 LED

The preferred name suffix for properties with single and multiple GPIOs
is "gpios".  Linux GPIO core code supports both.  Bindings are going to
expect the "gpios" one:

  qcom/msm8996-xiaomi-gemini.dtb: lp5562@30: 'enable-gpio' does not match any of the regexes: '^led@[0-8]$', '^multi-led@[0-8]$', 'pinctrl-[0-9]+'

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221127203240.54955-1-krzysztof.kozlowski@linaro.org

arm64: dts: qcom: msm8996-tone: Fix USB taking 6 minutes to wake up

The hardware turns out to be pretty sluggish at assuming it can only
do USB2 with just a USB2 phy assigned to it - before it needed about
6 minutes to acknowledge that.

Limit it to USB-HS explicitly to make USB come up about 720x faster.

Fixes: 9da65e441d4d ("arm64: dts: qcom: Add support for SONY Xperia X Performance / XZ / XZs (msm8996, Tone platform)")
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221124220147.102611-1-konrad.dybcio@linaro.org

arm64: dts: qcom: sc8280xp-x13s: Add soundcard support

Add support for SoundCard on X13s. This patch adds support for Headset
Playback, record and 2 DMICs on the Panel along with the regulators
required for powering up the LPASS codecs.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221123104342.26140-4-srinivas.kandagatla@linaro.org

arm64: dts: qcom: sc8280xp: add SoundWire and LPASS

Add LPASS Codecs along with SoundWire controller for TX, RX, WSA and VA macros
along with LPASS LPI pinctrl node.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221123104342.26140-3-srinivas.kandagatla@linaro.org

arm64: dts: qcom: sc8280xp: add gpr node

Add GPR node along with APM(Audio Process Manager) and PRM(Proxy
resource Manager) audio services.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221123104342.26140-2-srinivas.kandagatla@linaro.org

arm64: dts: qcom: sm8350-sagami: Add GPIO line names for PMIC GPIOs

Sony ever so graciously provides GPIO line names in their downstream
kernel (though sometimes they are not 100% accurate and you can judge
that by simply looking at them and with what drivers they are used).

Add these to the PDX213&214 DTSIs to better document the hardware.

Diff between 223 and 224:

pm8350b
<  gpio-line-names = "NC", /* GPIO_1 */
>  gpio-line-names = "CAM_PWR_A_CS", /* GPIO_1 */
<    "NC",
>    "CAM_PWR_LD_EN",

pm8350c
<    "NC",
>    "WLC_TXPWR_EN",

Which is due to different camera power wiring on 213 and lack of an
additional SLG51000 PMIC on 214.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221118152028.59312-3-konrad.dybcio@linaro.org

arm64: dts: qcom: sm8350-sagami: Configure SLG51000 PMIC on PDX215

Remove the mention of this PMIC from the common DTSI, as it's not
used on PDX214. Add the required nodes to support it on PDX215.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221118152028.59312-2-konrad.dybcio@linaro.org

arm64: dts: qcom: msm8916-samsung-grandmax: Add properties function and color for keyled

keyled is white, and used as touchkey LEDs.
Add properties function and color for keyled.

Signed-off-by: Lin, Meng-Bo <linmengbo0689@protonmail.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221117144717.17886-1-linmengbo0689@protonmail.com

arm64: dts: qcom: ipq8074: add SoC specific compatible to MDIO

Add the newly documented SoC compatible to MDIO in order to be able to
validate clocks for it.

Signed-off-by: Robert Marko <robimarko@gmail.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221114194734.3287854-5-robimarko@gmail.com

arm64: dts: qcom: sc7280: align MPSS PAS node with bindings

The SC7180 MPSS/MSS remote processor can be brought to life using two
different bindings:
1. qcom,sc7280-mpss-pas - currently used in DTSI
2. qcom,sc7280-mss-pil

Move the properties related to qcom,sc7180-mss-pil (qcom,halt-regs,
qcom,ext-regs, qcom,qaccept-regs, resets and additional clocks) to
specific board using the PIL, to silence DT schema warnings.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221124184333.133911-5-krzysztof.kozlowski@linaro.org

arm64: dts: qcom: sc7180: align MPSS PAS node with bindings

The SC7180 MPSS/MSS remote processor can be brought to life using two
different bindings:
1. qcom,sc7180-mpss-pas - currently used in DTSI
2. qcom,sc7180-mss-pil

Move the properties related to qcom,sc7180-mss-pil (qcom,halt-regs,
qcom,spare-regs, resets, additional clocks and regs) to specific boards
using the PIL, to silence DT schema warnings.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221124184333.133911-4-krzysztof.kozlowski@linaro.org

arm64: dts: qcom: qcs404: align CDSP PAS node with bindings

The QCS404 CDSP remote processor can be brought to life using two
different bindings:
1. qcom,qcs404-cdsp-pas - currently used in DTSI.
2. qcom,qcs404-cdsp-pil.

Comment out the properties related to qcom,qcs404-cdsp-pil
(qcom,halt-regs, resets and additional clocks), to silence DT schema
warnings.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221124184333.133911-3-krzysztof.kozlowski@linaro.org

arm64: dts: qcom: msm8996: drop address/size cells from smd-edge

The smd-edge node does not have children with unit addresses:

  qcom/msm8996-oneplus3.dtb: remoteproc@9300000: smd-edge: '#address-cells', '#size-cells' do not match any of the regexes: 'pinctrl-[0-9]+'

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221124184333.133911-2-krzysztof.kozlowski@linaro.org

arm64: dts: qcom: qcs404: register PCIe PHY as a clock provider

Add #clock-cells to the pcie_phy node. It provides a PCIe PIPE clock.

Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221226031059.2563165-4-dmitry.baryshkov@linaro.org

arm64: dts: qcom: qcs404: add xo clock to rpm clock controller

Populate the rpm clock controller node with clocks and clock-names
properties.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221226042154.2666748-17-dmitry.baryshkov@linaro.org

arm64: dts: qcom: qcs404: add clocks to the gcc node

Populate the gcc node with the clocks and clock-names properties to
enable DT-based lookups for the parent clocks.

Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221226042154.2666748-16-dmitry.baryshkov@linaro.org

arm64: dts: qcom: qcs404: add power-domains-cells to gcc node

As gcc now provides two GDSCs, add #power-domain-cells property to the
gcc device node.

Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221226042154.2666748-15-dmitry.baryshkov@linaro.org

arm64: dts: qcom: qcs404: use symbol names for PCIe resets

The commit e5bbbff5b7d7 ("clk: gcc-qcs404: Add PCIe resets") added names
for PCIe resets, but it did not change the existing qcs404.dtsi to use
these names. Do it now and use symbol names to make it easier to check
and modify the dtsi in future.

Fixes: e5bbbff5b7d7 ("clk: gcc-qcs404: Add PCIe resets")
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221226042154.2666748-14-dmitry.baryshkov@linaro.org