vulkan/wsi: Allow platform code to define extra dependencies

Needed for the windows platform if we want to hook up DXGI swapchains.

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Acked-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16200>

vulkan/wsi: Add support for image -> image blits

The win32 swapchain can be backed by a DXGI swapchain, but such swapchains
are incompatible with STORAGE images (AKA UNORDERED_ACCESS usage in
DXGI). So, we need to allocate an intermediate image that will serve as
a render-target, and copy this image to the WSI image when QueuePresent()
is called. That's pretty similar to what we do for the buffer blit case,
except the image -> buffer copy is replaced by an image -> image copy.

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16200>

vulkan/wsi: Dissociate the blit context and image configuration steps

Even if all implementations wsi_configure_buffer_image() will need to
configure the image as well, it feels a bit weird to call
wsi_configure_image() from there, so let's the
wsi_configure_buffer_image() users call wsi_configure_image() too.

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16200>

vulkan/wsi: Prepare things for image to image blits

Right now, the WSI core supports copying WSI images to a linear buffer
for implementations that want the result in this form. This being said,
most of the blit logic can be re-used for image to image copies, and that's
exactly what we'll need if we want to hook-up DXGI swapchains in the
win32 WSI implementation. So let's rename a few fields so we no longer
imply that images are copied to a buffer, and the use_buffer_blit boolean
an enum so we can extend the implementation to support image -> image
copies.

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16200>

vulkan/wsi: Don't set use_buffer_blit manually in the win32 WSI logic

We can simply pass use_buffer_blit=true to wsi_swapchain_init().

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Acked-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16200>

vulkan/wsi: Simplify wsi_win32_surface_create_swapchain() error path

We are about to add more to this function, so let's try to automate
the cleanup steps in the error path. Incrementing image_count as
we add new images to the swapchain allows us to call
wsi_win32_swapchain_destroy() even if not all images were initialized.

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Acked-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16200>

vulkan/wsi: Indent fixes in ws_common_win32.c

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Acked-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16200>

meson: Define VK_USE_PLATFORM_WIN32_KHR for C++

Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Acked-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16200>

docs: update new_features.txt for additional work with RADV

This release (23.0) contains less features than usual but the last
branchpoint was delayed and we had end of year holidays.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20609>

intel/compiler: fine-grained control of dispatch widths

Reviewed-by: Matt Turner <mattst88@gmail.com> [v1]
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20535>

ci/venus: re-enable venus-lavapipe

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19542>

ci/venus: specify render server path to enable server config

The render server path is required by crosvm to enable render server.

v2: updated script to package server binary properly

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Corentin Noël <corentin.noel@collabora.com> (v1)
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19542>

ci: uprev virglrenderer

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Corentin Noël <corentin.noel@collabora.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19542>

Fix incorrect stage reference

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20616>

d3d12: Unionize shader variables in d3d12_shader_key to reduce size

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20616>

docs: Add short documentation about RMV tracing variables

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17331>

radv: Enable RMV tracing

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17331>

radv: Add RMV resource tracking

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17331>

radv: Add RMV tracing layer

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17331>

radv: Add RMV tracing utilities

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17331>

radv: Use internal allocation helpers for internal allocations

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17331>

vulkan: Add RMV file exporter

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17331>

vulkan: Add common RMV tracing infrastructure

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17331>

vulkan: Add RMV token definitions

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17331>

zink: set surface->dt when updating swapchain

this otherwise re-creates swapchain surfaces on every frame and has
a significant perf hit for no reason

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20613>

d3d12: Reuse sampler tables inside of a batch

If a shader's sampler state is dirty often, the sampler descriptor heap
can get used up quickly, forcing flushing. If that happens quickly, we
run out of batches and have to wait for batches to finish on the GPU.

When this happens, it is often because the sampler state is switching,
not because it's truly unique. This change hashes and saves sampler
descriptor tables that can be reused in subsequent draws in the same
batch, instead of re-copying the same descriptors and consuming the
heap.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20618>

svga: fix max number of texture cube levels

The maximum number of mipmap levels supported for cubemap can be
determined from the maximum 2D texture size. There is no need
to limit the max to 12.

This fixes a regression in creating GL4.1 and up context since
commit 2658d025166c is now explicitly checking for
MaxCubeTextureLevels >= 15 for GL4.1 context.

Reviewed-by: Neha Bhende <bhenden@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20600>

anv: Print the BO sizes in KB instead of hex bytes.

We already show the address range, which is most of why I'd think you'd be
looking at hex values.  I find a more human-readable number nice for
debugging, instead of counting zeroes to decide if it's 1.5MB or 96kb.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20540>

anv: Fix the size/aperture space debug printouts to consider _ccs_size.

It's added in at anv_bo_vma_alloc_or_close(), so count it here too.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20540>

anv: Add an aperture space summary to INTEL_DEBUG=submit.

Same as on iris, this is nice for tracking at a high level how much memory
is being used.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20540>

r300: allow more copy propagation with relative addressing

We are now extremelly careful when copy propagating a mov that uses
relative addressing. The search for readers will trigger abort when it
sees any other instruction using a relative addressing, irrespective of
the actual used registers or whether an address register load was seen.

Additionally, since ntt switch all movs using the relative addressing are
actually used only once right on the next line, and are result of ntt converting

vec4 32 ssa_10 = intrinsic load_ubo_vec4 (ssa_0, ssa_9) (access=0, base=11, component=0)

into

  5: ARL ADDR[0].x, TEMP[0].xxxx
  6: MOV TEMP[2], CONST[0][ADDR[0].x+11]

RV530 shader-db:
total instructions in shared programs: 132966 -> 131904 (-0.80%)
instructions in affected programs: 29896 -> 28834 (-3.55%)
helped: 234
HURT: 2
total temps in shared programs: 16969 -> 16905 (-0.38%)
temps in affected programs: 604 -> 540 (-10.60%)
helped: 68
HURT: 12

Partial fix for: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7723

Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Reviewed-by: Filip Gawin <filip@gawin.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20577>

aco: Use NSA on GFX11 with more than 5 vaddr registers.

On GFX11 the first 4 vaddr are single registers and the last contains the remaining vector.
image_bvh64_intersect_ray has a special NSA layout.

Foz-DB GFX1100:
Totals from 2763 (2.05% of 134913) affected shaders:
VGPRs: 145884 -> 145056 (-0.57%); split: -1.03%, +0.46%
CodeSize: 18406864 -> 18326136 (-0.44%); split: -0.47%, +0.04%
MaxWaves: 76030 -> 76146 (+0.15%)
Instrs: 3559785 -> 3525287 (-0.97%); split: -0.97%, +0.00%
Latency: 44278460 -> 43303419 (-2.20%); split: -2.33%, +0.13%
InvThroughput: 4966295 -> 4914927 (-1.03%); split: -1.04%, +0.01%
VClause: 51755 -> 51991 (+0.46%); split: -0.05%, +0.50%
SClause: 105241 -> 105267 (+0.02%); split: -0.08%, +0.10%
Copies: 214141 -> 182419 (-14.81%); split: -14.82%, +0.01%
Branches: 69525 -> 69521 (-0.01%)
PreVGPRs: 120910 -> 120256 (-0.54%); split: -0.56%, +0.02%

No changes on Navi21.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20370>

aco: Validate GFX11 NSA correctly.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20370>

aco: Handle NSA with vectors in get_mimg_nsa_dwords.

No Foz-DB changes.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20370>

mesa: add missing count_scale attributes

The EXT_gpu_program_parameters spec says:

   <params> points to an array of 4*<count> values

for both functions.

Cc: mesa-stable
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20603>

mesa: add missing count_scale attribute

The EXT_gpu_program_parameters spec says:

   <params> points to an array of 4*<count> values

Fixes: a4e935f2d70 ("mesa: add EXT_dsa + EXT_gpu_program_parameters functions")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7943
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8025
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20603>

zink: lower stipple + smooth

We can use the new functionality in the draw-helper to implement
stippled smooth lines instead of what we currently do, which is aliased
stipping on smooth lines.

Reviewed-by: Soroush Kashani <soroush.kashani@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20134>

gallium/draw: support lowering stipple + smooth

When computing line smoothing, we can also do something similar to
compute the line stippling. This can be useful for some drivers, who
can't easily split the lines before rasterizing them.

This does lead to slightly inaccurate stippling, because the
line-smoothing extends the line-length by a small amount. That leads to
the line-stippling pattern being over-stretched over the line-segment by
a fraction of a pixel in lenght. For short lines, this can be quite a
lot of error.

Reviewed-by: Soroush Kashani <soroush.kashani@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20134>

egl: const display & config pointers in eglGetConfigAttrib()

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Marek Olšák <maraeo@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20567>

egl: inline _eglReportError(), and drop this and all the other unused defines

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Marek Olšák <maraeo@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20565>

radeonsi: rewrite si_update_ps_colorbuf0_slot to fix crashes and recursions

I'm convinced that u_blitter interactions with fbfetch can't be handled
in si_update_ps_colorbuf0_slot alone, so it has to be force-disabled
by si_blitter_begin. Another reason why it has to be disabled for u_blitter
and not ignored is because FBFETCH with MSAA enables sample shading
regardless of context states, and we don't want that for u_blitter.

Also, si_update_ps_colorbuf0_slot now disables FBFETCH explicitly before
its own DCC and CMASK decompression because even though u_blitter can't do
anything (due to blitter_running), si_blitter_end calls it too.

The result is that no recursion can occur thanks to the blitter_running
and suppress_update_ps_colorbuf0_slot flags, and FBFETCH is always
force-disabled before those flags are set, which is the state we want
to be in.

Fixes: bc6d22b9200 ("radeonsi: fix ps_uses_fbfetch value")

Acked-by: Yogesh Mohan Marimuthu <yogesh.mohanmarimuthu@amd.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20318>

ci/lava: Tweak LAVA jobs timeouts

The Mesa CI LAVA job submitter was suffering from a bug in the LAVA
software that made their timeouts related to sub-actions unreliable,
such as waiting for the user login prompt automatic response.

The following MR
https://git.lavasoftware.org/lava/lava/-/merge_requests/1900 fixed this
issue. So we can now better control job timeouts granularity, failing
the job faster when there is something weird hanging the boot stage.

Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20596>

ci/lava: Update lavacli version

- Use new YAML loader derived from ruamel.yaml
- Remove PyYAML dependency from LAVA job submitter package

Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20596>

ci/venus: temporarily disable due to instability

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20622>

etnaviv: hide TS sharing behind debug option

TS sharing isn't fully stable yet. There are some fixes pending, but they
don't take care of all reported issues. Hide TS sharing behind a debug
switch until all the known issues are resolved.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20606>

docs: Add calendar entries for 23.0 release candidates.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20619>

broadcom/ci: drop duplicate job definition

See line 48 above.

Reviewed-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20605>

aco/gfx11: increase vgpr_limit to 256

fossil-db (gfx1100):
Totals from 280 (0.21% of 134574) affected shaders:
MaxWaves: 3124 -> 2846 (-8.90%); split: +3.46%, -12.36%
Instrs: 1139038 -> 1091407 (-4.18%); split: -4.18%, +0.00%
CodeSize: 5809332 -> 5486812 (-5.55%); split: -5.55%, +0.00%
VGPRs: 35004 -> 42864 (+22.45%); split: -1.85%, +24.31%
SpillSGPRs: 1896 -> 1865 (-1.64%); split: -2.37%, +0.74%
SpillVGPRs: 17807 -> 2382 (-86.62%)
Scratch: 2573312 -> 736256 (-71.39%)
Latency: 27470485 -> 17981296 (-34.54%); split: -34.54%, +0.00%
InvThroughput: 5606102 -> 6527051 (+16.43%); split: -4.19%, +20.61%
VClause: 32319 -> 19927 (-38.34%); split: -39.13%, +0.78%
SClause: 15014 -> 14897 (-0.78%); split: -0.95%, +0.17%
Copies: 102977 -> 93511 (-9.19%); split: -9.93%, +0.74%
Branches: 15164 -> 14969 (-1.29%)
PreSGPRs: 19132 -> 19014 (-0.62%)
PreVGPRs: 30494 -> 37460 (+22.84%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20251>

aco/gfx11: allow true 16-bit instructions to access v128+

It looks like the LLVM assembler promotes true 16-bit instructions to VOP3
in this case.

No fossil-db changes.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20251>

aco: disallow SGPRS/constants with interpolation instructions

https://reviews.llvm.org/D137575

The VINTRP format cannot encode anything except VGPRs.

Reading VINTERPInstructions.td, looks like it's the same for GFX11.

No fossil-db changes.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20251>

aco: add more opcodes to can_use_DPP()

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20251>

aco: allow Builder::Result to be dereferenced

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20251>

aco/gfx11: fix discard early exit removal optimization

This optimization never happened because the NULL target was removed in
GFX11.

fossil-db (gfx1100):
Totals from 5439 (4.04% of 134574) affected shaders:
Instrs: 407865 -> 387123 (-5.09%)
CodeSize: 2163340 -> 2060644 (-4.75%)
Latency: 3432378 -> 3327802 (-3.05%)
InvThroughput: 270133 -> 262980 (-2.65%)
Branches: 8524 -> 3085 (-63.81%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20513>

microsoft/spirv_to_dxil: Let linking report the need of runtime data

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20608>

etnaviv: properly check for new clear value in sampler TS setup

Comparing the 64bit clear value to the lower half 32bit clear state is
obviously wrong and results in a lot of false positives.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20586>

etnaviv: blt: properly use upper half of clear value

Instead of replicating the lower half of the clear value, properly
use the upper half to program the second clear value BLT state.

CC: mesa-stable
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20586>

ir3/print: Consider the size of input when matching it to a reg

First component of the input may never be read, so we have to find
the first component of the input which is being read.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20533>

ir3: Force flat.b sources to be equal

From cc29b940 according to Jonathan Marek using 2 immediates in a cat2
instruction is only "correct" if they are both equal.

They were not equal after reassigning of packed inlocks.

flat.b seemed to work fine even with imm values being different,
but better not to risk.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20533>

tu: Fix varyings interpolation reading stale values

tu6_vpc_varying_mode returned how many bits are consumed IF they are
non-zero, for SMOOTH mode nothing is written and it was treated like
no bits were consumed.

When input with smooth interpolation was the last one and straddled
the VPC_VARYING_INTERP_MODE regs, the last interp mode were not written.

Fixes misrendering in "Psychonauts 2".

Cc: mesa-stable
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20533>

loader/dri3: Overhaul draw->cur_num_back handling

draw->cur_num_back is no longer used for immediately reducing the number
of allocated back buffers. It just reflects how many of them are
currently allocated, and is used to prevent allocating more if the
current maximum is already reached.

This fixes an issue where the current in-progress back buffer could get
freed, which would result in visible artifacts.

Unused buffers are freed once they exceed buffer age 200. This ensures
we do not keep around more buffers than necessary in the long run.

v2:
* Drop buffer age threshold to 200. This will free unused buffers more
  quickly, and seems enough to avoid doing so prematurely even with
  "glxgears -fullscreen" running at thousands of frames per second.
* Use "buf_id != LOADER_DRI3_FRONT_ID". (Pierre-Eric Pelloux-Prayer)
* Simplify loader_dri3_get_buffers changes slightly.
* We can now use any unallocated back buffer slot in dri3_find_back.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20385>

loader/dri3: Add dri3_set_render_buffer helper

Preparation for next commit, no functional change intended.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20385>

loader/dri3: Move NULL handling into dri3_free_render_buffer

Both checking for draw->buffers[buf_id] being non-NULL, and setting
draw->buffers[buf_id] = NULL.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20385>

radv: enable PS epilogs on-demand for some dynamic states

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20201>

radv: add support for compiling PS epilogs on-demand

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20201>

radv: copy the non-compacted color format at pipeline bind time

For PS epilogs on-demand.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20201>

radv: rework PS epilog emission

With PS epilogs compiled on-demand (for some dynamic states), they need
to be emitted outside of the graphics pipeline path. Also keep track
of the last emitted PS epilog to avoid redundant emission.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20201>

radv: keep track of SPI_SHADER_COL_FORMAT for PS epilogs

To emit the related register.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20201>

radv: enable the PS epilogs cache when some ds3 states are enabled

These dynamic states need to compile PS epilogs on-demand.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20201>

radv: add support for a PS epilogs cache in the device

Similar to VS prologs.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20201>

ci/rpi4: add a couple of tests as flaky

Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20591>

ci/rpi3: add another test variant (draw-copypixels-sync) as flaky

Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20591>

gallium/draw: assert shader-stage

Nobody calls this for the wrong shader-stage. Let's turn that check into
an assert instead.

Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20096>

gallium/draw: use nir_shader_instructions_pass for nir_lower_aaline_fs

This just cuts away some needless boilerplate code.

Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20096>

radv: add a new dirty flag for the RB+ state

With PS epilogs on-demand, the non-compacted color format field won't
come from the pipeline and it seems easier to introduce a new dirty
flag for re-emitting this state.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18552>

lvp: avoid redundant sampler views and image views

Align the sampler view creation condition with the image and buffer
creation usage which maps to PIPE_BIND_SAMPLER_VIEW, which fixes the spam
of "Illegal sampler view creation without bind flag". Also fix the
PIPE_BIND_SHADER_IMAGE assignment for image usage bits and avoid setting
the image view struct if without PIPE_BIND_SHADER_IMAGE.

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20580>

zink: stop using VK_PIPELINE_CACHE_CREATE_EXTERNALLY_SYNCHRONIZED_BIT

this used to be fine back when there was only one thread doing cache management,
but now the cache is used by precompile threads too, so let the driver do sync

fixes #7660

Fixes: 41ffb15de56 ("zink: implement async gfx precompile")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20519>

agx: Remove obsolete comment

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20559>

agx: Remove dead arg

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20559>

agx: Use i0/i1 variables

Now that we've defined them.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20559>

agx: Get rid of emit_alu_bool

Deduplicate lots of cases. Splitting this out was silly, bools aren't that
special.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20559>

agx: Use agx_subdivide_to for umul_high

Helpers!

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20559>

agx: Remove dead code

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20559>

docs/envvars: Document MESA_DISK_CACHE_COMBINE_RW_WITH_RO_FOZ

Add documentation for the MESA_DISK_CACHE_COMBINE_RW_WITH_RO_FOZ environment
variable.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Juston Li <justonli@google.com>
Signed-off-by: Dmitry Osipenko <dmitry.osipenko@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20595>

util/disk_cache: Fix rw cache lookup when using combined ro+rw caches

When combining of ro+rw caches is enabled, at first the ro cache should be
looked up and if data isn't found there then rw cache should be checked.
The rw cache checking got lost by accident after the code rebase and there
was no unit test covering this condition. Fix the rw cache looking up and
add the unit test case.

Fixes: 32fe60e8c429 ("util/disk_cache: Support combined foz ro and non-foz rw caches")
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Juston Li <justonli@google.com>
Signed-off-by: Dmitry Osipenko <dmitry.osipenko@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20595>

dzn: No need to add another bind flag for clears if one is already present

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20400>

dzn: Lower tg4 offsets

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20400>

dzn: Implement point coord

Since we don't support wide points, this isn't a useful feature, but the CTS
requires a particular point coord value for the single rasterized pixel, based
on where the original point coord fell within the pixel. Since we're not doing
a quad, we don't get free interpolation like the GL driver does, so split the
logic between vertex (transform point center into screen space) and pixel
(compute delta between current pixel/sample and point center).

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20400>

dzn: Lower fragcoord wtrans

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20400>

dzn: Use the right variable for heap slots when prepping resolves

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20400>

microsoft/compiler: Set the advanced texture ops flag correctly

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20400>

microsoft/compiler: Fill out and sort the shader/module flags

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20400>

microsoft/compiler: For Vulkan, centroid should be ignored on position

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20400>

microsoft/compiler: For Vulkan, when shading at sample rate, pos is sample pos

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20400>

nir_lower_fragcoord_wtrans: Support Vulkan shaders

In Vulkan shaders, you might not have all derefs pointing to a variable

Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20400>

util/driconf: add Dune: Spice Wars workaround

As per the bug report the game does not correctly handle a uniform
index of -1 being returned for the unused array element, which
results in rendering issues. So here we skip the uniform array
resizing optimisation.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6397
Cc: mesa-stable
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20579>

d3d12: Update hard-coded heap sizes and batch limit

Increasing the heap sizes and active batch count reduces flushing
churn when rendering runs out of descriptors.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20589>

Return 'Mesa' for GL_VENDOR for community drivers

Rather than a grab-bag of random values, return 'Mesa' as the GL_VENDOR
string for all community-supported drivers.

Drivers which are primarily developed/maintained by the hardware vendor
retain that vendor's name as the GL_VENDOR string.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16064>

zink: fix the stencil write

Stencil writing also needs to be considered when setting the flag renderpass

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20245>

zink: add a condition to needs_write_s

Previously missing check on the stencil write, condition added to needs_write_s using util_writes_stencil

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20245>

lavapipe: add some safety asserts when beginning rendering

if the render area exceeds the attachment size, this is not only illegal,
it will crash later

cc: mesa-stable

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20583>