Marek Vasut [Sat, 12 May 2018 22:22:53 +0000 (00:22 +0200)]
fit: Add empty fit_print_contents() and fit_image_print()
These functions may be needed in SPL, so add empty variants of them
if CONFIG_SPL_FIT_PRINT is disabled.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Marek Vasut [Sat, 12 May 2018 22:22:52 +0000 (00:22 +0200)]
fit: Fix CONFIG_FIT_SPL_PRINT
Rename CONFIG_FIT_SPL_PRINT to CONFIG_SPL_FIT_PRINT and add Kconfig
entry for it.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Marek Vasut [Sat, 12 May 2018 20:25:28 +0000 (22:25 +0200)]
spl: fit: Add support for loading FPGA bitstream
Add support for loading FPGA into the SPL fitImage support. The
mechanism is flexible and allows user to override the actual
function for loading the FPGA itself. This is because on some
systems, the FPGA must be programmed to allow DRAM access, so
loading the full fitImage may not be possible if it contains
the bitstream. Instead, the spl_load_fpga_image() provides all
the tools to load the bitstream in parts while programming it
into the FPGA.
Signed-off-by: Marek Vasut <marex@denx.de>
[trini: Don't always have a branch to print out type]
Signed-off-by: Tom Rini <trini@konsulko.com>
Alex Kiernan [Sat, 12 May 2018 05:49:47 +0000 (05:49 +0000)]
bootcount: Add bootcount command
Add a command to manipulate the bootcounter. This is useful if you can
run device recovery from inside U-Boot and need to reset the bootcounter
after executing that process as part of altbootcmd.
Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Eugen Hristev [Fri, 11 May 2018 08:14:32 +0000 (11:14 +0300)]
configs: sama5d2_xplained: fix bootcmd/args for spi+emmc demo
For sama5d2_xplained_spiflash_defconfig, we have the demo layout
as presented on this link:
http://www.at91.com/linux4sam/bin/view/Linux4SAM/Sama5d2XplainedMainPage#SPI_eMMC_Flash_demo_Memory_map
on SPI Flash (4 Mbyte) we have Bootstrap (second level bootloader), U-boot + env
and kernel+dtb we keep on eMMC on single partition in /boot directory, formatted
with ext4.
Thus, changing the boot command to reflect this demo for the spiflash config,
and fixing up bootargs. Sama5d2_xplained does not have NAND flash, so the
bootargs were completely wrong.
Fixes: "
5abc1a45": common: Move CONFIG_BOOTARGS to Kconfig
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Eugen Hristev [Fri, 11 May 2018 08:14:31 +0000 (11:14 +0300)]
configs: sama5d2_xplained: set default FAT env location to SD-Card
For sama5d2_xplained_mmc_defconfig, we have the following layout for SD-Card:
partition 1: FAT: contains bootstrap binary (second level bootloader),
U-boot, U-boot env, kernel, dtb
partition 2: EXT4: Rootfs.
Add to defconfig CONFIG_ENV_FAT_DEVICE_AND_PART to have environment
by default on SD-Card, to align with our demo layout.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Heinrich Schuchardt [Thu, 10 May 2018 13:57:27 +0000 (15:57 +0200)]
doc: expand README.commands
Describe U_BOOT_CMD_COMPLETE.
Describe the arguments of U_BOOT_CMD and U_BOOT_CMD_COMPLETE.
Describe the arguments of the command function.
Describe the arguments of the completion function.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Eugen Hristev [Wed, 9 May 2018 13:28:38 +0000 (16:28 +0300)]
test: fs: fs-test: Modified test 1 to do a ls to a nonexistent dir
Added a simple ls to a nonexistent directory for test 1.
In case the driver is broken for a nonexistent directory, U-boot
might crash.
Here is an example failed output:
=> # Test Case 1 - ls
=> ext4ls host 0:0
<DIR> 4096 .
<DIR> 4096 ..
<DIR> 16384 lost+found
<DIR> 4096 SUBDIR
2621440000 2.5GB.file
1048576 1MB.file
=> # In addition, test with a nonexistent directory to see if we crash.
=> ext4ls host 0:0 invalid_d
** Can not find directory. **
./test/fs/fs-test.sh: line 161: 25786 Segmentation fault (core dumped) $UBOOT <<EOF
Subsequent tests will fail if U-boot crashes.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Eugen Hristev [Wed, 9 May 2018 13:28:37 +0000 (16:28 +0300)]
fs: ext4: fix crash on ext4ls
Found a crash while issuing ext4ls with a non-existent directory.
Crash test:
=> ext4ls mmc 0 1
** Can not find directory. **
data abort
pc : [<
3fd7c2ec>] lr : [<
3fd93ed8>]
reloc pc : [<
26f142ec>] lr : [<
26f2bed8>]
sp :
3f963338 ip :
3fdc3dc4 fp :
3fd6b370
r10:
00000004 r9 :
3f967ec0 r8 :
3f96db68
r7 :
3fdc99b4 r6 :
00000000 r5 :
3f96dc88 r4 :
3fdcbc8c
r3 :
fffffffa r2 :
00000000 r1 :
3f96e0bc r0 :
00000002
Flags: nZCv IRQs off FIQs off Mode SVC_32
Resetting CPU ...
resetting ...
Tested on SAMA5D2_Xplained board (sama5d2_xplained_mmc_defconfig)
Looks like crash is introduced by commit:
"fa9ca8a" fs/ext4/ext4fs.c: Free dirnode in error path of ext4fs_ls
Issue is that dirnode is not initialized, and then freed if the call
to ext4_ls fails. ext4_ls will not change the value of dirnode in this case
thus we have a crash with data abort.
I added initialization and a check for dirname being NULL.
Fixes: "fa9ca8a" fs/ext4/ext4fs.c: Free dirnode in error path of ext4fs_ls
Cc: Stefan BrĂ¼ns <stefan.bruens@rwth-aachen.de>
Cc: Tom Rini <trini@konsulko.com>
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Tuomas Tynkkynen [Wed, 9 May 2018 12:24:35 +0000 (15:24 +0300)]
i2c: Drop CONFIG_SH_SH7734_I2C
Last user of this driver went away in May 2017 in commit
eb5ba3aefdf0f6c ("i2c: Drop use of CONFIG_I2C_HARD").
Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
Acked-by: Heiko Schocher <hs@denx.de>
Tuomas Tynkkynen [Wed, 9 May 2018 12:24:34 +0000 (15:24 +0300)]
i2c: Drop CONFIG_TSI108_I2C
Last user of this driver went away in June 2015 in commit
d928664f4101e24 ("powerpc: 74xx_7xx: remove 74xx_7xx cpu support")
Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
Acked-by: Heiko Schocher <hs@denx.de>
Tuomas Tynkkynen [Wed, 9 May 2018 12:24:33 +0000 (15:24 +0300)]
net: Drop CONFIG_TSI108_ETH
Last user of this driver went away in June 2015 in commit
d928664f4101e24 ("powerpc: 74xx_7xx: remove 74xx_7xx cpu support")
Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
Eugen Hristev [Wed, 9 May 2018 10:08:01 +0000 (13:08 +0300)]
configs: sama5d2_xplained: enable ext4 command support
To support loading the zImage + DTB from the rootfs ext4 partitions,
enable the ext4 command support.
Based on original work by Wenyou Yang
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Eugen Hristev [Wed, 9 May 2018 07:58:30 +0000 (10:58 +0300)]
clk: at91: clk-h32mx: replace dm_warn with dev_dbg
dm_warn is too noisy, replace with dev_dbg for less noise.
Based on original work by Wenyou Yang
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Eugen Hristev [Wed, 9 May 2018 07:30:26 +0000 (10:30 +0300)]
configs: at91sam9x5ek: updated mtdparts variable in bootargs
We have a new demo layout of our sama5 boards for the NAND Flash
memory.
According to this new layout, adjust the mtdparts variable in bootargs
to align with this, which is available at :
http://www.at91.com/linux4sam/bin/view/Linux4SAM/Sama5d3XplainedMainPage#NAND_Flash_demo_Memory_map,
Based on original work by Wenyou Yang
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Nicolas Ferre [Wed, 9 May 2018 07:30:25 +0000 (10:30 +0300)]
configs: at91: Adjust CONFIG_ENV_OFFSET to match sama5 address
In order to have a single ENV_OFFSET to manage, use the same as the sama5 one.
This address matches our NAND flash map available at:
http://www.at91.com/linux4sam/bin/view/Linux4SAM/Sama5d3XplainedMainPage#NAND_Flash_demo_Memory_map
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
[eugen.hristev@microchip.com: rework on latest version of u-boot]
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Nicolas Ferre [Wed, 9 May 2018 07:30:24 +0000 (10:30 +0300)]
configs: at91: sama5_common: Adjust CONFIG_ENV_OFFSET to match block alignment
Fix the unaligned environment address.
This address matches our NAND flash map available at:
http://www.at91.com/linux4sam/bin/view/Linux4SAM/Sama5d3XplainedMainPage#NAND_Flash_demo_Memory_map
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
[eugen.hristev@microchip.com: rework on latest version of u-boot]
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Tom Rini [Tue, 8 May 2018 18:34:05 +0000 (14:34 -0400)]
FIT: Make fit_conf_print() be a static function
We only call fit_conf_print from one place in the code, so mark it as
static and move it up to where we call it. This in turn has us move a
few other already static functions up further as well.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Tue, 8 May 2018 15:34:36 +0000 (11:34 -0400)]
Licenses/README: Update some style and add explicit license to the document
- Add an SPDX license tag to the file, saying it's GPL-2.0.
- From the Linux Kernel v4.17-rc4, import the "License identifier
syntax" section as-is from Documentation/process/license-rules.rst
and then change it to be clearer about examples from the Linux Kernel
vs examples found in U-Boot, and when we're talking about U-Boot.
Signed-off-by: Tom Rini <trini@konsulko.com>
Alex Kiernan [Tue, 8 May 2018 04:43:31 +0000 (04:43 +0000)]
Convert CONFIG_SUPPORT_EMMC_RPMB to Kconfig
Convert CONFIG_SUPPORT_EMMC_RPMB to Kconfig. Split the command handling
from the underlying support and expose this through CMD_MMC_RPMB.
Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
Tom Rini [Tue, 8 May 2018 00:46:52 +0000 (20:46 -0400)]
arm: armv7m: Clean up some thumb / compiler flag options
- The correct way to build with thumb mode is to select SYS_THUMB_BUILD
- We should be setting -march=armv7-m in arch/arm/Makefile not the
sub-config.mk file.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Thu, 10 May 2018 11:15:54 +0000 (07:15 -0400)]
.travis.yml: Further optimizations
- Xilinx aarch64 is caught in the general xilinx arm job, exclude from
the general aarch64 job.
- Give the generic aarch64 job a better name
- Re-sort the PowerPC jobs so that we can complete them a bit quicker.
Signed-off-by: Tom Rini <trini@konsulko.com>
Daniel Schwierzeck [Thu, 10 May 2018 11:15:53 +0000 (07:15 -0400)]
buildman: support newer gcc versions from
Add support for gcc versions 7.3.0, 6.4.0 and 4.9.4.
Also use a regex for matching the tarball names. Some gcc versions
use '-ARCH-' instead of '_ARCH-'.
As part of this, we switch TravisCI to also using these toolchains for
all platforms.
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Thu, 10 May 2018 11:15:52 +0000 (07:15 -0400)]
at91: Minor tweaks to SPL logic for space savings on smartweb
- spl_board_init is empty on smartweb so drop that function
- When CONFIG_AT91SAM9_WATCHDOG is set we do not disable the watchdog in
SPL and instead let full U-Boot handle it. Instead of an empty
function just do not call a function.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Tue, 22 May 2018 17:53:26 +0000 (13:53 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-uniphier
Masahiro Yamada [Tue, 22 May 2018 15:30:54 +0000 (00:30 +0900)]
ARM: dts: uniphier: sync with Linux 4.17-rc6
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Thu, 17 May 2018 10:55:20 +0000 (19:55 +0900)]
ARM: uniphier: rename environment variable fdt_file to fdtfile
For booting Linux in the generic distro mechanism, cmd/pxe.c
retrieves the FDT file name from "fdtfile" environment variable.
Rename "fdt_file" to "fdtfile" for easier migration to distro boot.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Kunihiko Hayashi [Fri, 11 May 2018 09:49:17 +0000 (18:49 +0900)]
ARM: dts: uniphier: change phy-mode to 'internal' for LD11
Change the phy-mode property to 'internal' that means to use a built-in PHY
implemented on LD11 SoC.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Kunihiko Hayashi [Fri, 11 May 2018 09:49:16 +0000 (18:49 +0900)]
ARM: dts: uniphier: add clock-names and reset-names to ethernet node
Add clock-names and reset-names because this node recognizes multiple
clocks and resets. ("ether", and so on, for each)
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Kunihiko Hayashi [Fri, 11 May 2018 09:49:15 +0000 (18:49 +0900)]
ARM: dts: uniphier: add required clocks and resets to Pro4 ethernet node
The GIO clock/reset, another MAC clock, and the PHY clock are required
for the ethernet of Pro4 SoC.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Kunihiko Hayashi [Fri, 11 May 2018 09:49:14 +0000 (18:49 +0900)]
ARM: dts: uniphier: add syscon-phy-mode property to each ethernet node
Add syscon-phy-mode property specifying a phandle of system controller
to each ethernet node.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Tom Rini [Sun, 20 May 2018 13:47:45 +0000 (09:47 -0400)]
SPDX: Fixup SPDX tags in a few new files
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Sun, 20 May 2018 13:44:38 +0000 (09:44 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-sh
Tom Rini [Sun, 20 May 2018 13:44:13 +0000 (09:44 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-usb
Tom Rini [Sun, 20 May 2018 13:44:05 +0000 (09:44 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-socfpga
Marek Vasut [Wed, 2 May 2018 10:09:23 +0000 (12:09 +0200)]
ARM: rmobile: Unify Gen2 Makefile entry
Drop per-SoC Makefile entries and replace them with one unified entry
now that the PFC tables are gone. Shuffle the Makefile around a bit
to make it more organized.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Wed, 2 May 2018 10:07:45 +0000 (12:07 +0200)]
ARM: rmobile: Drop old R8A7794 PFC tables
All the boards use new modern PFC framework, the old PFC tables
are no longer used, so remove them.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Wed, 2 May 2018 10:07:18 +0000 (12:07 +0200)]
ARM: rmobile: Drop old R8A7793 PFC tables
All the boards use new modern PFC framework, the old PFC tables
are no longer used, so remove them.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Wed, 2 May 2018 10:06:48 +0000 (12:06 +0200)]
ARM: rmobile: Drop old R8A7792 PFC tables
All the boards use new modern PFC framework, the old PFC tables
are no longer used, so remove them.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Wed, 2 May 2018 10:06:08 +0000 (12:06 +0200)]
ARM: rmobile: Drop old R8A7791 PFC tables
All the boards use new modern PFC framework, the old PFC tables
are no longer used, so remove them.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Wed, 2 May 2018 10:05:08 +0000 (12:05 +0200)]
ARM: rmobile: Drop old R8A7790 PFC tables
All the boards use new modern PFC framework, the old PFC tables
are no longer used, so remove them.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Mon, 30 Apr 2018 12:10:36 +0000 (14:10 +0200)]
ARM: rmobile: Update V2H Blanche
The V2H Blanche port was broken since some time. This patch updates
the V2H Blanche port to use modern frameworks, DM, DT probing, SPL
for the preloading and puts it on par with the M2 Porter board.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Tue, 1 May 2018 06:57:25 +0000 (08:57 +0200)]
ARM: rmobile: Enable DM capable RCar I2C driver on Silk
Enable the DM capable driver instead of the legacy one.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Tue, 1 May 2018 06:57:20 +0000 (08:57 +0200)]
ARM: rmobile: Enable DM capable RCar I2C driver on Lager
Enable the DM capable driver instead of the legacy one.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Sat, 21 Apr 2018 16:57:28 +0000 (18:57 +0200)]
i2c: rcar_i2c: Add DM and DT capable I2C driver
Add derivative of the rcar_i2c driver which is capable of
probing itself from DM and uses DT.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Sat, 21 Apr 2018 16:54:27 +0000 (18:54 +0200)]
i2c: rcar_i2c: Remove the driver
Remove the rcar_i2c driver, since it's no longer used by any
board and will be superseded by a DM and DT capable variant.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Tom Rini [Fri, 18 May 2018 21:54:39 +0000 (17:54 -0400)]
Fixup various SPDX tags from the latest merge
Signed-off-by: Tom Rini <trini@konsulko.com>
Mugunthan V N [Fri, 18 May 2018 11:10:27 +0000 (13:10 +0200)]
drivers: usb: dwc3: remove devm_zalloc from linux_compact
devm_zalloc() is already defined in dm/device.h header, so
devm_zalloc can be removed from linux_compact.h beader file.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Fri, 18 May 2018 11:15:09 +0000 (13:15 +0200)]
usb: xhci: zynqmp: Remove support for !DM_USB
Switch to DM_USB was done and there is no need to keep !DM_USB code in
tree.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Michal Simek [Fri, 18 May 2018 11:15:08 +0000 (13:15 +0200)]
arm64: zynqmp: Use DWC3 generic driver and DM_USB
Remove harcoded XHCI lists and detect mode, speed based on DT.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Serial-changes: 2
- Remove also XHCI macros from hardware.h
- Remove additional new line in zcu106
Michal Simek [Fri, 18 May 2018 11:15:07 +0000 (13:15 +0200)]
usb: xhci: zynqmp: Add support for DM_USB
The patch is adding support for DM_USB for xhci driver.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Fri, 18 May 2018 11:15:06 +0000 (13:15 +0200)]
usb: dwc3: Add generic DWC3 glue logic driver
By enabling BLK by default this is the next driver which needs to get
support for DM_USB. Adding generic DWC3 glue logic which only
parse nodes and read device mode. Based on it probe proper
host/peripheral DWC3 drivers for it.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Mugunthan V N [Fri, 18 May 2018 11:15:05 +0000 (13:15 +0200)]
usb: common: add support to get maximum speed from dt
Add support to get maximum speed from dt so that usb drivers
makes use of it for DT parsing.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
(rebase and fix errors)
Reviewed-by: Simon Glass <sjg@chromium.org>
Mugunthan V N [Fri, 18 May 2018 11:15:04 +0000 (13:15 +0200)]
usb: dwc3: Add dwc3_init/remove with DM_USB
The patch is preparing dwc3 core for enabling DM_USB with peripheral
driver with using driver model support.
The driver will be bound by the DWC3 wrapper driver based on the
dr_mode device tree entry.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
(Remove dwc3-omap changes)
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Patrice Chotard [Fri, 27 Apr 2018 09:01:55 +0000 (11:01 +0200)]
phy: add support for STM32 usb phy controller
This patch adds phy tranceiver driver for STM32 USB PHY
Controller (usbphyc) that provides dual port High-Speed
phy for OTG (single port) and EHCI/OHCI host controller
(two ports).
One port of the phy is shared between the two USB controllers
through a UTMI+ switch.
Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Seung-Woo Kim [Thu, 10 May 2018 01:52:15 +0000 (10:52 +0900)]
gadget: f_thor: update to support more than 4GB file as thor 5.0
During file download, it only uses 32bit variable for file size and
it limits maximum file size less than 4GB. Update to support more
than 4GB file with using two 32bit variables for file size as thor
protocol 5.0.
Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
Seung-Woo Kim [Thu, 10 May 2018 01:52:14 +0000 (10:52 +0900)]
gadget: f_thor: fix filename overflow
The thor sender can send filename without null character and it is
used without consideration of overflow. Actually, character array
for filename is assigned with DEFINE_CACHE_ALIGN_BUFFER() and it
is bigger than size of memcpy, so there was no real overflow.
Fix filename overflow for code level integrity.
Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
Tom Rini [Fri, 18 May 2018 11:11:11 +0000 (07:11 -0400)]
Merge git://git.denx.de/u-boot-imx
Ley Foon Tan [Fri, 18 May 2018 14:05:35 +0000 (22:05 +0800)]
arm: dts: socfpga: stratix10: update dtsi and dts
Update dtsi and dts files for resets, phy node and other properties.
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Ley Foon Tan [Fri, 18 May 2018 14:05:25 +0000 (22:05 +0800)]
arm: socfpga: misc: Add CONFIG_SYS_L2_PL310 switch
Preparation for Stratix 10 enablement. In ARM64, L2 cache controller is
accessed through processor registers. So, add CONFIG_SYS_L2_PL310 switch
conditional build in order this file can by shared across other SOCFPGAs.
Signed-off-by: Chin Liang See <chin.liang.see@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Ley Foon Tan [Fri, 18 May 2018 14:05:24 +0000 (22:05 +0800)]
arm: socfpga: stratix10: Add pinmux support for Stratix10 SoC
Add pinmux driver support for Stratix SoC
Signed-off-by: Chin Liang See <chin.liang.see@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Ley Foon Tan [Fri, 18 May 2018 14:05:23 +0000 (22:05 +0800)]
arm: socfpga: stratix10: Add reset manager driver for Stratix10 SoC
Add Reset Manager driver support for Stratix SoC
Signed-off-by: Chin Liang See <chin.liang.see@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Ley Foon Tan [Fri, 18 May 2018 14:05:22 +0000 (22:05 +0800)]
arm: socfpga: stratix10: Add clock manager driver for Stratix10 SoC
Add Clock Manager driver support for Stratix SoC
Signed-off-by: Chin Liang See <chin.liang.see@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Ley Foon Tan [Fri, 18 May 2018 14:05:21 +0000 (22:05 +0800)]
arm: socfpga: stratix10: Add watchdog and firewall base addresses
Add the base address for watchdog and firewall.
Signed-off-by: Chin Liang See <chin.liang.see@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Ben Kalo [Tue, 15 May 2018 16:45:37 +0000 (19:45 +0300)]
ARM: socfpga: Fix Documentation errors in scu_registers
According to ARM Cortex-A9 MPCore TRM section 2.2 - SCU registers
Access Control register offset is 0x50.
Signed-off-by: Ben Kalo <ben.h.kalo@gmail.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Tien Fong Chee [Tue, 5 Dec 2017 07:58:08 +0000 (15:58 +0800)]
ARM: socfpga: Adding SoCFPGA info for both SPL and U-Boot
SoC FPGA info is required in both SPL and U-Boot.
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Tien Fong Chee [Tue, 5 Dec 2017 07:58:07 +0000 (15:58 +0800)]
ARM: socfpga: Adding clock frequency info for U-Boot
Clock frequency info is required in U-Boot because info would be erased
when transition from SPL to U-Boot.
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Tien Fong Chee [Tue, 5 Dec 2017 07:58:04 +0000 (15:58 +0800)]
ARM: socfpga: Enable SPL memory allocation
Enable memory allocation in SPL for preparation to enable FAT
in SPL. Memory allocation is needed by FAT to work properly.
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Reviewed-by: Dinh Nguyen <dinguyen@kernel.org>
Tien Fong Chee [Tue, 5 Dec 2017 07:58:03 +0000 (15:58 +0800)]
configs: Add DDR Kconfig support for Arria 10
This patch enables DDR Kconfig support for Arria 10.
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Reviewed-by: Dinh Nguyen <dinguyen@kernel.org>
Tien Fong Chee [Tue, 5 Dec 2017 07:58:02 +0000 (15:58 +0800)]
ARM: socfpga: Add DDR driver for Arria 10
Add DDR driver support for Arria 10.
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Tien Fong Chee [Tue, 5 Dec 2017 07:58:01 +0000 (15:58 +0800)]
ARM: socfpga: Add DRAM bank size initialization function
Add function for both multiple DRAM bank and single DRAM bank size
initialization. This common functionality could be used by every single
SOCFPGA board.
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Tested-by: Ley Foon Tan <ley.foon.tan@intel.com>
Tien Fong Chee [Tue, 5 Dec 2017 07:58:00 +0000 (15:58 +0800)]
ARM: socfpga: Rename the gen5 sdram driver to more specific name
Current sdram driver is only applied to gen5 device, hence it is better
to rename sdram driver to more specific name which is related to gen5
device.
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Marek Vasut [Mon, 23 Apr 2018 20:49:31 +0000 (22:49 +0200)]
ARM: socfpga: Repair A10 EMAC reset handling
The EMAC reset and PHY mode configuration was never working on the
Arria10 SoC, fix this. This patch pulls out the common code into
misc.c and passes the SoC-specific function call in as a function
pointer.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Marek Vasut [Sat, 12 May 2018 10:00:47 +0000 (12:00 +0200)]
ARM: socfpga: Synchronize Arria10 SoCDK SDMMC handoff
Regenerate Altera Arria 10 SoCDK SDMMC handoff file using latest
Quartus to get the new set of clock bindings in.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Marek Vasut [Sun, 22 Apr 2018 23:37:57 +0000 (01:37 +0200)]
ARM: socfpga: Synchronize Arria10 DTs
Synchronize Altera Arria 10 DT sources with Linux 4.16.3 as of commit
ef8216d28a5920022cddcb694d2d75bd1f0035ca
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Marek Vasut [Mon, 7 May 2018 20:29:17 +0000 (22:29 +0200)]
ARM: socfpga: Sort the DT Makefile
Sort the Makefile entries, no functional change.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Marek Vasut [Fri, 11 May 2018 22:09:21 +0000 (00:09 +0200)]
ARM: socfpga: Sync A10 clock manager binding parser
The A10 clock manager parsed DT bindings generated by Quartus the
bsp-editor to configure the A10 clocks. Sadly, those DT bindings
changed at some point. The clock manager patch used the old ones,
this patch replaces the bindings parser with one for the new set.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Marek Vasut [Fri, 11 May 2018 20:26:35 +0000 (22:26 +0200)]
ARM: socfpga: Convert to DM serial
Pull the serial port configuration from DT and use DM serial instead
of having the serial configuration in two places, DT and board config.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Marek Vasut [Fri, 11 May 2018 20:25:59 +0000 (22:25 +0200)]
ARM: socfpga: Clean up Kconfig entries
Shuffle the default Kconfig entries around so it is not such a mess.
No functional change.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Marek Vasut [Sun, 22 Apr 2018 23:26:10 +0000 (01:26 +0200)]
ARM: socfpga: Zap CONFIG_SOCFPGA_VIRTUAL_TARGET
This was never used, is not used anywhere and is just in the way
by adding annoying ifdeffery. Get rid of it.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Marek Vasut [Thu, 26 Apr 2018 20:23:05 +0000 (22:23 +0200)]
ARM: socfpga: Put stack at the end of SRAM
The global data are in the .data section, so there's no point in
reserving any space for it above stack. Put stack at the end of
SRAM.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Marek Vasut [Sat, 12 May 2018 09:56:10 +0000 (11:56 +0200)]
fdt: Add another Altera Arria10 clock init compatible
The DT bindings for the Arria10 clock init have changed, add another
compatible to make them work with U-Boot until a proper clock driver
gets written.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Lukasz Majewski [Thu, 26 Apr 2018 13:07:18 +0000 (15:07 +0200)]
arm: imx53: Add support for imx53 boards from K+P
This commit adds support for DDC and HSC boards from
K+P in u-boot.
Console output:
U-Boot 2018.05-rc2-00090-g752b7ed6f9 (Apr 26 2018 - 14:24:24 +0200)
CPU: Freescale i.MX53 rev2.1 at 800 MHz
Reset cause: WDOG
Model: K+P iMX53
DRAM: 512 MiB
MMC: FSL_SDHC: 0
Loading Environment from MMC... OK
In: serial
Out: serial
Err: serial
Module EEPROM:
ID: TQMa53-CB.0401
SN:
63152762
MAC: 00:0b:64:03:14:2a
BBoard:40x0 Rev:10
Net: eth0: ethernet@
63fec000
Hit any key to stop autoboot: 0
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Lukasz Majewski [Tue, 15 May 2018 14:26:43 +0000 (16:26 +0200)]
sandbox: tests: Add tests for mc34708 PMIC device
Following tests has been added for mc34708 device:
- get_test for mc34708 PMIC
- Check if proper number of registers is read
- Check if default (emulated via i2c device) value is properly read
- Check if value write/read operation is correct
- Perform tests to check if pmic_clrsetbits() is working correctly
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Lukasz Majewski [Tue, 15 May 2018 14:26:42 +0000 (16:26 +0200)]
sandbox: tests: Exclude common test code (pmic_get) in test/dm/pmic.c
The common code can be excluded to be reused by tests for other PMIC.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Lukasz Majewski [Tue, 15 May 2018 14:26:41 +0000 (16:26 +0200)]
sandbox: Enable MC34708 PMIC support
This MC34708 PMIC is somewhat special - it used single transfers (R/W) with
3 bytes size - up till now U-Boot's PMICs only used 1 byte.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Lukasz Majewski [Tue, 15 May 2018 14:26:40 +0000 (16:26 +0200)]
sandbox: Enable support for MC34708 PMIC in DTS
This commit also provides the default values of the emulated MC34708 PMIC
internal registers content.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Lukasz Majewski [Tue, 15 May 2018 14:26:39 +0000 (16:26 +0200)]
sandbox: Rewrite i2c_pmic_emul.c to support PMIC with 3 bytes transmission
This change enables support for MC34708 PMIC in sandbox. Now we can
emulate the I2C transfers larger than 1 byte.
Notable changes for this driver:
- From now on the register number is not equal to index in the buffer,
which emulates the PMIC registers
- The PMIC register's pool is now dynamically allocated up till
64 regs * 3 bytes each = 192 B
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Lukasz Majewski [Tue, 15 May 2018 14:26:38 +0000 (16:26 +0200)]
pmic: Rewrite the pmic command to not only work with single byte transmission
Up till now it was only possible to use 'pmic' command with a single byte
transmission.
The pmic_read|write functions has been replaced with ones, which don't need
the transmission length as a parameter.
Due to that it is possible now to read data from PMICs transmitting more
data than 1 byte at once (e.g. mc34708)
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Lukasz Majewski [Tue, 15 May 2018 14:26:37 +0000 (16:26 +0200)]
pmic: dm: Add support for MC34708 for PMIC DM
This patch adds support for MC34708 PMIC, to be used with driver model
(DM).
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Lukasz Majewski [Tue, 15 May 2018 14:26:36 +0000 (16:26 +0200)]
pmic: dm: Rewrite pmic_reg_{read|write|clrsetbits} to support 3 bytes transmissions
This commit provides support for transmissions larger than 1 byte for
PMIC devices used with DM (e.g. MC34708 from NXP).
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Lukasz Majewski [Tue, 15 May 2018 14:26:35 +0000 (16:26 +0200)]
pmic: Add support for setting transmission length in uclass private data
The struct uc_pmic_priv's trans_len field stores the number of types to
be transmitted per PMIC transfer.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Lukasz Majewski [Tue, 15 May 2018 14:26:34 +0000 (16:26 +0200)]
pmic: fsl: Define number of bytes sent at once by MC34708 PMIC
This patch adds definition of the number of bytes sent at once by the
MC34708 PMIC.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Lukasz Majewski [Tue, 15 May 2018 14:26:33 +0000 (16:26 +0200)]
pmic: fsl: Provide some more definitions for MC34708 PMIC
This commit adds some more defines for MC34708 PMIC.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Jagan Teki [Mon, 7 May 2018 05:51:40 +0000 (11:21 +0530)]
configs: imx6dl-mamoj: Enable HAB
Enable Secure boot(HAB) for BTicino Mamoj board.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Jagan Teki [Mon, 7 May 2018 05:51:39 +0000 (11:21 +0530)]
configs: imx6dl-mamoj: Add Falcon mode support
Add Falcon mode support to boot Linux directly after SPL.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Jagan Teki [Mon, 7 May 2018 05:51:38 +0000 (11:21 +0530)]
configs: imx6dl-mamoj: Add DFU support
Add DFU support for BTicino Mamoj board and update
the same steps in README.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Simone CIANNI <simone.cianni@bticino.it>
Signed-off-by: Raffaele RECALCATI <raffaele.recalcati@bticino.it>
Jagan Teki [Mon, 7 May 2018 05:51:37 +0000 (11:21 +0530)]
configs: imx6dl_mamoj: Enable fastboot and ums
Enable fastboot and ums for host to interact eMMC on
Mamoj board.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Simone CIANNI <simone.cianni@bticino.it>
Signed-off-by: Raffaele RECALCATI <raffaele.recalcati@bticino.it>
Jagan Teki [Mon, 7 May 2018 05:51:36 +0000 (11:21 +0530)]
i.MX6DL: mamoj: Add PFUZE100 support
MX6DL Mamoj boards has Freescale PFUZE100 PMIC, add support
for it through DM_PMIC dt definition.
pmic log:
Reviewed-by: Stefano Babic <sbabic@denx.de>
========
=> pmic list
| Name | Parent name | Parent uclass @ seq
| pfuze100@08 | i2c@
021f8000 | i2c @ 3
=> pmic dev pfuze100@08
dev: 0 @ pfuze100@08
=> pmic dump
Dump pmic: pfuze100@08 registers
0x00: 10 00 00 21 00 01 3f 01 00 7f 00 00 00 00 00 81
0x10: 00 00 3f 00 00 00 00 00 00 00 00 10 00 00 00 00
0x20: 2b 2b 2b 08 c4 00 00 00 00 00 00 00 00 00 2b 2b
0x30: 2b 08 c4 00 00 72 72 72 08 d4 00 00 2c 2c 2c 08
0x40: e4 00 00 2c 2c 2c 08 e4 00 00 6f 6f 6f 08 f4 00
0x50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0x60: 00 00 00 00 00 00 48 00 00 00 10 06 1e 1e 17 10
0x70: 1a 1f 00 00 00 00 00 00 00 00 00 00 00 00 00
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Simone CIANNI <simone.cianni@bticino.it>
Signed-off-by: Raffaele RECALCATI <raffaele.recalcati@bticino.it>
Jagan Teki [Mon, 7 May 2018 05:51:35 +0000 (11:21 +0530)]
i.MX6DL: mamoj: Add I2C support
i.MX6DL Mamoj has i2c3 and i2c4 buses, add support
through DM_I2C with dt definition.
i2c log:
Reviewed-by: Stefano Babic <sbabic@denx.de>
=======
=> i2c bus
Bus 2: i2c@
021a8000
Bus 3: i2c@
021f8000
=> i2c dev 2
Setting bus to 2
=> i2c speed 400000
Setting bus speed to 400000 Hz
=> i2c probe
Valid chip addresses: 20 51 53
=> i2c md 53 0xff
00ff: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................
=> i2c md 51 0xff
00ff: a8 08 40 50 09 43 46 52 42 18 80 8e ae a9 d0 53 ..@P.CFRB......S
=> i2c dev 3
Setting bus to 3
=> i2c speed 100000
Setting bus speed to 100000 Hz
=> i2c probe
Valid chip addresses: 08 40 48 4B
=> i2c md 08 0xff
00ff: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Simone CIANNI <simone.cianni@bticino.it>
Signed-off-by: Raffaele RECALCATI <raffaele.recalcati@bticino.it>