Kristian H. Kristensen [Wed, 15 Jan 2020 00:56:41 +0000 (16:56 -0800)]
iris: Print warning and return *out = NULL when fd to syncobj fails
Signed-off-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Kristian H. Kristensen [Thu, 19 Dec 2019 18:56:03 +0000 (10:56 -0800)]
iris: Advertise PIPE_CAP_NATIVE_FENCE_FD
Enables EGL_ANDROID_native_fence_sync.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Kenneth Graunke [Thu, 19 Dec 2019 21:51:07 +0000 (13:51 -0800)]
iris: Fix export of fences that have already completed.
After flushing batches, iris_fence_flush() asks the kernel whether
each batch's last_syncpt has already signalled or not. (The idea is
that either the compute or render batch may not have actually had any
work queued up, so last_syncpt there might have been signalled a long
time ago.) If it's already completed, we don't bother to record it.
A strange corner is the case of repeated flushes. For example, we
might flush for some reason, and hit a glFlush(), and hit SwapBuffers.
It's possible for all the batches to have been flushed previously, -and-
for them to have actually completed. In this case, we'll see that there
are no syncobj's to wait on, and record fence->count == 0.
This works fine internally - fence_finish can see count == 0 and realize
that it doesn't need to wait, for example. But when working with native
FDs, we may be asked to export a fence with count == 0. So we need an
actual synchronization primitive we can hand off. Because all of the
relevant batches had been signalled when creating the fence, we want the
new dummy fence to be signalled as well.
So we just make a signalled syncobj and export it.
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Robert Foss [Wed, 15 Jan 2020 00:11:23 +0000 (01:11 +0100)]
android: Fix whitespace issue
Signed-off-by: Robert Foss <robert.foss@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Robert Foss [Wed, 15 Jan 2020 00:14:16 +0000 (01:14 +0100)]
panfrost: Prefix schedule_program to prevent collision
Currently the schedule_program implementation being used is picked
at compile time, which on the Android platform means that the
bifrost compiler & scheduler is used for all targets, including
midgard based hardware.
This commit disambiguates between the two schedule_program functions.
Signed-off-by: Robert Foss <robert.foss@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Marek Olšák [Wed, 15 Jan 2020 01:40:51 +0000 (20:40 -0500)]
radeonsi: merge si_compile_llvm and si_llvm_compile functions
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3399>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3399>
Marek Olšák [Wed, 15 Jan 2020 01:27:24 +0000 (20:27 -0500)]
radeonsi: remove useless #includes
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3399>
Marek Olšák [Wed, 15 Jan 2020 01:17:08 +0000 (20:17 -0500)]
radeonsi: move code for shader resources into si_shader_llvm_resources.c
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3399>
Marek Olšák [Wed, 15 Jan 2020 01:03:48 +0000 (20:03 -0500)]
radeonsi: move geometry shader code into si_shader_llvm_gs.c
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3399>
Marek Olšák [Wed, 15 Jan 2020 00:29:34 +0000 (19:29 -0500)]
radeonsi: remove llvm_type_is_64bit
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3399>
Marek Olšák [Wed, 15 Jan 2020 00:13:42 +0000 (19:13 -0500)]
radeonsi: move tessellation shader code into si_shader_llvm_tess.c
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3399>
Marek Olšák [Tue, 24 Dec 2019 00:53:46 +0000 (19:53 -0500)]
radeonsi: move si_insert_input_* functions
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3399>
Marek Olšák [Thu, 9 Jan 2020 02:52:26 +0000 (21:52 -0500)]
radeonsi: work around an LLVM crash when using llvm.amdgcn.icmp.i64.i1
Cc: 19.2 19.3 <mesa-stable@lists.freedesktop.org>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3338>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3338>
Marek Olšák [Thu, 9 Jan 2020 02:51:23 +0000 (21:51 -0500)]
radeonsi: fix si_build_wrapper_function for compute-based primitive culling
Fixes:
3b143369a55 "ac/nir, radv, radeonsi: Switch to using ac_shader_args"
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3338>
Marek Olšák [Fri, 3 Jan 2020 23:02:30 +0000 (18:02 -0500)]
radeonsi/gfx10: separate code for determining the number of vertices for NGG
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Marek Olšák [Fri, 3 Jan 2020 21:25:48 +0000 (16:25 -0500)]
radeonsi/gfx10: separate code for getting edgeflags from the gs_invocation_id VGPR
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Marek Olšák [Tue, 24 Dec 2019 01:17:46 +0000 (20:17 -0500)]
radeonsi: move VS_STATE.LS_OUT_PATCH_SIZE a few bits higher to make space there
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Marek Olšák [Tue, 24 Dec 2019 00:53:46 +0000 (19:53 -0500)]
radeonsi: make si_insert_input_* functions non-static
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Marek Olšák [Tue, 7 Jan 2020 00:19:40 +0000 (19:19 -0500)]
ac/cull: don't read Position.Z if it's not needed for culling
It could be NULL.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Marek Olšák [Tue, 24 Dec 2019 03:16:42 +0000 (22:16 -0500)]
radeonsi: separate code computing info for small primitive culling
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Kenneth Graunke [Wed, 15 Jan 2020 08:31:49 +0000 (00:31 -0800)]
intel/compiler: Fix illegal mutation in get_nir_image_intrinsic_image
get_nir_image_intrinsic_image() was incorrectly mutating the value held
by the register which holds the intrinsic's first source (image index).
If this happened to be the register for an SSA def which is also used
elsewhere in the program, this meant that we would clobber that value
in subsequent uses.
Note that this only affects i965, because neither anv nor iris use the
binding table start sections, so nothing is ever added here.
Fixes KHR-GL46.compute_shader.resources-max on i965 with Eric Anholt's
MR !3240 applied. That MR reorders SSBOs and ABOs, so that test uses
image 0 and SSBO 0, causing this code to brilliantly add binding table
index 45 to both the image (correct) and the SSBO (bzzt, wrong!).
Fixes:
09f1de97a76 ("anv,i965: Lower away image derefs in the driver")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3404>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3404>
Rob Clark [Wed, 15 Jan 2020 16:50:55 +0000 (08:50 -0800)]
gitlab-ci: fix missing caselist.css/xsl
My best guess is that this was broken by
d62dd8b0
Signed-off-by: Rob Clark <robdclark@chromium.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3413>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3413>
Jason Ekstrand [Wed, 15 Jan 2020 15:25:51 +0000 (09:25 -0600)]
relnotes: Add Vulkan 1.2
Samuel Pitoiset [Mon, 25 Nov 2019 20:29:01 +0000 (21:29 +0100)]
radv: enable Vulkan 1.2
This bumps the Vulkan version to 1.2.128.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Tue, 26 Nov 2019 07:34:33 +0000 (08:34 +0100)]
radv: implement Vulkan 1.2 features and properties
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Tue, 26 Nov 2019 07:13:14 +0000 (08:13 +0100)]
radv: implement Vulkan 1.1 features and properties
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Mon, 25 Nov 2019 19:50:12 +0000 (20:50 +0100)]
radv: update VK_KHR_timeline_semaphore for Vulkan 1.2
Promoted to Vulkan 1.2 with the KHR suffix omitted.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Tue, 15 Oct 2019 08:21:20 +0000 (10:21 +0200)]
radv: update VK_KHR_uniform_buffer_standard_layout for Vulkan 1.2
Promoted to Vulkan 1.2 with the KHR suffix omitted.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Tue, 26 Nov 2019 13:08:00 +0000 (14:08 +0100)]
radv: update VK_KHR_shader_subgroup_extended_types for Vulkan 1.2
Promoted to Vulkan 1.2 with the KHR suffix omitted.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Tue, 26 Nov 2019 13:07:07 +0000 (14:07 +0100)]
radv: update VK_KHR_shader_float_controls for Vulkan 1.2
Promoted to Vulkan 1.2 with the KHR suffix omitted.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Tue, 26 Nov 2019 13:05:13 +0000 (14:05 +0100)]
radv: update VK_KHR_shader_float16_int8 for Vulkan 1.2
Promoted to Vulkan 1.2 with the KHR suffix omitted.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Tue, 15 Oct 2019 08:16:37 +0000 (10:16 +0200)]
radv: update VK_KHR_shader_atomic_int64 for Vulkan 1.2
Promoted to Vulkan 1.2 with the KHR suffix omitted.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Tue, 15 Oct 2019 08:15:04 +0000 (10:15 +0200)]
radv: update VK_KHR_imageless_framebuffer for Vulkan 1.2
Promoted to Vulkan 1.2 with the KHR suffix omitted.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Tue, 15 Oct 2019 07:26:20 +0000 (09:26 +0200)]
radv: update VK_KHR_image_format_list for Vulkan 1.2
Promoted to Vulkan 1.2 with the KHR suffix omitted.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Tue, 15 Oct 2019 07:24:07 +0000 (09:24 +0200)]
radv: update VK_KHR_driver_properties for Vulkan 1.2
Promoted to Vulkan 1.2 with the KHR suffix omitted.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Tue, 15 Oct 2019 07:22:04 +0000 (09:22 +0200)]
radv: update VK_KHR_draw_indirect_count for Vulkan 1.2
Promoted to Vulkan 1.2 with the KHR suffix omitted.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Tue, 15 Oct 2019 07:20:48 +0000 (09:20 +0200)]
radv: update VK_KHR_depth_stencil_resolve for Vulkan 1.2
Promoted to Vulkan 1.2 with the KHR suffix omitted.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Tue, 15 Oct 2019 07:09:41 +0000 (09:09 +0200)]
radv: update VK_KHR_create_renderpass2 for Vulkan 1.2
Promoted to Vulkan 1.2 with the KHR suffix omitted.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Tue, 26 Nov 2019 08:59:27 +0000 (09:59 +0100)]
radv: update VK_KHR_buffer_device_address for Vulkan 1.2
Promoted to Vulkan 1.2 with the KHR suffix omitted.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Tue, 15 Oct 2019 07:03:28 +0000 (09:03 +0200)]
radv: update VK_KHR_8bit_storage for Vulkan 1.2
Promoted to Vulkan 1.2 with the KHR suffix omitted.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Tue, 15 Oct 2019 07:00:19 +0000 (09:00 +0200)]
radv: update VK_EXT_scalar_block_layout for Vulkan 1.2
Promoted to Vulkan 1.2 with the EXT suffix omitted.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Tue, 15 Oct 2019 06:58:55 +0000 (08:58 +0200)]
radv: update VK_EXT_sampler_filter_minmax for Vulkan 1.2
Promoted to Vulkan 1.2 with the EXT suffix omitted.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Tue, 15 Oct 2019 06:55:07 +0000 (08:55 +0200)]
radv: update VK_EXT_host_query_reset for Vulkan 1.2
Promoted to Vulkan 1.2 with the EXT suffix omitted.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Tue, 26 Nov 2019 13:01:43 +0000 (14:01 +0100)]
radv: update VK_EXT_descriptor_indexing for Vulkan 1.2
Promoted to Vulkan 1.2 with the EXT suffix omitted.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Iván Briano [Mon, 16 Sep 2019 22:41:45 +0000 (15:41 -0700)]
anv: Enable Vulkan 1.2 support
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Jason Ekstrand [Mon, 13 Jan 2020 19:44:16 +0000 (13:44 -0600)]
anv: Implement the new core version property queries
Vulkan 1.2 introduces some new structures to get the properties and
features of a device from extensions that were promoted to core in 1.1
and 1.2. This commit implements the new property queries and makes all
of the corresponding extension queries map to them.
Reviewed-by: Iván Briano <ivan.briano@intel.com>
Jason Ekstrand [Mon, 13 Jan 2020 18:57:56 +0000 (12:57 -0600)]
anv: Implement the new core version feature queries
Vulkan 1.2 introduces some new structures to get the properties and
features of a device from extensions that were promoted to core in 1.1
and 1.2. This commit implements the new feature queries and makes all
of the corresponding extension queries map to them.
Reviewed-by: Iván Briano <ivan.briano@intel.com>
Jason Ekstrand [Mon, 16 Dec 2019 16:43:18 +0000 (10:43 -0600)]
anv,nir: Lower quad_broadcast with dynamic index in NIR
This is required for the subgroupBroadcastDynamicId feature that was
added in Vulkan 1.2.
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Jason Ekstrand [Wed, 15 Jan 2020 14:08:32 +0000 (08:08 -0600)]
anv: Bump the patch version to 131
Samuel Pitoiset [Tue, 15 Oct 2019 07:22:30 +0000 (09:22 +0200)]
vulkan/overlay: Fix for Vulkan 1.2
v2 (Jason Ekstrand):
- Add duplicate hooks for both the 1.2 and KHR versions of
vkCmdDraw[Indexed]IndirectCount.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Jason Ekstrand [Wed, 15 Jan 2020 14:34:06 +0000 (08:34 -0600)]
turnip: Pretend to support Vulkan 1.2
It doesn't really support any Vulkan properly yet so why not claim 1.2?
This was an easier way of fixing the build than trying to roll it
forward to a later version of ANV's entrypoint generator scripts.
Jason Ekstrand [Wed, 15 Jan 2020 13:59:32 +0000 (07:59 -0600)]
vulkan: Update the XML and headers to 1.2.131
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Michel Dänzer [Mon, 13 Jan 2020 08:45:57 +0000 (09:45 +0100)]
gitlab-ci: Stop using manual jobs for merge requests
They were causing trouble with Marge Bot: The project settings require
that the pipeline succeeds before a merge request (MR) can be merged,
otherwise Marge doesn't wait for the pipeline to succeed before merging
an MR assigned to her. But Marge can't start manual jobs, so she would
always time out waiting for pipelines with manual jobs.
To avoid this, use these rules:
* Run the pipeline by default for MRs and main project branches changing
any files affecting it.
* For other MRs, run a single dummy job which always succeeds.
* Don't run any jobs for main project branch changes (e.g. from an MR
having been merged) not affecting the pipeline.
* Allow jobs to be started manually on branches of forked projects, as
before.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Acked-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3361>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3361>
Pierre-Eric Pelloux-Prayer [Fri, 20 Dec 2019 12:39:07 +0000 (13:39 +0100)]
radeonsi: drop the negation from fmask_is_not_identity
This change eases code reading ("fmask_is_identity = true" is clearer than
"fmask_is_not_identity = false").
Initialization is not changed so fmask_is_identity is false when a texture is
created.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3174>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3174>
Pierre-Eric Pelloux-Prayer [Fri, 20 Dec 2019 12:33:42 +0000 (13:33 +0100)]
radeonsi: unbind image before compute clear
It's not used and avoid infinite recursion when used from si_compute_expand_fmask
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3174>
Pierre-Eric Pelloux-Prayer [Thu, 19 Dec 2019 18:54:16 +0000 (19:54 +0100)]
radeonsi: make sure fmask expand is done if needed
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2248
Fixes:
095a58204d9 ("radeonsi: expand FMASK before MSAA image stores are used")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3174>
Pierre-Eric Pelloux-Prayer [Thu, 19 Dec 2019 18:09:54 +0000 (19:09 +0100)]
radeonsi: fix fmask expand compute shader
'coord' variable was using TGSI_WRITEMASK_XYZ so subsequent uses of
TGSI_WRITEMASK_W were dropped.
The result for a 2 samples program was:
0: UMAD TEMP[0].xy, SV[1].xyyy, IMM[0].xxxx, SV[0].xyyy
1: STORE IMAGE[0], TEMP[0], TEMP[1], RESTRICT, 2D_MSAA
2: STORE IMAGE[0], TEMP[0], TEMP[2], RESTRICT, 2D_MSAA
3: END
instead of the expected:
0: UMAD TEMP[0].xy, SV[1].xyyy, IMM[0].xxxx, SV[0].xyyy
1: MOV TEMP[0].w, IMM[0].yyyy
2: LOAD TEMP[1], IMAGE[0], TEMP[0], RESTRICT, 2D_MSAA
3: MOV TEMP[0].w, IMM[0].zzzz
4: LOAD TEMP[2], IMAGE[0], TEMP[0], RESTRICT, 2D_MSAA
5: MOV TEMP[0].w, IMM[0].yyyy
6: STORE IMAGE[0], TEMP[0], TEMP[1], RESTRICT, 2D_MSAA
7: MOV TEMP[0].w, IMM[0].zzzz
8: STORE IMAGE[0], TEMP[0], TEMP[2], RESTRICT, 2D_MSAA
9: END
This fixes half of https://gitlab.freedesktop.org/mesa/mesa/issues/2248
Fixes:
095a58204d9 ("radeonsi: expand FMASK before MSAA image stores are used")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3174>
Nataraj Deshpande [Fri, 10 Jan 2020 16:58:00 +0000 (08:58 -0800)]
egl/android: Restrict minimum triple buffering for android color_buffers
The patch restricts triple buffering as minimum at driver for android
color_buffers in order to fix onscreen performance hit for T-Rex and
Manhattan.
v2: Update min_buffer check condition (Tapani Pälli)
v3: further code cleanup (Eric Engestrom)
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2332
Fixes:
0661c357c60 ("egl/android: Update color_buffers querying for buffer age")
Signed-off-by: Nataraj Deshpande <nataraj.deshpande@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3384>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3384>
Lionel Landwerlin [Tue, 14 Jan 2020 22:05:30 +0000 (00:05 +0200)]
anv: fix pipeline switch back for non pipelined states
Setting state base address can happen even before pipeline is
selected. Also we must ensure it is set to 3D for Gen12, we can't
switch back to an invalid pipeline value (UINT32_MAX).
v2: Reuse helpers (Jason)
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes:
b34422db5e66 ("anv: Implement Gen12 workaround for non pipelined state")
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3396>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3396>
Samuel Pitoiset [Mon, 13 Jan 2020 08:17:47 +0000 (09:17 +0100)]
radv/gfx10: simplify some duplicated NGG GS code
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3382>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3382>
Samuel Pitoiset [Mon, 13 Jan 2020 09:37:01 +0000 (10:37 +0100)]
radv/gfx10: enable all CUs if NGG is never used
Ported from RadeonSI.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3382>
Samuel Pitoiset [Tue, 14 Jan 2020 17:03:29 +0000 (18:03 +0100)]
radv: only use VkSamplerCreateInfo::compareOp if enabled
Cc: <mesa-stable@lists.freedesktop.org>
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2350
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3392>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3392>
Iago Toral Quiroga [Mon, 13 Jan 2020 14:42:46 +0000 (15:42 +0100)]
v3d: fix bug when checking result of syncobj fence import
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3383>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3383>
Jonathan Marek [Fri, 6 Sep 2019 13:30:25 +0000 (09:30 -0400)]
st/mesa: run st_nir_lower_tex_src_plane for lowered xyuv/ayuv
Has the effect of removing the nir_tex_src_plane for these formats too.
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/1896>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/1896>
Jonathan Marek [Fri, 6 Sep 2019 13:26:08 +0000 (09:26 -0400)]
st/mesa: don't lower YUV when driver supports it natively
This fixes YUYV support on etnaviv.
Fixes:
7404833c "gallium: add handling for YUV planar surfaces"
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/1896>
Bas Nieuwenhuizen [Mon, 30 Dec 2019 14:27:21 +0000 (15:27 +0100)]
radv: Disable VK_EXT_sample_locations on GFX10.
Workaround for https://gitlab.freedesktop.org/mesa/mesa/issues/2163
CC: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3236>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3236>
Gurchetan Singh [Tue, 14 Jan 2020 02:03:23 +0000 (18:03 -0800)]
st/mesa: implement EGLImageTargetTexStorage
We can now support this extension.
Acked-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3375>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3375>
Gurchetan Singh [Tue, 14 Jan 2020 01:56:41 +0000 (17:56 -0800)]
st/mesa: refactor egl image binding a bit
We'll need it for egl image tex storage.
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3375>
Gurchetan Singh [Tue, 14 Jan 2020 00:07:38 +0000 (16:07 -0800)]
st/dri: track if image is created by a dmabuf
Will be used by EXT_EGL_image_storage later.
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3375>
Rob Clark [Tue, 14 Jan 2020 22:46:11 +0000 (14:46 -0800)]
freedreno/ir3: rename instructions
Turns out this range of opcodes are more general purpose if/else/endif
instructions.
We should re-work tess to create a basic block and use normal flow
control. And possibly (for a6xx+) optimize cases to use if/else/endif
when appropriate.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3398>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3398>
Elie Tournier [Fri, 24 May 2019 11:16:25 +0000 (12:16 +0100)]
nir/algebraic: sqrt(x)*sqrt(x) -> fabs(x)
total instructions in shared programs:
12840840 ->
12839341 (-0.01%)
instructions in affected programs: 122581 -> 121082 (-1.22%)
helped: 559
HURT: 0
total cycles in shared programs:
302505756 ->
302490031 (<.01%)
cycles in affected programs: 2022900 -> 2007175 (-0.78%)
helped: 1090
HURT: 130
Signed-off-by: Elie Tournier <elie.tournier@collabora.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/948>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/948>
Elie Tournier [Thu, 23 May 2019 16:16:18 +0000 (17:16 +0100)]
nir/algebraic: i2f(f2i()) -> trunc()
total instructions in shared programs:
12840968 ->
12840784 (<.01%)
instructions in affected programs: 17886 -> 17702 (-1.03%)
helped: 77
HURT: 0
total cycles in shared programs:
302508917 ->
302505592 (<.01%)
cycles in affected programs: 249964 -> 246639 (-1.33%)
helped: 70
HURT: 7
Signed-off-by: Elie Tournier <elie.tournier@collabora.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/948>
Eric Anholt [Mon, 6 Jan 2020 21:09:25 +0000 (13:09 -0800)]
i965: Reuse the new core glsl_count_dword_slots().
The only difference I could see was treating interfaces like structs.
Maintain that case.
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3297>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3297>
Eric Anholt [Mon, 6 Jan 2020 20:00:57 +0000 (12:00 -0800)]
mesa/st: Move the dword slot counting function to glsl_types as well.
To implement NIR-to-TGSI, we need to be able to get the size of the
uniform variable for the TGSI declaration, not just the
.driver_location. With its location in mesa/st, drivers couldn't link
to it from nir-to-tgsi.
This feels like a common enough function to want, so let's share it in
the core compiler.
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3297>
Eric Anholt [Mon, 6 Jan 2020 21:19:30 +0000 (13:19 -0800)]
mesa/prog: Reuse count_vec4_slots() from ir_to_mesa.
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3297>
Eric Anholt [Mon, 6 Jan 2020 19:37:38 +0000 (11:37 -0800)]
mesa/st: Move the vec4 type size function into core GLSL types.
The only bit that gallium varied on was handling of bindless. We can
retain previous behavior for count_attribute_slots() by passing in
"true" (though I suspect this is just giving a silly answer to a silly
question), and delete our recursive function from mesa/st.
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3297>
Eric Anholt [Mon, 6 Jan 2020 19:47:03 +0000 (11:47 -0800)]
mesa/st: Deduplicate the NIR uniform lowering code.
Just a little refactor as I go looking at the type size functions.
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3297>
Marek Olšák [Sat, 11 Jan 2020 02:19:46 +0000 (21:19 -0500)]
radeonsi: move PS LLVM code into si_shader_llvm_ps.c
This is an attempt to clean up si_shader.c.
v2: don't move code that is not specific to LLVM
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com> (v1)
Marek Olšák [Sat, 11 Jan 2020 01:25:28 +0000 (20:25 -0500)]
radeonsi: remove always constant ballot_mask_bits from si_llvm_context_init
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Marek Olšák [Sat, 11 Jan 2020 01:22:47 +0000 (20:22 -0500)]
radeonsi: fold si_create_function into si_llvm_create_func
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Marek Olšák [Sat, 11 Jan 2020 01:13:54 +0000 (20:13 -0500)]
radeonsi: rename si_shader_create -> si_create_shader_variant for clarity
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Marek Olšák [Fri, 10 Jan 2020 23:26:01 +0000 (18:26 -0500)]
radeonsi: rename si_compile_tgsi_main -> si_build_main_function
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Marek Olšák [Fri, 10 Jan 2020 23:22:27 +0000 (18:22 -0500)]
radeonsi: clean up si_shader_info
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Marek Olšák [Fri, 10 Jan 2020 23:09:04 +0000 (18:09 -0500)]
radeonsi: merge si_tessctrl_info into si_shader_info
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Marek Olšák [Fri, 10 Jan 2020 23:06:56 +0000 (18:06 -0500)]
radeonsi: fork tgsi_shader_info and tgsi_tessctrl_info
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Marek Olšák [Fri, 10 Jan 2020 22:04:33 +0000 (17:04 -0500)]
radeonsi: rename si_shader_info -> si_shader_binary_info
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Marek Olšák [Fri, 10 Jan 2020 21:57:17 +0000 (16:57 -0500)]
radeonsi: remove TGSI from comments
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Marek Olšák [Fri, 10 Jan 2020 21:50:41 +0000 (16:50 -0500)]
radeonsi: rename DBG_NO_TGSI -> DBG_NO_NIR
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Marek Olšák [Fri, 10 Jan 2020 21:47:04 +0000 (16:47 -0500)]
radeonsi: don't adjust depth and stencil PS output locations
this was for compatibility with TGSI
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Caio Marcelo de Oliveira Filho [Sat, 11 Jan 2020 07:52:30 +0000 (23:52 -0800)]
nir: Add missing nir_var_mem_global to various passes
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3322>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3322>
Caio Marcelo de Oliveira Filho [Wed, 8 Jan 2020 21:30:43 +0000 (13:30 -0800)]
spirv: Handle PhysicalStorageBuffer in memory barriers
PhysicalStorageBuffer is lowered to nir_var_mem_global, and
SPIR-V 1.5rev1 in section "3.25. Memory Semantics <id>" says
UniformMemory
Apply the memory-ordering constraints to StorageBuffer,
PhysicalStorageBuffer, or Uniform Storage Class memory.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3322>
Caio Marcelo de Oliveira Filho [Wed, 8 Jan 2020 21:25:59 +0000 (13:25 -0800)]
spirv: Drop EXT for PhysicalStorageBuffer symbols
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3322>
Timur Kristóf [Tue, 19 Nov 2019 12:29:54 +0000 (13:29 +0100)]
aco: Flip s_cbranch / s_cselect to optimize out an s_not if possible.
When possible, get rid of an s_not when all it does is invert the SCC,
and its successor s_cbranch / s_cselect can be inverted instead.
Also modify some parts of instruction_selection to take advantage of
this feature.
Example:
s2: %3900, s1: %3899:scc = s_andn2_b64 %0:exec, %406
s2: %3902 = s_cselect_b64 -1, 0, %3900:scc
s2: %407, s1: %3903:scc = s_not_b64 %3902
s2: %3906, s1: %3905:scc = s_and_b64 %407, %0:exec
p_cbranch_z %3905:scc
Can now be optimized to:
s2: %3900, s1: %3899:scc = s_andn2_b64 %0:exec, %406
p_cbranch_nz %3900:scc
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Timur Kristóf [Fri, 3 Jan 2020 09:30:04 +0000 (10:30 +0100)]
aco: Optimize out s_and with exec, when used on uniform bitwise values.
Previously all booleans needed an s_and with exec when they were turned
into a scalar condition. However, this is not needed for uniform booleans.
v2 by Daniel Schürmann:
- Make the code more readable
v3 by Timur Kristóf:
- Fix regressions, make it work in wave32 mode
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Timur Kristóf [Tue, 19 Nov 2019 12:38:34 +0000 (13:38 +0100)]
aco: Don't skip combine_instruction when definitions[1] is used.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Timur Kristóf [Mon, 18 Nov 2019 15:11:19 +0000 (16:11 +0100)]
aco: Allow optimizing vote_all and nir_op_iand.
By adding an extra instruction, we can replace the operands of
the s_cselect_b64, which allows it to get picked up by the
optimizer when it looks for uniform booleans.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Timur Kristóf [Wed, 13 Nov 2019 10:14:51 +0000 (11:14 +0100)]
aco: Implement 64-bit constant propagation.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Alyssa Rosenzweig [Fri, 10 Jan 2020 18:12:35 +0000 (13:12 -0500)]
panfrost: Fix linear depth textures
As pointed out by Boris, what we were calling PAN_LINEAR depth textures
was in fact u-interleaved tiled (!), but we never noticed since we
flipped the flag used for sampling, leading to all sorts of fun bugs
when attempting to directly acess depth textures from the CPU. Which
begs the question -- if what we called LINEAR was tiled, how do we
actually render linear depth textures? It turns out the flags for AFBC
form a mali_block_format 2-bit code just like their render-target
counterparts, so we can render to any of the above.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reported-by: Boris Brezillon <boris.brezillon@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3393>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3393>
Jason Ekstrand [Fri, 10 Jan 2020 19:16:25 +0000 (13:16 -0600)]
vulkan/wsi: Add a driconf option to force WSI to advertise BGRA8_UNORM first
The Aztec Ruins benchmark just grabs the first format in the list and
SRGB causes it to render washed out. With this workaround, it renders
the same as OpenGL.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3350>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3350>
Caio Marcelo de Oliveira Filho [Mon, 13 Jan 2020 23:48:12 +0000 (15:48 -0800)]
intel/fs: Only use SLM fence in compute shaders
Fixes:
b390ff35170 ("intel/fs: Add support for SLM fence in Gen11")
Fixes:
e142061399c ("intel/fs: Implement scoped_memory_barrier")
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>