Erik Faye-Lund [Mon, 25 Feb 2019 12:14:50 +0000 (13:14 +0100)]
mesa/main: correct extension-checks for MESA_tile_raster_order
This extension isn't enabled for GLES 1.x, so we shouldn't allow the
state there. Let's use the extension-helpers instead of CHECK_EXTENSION
for this.
Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Erik Faye-Lund [Mon, 25 Feb 2019 12:28:39 +0000 (13:28 +0100)]
mesa/main: make the CONSERVATIVE_RASTERIZATION_NV checks consistent
This just makes the logic of the checks for this enum the same for
gl{Enable,Disable} and for glIsEnabled. They are already functionally
the same, so this is just a minor code-cleanup.
Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Erik Faye-Lund [Mon, 25 Feb 2019 11:06:23 +0000 (12:06 +0100)]
mesa/main: make the PRIMITIVE_RESTART_NV checks consistent
{En,Dis}ableClientState(PRIMITIVE_RESTART_NV) should only work on
compatibility contextxs. While we're at it, modernize the code a bit,
by using the extension helpers instead of open-coding.
Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Samuel Pitoiset [Tue, 28 May 2019 09:03:29 +0000 (11:03 +0200)]
radv: use view format when selecting the resolve path for subpasses
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Tue, 28 May 2019 08:47:12 +0000 (10:47 +0200)]
radv: always use view format when performing subpass resolves
It makes sense to use the image view formats when resolving
inside subpasses, while we have to use the image formats for
normal resolves.
Original patch by Philip Rebohle.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110348
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Tue, 28 May 2019 09:08:32 +0000 (11:08 +0200)]
radv: sync before resetting a pool if there is active pending queries
Make sure to sync all previous work if the given command buffer
has pending active queries. Otherwise the GPU might write queries
data after the reset operation.
This fixes a bunch of new dEQP-VK.query_pool.* CTS failures.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Kenneth Graunke [Thu, 23 May 2019 01:11:50 +0000 (18:11 -0700)]
intel/decoder: Use get_state_size() over guessed counts in more cases
This makes the following packets use actual driver provided sizes rather
than guessing an arbitrary number:
- CC_VIEWPORT
- SF_CLIP_VIEWPORT
- BLEND_STATE
- COLOR_CALC_STATE
- SCISSOR_RECT
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Mike Lothian [Tue, 28 May 2019 11:26:21 +0000 (12:26 +0100)]
meson: Link Gallium drivers with ld_args_build_id
Link all Gallium drivers with ld_args_build_id to prevent failures in
Iris that uses GNU_BUILD_ID
Bugs: https://bugs.freedesktop.org/show_bug.cgi?id=110757
Fixes:
4756864cdc5f "iris: Start wiring up on-disk shader cache"
Signed-off-by: Mike Lothian <mike@fireburn.co.uk>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Lionel Landwerlin [Tue, 28 May 2019 07:52:50 +0000 (08:52 +0100)]
nir/lower_non_uniform: safely iterate over blocks
This fixes a problem where the same instruction gets replaced twice.
This was happening when the replaced instruction would be at the end
of a block.
Replacement of :
if ssa_8 {
....
intrinsic bindless_image_store (ssa_44, ssa_16, ssa_0, ssa_15) (5, 0, 34836, 32) /* image_dim=Buf */ /* image_array=false */ /* format=34836 */ /* access=32 */
}
Would be :
if ssa_8 {
loop {
vec1 32 ssa_47 = intrinsic read_first_invocation (ssa_44) ()
vec1 1 ssa_48 = ieq ssa_47, ssa_44
if ssa_48 {
loop {
vec1 32 ssa_49 = intrinsic read_first_invocation (ssa_44) ()
vec1 1 ssa_50 = ieq ssa_49, ssa_44
if ssa_50 {
intrinsic bindless_image_store (ssa_44, ssa_16, ssa_0, ssa_15) (5, 0, 34836, 32) /* image_dim=Buf */ /* image_array=false */ /* format=34836 */ /* access=32 */
break
} else {
....
}
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes:
3bd545764151 ("nir: Add a lowering pass for non-uniform resource access")
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Samuel Pitoiset [Tue, 28 May 2019 10:58:05 +0000 (12:58 +0200)]
radv: allocate more space in the CS when emitting events
If the driver waits for CP DMA to be idle and emit an EOP event
we need more space.
This fixes a crash with Quake Champions.
Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Kenneth Graunke [Tue, 21 May 2019 22:18:25 +0000 (15:18 -0700)]
iris: Ask st to vectorize our IO.
(Technically this is common code, but it doesn't affect i965 or anv.)
Improves performance of GFXBench5/gl_tess_off on Skylake GT4e at 1080p
by 9.3933% +/- 0.0305157% by eliminating all spilling in the GS.
Improves performance of GFXBench5/gl_4_off (Car Chase) on Skylake GT4e
at 1080p by 0.325208% +/- 0.0842233% (n=18).
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Kenneth Graunke [Thu, 11 Apr 2019 19:28:48 +0000 (12:28 -0700)]
st/nir: Re-vectorize shader IO
We scalarize IO to enable further optimizations, such as propagating
constant components across shaders, eliminating dead components, and
so on. This patch attempts to re-vectorize those operations after
the varying optimizations are done.
Intel GPUs are a scalar architecture, but IO operations work on whole
vec4's at a time, so we'd prefer to have a single IO load per vector
rather than 4 scalar IO loads. This re-vectorization can help a lot.
Broadcom GPUs, however, really do want scalar IO. radeonsi may want
this, or may want to leave it to LLVM. So, we make a new flag in the
NIR compiler options struct, and key it off of that, allowing drivers
to pick. (It's a bit awkward because we have per-stage settings, but
this is about IO between two stages...but I expect drivers to globally
prefer one way or the other. We can adjust later if needed.)
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Mathias Fröhlich [Wed, 8 May 2019 06:07:24 +0000 (08:07 +0200)]
mesa: Prevent classic swrast crash on a surfaceless context v2.
This fixes the egl_mesa_platform_surfaceless piglit test as well
as the new egl_ext_device_base piglit test on classic swrast.
v2: Fix swrast surfaceless contexts on the driver side.
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Samuel Pitoiset [Mon, 27 May 2019 15:42:36 +0000 (17:42 +0200)]
radv add radv_get_resolve_pipeline() in the compute path
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Mon, 27 May 2019 15:42:35 +0000 (17:42 +0200)]
radv: cleanup the compute resolve path for subpass
This makes use of radv_meta_resolve_compute_image() by filling
a VkImageResolve region instead of duplicating code.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Timothy Arceri [Mon, 27 May 2019 01:57:27 +0000 (11:57 +1000)]
radeonsi: add drirc workaround for American Truck Simulator
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110711
Timothy Arceri [Mon, 27 May 2019 10:07:41 +0000 (20:07 +1000)]
Revert "st/mesa: expose 0 shader binary formats for compat profiles for Qt"
This reverts commit
55376cb31e2f495a4d872b4ffce2135c3365b873.
It's been over a year and both QT 5.9.5 and 5.11.0 contained a fix for the
original issue. It seems i965 only ever applied this workaround to the
18.0 branch.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Lionel Landwerlin [Fri, 24 May 2019 12:17:43 +0000 (13:17 +0100)]
anv: fix apply_pipeline_layout pass for arrays of YCbCr descriptors
When using the binding tables to access arrays of YCbCr descriptors we
did not consider the offset of the accessed element. We can't do a
simple multiple because the binding table entries are tightly packed.
For example element 0 of the array could use 2 entries/planes and
element 1 could use 2 entries/planes.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes:
3bb8768b9d62 ("anv: toggle on support for VK_EXT_ycbcr_image_arrays")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Marek Olšák [Fri, 17 May 2019 19:36:57 +0000 (15:36 -0400)]
radeonsi: clean up winsys creation
- unify the code
- choose radeon or amdgpu based on the DRM version, not based on which one
succeeds first
Marek Olšák [Mon, 13 May 2019 22:39:44 +0000 (18:39 -0400)]
radeonsi: allow query functions for compute-only contexts
Marek Olšák [Wed, 15 May 2019 18:33:34 +0000 (14:33 -0400)]
ac: treat Mullins as Kabini, remove the enum
it's the same design
Christian Gmeiner [Sun, 26 May 2019 19:06:51 +0000 (21:06 +0200)]
etnaviv: rs: choose clear format based on block size
Fixes following piglit and does not introduce any regressions.
spec@ext_packed_depth_stencil@fbo-depth-gl_depth24_stencil8-blit
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Vasily Khoruzhick [Sat, 11 May 2019 02:17:40 +0000 (19:17 -0700)]
lima/ppir: implement discard and discard_if
This commit also adds codegen for branch since we need it
for discard_if.
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Samuel Pitoiset [Mon, 27 May 2019 08:20:03 +0000 (10:20 +0200)]
radv: ignore the loadOp if the first use of an attachment is a resolve
Based on ANV.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Thu, 23 May 2019 12:57:07 +0000 (14:57 +0200)]
radv: always dirty the framebuffer when restoring a subpass
The old code was not wrong because the transitions performed
after the resolves should re-emit the framebuffer if needed.
This change is mostly a no-op but it improves consistency
regarding other meta operations that need to save/restore subpasses.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Wed, 22 May 2019 13:38:47 +0000 (15:38 +0200)]
radv: add radv_clear_htile() helper
This helper will be useful for clearing HTILE after some
depth/stencil resolves.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Chenglei Ren [Thu, 23 May 2019 03:22:00 +0000 (11:22 +0800)]
anv/android: fix missing dependencies issue during parallel build
The libmesa_anv_gen* modules require anv_extensions.h, patch makes sure
it gets generated as a dependency before building them.
Signed-off-by: Chenglei Ren <chenglei.ren@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Cc: <mesa-stable@lists.freedesktop.org>
Samuel Pitoiset [Wed, 22 May 2019 15:46:33 +0000 (17:46 +0200)]
radv: tidy up GetQueryPoolResults for occlusion queries
Just move the block that checks the availability bit into the
switch like other query types.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Kenneth Graunke [Fri, 24 May 2019 07:16:11 +0000 (00:16 -0700)]
iris: Don't flag IRIS_DIRTY_URB after BLORP operations unless it changed
We already flag IRIS_DIRTY_URB when we change it, but we were
additionally flagging it on every BLORP operation, even if we didn't.
Dave Airlie [Sun, 26 May 2019 23:36:28 +0000 (09:36 +1000)]
Revert "mesa: unreference current winsys buffers when unbinding winsys buffers"
This reverts commit
12bf7cfecf52083c484602f971738475edfe497e.
This commits caused lots of problems:
https://bugs.freedesktop.org/show_bug.cgi?id=110721
https://bugs.freedesktop.org/show_bug.cgi?id=110761
Fixes:
12bf7cfecf52 ("mesa: unreference current winsys buffers when unbinding winsys buffers")
Pushing without review as we need to get it into next stable.
Alyssa Rosenzweig [Sun, 26 May 2019 03:16:37 +0000 (03:16 +0000)]
panfrost/midgard: Implement fneg/fabs/fsat
Fix a regression I inadvertently caused by acking typeless movs before
implementing/pushing this *whistles*
Nothing to see here, move along folks.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Qiang Yu [Thu, 16 May 2019 11:38:01 +0000 (19:38 +0800)]
lima: fix lima_blit with non-zero level source resource
lima_blit will do blit between resources with different levels.
When blit from a level!=0 source, it will sample from that level
of resource as texture.
Current texture setup won't respect level when not mipmap filter.
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Qiang Yu [Wed, 15 May 2019 09:35:19 +0000 (17:35 +0800)]
lima: fix render to non-zero level texture
Current implementation won't respect level of surface to render.
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Dylan Baker [Thu, 23 May 2019 17:21:05 +0000 (10:21 -0700)]
editorconfig: Fix meson style
The syntax was wrong, resulting in it not working at all.
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Chia-I Wu [Wed, 8 May 2019 21:53:47 +0000 (14:53 -0700)]
virgl: remove an incorrect check in virgl_res_needs_flush
Imagine this
resource_copy_region(ctx, dst, ..., src, ...);
transfer_map(ctx, src, 0, PIPE_TRANSFER_WRITE, ...);
at the beginning of a cmdbuf. We need to flush in transfer_map so
that the transfer is not reordered before the resource copy. The
check for "vctx->num_draws == 0 && vctx->num_compute == 0" is not
enough. Removing the optimization entirely.
Because of the more precise resource tracking in the previous
commit, I hope the performance impact is minimized. We will have to
go with perfect resource tracking, or attempt a more limited
optimization, if there are specific cases we really need to optimize
for.
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Gurchetan Singh <gurchetansingh@chromium.org>
Chia-I Wu [Wed, 8 May 2019 21:19:08 +0000 (14:19 -0700)]
virgl: reemit resources on first draw/clear/compute
This gives us more precise resource tracking. It can be beneficial
because glFlush is often followed by state changes. We don't want
to reemit resources that are going to be unbound.
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Gurchetan Singh <gurchetansingh@chromium.org>
Chia-I Wu [Wed, 8 May 2019 21:33:28 +0000 (14:33 -0700)]
virgl: add missing emit_res for SO targets
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Gurchetan Singh <gurchetansingh@chromium.org>
Roland Scheidegger [Fri, 24 May 2019 00:41:12 +0000 (02:41 +0200)]
gallivm: fix default cbuf info.
The default null_output really needs to be static, otherwise the values
we'll eventually get later are doubly random (they are not initialized,
and even if they were it's a pointer to a local stack variable).
VMware bug 2349556.
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Roland Scheidegger [Fri, 24 May 2019 01:46:07 +0000 (03:46 +0200)]
scons: fix build with llvm 9.
The x86asmprinter component is gone, and things seem to work by just
removing it.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110707
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Tomeu Vizoso [Thu, 23 May 2019 08:09:33 +0000 (10:09 +0200)]
panfrost: Dereference sampled texture
We are currently leaking resources if they were sampled from. Once we
are done with a sampler, we should dereference that resource.
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Tomeu Vizoso [Mon, 13 May 2019 07:11:27 +0000 (09:11 +0200)]
panfrost: ci: Avoid pulling Docker image on every run
Jump over the container stage if we haven't changed any of the files
that involved in building the container images.
This saves 1-2 minutes in each run and helps conserve resources.
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Jason Ekstrand [Mon, 6 May 2019 16:45:46 +0000 (11:45 -0500)]
nir: Drop imov/fmov in favor of one mov instruction
The difference between imov and fmov has been a constant source of
confusion in NIR for years. No one really knows why we have two or when
to use one vs. the other. The real reason is that they do different
things in the presence of source and destination modifiers. However,
without modifiers (which many back-ends don't have), they are identical.
Now that we've reworked nir_lower_to_source_mods to leave one abs/neg
instruction in place rather than replacing them with imov or fmov
instructions, we don't need two different instructions at all anymore.
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Acked-by: Rob Clark <robdclark@chromium.org>
Jason Ekstrand [Mon, 6 May 2019 16:26:27 +0000 (11:26 -0500)]
nir/builder: Merge nir_[if]mov_alu into one nir_mov_alu helper
Unless source modifiers are present, fmov and imov are the same.
There's no good reason for having two helpers.
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Jason Ekstrand [Mon, 6 May 2019 16:17:40 +0000 (11:17 -0500)]
nir/lower_to_source_mods: Stop turning add, sat, and neg into mov
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Jason Ekstrand [Mon, 6 May 2019 20:30:36 +0000 (15:30 -0500)]
nir/source_mods: Add a helpers for setting source modifiers
It's potentially a tiny bit less efficient but the helpers make it much
easier to sort out the rules for updating source modifiers.
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Jason Ekstrand [Mon, 6 May 2019 16:16:25 +0000 (11:16 -0500)]
intel: Implement abs, neg, and sat in the back-end
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Jason Ekstrand [Mon, 6 May 2019 17:25:29 +0000 (12:25 -0500)]
intel/nir: Call alu_to_scalar one last time before out-of-ssa
A few of our very late passes can end up generating vectors accidentally
so we need to get rid of them. The only known case of this is the ffma
peephole which generates fneg and fabs as vectors. Currently, they're
not a problem because they get turned into fmov which the back-end
compiler knows how to handle as a vector. That's about to change.
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Jason Ekstrand [Mon, 6 May 2019 15:23:26 +0000 (10:23 -0500)]
nir/builder: Remove the use_fmov parameter from nir_swizzle
This flag has caused more confusion than good in most cases. You can
validly use imov for floats or fmov for integers because, without source
modifiers, neither modify their input in any way. Using imov for floats
is more reliable so we go that direction.
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Jason Ekstrand [Mon, 6 May 2019 15:20:23 +0000 (10:20 -0500)]
ptn,ttn: Use nir_channel for selecting channels
Both of these passes predate the nir_channel helper. We should just use
it instead of hand-rolling it in both passes.
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Michel Zou [Fri, 24 May 2019 10:32:01 +0000 (12:32 +0200)]
scons: For MinGW use -posix flag.
Signed-off-by: Jose Fonseca <jfonseca@vmware.com>
Christian Gmeiner [Thu, 9 May 2019 20:24:22 +0000 (22:24 +0200)]
etnaviv: use the correct uniform dirty bits
Found during code inspection.
Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Danylo Piliaiev [Wed, 22 May 2019 11:55:45 +0000 (14:55 +0300)]
anv: Do not emulate texture swizzle for INPUT_ATTACHMENT, STORAGE_IMAGE
If descriptorType is VK_DESCRIPTOR_TYPE_STORAGE_IMAGE
or VK_DESCRIPTOR_TYPE_INPUT_ATTACHMENT, the imageView member of each
element of pImageInfo must have been created with the identity swizzle.
Fixes:
d2aa65eb
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tapani Pälli [Thu, 23 May 2019 07:00:26 +0000 (10:00 +0300)]
st/dri: enable EGL_ANDROID_blob_cache on gallium drivers
Verified to work properly with Iris driver on Android Celadon. Cache
files get generated as 'com.android.opengl.shaders_cache' for each
application.
v2: check that cache was returned (Eric Engestrom)
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Alyssa Rosenzweig [Sun, 19 May 2019 23:47:37 +0000 (23:47 +0000)]
panfrost: Remove the standalone compiler
Now that the online compiler and pandecode are reliable and upstreamed,
nobody is using this. If somebody does need it, it should be easy enough
to bring back, I suppose. At the moment, it's just a maintenance hazard,
since meson is silly and does double builds for compiler updates (triple
for disassembler changes).
If people need the standalone _disassembler_, that can be added
trivially into pandecode (pandecode already includes the disassembler).
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Ryan Houdek <Sonicadvance1@gmail.com>
Eric Engestrom [Thu, 23 May 2019 15:07:38 +0000 (16:07 +0100)]
vk/util: suppress warning about out-of-enum android value
src/vulkan/util/vk_enum_to_str.c: In function ‘vk_structure_type_size’:
src/vulkan/util/vk_enum_to_str.c:3335:9: warning: case value ‘
1000010000’ not in enumerated type ‘VkStructureType’ {aka ‘const enum VkStructureType’} [-Wswitch]
case VK_STRUCTURE_TYPE_NATIVE_BUFFER_ANDROID: return sizeof(VkNativeBufferANDROID);
^~~~
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Kenneth Graunke [Wed, 15 May 2019 03:31:46 +0000 (20:31 -0700)]
iris: Advertise coherent framebuffer fetches
This lets us advertise GL_EXT_shader_framebuffer_fetch and
GL_KHR_blend_equation_advanced_coherent support.
Kenneth Graunke [Wed, 24 Apr 2019 20:17:54 +0000 (13:17 -0700)]
gallium: Add PIPE_CAP_FBFETCH_COHERENT and expose extensions
st/mesa now exposes KHR_blend_equation_advanced_coherent and
EXT_shader_framebuffer_fetch if the new capability is supported.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Kenneth Graunke [Wed, 24 Apr 2019 20:08:57 +0000 (13:08 -0700)]
st/mesa: Advertise GL_EXT_shader_framebuffer_fetch_non_coherent
This extension requires the ability to read from all render targets,
so we only enable it if PIPE_CAP_FBFETCH >= PIPE_CAP_MAX_RENDER_TARGETS.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Kenneth Graunke [Wed, 15 May 2019 03:23:36 +0000 (20:23 -0700)]
gallium: Change PIPE_CAP_TGSI_FS_FBFETCH bool to PIPE_CAP_FBFETCH count
TGSI's FBFETCH instruction currently only supports reading from a single
render target, but NIR intrinsics can support multiple render targets.
radeonsi can only support fetching from RT 0, but other drivers may be
able to support fetching from any render target.
To express this, this patch renames PIPE_CAP_TGSI_FS_FBFETCH to simply
PIPE_CAP_FBFETCH, and converts it from a boolean "is FBFETCH supported?"
to an integer number of render targets which can be fetched.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Kenneth Graunke [Thu, 23 May 2019 01:14:38 +0000 (18:14 -0700)]
iris: Record state sizes for INTEL_DEBUG=bat decoding.
Felix noticed a crash when using INTEL_DEBUG=bat decoding. It turned
out that we were sometimes placing variable length data near the end
of a buffer, and with the decoder guessing random lengths rather than
having an actual count, it was walking off the end and crashing. So
this does more than improve the decoder output.
Unfortunately, this is a bit more complicated than i965's handling,
because we don't have a single state buffer. Various places upload
data via u_upload_mgr, and so there isn't a central place to record
the size. We don't need to catch every single place, however, since
it's only important to record variable length packets (like viewports
and binding tables).
State data also lives arbitrarily long, rather than being discarded on
every batch like i965, so we don't know when to clear out old entries
either. (We also don't have a callback when an upload buffer is
released.) So, this tracking may space leak over time. That's probably
okay though, as this is only a debugging feature and it's a slow leak.
We may also get lucky and overwrite existing entries as we reuse BOs,
though I find this unlikely to happen.
The fact that the decoder works in terms of offsets from a state base
address is also not ideal, as dynamic state base address and surface
state base address differ for iris. However, because dynamic state
addresses start from the top of a 4GB region, and binding tables start
from addresses [0, 64K), it's highly unlikely that we'll get overlap.
We can always improve this, but for now it's better than what we had.
Eric Engestrom [Fri, 3 May 2019 11:31:01 +0000 (12:31 +0100)]
vk/util: drop no-op compiler warning workaround
`-Wswitch` applies to `switch()`, not `case:`, and is bypassed by the
presence of a `default:` anyway, so let's drop the `default:` and move
the warning suppression to where it can make a difference, and then it
turns out that we don't need to keep a list of special cases anymore :)
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Erik Faye-Lund [Mon, 25 Feb 2019 12:28:08 +0000 (13:28 +0100)]
mesa/main: make the CONSERVATIVE_RASTERIZATION_INTEL checks consistent
INTEL_conservative_rasterization isn't exposed on compatibility
contexts, nor for GLES 3.0 and below. We already do this correctly for
gl{Enable,Disable}, but we should do the same for glIsEnabled as well.
Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Erik Faye-Lund [Mon, 25 Feb 2019 11:06:23 +0000 (12:06 +0100)]
mesa/main: make the FRAGMENT_PROGRAM checks consistent
IsEnabled(FRAGMENT_PROGRAM) isn't supposed to be allowed, but our
check allowed this anyway. Let's make these checks consistent, and
while we're at it, modernize them a bit.
Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Erik Faye-Lund [Mon, 25 Feb 2019 11:06:23 +0000 (12:06 +0100)]
mesa/main: make the TEXTURE_CUBE_MAP checks consistent
IsEnabled(TEXTURE_CUBE_MAP) isn't supposed to be allowed, but our
check allowed this anyway. Let's make these checks consistent, and
while we're at it, modernize them a bit.
Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Erik Faye-Lund [Mon, 25 Feb 2019 11:10:43 +0000 (12:10 +0100)]
mesa/main: remove duplicate macros
These are already defined as the exactly same, so let's get rid of
the duplicate definitions.
Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Erik Faye-Lund [Mon, 25 Feb 2019 10:55:06 +0000 (11:55 +0100)]
mesa/main: remove unused argument
The 'CAP' argument has been unused in both of these macros since
2010, so let's get rid of it from both.
Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Erik Faye-Lund [Mon, 25 Feb 2019 10:36:44 +0000 (11:36 +0100)]
mesa/main: remove unused macro
The first version of this macro is unused, so let's get rid of it.
Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Timothy Arceri [Mon, 29 Apr 2019 06:37:42 +0000 (16:37 +1000)]
glsl: simplify resource list building code
This greatly simplifies the code to calculate if we should add a
buffer to the resource list. This uses the spec rules and simple
math to decide if we should add the buffer rather than complex
string processing.
This patch refines a patch present in the ARB_gl_spriv merge
request for the NIR linker and applies it to the GLSL IR linker.
This is why we also move the function to the shared linker code,
because we will want to reuse the code for the NIR linker also.
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Chia-I Wu [Thu, 9 May 2019 20:27:34 +0000 (13:27 -0700)]
virgl: track valid buffer range for transfer sync
virgl_transfer_queue_is_queued was used to avoid flushing. That
fails when the resource is being accessed by previous cmdbufs but
not the current one.
The new approach of tracking the valid buffer range does not apply
to textures however. But hopefully it is fine because the goal is
to avoid waiting for this scenario
glBufferSubData(..., offset, size, data1);
glDrawArrays(...);
// append new vertex data
glBufferSubData(..., offset+size, size, data2);
glDrawArrays(...);
If glTex(Sub)Image* turns out to be an issue, we will need to track
valid level/layer ranges as well.
v2: update virgl_buffer_transfer_extend as well
v3: do not remove virgl_transfer_queue_is_queued
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com> (v1)
Reviewed-by: Gurchetan Singh <gurchetansingh@chromium.org> (v2)
Chia-I Wu [Mon, 13 May 2019 17:42:08 +0000 (10:42 -0700)]
virgl: remove support for buffer surfaces
st/mesa does not need it and virglrenderer does not really support
it. Remove the support so that we are sure pipe_surface never
refers to a buffer resource.
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
Reviewed-by: Gurchetan Singh <gurchetansingh@chromium.org>
Chia-I Wu [Mon, 13 May 2019 22:16:23 +0000 (15:16 -0700)]
virgl: handle NULL shader resource explicitly
When shader images/buffers are set, do not rely on
virgl_encoder_write_res and virgl_resource_dirty to do the implicit
NULL check.
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
Reviewed-by: Gurchetan Singh <gurchetansingh@chromium.org>
Lionel Landwerlin [Fri, 10 May 2019 17:55:54 +0000 (18:55 +0100)]
vulkan: fix build dependency issue with generated files
On machines with many cores, you can run into that issue :
../mesa-9999/src/vulkan/overlay-layer/overlay.cpp:42:10: fatal error: vk_enum_to_str.h: No such file or directory
v2: Move declare_dependency around (Eric)
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reported-by: Jan Ziak
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Greg V [Sun, 19 May 2019 21:17:17 +0000 (00:17 +0300)]
gallium: enable dmabuf on BSD as well
The DRM_CONF_SHARE_FD code did not check for Linux, so the commit that
introduced PIPE_CAP_DMABUF broke Wayland-EGL clients on FreeBSD.
Fixes:
8ae50e60 (gallium: replace DRM_CONF_SHARE_FD with PIPE_CAP_DMABUF)
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Tapani Pälli [Wed, 22 May 2019 10:16:45 +0000 (13:16 +0300)]
iris: fix android build
Fixes:
4756864cdc5 ""iris: Start wiring up on-disk shader cache
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Philipp Zabel [Fri, 3 May 2019 09:39:45 +0000 (11:39 +0200)]
etnaviv: fill missing offset in etna_resource_get_handle
Without this gbm_bo_get_offset() can return 0 where it shouldn't.
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Cc: <mesa-stable@lists.freedesktop.org>
Samuel Pitoiset [Tue, 21 May 2019 11:40:10 +0000 (13:40 +0200)]
radv: do not reset query pool during creation
From the Vulkan spec 1.1.108:
"After query pool creation, each query must be reset before
it is used."
So, the driver doesn't need to do this at creation time.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Thu, 16 May 2019 09:54:06 +0000 (11:54 +0200)]
radv: fix the sample max distance value for 8x
It should be 7, not 8.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Thu, 16 May 2019 09:54:05 +0000 (11:54 +0200)]
radv: emit correct centroid priority based on the number of samples
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Thu, 16 May 2019 09:54:04 +0000 (11:54 +0200)]
radv: clean up the sample locations codebase
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Thu, 16 May 2019 09:54:03 +0000 (11:54 +0200)]
radv: remove remaining code related to 16 samples
The driver only supports up to 8 samples.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Kenneth Graunke [Tue, 21 May 2019 23:10:21 +0000 (16:10 -0700)]
iris: Fix ALT mode regressions from shader cache
We were checking this based on nir->info.name, but with the shader
cache enabled, nir_strip throws out the name, causing us to use IEEE
mode for ARB programs.
gl-1.0-spot-light regressed because it wants ALT mode for 0^0 behavior.
Fixes:
dc5dc727d59 iris: Serialize the NIR to a blob we can use for shader cache purposes.
Marek Olšák [Tue, 21 May 2019 18:26:13 +0000 (14:26 -0400)]
radeonsi: fix a regression in si_rebind_buffer
Don't update non-buffer images.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110701
Fixes:
78e35df52aa2f7d770f929a0866a0faa89c261a9 "radeonsi: update buffer descriptors in all contexts after buffer invalidation"
Cc: 19.1 <mesa-stable@lists.freedesktop.org>
Tested-By: Gert Wollny <gert.wollny@collabora..com>
Kenneth Graunke [Tue, 21 May 2019 19:06:02 +0000 (12:06 -0700)]
iris: Expose the disk cache to the state tracker as well.
This lets st/nir cache the NIR for shaders, based on the shader source
string hash, allowing us to skip initial compiles altogether, and also
letting us start from there should we need to recompile for NOS.
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Dylan Baker [Thu, 20 Dec 2018 23:54:06 +0000 (15:54 -0800)]
iris: Cache assembly shaders in the on-disk shader cache
This implements storing and retrieving iris_compiled_shader objects
from the on-disk shader cache.
(by Dylan Baker and Kenneth Graunke)
Kenneth Graunke [Tue, 21 May 2019 06:25:40 +0000 (23:25 -0700)]
iris: Serialize the NIR to a blob we can use for shader cache purposes.
We will use a hash of the serialized NIR together with brw_prog_*_key
(for NOS) as the disk cache key, where the disk cache contains actual
assembly shaders.
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Dylan Baker [Thu, 20 Dec 2018 23:54:06 +0000 (15:54 -0800)]
iris: Start wiring up on-disk shader cache
This creates the on-disk shader cache data structure, and handles the
build-id keying aspects. The next commits will fill it out so it's
actually used.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Kenneth Graunke [Tue, 21 May 2019 06:20:45 +0000 (23:20 -0700)]
iris: Move iris_uncompiled_shader definition to iris_context.h
It had been internal to iris_program.c, but with the upcoming disk cache
code, the "program module" is going to be spread across a couple source
files. Into a header it goes!
Now it lives alongside iris_compiled_shader, which makes sense.
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Kenneth Graunke [Mon, 20 May 2019 18:24:21 +0000 (11:24 -0700)]
intel: Move brw_prog_key_set_id from i965 to the compiler.
I want to use it in iris.
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Dylan Baker [Tue, 21 May 2019 21:25:36 +0000 (14:25 -0700)]
docs: update calendar, and news item and link release notes for 19.0.5
Dylan Baker [Tue, 21 May 2019 21:17:09 +0000 (14:17 -0700)]
docs: Add Sha256 sums for 19.0.5
Dylan Baker [Tue, 21 May 2019 21:10:20 +0000 (14:10 -0700)]
docs: Add release notes for 19.0.5
Caio Marcelo de Oliveira Filho [Mon, 22 Apr 2019 22:36:38 +0000 (15:36 -0700)]
spirv: Drop GOOGLE suffix from names incorporated to SPIR-V
SPV_GOOGLE_decorate_string and SPV_GOOGLE_hlsl_functionality1 were
incorporated to SPIR-V. Let's pick the names used by SPIR-V core.
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Caio Marcelo de Oliveira Filho [Mon, 22 Apr 2019 21:21:45 +0000 (14:21 -0700)]
spirv: Pick the right bitsize when doing SpvUConvert
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Caio Marcelo de Oliveira Filho [Thu, 4 Apr 2019 20:42:26 +0000 (13:42 -0700)]
spirv: Trivially handle new 1.4 loop controls
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Caio Marcelo de Oliveira Filho [Wed, 8 May 2019 05:01:21 +0000 (22:01 -0700)]
spirv: Update JSON and Headers to 1.4
This refers to commit
c4f8f65792d4bf2657ca751904c511bbcf2ac77b from
GitHub.
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Caio Marcelo de Oliveira Filho [Wed, 3 Apr 2019 19:45:22 +0000 (12:45 -0700)]
spirv: Handle instruction aliases in spirv_info_c.py
Choose the first we see in the grammar file as the main one. This is
needed to parse SPIR-V 1.4 because it introduced opcode aliases.
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Erik Faye-Lund [Tue, 21 May 2019 12:59:08 +0000 (14:59 +0200)]
Revert "glsl: do not use deprecated bison-keyword"
This reverts commit
eb85124a9f6e9cb94d0d4a99f91bbae374777e3a.
Eric Engestrom [Sun, 5 May 2019 08:00:16 +0000 (09:00 +0100)]
imgui: delete demo file
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Lionel Landwerlin [Thu, 16 May 2019 16:07:27 +0000 (17:07 +0100)]
vulkan/overlay: update remaining manual error checks
Through a series of rebases, I forgot to switch a bunch of error
checks to use a macro that will show where the problem is, rather than
printing out a dumb "ERROR!".
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Lionel Landwerlin [Thu, 16 May 2019 15:59:46 +0000 (16:59 +0100)]
vulkan/overlay: fix timestamp query emission with no pipeline stats
The
if (!pipe && timestamp)
logic was broken. It should have been :
if (!pipe && !timestamp)
Let just drop this condition as the following code does the right
thing for all cases.
An error was appearing with the following variables :
VK_INSTANCE_LAYERS=VK_LAYER_MESA_overlay VK_LAYER_MESA_OVERLAY_CONFIG=gpu_timing
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes:
ea7a6fa98055ad ("vulkan/overlay: add pipeline statistic & timestamps support")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>