Michael Trimarchi [Sun, 15 May 2022 09:35:31 +0000 (11:35 +0200)]
mtd: nand: mxs_nand_spl: Fix bad block skipping
The specific implementation was having bug. Those bugs are since
the beginning of the implementation. Some manufactures can already
experience this bug in their SPL code. This bug can be more visible on
architecture that has complicated boot process like imx8mn. Older
version of uboot can be affected if the bad block
appear in correspoding of the beginning of u-boot image. In order to
adjust the function we scan from the first erase block.
The problematic part of old code was in this part:
while (is_badblock(mtd, offs, 1)) {
page = page + nand_page_per_block;
/* Check i we've reached the end of flash. */
if (page >= mtd->size >> chip->page_shift) {
free(page_buf);
return -ENOMEM;
}
}
Even we fix it adding increment of the offset of one erase block size
, we don't fix the problem, because the first erase block where the
image start is not checked. The code was tested on an imx8mn where
the boot rom api was not able to skip it. This code is used by other
architecures like imx6 and imx8mm
Cc: Han Xu <han.xu@nxp.com>
Cc: Fabio Estevam <festevam@gmail.com>
Acked-by: Han Xu <han.xu@nxp.com>
Tested-By: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Michael Trimarchi [Sun, 15 May 2022 09:35:30 +0000 (11:35 +0200)]
nand: raw: mxs_nand: Fix specific hook registration
Move the hook after nand_scan_tail is called. The hook must be replaced
to the mxs specific one but those must to be assignment later in the
probe function.
With this fix markbad is working again. Before this change:
nand markbad 0xDEC00
NXS NAND: Writing OOB isn't supported
NXS NAND: Writing OOB isn't supported
block 0x000dec00 NOT marked as bad! ERROR 0
Cc: Han Xu <han.xu@nxp.com>
Cc: Fabio Estevam <festevam@gmail.com>
Acked-by: Han Xu <han.xu@nxp.com>
Tested-By: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Gaurav Jain [Wed, 11 May 2022 08:53:19 +0000 (14:23 +0530)]
crypto/fsl: fsl_hash: Fix dcache issue in caam_hash_finish
HW accelerated hash operations are giving incorrect hash output.
so add flush and invalidate for input/output hash buffers.
Fixes: 94e3c8c4fd (crypto/fsl - Add progressive hashing support using hardware acceleration.)
Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com>
Gaurav Jain [Wed, 11 May 2022 08:37:55 +0000 (14:07 +0530)]
i.MX8ULP: add display_ele_fw_version api
implement get f/w version api.
print ele f/w version in spl.
Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Pankaj Gupta <pankaj.gupta@nxp.com>
Ye Li [Wed, 11 May 2022 08:26:20 +0000 (13:56 +0530)]
caam: Fix crash in case caam_jr_probe failed
If probing caam_jr returns failure, the variable "dev" will not be
initialized, so we can't use dev->name for the error print.
Otherwise it will cause crash.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Gaurav Jain <gaurav.jain@nxp.com>
Fabio Estevam [Tue, 10 May 2022 23:06:27 +0000 (20:06 -0300)]
kontron-sl-mx8mm: Select the CONFIG_CMD_UNZIP option
Select the CMD_UNZIP option so that the 'gzwrite' command
can be used to flash wic.gz image into the eMMC.
Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Peng Fan [Thu, 5 May 2022 11:06:12 +0000 (19:06 +0800)]
imx: toradex/verdin-imx8mm/p: cleanup board watchdog code
pinctrl_wdog already marked u-boot,dm-spl, so clean up board code.
The set_wdog_reset() function is not necessary as this is handled by
the imx_watchdog.c driver due to the 'fsl,ext-reset-output' property
being set.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Thu, 5 May 2022 11:06:11 +0000 (19:06 +0800)]
imx: verdin-imx8mm/p: cleanup board watchdog code
pinctrl_wdog already marked u-boot,dm-spl, so clean up board code.
The set_wdog_reset() function is not necessary as this is handled by
the imx_watchdog.c driver due to the 'fsl,ext-reset-output' property
being set.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Thu, 5 May 2022 11:06:06 +0000 (19:06 +0800)]
imx: imx8mn_smm_s2: clean up board watchdog code
pinctrl_wdog already marked u-boot,dm-spl, so clean up board code.
The set_wdog_reset() function is not necessary as this is handled by
the imx_watchdog.c driver due to the 'fsl,ext-reset-output' property
being set.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Tested-by: Ariel D'Alessandro <ariel.dalessandro@collabora.com>
Peng Fan [Thu, 5 May 2022 11:06:03 +0000 (19:06 +0800)]
imx: imx8mm-mx8menlo: drop unneeded watchdog settings
pinctrl_wdog as u-boot,dm-spl already marked in imx8mm-verdin-u-boot.dtsi,
The set_wdog_reset() function is not necessary as this is handled by
the imx_watchdog.c driver due to the 'fsl,ext-reset-output' property
being set.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Peng Fan [Thu, 5 May 2022 11:05:59 +0000 (19:05 +0800)]
imx: imx8mp_evk: enable pinctrl_wdog in SPL
Mark pinctrl_wdog as u-boot,dm-spl to clean up board code,
The set_wdog_reset() function is not necessary as this is handled by
the imx_watchdog.c driver due to the 'fsl,ext-reset-output' property
being set.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Thu, 5 May 2022 11:05:58 +0000 (19:05 +0800)]
imx: imx8mm_evk: enable pinctrl_wdog in SPL
Mark pinctrl_wdog as u-boot,dm-spl to clean up board code,
The set_wdog_reset() function is not necessary as this is handled by
the imx_watchdog.c driver due to the 'fsl,ext-reset-output' property
being set.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Thu, 5 May 2022 11:05:57 +0000 (19:05 +0800)]
imx: imx8mn_evk: enable pinctrl_wdog in SPL
Mark pinctrl_wdog as u-boot,dm-spl to clean up board code,
The set_wdog_reset() function is not necessary as this is handled by
the imx_watchdog.c driver due to the 'fsl,ext-reset-output' property
being set.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Thu, 5 May 2022 07:43:41 +0000 (15:43 +0800)]
imx: imx8mq-phanbell: enable CONFIG_DM_SERIAL
Marked related nodes as u-boot,dm-spl for serial driver model
Enable CONFIG_DM_SERIAL
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Peng Fan [Thu, 5 May 2022 07:43:40 +0000 (15:43 +0800)]
imx: imx8mq-pico: enable CONFIG_DM_SERIAL
Marked related nodes as u-boot,dm-spl for serial driver model
Enable CONFIG_DM_SERIAL
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Peng Fan [Thu, 5 May 2022 07:43:39 +0000 (15:43 +0800)]
imx: imx8mq-cm: enable CONFIG_DM_SERIAL
Marked related nodes as u-boot,dm-spl for serial driver model
Enable CONFIG_DM_SERIAL
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Peng Fan [Thu, 5 May 2022 07:43:38 +0000 (15:43 +0800)]
imx: dts: move common changes to imx8mq-u-boot.dtsi
Move some common changes to imx8mq-u-boot.dtsi, so others could reuse it
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Peng Fan [Thu, 5 May 2022 07:43:36 +0000 (15:43 +0800)]
imx: imx8mm_edm_sbc: Enable SPL_DM_SERIAL
Enable CONFIG_SPL_DM_SERIAL. uart and its pinmux was already
marked with u-boot,dm-spl.
Move preloader_console_init after spl_early_init to make sure driver
model work.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Peng Fan [Thu, 5 May 2022 07:43:30 +0000 (15:43 +0800)]
imx: imx8mm_mx8menlo: Enable DM_SERIAL
Enable CONFIG_DM_SERIAL. uart2 and its pinmux was already
marked with u-boot,dm-spl.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Tim Harvey [Fri, 29 Apr 2022 21:05:22 +0000 (14:05 -0700)]
board: gateworks: gw_ventana: remove obsolete file
commit
61cf22505339 ("board: gateworks: gw_ventana: use comomn GSC driver")
moved to the common GSC driver and moved remaining board-specific
functions to eeprom.c. The functions in gsc.c are no longer used and it
was removed from the Makefile but the file itself was not removed.
Remove it now.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Tim Harvey [Fri, 29 Apr 2022 20:51:02 +0000 (13:51 -0700)]
board: gateworks: gw_ventana: add support for GPY111 PHY
The MaxLinear GPY111 PHY is being used on some boards due to part
availability. Add support for this PHY which requires a longer reset
post-delay and RGMII delay configuration.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Tim Harvey [Fri, 29 Apr 2022 19:36:25 +0000 (12:36 -0700)]
board: gateworks: venice: enable SPL_DM_SERIAL
The uart2 and its pinmux are already marked with u-boot,dm-spl but we
need to move the call to preloader_console_init() after spl_early_init()
to avoid a board hang as dm can't be used until after spl_early_init()
due to the uart driver not enabling the uart clock.
Remove the manual config of the UART pinmux now that it is no longer
needed.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Tim Harvey [Fri, 29 Apr 2022 18:17:52 +0000 (11:17 -0700)]
configs: remove FEC_QUIRK_ENET_MAC from imx8m configs
FEC_QUIRK_ENET_MAC is defined in the imx-regs.h include file and thus
does not need to be defined in the various board config includes.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Tim Harvey [Fri, 29 Apr 2022 17:08:32 +0000 (10:08 -0700)]
configs: imx8mp_venice: add FEC_QUIRK_ENET_MAC
The IMX8MP SoC FEC needs to have the FEC_QUIRK_ENET_MAC defined.
Fixes: commit 2395625209cc ("board: gateworks: venice: add imx8mp-venice-gw740x support")
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Tim Harvey [Fri, 29 Apr 2022 16:54:04 +0000 (09:54 -0700)]
configs: imx8m{m, n}_venice: remove unneeded CONFIG_FEC_MXC_PHYADDR
The IMX8M based Venice boards all have device-tree fec nodes that
use proper dt with a phy-handle pointing to a phy with reg assigned
to the proper phy address.
There is no need to keep using the CONFIG_FEC_MXC_PHYADDR hack when
a proper dt is used - remove it.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Peng Fan [Fri, 29 Apr 2022 08:18:49 +0000 (16:18 +0800)]
imx: imx8m: drop uneeded check
All i.MX8M needs TZASC ID SWAP set and locked, no need the check to
waste cpu cycles.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>
Peng Fan [Fri, 29 Apr 2022 08:03:14 +0000 (16:03 +0800)]
imx: imx8m: add rproc_att
With rpoc_att, bootaux able to kick elf file for M core
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Fri, 29 Apr 2022 08:03:13 +0000 (16:03 +0800)]
imx: bootaux: get stack from elf file
To i.MX8, M core stack is pre-coded in source code, so need to get it
before kicking M core. The stack pointer is stored in the first word of
the first PT_LOAD section __isr_vector. So use a num to index the
section loading.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Fri, 29 Apr 2022 08:03:12 +0000 (16:03 +0800)]
imx: bootaux: add missing newline
Add missing newline
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Fri, 29 Apr 2022 08:03:11 +0000 (16:03 +0800)]
imx: bootaux: cleanup code
Use if (CONFIG_IS_ENABLED()) to make code cleaner
Enable elf support for i.MX8M
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Rasmus Villemoes [Mon, 25 Apr 2022 14:22:48 +0000 (16:22 +0200)]
imx8m: fix reading of DDR4 MR registers
I was trying to employ lpddr4_mr_read() to something similar to what
the imx8mm-cl-iot-gate board is doing for auto-detecting the RAM
type. However, the version in drivers/ddr/imx/imx8m/ddrphy_utils.c
differs from the private one used by that board in how it extracts the
byte value, and I was only getting zeroes. Adding a bit of debug
printf'ing gives me
tmp = 0x00ffff00
tmp = 0x00070700
tmp = 0x00000000
tmp = 0x00101000
and indeed I was expecting a (combined) value of 0xff070010 (0xff
being Manufacturer ID for Micron). I can't find any documentation that
says how the values are supposed to be read, but clearly the iot-gate
definition is the right one, both for its use case as well as my
imx8mp-based board.
So lift the private definition of lpddr4_mr_read() from the
imx8mm-cl-iot-gate board code to ddrphy_utils.c, and add a declaration
in the ddr.h header where e.g. get_trained_CDD() is already declared.
This has only been compile-tested for the imx8mm-cl-iot-gate
board (since I don't have the hardware), but since I've merely moved
its definition of lpddr4_mr_read(), I'd be surprised if it changed
anything for that board.
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Tested-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Marek Vasut [Sun, 24 Apr 2022 21:44:05 +0000 (23:44 +0200)]
ARM: imx: imx31: Introduce and use UART_BASE_ADDR(n)
Introduce helper macro UART_BASE_ADDR(n), which returns Nth UART base
address. Convert all board configurations to this new macro. This is the
first step toward switching CONFIG_MXC_UART_BASE to Kconfig. This is a
clean up, no functional change.
The new macro contains compile-time test to verify N is in suitable
range. The test works such that it multiplies constant N by constant
double-negation of size of a non-empty structure, i.e. it multiplies
constant N by constant 1 in each successful compilation case.
The non-empty structure may contain C11 _Static_assert(), make use of
this and place the kernel variant of static assert in there, so that
it performs the compile-time check for N in the correct range. Note
that it is not possible to directly use static_assert in compound
statements, hence this convoluted construct.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Marek Vasut [Sun, 24 Apr 2022 21:44:04 +0000 (23:44 +0200)]
ARM: imx: imx27: Introduce and use UART_BASE_ADDR(n)
Introduce helper macro UART_BASE_ADDR(n), which returns Nth UART base
address. Convert all board configurations to this new macro. This is the
first step toward switching CONFIG_MXC_UART_BASE to Kconfig. This is a
clean up, no functional change.
The new macro contains compile-time test to verify N is in suitable
range. The test works such that it multiplies constant N by constant
double-negation of size of a non-empty structure, i.e. it multiplies
constant N by constant 1 in each successful compilation case.
The non-empty structure may contain C11 _Static_assert(), make use of
this and place the kernel variant of static assert in there, so that
it performs the compile-time check for N in the correct range. Note
that it is not possible to directly use static_assert in compound
statements, hence this convoluted construct.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Marek Vasut [Sun, 24 Apr 2022 21:44:03 +0000 (23:44 +0200)]
ARM: imx: imx8m: Introduce and use UART_BASE_ADDR(n)
Introduce helper macro UART_BASE_ADDR(n), which returns Nth UART base
address. Convert all board configurations to this new macro. This is the
first step toward switching CONFIG_MXC_UART_BASE to Kconfig. This is a
clean up, no functional change.
The new macro contains compile-time test to verify N is in suitable
range. The test works such that it multiplies constant N by constant
double-negation of size of a non-empty structure, i.e. it multiplies
constant N by constant 1 in each successful compilation case.
The non-empty structure may contain C11 _Static_assert(), make use of
this and place the kernel variant of static assert in there, so that
it performs the compile-time check for N in the correct range. Note
that it is not possible to directly use static_assert in compound
statements, hence this convoluted construct.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Fabio Estevam [Fri, 22 Apr 2022 17:17:57 +0000 (14:17 -0300)]
mx6sllevk: Remove duplicated "mmc dev" command
The "mmc dev ${mmcdev}" command is done twice.
Remove one ocurrence to avoid the duplication.
Signed-off-by: Fabio Estevam <festevam@denx.de>
Fabio Estevam [Fri, 22 Apr 2022 17:17:56 +0000 (14:17 -0300)]
mx6slevk: Remove duplicated "mmc dev" command
The "mmc dev ${mmcdev}" command is done twice.
Remove one ocurrence to avoid the duplication.
Signed-off-by: Fabio Estevam <festevam@denx.de>
Gaurav Jain [Fri, 22 Apr 2022 11:08:34 +0000 (16:38 +0530)]
i.MX8 crypto/fsl: Enable fsl CAAM rng driver
rng driver enabled to read random number using caam.
Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com>
Marek Vasut [Fri, 22 Apr 2022 08:57:53 +0000 (10:57 +0200)]
ARM: dts: imx: Use 100 kHz I2C2 on Data Modul i.MX8M Mini eDM SBC
The I2C2 has SMBus device SMSC USB2514Bi connected to it, the device is
capable of up to 100 kHz operation. Reduce the bus frequency to 100 kHz
to guarantee this I2C device can work correctly.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Fabio Estevam [Thu, 21 Apr 2022 18:05:23 +0000 (15:05 -0300)]
imx8mn/8mp: Allow booting via USB
When trying to boot via USB on i.MX8MN it is necessary to specify
the U-Boot environment location, otherwise the boot process simply
hangs.
Specify the environment location when booting from USB.
Tested on a imx8mn-evk.
Suggested-by: Michael Nazzareno Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Fabio Estevam <festevam@denx.de>
Tested-By: Tim Harvey <tharvey@gateworks.com>
Fabio Estevam [Thu, 21 Apr 2022 18:05:22 +0000 (15:05 -0300)]
imx8mn_ddr4_evk: Add USB Mass Storage support
Add USB Mass Storage support, which is a convenient way to flash
the eMMC card, for example.
Signed-off-by: Fabio Estevam <festevam@denx.de>
Gaurav Jain [Fri, 15 Apr 2022 11:10:49 +0000 (16:40 +0530)]
i.MX6SX: crypto/fsl: fix entropy delay value
RNG Hardware error is reported due to incorrect entropy delay
rng self test are run to determine the correct ent_dly.
test is executed with different voltage and temperature to identify the
worst case value for ent_dly. after adding a margin value(1000),
ent_dly should be at least 12000.
Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Ye Li [Thu, 31 Mar 2022 05:27:47 +0000 (13:27 +0800)]
mtd: rawnand: mxs_nand: Fix use_minimum_ecc for spl driver
Because mxs_nand_spl driver does not support DM, to use the minimum ECC
layout, it needs to handle the CONFIG_NAND_MXS_USE_MINIMUM_ECC.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Han Xu <han.xu@nxp.com>
Tom Rini [Wed, 18 May 2022 12:41:13 +0000 (08:41 -0400)]
Merge https://source.denx.de/u-boot/custodians/u-boot-marvell
- Misc Kconfig cleanups (Chris & Pali)
- turris_omnia: Fix hangup in debug UART (this introduces
TPL/SPL_DEBUG_UART_BASE) Pali
- mvebu: uDPU: include fixed-phy support (Robert)
- pinctrl: probe pinctrl drivers during post-bind (Robert)
Robert Marko [Fri, 6 May 2022 18:01:39 +0000 (20:01 +0200)]
pinctrl: probe pinctrl drivers during post-bind
Currently, pinctrl drivers only get probed if pinconf is actually being
used, however on SoC-s like Armada 3720 pinctrl driver is a also the GPIO
driver.
So, if the pinctrl driver doesn't get probed GPIO-s won't get registered
and thus they cannot be used.
This is a problem on the Methode eDPU as it just uses SB pins as GPIO-s
and without them being registered networking won't work as it only has
one SFP slot and the TX disable GPIO is on the SB controller.
So, probe the pinctrl drivers using DM_FLAG_PROBE_AFTER_BIND like LED
uclass does.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Reviewed-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Robert Marko [Fri, 6 May 2022 11:54:43 +0000 (13:54 +0200)]
mvebu: uDPU: include fixed-phy support
uDPU relies on using fixed-phy for the SFP support, and since the
fixed-phy parsing was moved to the generic driver instead of mvneta
networking stopped working on uDPU with:
uDPU>> dhcp
dm_eth_phy_connect failed
This is due to the conversion commit not enabling fixed-phy support
in defconfig like it did for other boards.
Fixes: 77fcf3cf1251 ("net: mvneta: Convert to use PHY_FIXED for fixed-link")
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Mon, 9 May 2022 09:12:46 +0000 (11:12 +0200)]
arm: mvebu: turris_{omnia,mox}: Enable CONFIG_NETCONSOLE
This allows to use U-Boot console on Turris devices via network.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Mon, 9 May 2022 18:17:07 +0000 (20:17 +0200)]
arm: mvebu: Fix DEBUG_UART_BASE for all 32-bit boards
UART base address is located in internal registers.
Internal registers for 32-bit mvebu boards in SPL are at address 0xd0000000
and in proper U-Boot at address 0xf1000000.
Fix DEBUG_UART_BASE option for all 32-bit mvebu boards.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Fri, 6 May 2022 09:05:17 +0000 (11:05 +0200)]
arm: mvebu: turris_omnia: Fix DEBUG_UART_BASE
Internal registers in SPL are at address 0xd0000000 and in proper U-Boot at
address 0xf1000000. UART base address is located in internal registers.
Fix DEBUG_UART_BASE option to correct value for both SPL and proper U-Boot.
This change fixes hangup of proper U-Boot when it is trying to print
something via debug UART.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Fri, 6 May 2022 09:05:16 +0000 (11:05 +0200)]
serial: ns16550: Add support for SPL_DEBUG_UART_BASE
Use CONFIG_VAL(DEBUG_UART_BASE) instead of CONFIG_DEBUG_UART_BASE, so
proper config value (CONFIG_DEBUG_UART_BASE or CONFIG_SPL_DEBUG_UART_BASE)
is used based on building target.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Mon, 16 May 2022 16:49:09 +0000 (18:49 +0200)]
serial: Add new config option TPL_DEBUG_UART_BASE
TPL_DEBUG_UART_BASE is same as DEBUG_UART_BASE, but applies only for TPL.
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Stefan Roese <sr@denx.de>
Pali Rohár [Fri, 6 May 2022 09:05:15 +0000 (11:05 +0200)]
serial: Add new config option SPL_DEBUG_UART_BASE
SPL_DEBUG_UART_BASE is same as DEBUG_UART_BASE, but applies only for SPL.
In some cases base address of UART is different in SPL and proper U-Boot.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Fri, 6 May 2022 09:05:14 +0000 (11:05 +0200)]
arm: mvebu: Move internal registers in arch_very_early_init() function
Moving of internal registers from INTREG_BASE_ADDR_REG to SOC_REGS_PHY_BASE
needs to be done very early, prior calling any function which may touch
internal registers, like debug_uart_init().
So do it earlier in arch_very_early_init() instead of arch_cpu_init().
Movement is done in proper U-Boot, not in SPL. SPL may return to bootrom
and bootrom requires internal registers at (old) expected location.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Fri, 6 May 2022 09:05:13 +0000 (11:05 +0200)]
arm: Add new config option ARCH_VERY_EARLY_INIT
When this option is set then ARM _main() function would call
arch_very_early_init() function at the beginning. It would be before
calling any other functions like debug_uart_init() and also before
initializing C runtime environment.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Chris Packham [Thu, 5 May 2022 02:09:34 +0000 (14:09 +1200)]
arm: mvebu: Remove unused ARMADA_64BIT
Nothing selects ARMADA_64BIT. Instead the 64-bit SoCs just select ARM64
directly. Remove the unused config item.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Tue, 3 May 2022 09:13:24 +0000 (11:13 +0200)]
cmd: mvebu: Hide bubt specific options when bubt is disabled
CONFIG_MVEBU_NAND_BOOT, CONFIG_MVEBU_SPI_BOOT, CONFIG_MVEBU_MMC_BOOT and
CONFIG_MVEBU_UBOOT_DFLT_NAME are unused when CONFIG_CMD_MVEBU_BUBT is not
enabled. So hide them.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Tom Rini [Wed, 11 May 2022 17:27:44 +0000 (13:27 -0400)]
Merge branch '2022-05-11-Kconfig-cleanups-etc'
- Migrate CONFIG_MTD_CONCAT to Kconfig, use CONFIG_VAL/IS_ENABLED in
more places, rename SPL_LEGACY_IMAGE_SUPPORT to
SPL_LEGACY_IMAGE_FORMAT and update some related dependencies for TI
platforms.
Ralph Siemsen [Thu, 28 Apr 2022 19:52:59 +0000 (15:52 -0400)]
Makefile: update warning about CONFIG_OF_EMBED
Update the diagnostic message with revised location of document, which
changed in
3e9fddfc4f1 ("doc: Move devicetree control doc to rST")
Signed-off-by: Ralph Siemsen <ralph.siemsen@linaro.org>
Ovidiu Panait [Mon, 2 May 2022 15:34:56 +0000 (18:34 +0300)]
board_r: use IS_ENABLED(CONFIG_NEEDS_MANUAL_RELOC) in board_init_r()
Drop CONFIG_NEEDS_MANUAL_RELOC ifdefs in board_init_r() and use
IS_ENABLED() instead. Also, use the MANUAL_RELOC() macro to update the
initcall pointers.
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Chris Packham [Tue, 3 May 2022 09:24:57 +0000 (21:24 +1200)]
Convert CONFIG_MTD_CONCAT to Kconfig
This converts the following to Kconfig:
CONFIG_MTD_CONCAT
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Rasmus Villemoes [Tue, 3 May 2022 12:37:39 +0000 (14:37 +0200)]
common/console.c: use CONFIG_VAL() with PRE_CON_BUF_* variables
There is currently no support for PRE_CONSOLE_BUFFER in SPL, but if
and when that gets implemented, one would almost certainly want to use
a different address and/or size for the buffer (e.g., U-Boot proper
might specify an address in DRAM and a generous buffer, while SPL
would be much more constrained).
So a prerequisite for adding SPL_PRE_CONSOLE_BUFFER is to make the
code use SPL_-specific values. No functional change.
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Andrew Davis [Wed, 4 May 2022 20:52:28 +0000 (15:52 -0500)]
boot: Kconfig: Enable FIT processing by default on TI secure devices
TI secure devices chain-of-trust depends on FIT image processing,
enable it by default on these devices. This also reduces the delta
between the secure and non-secure defconfig files.
Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Andrew Davis [Wed, 4 May 2022 20:52:27 +0000 (15:52 -0500)]
boot: Kconfig: Disable non-FIT loading for TI secure devices
Non-FIT image loading support should be disabled for TI secure
devices as the image handlers for those image types do not follow
our secure boot checks.
Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Andrew Davis [Wed, 4 May 2022 20:52:26 +0000 (15:52 -0500)]
spl: Force disable non-FIT loading for TI secure devices
Booting of non-FIT images bypass our chain-of-trust boot flow,
these options should not be allowed when high security is set.
Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Andrew Davis [Wed, 4 May 2022 20:52:25 +0000 (15:52 -0500)]
spl: Rename Kconfig SPL_LEGACY_IMAGE_SUPPORT to SPL_LEGACY_IMAGE_FORMAT
This matches what this support is called in the non-SPL case. The postfix
_SUPPORT is redundant as enabling Kconfig options implies support.
With this we can use CONFIG_IS_ENABLED() as needed.
Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Tom Rini [Tue, 10 May 2022 19:28:02 +0000 (15:28 -0400)]
Merge tag 'u-boot-stm32-
20220510' of https://source.denx.de/u-boot/custodians/u-boot-stm
Add new STM32 MCU boards and Documentation
STM32 programmer improvements
video: support several LTDC HW versions and fix data enable polarity
board: fix stboard error message, consider USB cable connected when boot device is USB
configs: stm32mp1: set console variable for extlinux.conf
configs: stm32mp1: add support for baudrate higher than 115200 for ST-Link
ARM: stm32mp: Fix Silicon version handling and ft_system_setup()
phy: stm32-usbphyc: Add DT phy tuning support
arm: dts: stm32mp15: alignment with v5.18
ram: Conditionally enable ASR
mach-stm32mp: psci: retain MCUDIVR, PLL3CR, PLL4CR, MSSCKSELR across suspend
configs: Use TFTP_TSIZE on DHSOM and STMicroelectronics boards
ARM: stm32: Use default CONFIG_TFTP_BLOCKSIZE on DHSOM
pinctrl: stm32: rework GPIO holes management
Tom Rini [Tue, 10 May 2022 13:52:00 +0000 (09:52 -0400)]
Merge tag 'i2c-2022-07' of https://source.denx.de/u-boot/custodians/u-boot-i2c
i2c changes for 2022.07
- i2c: ihs: intel: Fix typo in comments
Patch from Michal
- misc: atsha204a: Add support for atsha204 chip
from Pali
Sean Anderson [Fri, 22 Apr 2022 20:11:37 +0000 (16:11 -0400)]
misc: Fix always compiling MISC even for SPL/TPL
We should only build support for misc if the appropriate SPL/TPL symbol
is defined. To ease the transition, make SPL/TPL_MISC default to MISC.
This is necessary because many drivers don't specify their dependencies
properly. These defaults can be removed once all drivers depend on the
appropriate config.
Fixes: aaba703fd0 ("spl: misc: Allow misc drivers in SPL and TPL")
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
[trini: Add VPL_MISC symbol, handle like SPL/TPL_MISC]
Signed-off-by: Tom Rini <trini@konsulko.com>
Patrice Chotard [Wed, 27 Apr 2022 11:54:01 +0000 (13:54 +0200)]
doc: Add documentation for STM32 MCUs
Add documentation for STM32 MCUs (F4, F7 and H7 series).
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Patrice Chotard [Wed, 27 Apr 2022 11:54:00 +0000 (13:54 +0200)]
configs: stm32746g-eval: Add stm32746g-eval_spl_defconfig
Add stm32746g-eval_spl_defconfig for stm32746g evaluation board to
build SPL.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Patrice Chotard [Wed, 27 Apr 2022 11:53:59 +0000 (13:53 +0200)]
configs: stm32746g-eval: Add stm32746g-eval_defconfig
Add stm32746g-eval_defconfig for stm32746g evaluation board to
build U-Boot proper.
Full board description can be found here :
https://www.st.com/en/evaluation-tools/stm32746g-eval.html
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Patrice Chotard [Wed, 27 Apr 2022 11:53:58 +0000 (13:53 +0200)]
configs: stm32f746-disco: use CONFIG_DEFAULT_DEVICE_TREE as fdtfile
As stm32f46-disco, stm32f769-disco and stm32746g-eval are very similar
except their respective device tree file. These 3 boards uses the same
TARGET_STM32F746_DISCO flag (so same include/configs/stm32f746-disco.h
and same board file board/st/stm32f746-disco/stm32f746-disco.c)
To be able to compile these 3 boards, replace the hard-coded device-tree
name in include/configs/stm32f746-disco.h by CONFIG_DEFAULT_DEVICE_TREE
which is set in each board defconfig file with the correct value.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Patrice Chotard [Wed, 27 Apr 2022 11:53:57 +0000 (13:53 +0200)]
board: stm32f746-disco: Fix dram_init() in none SPL config
Replace CONFIG_SUPPORT_SPL by CONFIG_SPL_BUILD to allow
dram_init() execution when using none SPL defconfig
(stm32f746-disco_defconfig).
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Patrice Chotard [Wed, 27 Apr 2022 11:53:56 +0000 (13:53 +0200)]
configs: stm32f746-disco: Migrate SPL flags to defconfig
Migrate SPL flags to stm32f746-disco_spl_defconfig
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Patrice Chotard [Wed, 27 Apr 2022 11:53:55 +0000 (13:53 +0200)]
configs: stm32f769-disco: Migrate SPL flags to defconfig
Migrate SPL flags to stm32f769-disco_spl_defconfig
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Patrice Chotard [Wed, 27 Apr 2022 11:53:54 +0000 (13:53 +0200)]
configs: stm32f769-disco: Add stm32f769-disco_defconfig
Add stm32f769-disco_defconfig for stm32f769 discovery board to
build U-Boot proper.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Patrice Chotard [Wed, 27 Apr 2022 11:53:53 +0000 (13:53 +0200)]
configs: stm32f769-disco: Rename stm32f769-disco_defconfig to stm32f769-disco_spl_defconfig
The current stm32f769-disco_defconfig file supports SPL, rename it to
stm32f769-disco_spl_defconfig to reflect the supported configuration.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Patrice Chotard [Wed, 27 Apr 2022 11:53:52 +0000 (13:53 +0200)]
configs: stm32f746-disco: Add stm32f746-disco_defconfig
Add stm32f746-disco_defconfig for stm32f746 discovery board to
build U-Boot proper.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Patrice Chotard [Wed, 27 Apr 2022 11:53:51 +0000 (13:53 +0200)]
configs: stm32f746-disco: Rename stm32f746-disco_defconfig to stm32f746-disco_spl_defconfig
The current stm32f746-disco_defconfig file supports SPL, rename it to
stm32f746-disco_spl_defconfig to reflect the supported configuration.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Patrice Chotard [Wed, 27 Apr 2022 11:53:50 +0000 (13:53 +0200)]
configs: stm32f746-disco: Concatenate spl and u-boot binaries
This allows to concatenate spl and u-boot binaries together.
Previously, both binaries has to be flashed separately at the correct
offset (spl at offset 0 and u-boot at offset 0x8000).
With this patch, only one binary is generated (u-boot-with-spl.bin)
and has to be copied in flash at offset 0 using openocd for example
or simply copied in exported mass storage.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Marek Vasut [Fri, 22 Apr 2022 10:40:39 +0000 (12:40 +0200)]
clk: stm32mp1: Add missing newline
Add missing newline to this debug message, no functional change.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Patrice Chotard [Fri, 22 Apr 2022 07:39:18 +0000 (09:39 +0200)]
board: st: stm32mp1: Consider USB cable connected when boot device is USB
Always consider USB cable is connected when USB boot device is detected.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Patrice Chotard [Fri, 22 Apr 2022 07:39:00 +0000 (09:39 +0200)]
phy: stm32-usbphyc: stm32-usbphyc: Add DT phy tuning support
Add support of phy-tuning properties for sm32-usbphyc's phy tuning
aligned with v5.15 kernel bindings.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Patrice Chotard [Fri, 22 Apr 2022 07:38:31 +0000 (09:38 +0200)]
gpio: stm32_gpio: Rework GPIO hole management
On some STM32 SoC's package, GPIO bank may have hole in their GPIO bank
Example:
If GPIO bank have 16 GPIO pins [0-15].
In particular SoC's package case, some GPIO bank can have less GPIO pins:
- [0-10] => 11 pins;
- [2-7] => 6 pins.
Commit
dbf928dd2634 ("gpio: stm32f7: Add gpio bank holes management")
proposed a first implementation by not counting GPIO "inside" hole. GPIO
are not displaying correctly using gpio or pinmux command when GPIO holes
are located at the beginning of GPIO bank.
To simplify, consider that all GPIO have 16 GPIO and use the gpio_ranges
struct to indicate if a GPIO is mapped or not. GPIO uclass offers several
GPIO functions ("input", "output", "unused", "unknown" and "func"), use
"unknown" GPIO function to indicate that a GPIO is not mapped.
stm32_offset_to_index() is no more needed and removed.
This must be reflected using the "gpio" command to indicate to user
that a particular GPIO is not mapped (marked as "unknown") as shown below:
Example for a 16 pins GPIO bank with the [2-7] mapping (only 6 pins
mapped):
GPIOI0 : unknown
GPIOI1 : unknown
GPIOI2 : analog
GPIOI3 : analog
GPIOI4 : alt function 0 push-pull pull-down
GPIOI5 : alt function 0 push-pull pull-down
GPIOI6 : alt function 0 push-pull pull-down
GPIOI7 : analog
GPIOI8 : unknown
GPIOI9 : unknown
GPIOI10 : unknown
GPIOI11 : unknown
GPIOI12 : unknown
GPIOI13 : unknown
GPIOI14 : unknown
GPIOI15 : unknown
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Patrice Chotard [Fri, 22 Apr 2022 07:38:30 +0000 (09:38 +0200)]
pinctrl: pinctrl_stm32: Use GPIOF_UNKNOWN to indicate not mapped pins
GPIOF_UNKNOWN becomes a valid pin muxing information to indicate
that a pin is not mapped.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Patrice Chotard [Fri, 22 Apr 2022 07:38:29 +0000 (09:38 +0200)]
pinctrl: pinctrl_stm32: Update pinmux_mode definition
pinmux_mode[] is linked to gpio_function[] defined in gpio-uclass.c
So reuse the same gpio_func_t enum value
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Patrick Delaunay [Thu, 5 May 2022 12:21:32 +0000 (14:21 +0200)]
ARM: stm32: Use CONFIG_TFTP_TSIZE on STMicroelectronics boards
Long TFTP transfers lead to a wall of # characters on UART, which in
the end may slow down the transfer itself. Use CONFIG_TFTP_TSIZE to
print progress in fewer # characters.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Marek Vasut [Wed, 4 May 2022 12:50:04 +0000 (14:50 +0200)]
ARM: dts: stm32: Move DHCOR BUCK3 VDD 2V9 adjustment to 1V8 DTSI
The Buck3 on DHCOR is used to supply IO voltage. It can output either 3V3
in the default DHCOR configuration, or 2V9 in case of AV96 DHCOR variant
which has extra Empirion DCDC converter in front of the 1V8 IO supply, or
outright 1V8 in case of 1V8 IO DHCOR without the Empirion DCDC converter.
The 2V9 mode in case of AV96 DHCOR variant is used to reduce unnecessarily
high input voltage to the Empirion DCDC converter, so move it into matching
DTSI to stop confusing users.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Marek Vasut [Sun, 1 May 2022 16:43:29 +0000 (18:43 +0200)]
ARM: stm32: Use CONFIG_TFTP_TSIZE on DHSOM
Long TFTP transfers lead to a wall of # characters on UART, which in
the end may slow down the transfer itself. Use CONFIG_TFTP_TSIZE to
print progress in fewer # characters.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Marek Vasut [Sun, 1 May 2022 16:43:28 +0000 (18:43 +0200)]
ARM: stm32: Use default CONFIG_TFTP_BLOCKSIZE on DHSOM
The DHCOM does ship with KS8851 with 1.5 kiB packet buffer. The DHSOM
may be extended with other MAC options connected to FMC2 bus, like the
DM9000, wih similar limitations. Use default CONFIG_TFTP_BLOCKSIZE of
1468 Bytes instead of 1536 Bytes, which always avoids overflowing the
packet buffers of such limited MACs, which leads to e.g. TFTP timeouts.
This also avoids receiving a short packet fragment at the end of each
TFTP block, which led to reduced performance.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Marek Vasut [Tue, 26 Apr 2022 14:38:05 +0000 (16:38 +0200)]
stm32mp: psci: Retain MCUDIVR, PLL3CR, PLL4CR, MSSCKSELR across suspend
The SoC seems to lose the values of MCUDIVR, PLL3CR, PLL4CR, RCC_MSSCKSELR
during suspend/resume cycle, cache them and reinstate their values on resume.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Marek Vasut [Tue, 26 Apr 2022 14:37:41 +0000 (16:37 +0200)]
ram: stm32mp1: Conditionally enable ASR
Enable DRAM ASR, auto self-refresh, conditionally, based on DT PWRCTL
register bits. While ASR does save considerable amount of power at
runtime automatically, it also causes LTDC underruns on large panels.
Let user select whether or not ASR is required or not, generally ASR
should be enabled on portable and battery operated devices.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Patrick Delaunay [Tue, 26 Apr 2022 13:38:05 +0000 (15:38 +0200)]
arm: dts: stm32mp15: alignment with v5.18
Device tree alignment with Linux kernel v5.18-rc2:
- ARM: dts: stm32: Add support for the emtrion emSBC-Argon
(only the pincontrol part)
- ARM: dts: stm32: Drop duplicate status okay from DHCOM gpioc node
- ARM: dts: stm32: add st,stm32-sdmmc2 compatible on stm32mp151
- ARM: dts: stm32: fix AV96 board SAI2 pin muxing on stm32mp15
- ARM: dts: stm32: use exti 19 as main interrupt to support RTC wakeup on
stm32mp157
- ARM: dts: stm32: add DMA configuration to UART nodes on stm32mp151
- ARM: dts: stm32: keep uart4 behavior on *
- ARM: dts: stm32: Correct masks for GIC PPI interrupts on stm32mp15
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Patrick Delaunay [Fri, 15 Apr 2022 13:00:43 +0000 (15:00 +0200)]
ARM: stm32mp: correctly handle Silicon revision
Handle correctly the silicon revision = REV_ID[15:0] of Device Version
and the associated device marking, A to Z on STMicroelectronics STM32MP
SOCs.
This patch prepare the introduction of next STM32MP family,
with STM32MP13x Rev.Z for REV_ID = 1.1.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Patrick Delaunay [Fri, 15 Apr 2022 12:43:23 +0000 (14:43 +0200)]
ARM: stm32mp: skip ft_system_setup when the soc node is absent
The function ft_system_setup shouldn't return an error when the
/soc node is absent in the provided device tree but just skip the
updates.
This patch solves an issue when the U-Boot pytest is executed on board.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Patrick Delaunay [Fri, 15 Apr 2022 12:31:55 +0000 (14:31 +0200)]
configs: stm32mp1: Add support for baudrates higher than 115200 for st-link
On STMicroelectronics boards, the UART can reliably go up to
2000000 bauds when connected to the on-board ST-LINK-V2 for STM32MP15
Unfortunately U-Boot will fall back to 115200 unless higher rates are
declared via CONFIG_SYS_BAUDRATE_TABLE.
This patch add the support of higher baudrates on STMicroelectronics
boards with ST-LINK.
Cc: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Patrick Delaunay [Fri, 15 Apr 2022 12:31:54 +0000 (14:31 +0200)]
configs: stm32mp1: set the console variable for extlinux.conf
Set the environment variable "console", used in extlinux.conf file when it
is generated by YOCTO distribution with:
UBOOT_EXTLINUX_CONSOLE ??= "console=${console},${baudrate}"
With these 2 variables, U-Boot give dynamically the used console and
baudrate in the Linux kernel bootargs.
For the STMicroelectronics boards, the used console is ttySTM0.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Patrick Delaunay [Fri, 15 Apr 2022 09:46:50 +0000 (11:46 +0200)]
board: st: common: fix the error messages in stboard command
Add missing \n at the end of the error trace
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Yannick Fertre [Wed, 6 Apr 2022 08:41:35 +0000 (10:41 +0200)]
video: stm32: stm32_ltdc: support several hardware versions
Register mapping & pixel formats depend on version of ltdc
display controller.
Signed-off-by: Yannick Fertre <yannick.fertre@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Yannick FERTRE [Wed, 6 Apr 2022 08:37:42 +0000 (10:37 +0200)]
video: stm32: stm32_ltdc: fix data enable polarity
Wrong DISPLAY_FLAGS used to set the data enable polarity.
Signed-off-by: Yannick FERTRE <yannick.fertre@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Patrick Delaunay [Mon, 28 Mar 2022 17:25:33 +0000 (19:25 +0200)]
stm32mp: stm32prog: handle flashlayout without STM32 image header
Accept flashlayout without header in alternate 0, to simplify
the support of stm32prog command with dfu-util.
By default the flashlayout file size is the size of the received binary,
provided with the offset in the DFU alternate.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>