Shawn Guo [Tue, 6 Sep 2011 07:08:40 +0000 (15:08 +0800)]
arm/imx6q: add suspend/resume support
It adds suspend/resume support for imx6q.
Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Shawn Guo [Tue, 6 Sep 2011 07:05:25 +0000 (15:05 +0800)]
arm/imx6q: add device tree machine support
It adds generic device tree based machine support for imx6q.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Shawn Guo [Tue, 6 Sep 2011 06:59:40 +0000 (14:59 +0800)]
arm/imx6q: add smp and cpu hotplug support
It adds smp and cpu hotplug support for imx6q.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Shawn Guo [Tue, 6 Sep 2011 06:39:44 +0000 (14:39 +0800)]
arm/imx6q: add core drivers clock, gpc, mmdc and src
It adds a number of core drivers support for imx6q, including clock,
General Power Controller (gpc), Multi Mode DDR Controller(mmdc) and
System Reset Controller (src).
Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Shawn Guo [Fri, 23 Sep 2011 16:43:06 +0000 (00:43 +0800)]
arm/imx: add gic_handle_irq function
This is a plain translation of assembly gic irq handler to C function
for CONFIG_MULTI_IRQ_HANDLER support on imx family.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Shawn Guo [Sun, 2 Oct 2011 07:09:11 +0000 (15:09 +0800)]
arm/imx6q: add core definitions and low-level debug uart
It adds the core definitions and low-level debug uart support
for imx6q.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Shawn Guo [Tue, 6 Sep 2011 05:53:26 +0000 (13:53 +0800)]
arm/imx6q: add device tree source
It adds device tree source and documentation for imx6q platform.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Arnd Bergmann [Mon, 31 Oct 2011 13:24:41 +0000 (14:24 +0100)]
Merge branch 'cross-platform/debug_ll' into imx/imx6q
Conflicts:
arch/arm/Kconfig.debug
Arnd Bergmann [Mon, 31 Oct 2011 13:24:28 +0000 (14:24 +0100)]
Merge branch 'imx/devel' into imx/imx6q
Conflicts:
arch/arm/plat-mxc/include/mach/memory.h
Arnd Bergmann [Mon, 31 Oct 2011 13:23:44 +0000 (14:23 +0100)]
Merge branch 'dt/gic' into imx/imx6q
Arnd Bergmann [Mon, 31 Oct 2011 13:23:28 +0000 (14:23 +0100)]
Merge branch 'depends/rmk/devel-stable' into imx/imx6q
Rob Herring [Fri, 21 Oct 2011 22:14:27 +0000 (17:14 -0500)]
ARM: gic: fix irq_alloc_descs handling for sparse irq
Commit "ARM: gic: add irq_domain support" (b49b6ff) breaks SPARSE_IRQ
on platforms with GIC. When SPARSE_IRQ is enabled, all NR_IRQS or
mach_desc->nr_irqs will be allocated by arch_probe_nr_irqs(). This caused
irq_alloc_descs to allocate irq_descs after the pre-allocated space.
Make irq_alloc_descs search for an exact irq range and assume it has
been pre-allocated on failure. For DT probing dynamic allocation is used.
DT enabled platforms should set their nr_irqs to NR_IRQ_LEGACY and have all
irq_chips allocate their irq_descs with irq_alloc_descs if SPARSE_IRQ is
enabled.
gic_init irq_start param is changed to be signed with negative meaning do
dynamic Linux irq assigment.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Rob Herring [Thu, 29 Sep 2011 02:27:52 +0000 (21:27 -0500)]
ARM: gic: add OF based initialization
This adds ARM gic interrupt controller initialization using device tree
data.
The initialization function is intended to be called by of_irq_init
function like this:
const static struct of_device_id irq_match[] = {
{ .compatible = "arm,cortex-a9-gic", .data = gic_of_init, },
{}
};
static void __init init_irqs(void)
{
of_irq_init(irq_match);
}
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Reviewed-by: Jamie Iles <jamie@jamieiles.com>
Tested-by: Thomas Abraham <thomas.abraham@linaro.org>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Rob Herring [Thu, 29 Sep 2011 02:25:31 +0000 (21:25 -0500)]
ARM: gic: add irq_domain support
Convert the gic interrupt controller to use irq domains in preparation
for device-tree binding and MULTI_IRQ. This allows for translation between
GIC interrupt IDs and Linux irq numbers.
The meaning of irq_offset has changed. It now is just the number of skipped
GIC interrupt IDs for the controller. It will be 16 for primary GIC and 32
for secondary GICs.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Reviewed-by: Jamie Iles <jamie@jamieiles.com>
Tested-by: Thomas Abraham <thomas.abraham@linaro.org>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Rob Herring [Fri, 30 Sep 2011 15:48:38 +0000 (10:48 -0500)]
irq: support domains with non-zero hwirq base
Interrupt controllers can have non-zero starting value for h/w irq numbers.
Adding support in irq_domain allows the domain hwirq numbering to match
the interrupt controllers' numbering.
As this makes looping over irqs for a domain more complicated, add loop
iterators to iterate over all hwirqs and irqs for a domain.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Reviewed-by: Jamie Iles <jamie@jamieiles.com>
Tested-by: Thomas Abraham <thomas.abraham@linaro.org>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Acked-by: Thomas Gleixner <tglx@linutronix.de>
Rob Herring [Tue, 20 Sep 2011 20:13:50 +0000 (15:13 -0500)]
of/irq: introduce of_irq_init
of_irq_init will scan the devicetree for matching interrupt controller
nodes. Then it calls an initialization function for each found controller
in the proper order with parent nodes initialized before child nodes.
Based on initial pseudo code from Grant Likely.
Changes in v4:
- Drop unnecessary empty list check
- Be more verbose on errors
- Simplify "if (!desc) WARN_ON(1)" to "if (WARN_ON(!desc))"
Changes in v3:
- add missing kfree's found by Jamie
- Implement Grant's comments to simplify the init loop
- fix function comments
Changes in v2:
- Complete re-write of list searching code from Grant Likely
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Reviewed-by: Jamie Iles <jamie@jamieiles.com>
Tested-by: Thomas Abraham <thomas.abraham@linaro.org>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Rob Herring [Mon, 24 Oct 2011 19:02:37 +0000 (14:02 -0500)]
Merge remote-tracking branch 'rmk/devel-stable' into HEAD
Russell King [Sun, 23 Oct 2011 13:42:30 +0000 (14:42 +0100)]
Merge branch 'ppi-irq-core-for-rmk' of git://github.com/mzyngier/arm-platforms into devel-stable
Marc Zyngier [Fri, 22 Jul 2011 11:52:37 +0000 (12:52 +0100)]
ARM: gic, local timers: use the request_percpu_irq() interface
This patch remove the hardcoded link between local timers and PPIs,
and convert the PPI users (TWD, MCT and MSM timers) to the new
*_percpu_irq interface. Also some collateral cleanup
(local_timer_ack() is gone, and the interrupt handler is strictly
private to each driver).
PPIs are now useable for more than just the local timers.
Additional testing by David Brown (msm8250 and msm8660) and
Shawn Guo (imx6q).
Cc: David Brown <davidb@codeaurora.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Acked-by: David Brown <davidb@codeaurora.org>
Tested-by: David Brown <davidb@codeaurora.org>
Tested-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Marc Zyngier [Wed, 20 Jul 2011 15:24:14 +0000 (16:24 +0100)]
ARM: gic: consolidate PPI handling
PPI handling is a bit of an odd beast. It uses its own low level
handling code and is hardwired to the local timers (hence lacking
a registration interface).
Instead, switch the low handling to the normal SPI handling code.
PPIs are handled by the handle_percpu_devid_irq flow.
This also allows the removal of some duplicated code.
Cc: Kukjin Kim <kgene.kim@samsung.com>
Cc: David Brown <davidb@codeaurora.org>
Cc: Bryan Huntsman <bryanh@codeaurora.org>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: Magnus Damm <magnus.damm@gmail.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Acked-by: David Brown <davidb@codeaurora.org>
Tested-by: David Brown <davidb@codeaurora.org>
Tested-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Marc Zyngier [Sun, 23 Oct 2011 12:32:19 +0000 (13:32 +0100)]
Merge commit '32cffdd' into ppi-irq-core-for-rmk
Russell King [Thu, 20 Oct 2011 21:04:18 +0000 (22:04 +0100)]
ARM: smp: fix clipping of number of CPUs
Rather than clipping the number of CPUs using the compile-time NR_CPUS
constant, use the runtime nr_cpu_ids value instead. This allows the
nr_cpus command line option to work as expected.
Cc: <stable@kernel.org>
Reported-by: Mark Salter <msalter@redhat.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Arnd Bergmann [Thu, 20 Oct 2011 15:57:46 +0000 (17:57 +0200)]
Merge branch 'depends/rmk/smp' into tmp
Arnd Bergmann [Thu, 20 Oct 2011 15:57:42 +0000 (17:57 +0200)]
Merge branch 'depends/rmk/debug' into tmp
Arnd Bergmann [Thu, 20 Oct 2011 13:14:25 +0000 (15:14 +0200)]
Merge branch 'imx-features-for-arnd' of git://git.pengutronix.de/git/imx/linux-2.6 into imx/devel
Conflicts:
arch/arm/mach-mx5/clock-mx51-mx53.c
arch/arm/mach-mx5/devices-imx53.h
Russell King [Tue, 18 Oct 2011 12:40:54 +0000 (13:40 +0100)]
Merge branch 'mach_memory_h' of git://git.linaro.org/people/nico/linux into devel-stable
Shawn Guo [Fri, 19 Aug 2011 04:56:59 +0000 (05:56 +0100)]
arm/imx: use Kconfig choice for low-level debug UART selection
Now that the DEBUG_LL UART can be selected by a Kconfig choice,
simplify the #ifdefery in debug-macro.S and add entries to the
top-level Kconfig.debug instead.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Will Deacon [Tue, 16 Aug 2011 21:30:28 +0000 (22:30 +0100)]
ARM: realview: use Kconfig choice for debug UART selection
Now that the DEBUG_LL UART can be selected by a Kconfig choice, simplify
the #ifdefery in debug-macro.S and add entries to the top-level
Kconfig.debug instead.
Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Will Deacon [Tue, 16 Aug 2011 21:28:54 +0000 (22:28 +0100)]
ARM: plat-samsung: use Kconfig choice for debug UART selection
Now that the DEBUG_LL UART can be selected by a Kconfig choice, convert
the Samsung UART selection to use a set of bools rather than an int.
Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Will Deacon [Mon, 3 Oct 2011 17:29:03 +0000 (18:29 +0100)]
ARM: 7116/1: debug: provide dummy default option for DEBUG_LL UART choice
Defaulting to DEBUG_ICEDCC will cause systems to hang during boot unless
a hardware debugger is listening to the debug comms. channel.
This patch adds a dummy UART option as the default DEBUG_LL choice which
requires the platform to do the right thing.
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Tested-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Stephen Boyd [Thu, 22 Sep 2011 19:28:36 +0000 (20:28 +0100)]
ARM: 7097/1: debug: Move DEBUG_ICEDCC into the DEBUG_LL choice
DEBUG_ICEDCC support is just another DEBUG_LL choice and
selecting it along with other DEBUG_LL options doesn't make
much sense. Put it into the DEBUG_LL choice to avoid confusion.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Stephen Boyd [Thu, 22 Sep 2011 19:28:35 +0000 (20:28 +0100)]
ARM: 7096/1: debug: Add UART1 config choices
ARM patch 7072/1 (debug: use kconfig choice for selecting
DEBUG_LL UART) didn't notice that the Kconfigs relied on being
unselected to configure a different serial port. Since there is
no NONE option in a choice menu, explicitly add the other option
so that both serial ports can be selected.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Will Deacon [Thu, 1 Sep 2011 18:04:44 +0000 (19:04 +0100)]
ARM: 7073/1: debug: augment DEBUG_LL Kconfig help to clarify behaviour
Enabled DEBUG_LL hardcodes the UART address into the kernel and results
in a non-portable kernel image. Since this option is only intended for
use when debugging early boot failures, supporting multiple platforms
in such a configuration is not the intended use-case.
This patch documents this limitation in the DEBUG_LL Kconfig help text,
so that users are aware of the portability restrictions that are associated
with enabling low-level debugging support.
Reported-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Will Deacon [Thu, 1 Sep 2011 17:58:51 +0000 (18:58 +0100)]
ARM: 7072/1: debug: use kconfig choice for selecting DEBUG_LL UART
Enabling CONFIG_DEBUG_LL (which is required for earlyprintk) hardwires
the debug UART address into the kernel, so that we can print before the
platform is initialised.
If the user inadvertently selects multiple platforms with DEBUG_LL
enabled, the UART address may not be correct and will likely cause the
kernel to hang in the very early stages of boot.
This patch, based on a skeleton from Russell, uses a Kconfig choice for
selecting the DEBUG_LL UART, therefore allowing the user to make a
choice about the supported platform when DEBUG_LL is enabled.
Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Jamie Iles [Sat, 8 Oct 2011 10:20:42 +0000 (11:20 +0100)]
ARM: 7115/4: move __exception and friends to asm/exception.h
The definition of __exception_irq_entry for
CONFIG_FUNCTION_GRAPH_TRACER=y needs linux/ftrace.h, but this creates a
circular dependency with it's current home in asm/system.h. Create
asm/exception.h and update all current users.
v4: - rebase to rmk/for-next
v3: - remove redundant includes of linux/ftrace.h
v2: - document the usage restricitions of __exception*
Cc: Zoltan Devai <zdevai@gmail.com>
Signed-off-by: Jamie Iles <jamie@jamieiles.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Shawn Guo [Thu, 6 Oct 2011 14:19:14 +0000 (15:19 +0100)]
ARM: 7124/1: smp: Add a localtimer handler callable from C code
In order to be able to handle localtimer directly from C code instead of
assembly code, introduce handle_local_timer(), which is modeled after
handle_IRQ().
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Shawn Guo [Thu, 6 Oct 2011 14:18:14 +0000 (15:18 +0100)]
ARM: 7123/1: smp: Add an IPI handler callable from C code
In order to be able to handle IPI directly from C code instead of
assembly code, introduce handle_IPI(), which is modeled after handle_IRQ().
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Shawn Guo [Sun, 25 Sep 2011 07:25:43 +0000 (08:25 +0100)]
ARM: 7100/1: smp_scu: remove __init annotation from scu_enable()
When Cortex-A9 MPCore resumes from Dormant or Shutdown modes,
SCU needs to be re-enabled. This patch removes __init annotation
from function scu_enable(), so that platform resume procedure can
call it to re-enable SCU.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Will Deacon [Tue, 23 Aug 2011 21:20:03 +0000 (22:20 +0100)]
ARM: 7061/1: gic: convert logical CPU numbers into physical numbers
The GIC driver must convert logical CPU numbers passed in from Linux
into physical CPU numbers that are understood by the hardware.
This patch uses the new cpu_logical_map macro for performing the
conversion inside the GIC driver.
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Will Deacon [Tue, 23 Aug 2011 21:19:29 +0000 (22:19 +0100)]
ARM: 7060/1: smp: populate logical CPU mapping during boot
To allow booting Linux on a CPU with physical ID != 0, we need to
provide a mapping from the logical CPU number to the physical CPU
number.
This patch adds such a mapping and populates it during boot.
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Vincent Guittot [Mon, 8 Aug 2011 12:21:59 +0000 (13:21 +0100)]
ARM: 7011/1: Add ARM cpu topology definition
The affinity between ARM processors is defined in the MPIDR register.
We can identify which processors are in the same cluster,
and which ones have performance interdependency. We can define the
cpu topology of ARM platform, that is then used by sched_mc and sched_smt.
The default state of sched_mc and sched_smt config is disable.
When enabled, the behavior of the scheduler can be modified with
sched_mc_power_savings and sched_smt_power_savings sysfs interfaces.
Changes since v4 :
* Remove unnecessary parentheses and blank lines
Changes since v3 :
* Update the format of printk message
* Remove blank line
Changes since v2 :
* Update the commit message and some comments
Changes since v1 :
* Update the commit message
* Add read_cpuid_mpidr in arch/arm/include/asm/cputype.h
* Modify header of arch/arm/kernel/topology.c
* Modify tests and manipulation of MPIDR's bitfields
* Modify the place and dependancy of the config
* Modify Noop functions
Signed-off-by: Vincent Guittot <vincent.guittot@linaro.org>
Reviewed-by: Amit Kucheria <amit.kucheria@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Sascha Hauer [Fri, 14 Oct 2011 07:37:34 +0000 (09:37 +0200)]
Merge branch 'features/denx-mx28' into for-arnd-features
Sascha Hauer [Fri, 14 Oct 2011 07:37:27 +0000 (09:37 +0200)]
Merge branch 'features/ahci' into for-arnd-features
Nicolas Pitre [Sat, 3 Sep 2011 02:26:55 +0000 (22:26 -0400)]
ARM: switch from NO_MACH_MEMORY_H to NEED_MACH_MEMORY_H
Given that we want the default to not have any <mach/memory.h> and given
that there are now fewer cases where it is still provided than the cases
where it is not at this point, this makes sense to invert the logic and
just identify the exception cases.
The word "need" instead of "have" was chosen to construct the config
symbol so not to suggest that having a mach/memory.h file is actually
a feature that one should aim for.
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Nicolas Pitre [Sat, 3 Sep 2011 01:51:43 +0000 (21:51 -0400)]
ARM: mach-s5p64x0: remove mach/memory.h
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Nicolas Pitre [Sat, 3 Sep 2011 01:48:28 +0000 (21:48 -0400)]
ARM: mach-s3c64xx: remove mach/memory.h
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Nicolas Pitre [Sat, 3 Sep 2011 01:45:26 +0000 (21:45 -0400)]
ARM: plat-mxc: remove mach/memory.h
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Nicolas Pitre [Sat, 3 Sep 2011 01:18:52 +0000 (21:18 -0400)]
ARM: mach-prima2: remove mach/memory.h
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Nicolas Pitre [Fri, 2 Sep 2011 21:22:03 +0000 (17:22 -0400)]
ARM: mach-zynq: remove mach/memory.h
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Nicolas Pitre [Fri, 2 Sep 2011 21:09:17 +0000 (17:09 -0400)]
ARM: mach-bcmring: remove mach/memory.h
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Nicolas Pitre [Wed, 6 Jul 2011 02:52:57 +0000 (22:52 -0400)]
ARM: mach-davinci: remove mach/memory.h
Move some DDR2 related defines into a private <mach/ddr2.h> beforehand.
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Nicolas Pitre [Wed, 6 Jul 2011 02:52:57 +0000 (22:52 -0400)]
ARM: mach-pxa: remove mach/memory.h
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Nicolas Pitre [Wed, 6 Jul 2011 02:52:57 +0000 (22:52 -0400)]
ARM: mach-ixp4xx: remove mach/memory.h
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Nicolas Pitre [Wed, 6 Jul 2011 02:52:56 +0000 (22:52 -0400)]
ARM: mach-h720x: remove mach/memory.h
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Nicolas Pitre [Wed, 6 Jul 2011 02:52:56 +0000 (22:52 -0400)]
ARM: mach-vt8500: remove mach/memory.h
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Nicolas Pitre [Wed, 6 Jul 2011 02:52:55 +0000 (22:52 -0400)]
ARM: mach-s5pc100: remove mach/memory.h
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Nicolas Pitre [Wed, 6 Jul 2011 02:52:55 +0000 (22:52 -0400)]
ARM: mach-tegra: remove mach/memory.h
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Nicolas Pitre [Wed, 6 Jul 2011 02:52:55 +0000 (22:52 -0400)]
ARM: plat-tcc: remove mach/memory.h
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Nicolas Pitre [Wed, 6 Jul 2011 02:52:55 +0000 (22:52 -0400)]
ARM: mach-mmp: remove mach/memory.h
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Nicolas Pitre [Wed, 6 Jul 2011 02:52:55 +0000 (22:52 -0400)]
ARM: mach-cns3xxx: remove mach/memory.h
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Nicolas Pitre [Wed, 6 Jul 2011 02:52:55 +0000 (22:52 -0400)]
ARM: mach-nuc93x: remove mach/memory.h
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Nicolas Pitre [Wed, 6 Jul 2011 02:52:55 +0000 (22:52 -0400)]
ARM: mach-mxs: remove mach/memory.h
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Nicolas Pitre [Wed, 6 Jul 2011 02:52:55 +0000 (22:52 -0400)]
ARM: spear: remove mach/memory.h and plat/memory.h
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Nicolas Pitre [Wed, 6 Jul 2011 02:52:54 +0000 (22:52 -0400)]
ARM: mach-msm: remove mach/memory.h
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Nicolas Pitre [Wed, 6 Jul 2011 02:52:54 +0000 (22:52 -0400)]
ARM: mach-gemini: remove mach/memory.h
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Nicolas Pitre [Wed, 6 Jul 2011 02:52:54 +0000 (22:52 -0400)]
ARM: mach-lpc32xx: remove mach/memory.h
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Nicolas Pitre [Wed, 6 Jul 2011 02:52:54 +0000 (22:52 -0400)]
ARM: mach-netx: remove mach/memory.h
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Nicolas Pitre [Wed, 6 Jul 2011 02:52:54 +0000 (22:52 -0400)]
ARM: mach-versatile: remove mach/memory.h
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Nicolas Pitre [Wed, 6 Jul 2011 02:52:54 +0000 (22:52 -0400)]
ARM: mach-ux500: remove mach/memory.h
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Nicolas Pitre [Wed, 6 Jul 2011 02:52:54 +0000 (22:52 -0400)]
ARM: mach-nomadik: remove mach/memory.h
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Nicolas Pitre [Wed, 6 Jul 2011 02:52:53 +0000 (22:52 -0400)]
ARM: mach-iop32x: remove mach/memory.h
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Nicolas Pitre [Wed, 6 Jul 2011 02:52:53 +0000 (22:52 -0400)]
ARM: mach-pnx4008: remove mach/memory.h
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Nicolas Pitre [Wed, 6 Jul 2011 02:52:53 +0000 (22:52 -0400)]
ARM: mach-w90x900: remove mach/memory.h
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Nicolas Pitre [Wed, 6 Jul 2011 02:52:53 +0000 (22:52 -0400)]
ARM: mach-vexpress: remove mach/memory.h
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Nicolas Pitre [Wed, 6 Jul 2011 02:52:53 +0000 (22:52 -0400)]
ARM: mach-mv78xx0: remove mach/memory.h
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Nicolas Pitre [Wed, 6 Jul 2011 02:52:53 +0000 (22:52 -0400)]
ARM: mach-s3c2410: remove memory.h
This also removes the mach/s3c2400 version which was probably never used
due to the fact that we have this line in arch/arm/Makefile:
machine-$(CONFIG_ARCH_S3C2410) := s3c2410 s3c2400 [...]
This is later used to construct the search path for:
The compiler would be looking into mach-s3c2410 and picking up this
version first. Any config that was actually expecting the mach-s3c2400
version was therefore producing a broken kernel binary. Not relying on
any of them anymore would fix that issue.
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Stefano Babic [Wed, 7 Sep 2011 06:45:31 +0000 (08:45 +0200)]
ARM: mxs: Add initial support for DENX MX28
Added initial support for DENX M28 module and M28EVK
board. Ethernet(FEC), SDHC, Display are supported.
Signed-off-by: Stefano Babic <sbabic@denx.de>
Reviewed-by: Wolfram Sang <w.sang@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Will Deacon [Fri, 7 Oct 2011 14:57:55 +0000 (15:57 +0100)]
ARM: 7127/1: hw_breakpoint: skip v7-specific reset on v6 cores
ARMv6 cores do not implement the DBGOSLAR register, so we don't need to
try and clear it on boot. Furthermore, the VCR is zeroed out of reset,
so we don't need to zero it explicitly when a CPU comes online.
Tested-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Arnd Bergmann [Fri, 7 Oct 2011 19:57:31 +0000 (21:57 +0200)]
Merge branch 'imx/cleanup' into imx/devel
This helps resolve the conflicts between the imx cleanups and the
new code that has gone into the imx tree.
Conflict resolution was originally done by Sascha Hauer.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnaud Patard (Rtp) [Sat, 27 Aug 2011 13:21:12 +0000 (15:21 +0200)]
ARM: mx5: fix clock usage for suspend
While suspending, we're enabling a clock in ->suspend() but we're in atomic
context, leading to this :
[30803.667305] PM: late suspend of devices complete after 1.237 msecs
[30803.667449] BUG: sleeping function called from invalid context at kernel/mutex.c:271
[30803.667464] in_atomic(): 0, irqs_disabled(): 128, pid: 4941, name: pm-suspend
[30803.667474] INFO: lockdep is turned off.
[30803.667483] irq event stamp: 0
[30803.667489] hardirqs last enabled at (0): [< (null)>] (null)
[30803.667503] hardirqs last disabled at (0): [<
c001e4a8>] copy_process.part.48+0x1e0/0xa7c
[30803.667543] softirqs last enabled at (0): [<
c001e4a8>] copy_process.part.48+0x1e0/0xa7c
[30803.667562] softirqs last disabled at (0): [< (null)>] (null)
[30803.667574] Backtrace:
[30803.667611] [<
c0010e00>] (dump_backtrace+0x0/0x110) from [<
c0424c00>] (dump_stack+0x18/0x1c)
[30803.667624] r6:
00000000 r5:
00000000 r4:
d9648000 r3:
d9648000
[30803.667652] [<
c0424be8>] (dump_stack+0x0/0x1c) from [<
c0424eec>] (__might_sleep.part.101+0x90/0xa8)
[30803.667673] [<
c0424e5c>] (__might_sleep.part.101+0x0/0xa8) from [<
c001a5c4>] (__might_sleep+0x80/0x94)
[30803.667686] r4:
c05d58c0
[30803.667705] [<
c001a544>] (__might_sleep+0x0/0x94) from [<
c043230c>] (mutex_lock_nested+0x2c/0x30c)
[30803.667735] [<
c04322e0>] (mutex_lock_nested+0x0/0x30c) from [<
c0017834>] (clk_enable+0x28/0x50)
[30803.667747] r8:
c0438464 r7:
00000003 r6:
00000000 r5:
00000000 r4:
c05d2e98
[30803.667780] [<
c001780c>] (clk_enable+0x0/0x50) from [<
c0017260>] (mx5_suspend_enter+0x1c/0x98)
[30803.667792] r4:
00000003 r3:
c060dfe0
[30803.667821] [<
c0017244>] (mx5_suspend_enter+0x0/0x98) from [<
c0059b48>] (suspend_enter+0xec/0x15c)
[30803.667833] r4:
00000003 r3:
c0017244
[30803.667856] [<
c0059a5c>] (suspend_enter+0x0/0x15c) from [<
c0059c4c>] (suspend_devices_and_enter+0x94/0x130)
[30803.667868] r6:
00000000 r5:
00000003 r4:
c0c0af00 r3:
00002710
[30803.667897] [<
c0059bb8>] (suspend_devices_and_enter+0x0/0x130) from [<
c0059db0>] (enter_state+0xc8/0x130)
[30803.667909] r6:
00000000 r5:
00000003 r4:
c05286e4
[30803.667934] [<
c0059ce8>] (enter_state+0x0/0x130) from [<
c00592d4>] (state_store+0xac/0xc0)
[30803.667945] r6:
00000003 r5:
00000003 r4:
df39d000 r3:
00000003
[30803.667978] [<
c0059228>] (state_store+0x0/0xc0) from [<
c01b0100>] (kobj_attr_store+0x1c/0x28)
[30803.668009] [<
c01b00e4>] (kobj_attr_store+0x0/0x28) from [<
c00e435c>] (sysfs_write_file+0x88/0xbc)
[30803.668032] [<
c00e42d4>] (sysfs_write_file+0x0/0xbc) from [<
c0091fa0>] (vfs_write+0xbc/0x138)
[30803.668051] [<
c0091ee4>] (vfs_write+0x0/0x138) from [<
c0092204>] (sys_write+0x44/0x70)
[30803.668062] r8:
00000000 r7:
00000004 r6:
00000003 r5:
002694d0 r4:
d966acc0
[30803.668094] [<
c00921c0>] (sys_write+0x0/0x70) from [<
c000db00>] (ret_fast_syscall+0x0/0x3c)
[30803.668106] r9:
d9648000 r8:
c000dcc4 r6:
00000001 r5:
002694d0 r4:
00000003
[30803.669927] PM: early resume of devices complete after 0.972 msecs
Just move the clk_enable/disable in ->prepare() and ->finish()
Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Richard Zhu [Wed, 28 Sep 2011 07:41:57 +0000 (15:41 +0800)]
MX53 Enable the AHCI SATA on MX53 SMD board
Signed-off-by: Richard Zhu <richard.zhu@linaro.org>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Richard Zhu [Wed, 28 Sep 2011 07:41:56 +0000 (15:41 +0800)]
MX53 Enable the AHCI SATA on MX53 LOCO board
Signed-off-by: Richard Zhu <richard.zhu@linaro.org>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Richard Zhu [Wed, 28 Sep 2011 07:41:55 +0000 (15:41 +0800)]
MX53 Enable the AHCI SATA on MX53 ARD board
Signed-off-by: Richard Zhu <richard.zhu@linaro.org>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Richard Zhu [Wed, 28 Sep 2011 07:41:53 +0000 (15:41 +0800)]
AHCI Add the AHCI SATA feature on the MX53 platforms
Signed-off-by: Richard Zhu <richard.zhu@linaro.org>
Tested-by: Hector Oron Martinez <hector.oron@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Linus Torvalds [Wed, 5 Oct 2011 01:11:50 +0000 (18:11 -0700)]
Linux 3.1-rc9
Linus Torvalds [Tue, 4 Oct 2011 17:37:06 +0000 (10:37 -0700)]
Merge git://github.com/davem330/net
* git://github.com/davem330/net:
pch_gbe: Fixed the issue on which a network freezes
pch_gbe: Fixed the issue on which PC was frozen when link was downed.
make PACKET_STATISTICS getsockopt report consistently between ring and non-ring
net: xen-netback: correctly restart Tx after a VM restore/migrate
bonding: properly stop queuing work when requested
can bcm: fix incomplete tx_setup fix
RDSRDMA: Fix cleanup of rds_iw_mr_pool
net: Documentation: Fix type of variables
ibmveth: Fix oops on request_irq failure
ipv6: nullify ipv6_ac_list and ipv6_fl_list when creating new socket
cxgb4: Fix EEH on IBM P7IOC
can bcm: fix tx_setup off-by-one errors
MAINTAINERS: tehuti: Alexander Indenbaum's address bounces
dp83640: reduce driver noise
ptp: fix L2 event message recognition
Linus Torvalds [Tue, 4 Oct 2011 16:59:22 +0000 (09:59 -0700)]
Merge branch 'fix/asoc' of git://github.com/tiwai/sound
* 'fix/asoc' of git://github.com/tiwai/sound:
ASoC: omap_mcpdm_remove cannot be __devexit
ASoC: Fix setting update bits for WM8753_LADC and WM8753_RADC
ASoC: use a valid device for dev_err() in Zylonite
Linus Torvalds [Tue, 4 Oct 2011 16:54:18 +0000 (09:54 -0700)]
Merge branch 'drm-fixes' of git://people.freedesktop.org/~airlied/linux
* 'drm-fixes' of git://people.freedesktop.org/~airlied/linux:
drm/radeon/kms: fix channel_remap setup (v2)
drm/radeon: Set cursor x/y to 0 when x/yorigin > 0.
drm/radeon: Update AVIVO cursor coordinate origin before x/yorigin calculation.
drm/radeon: Simplify cursor x/yorigin calculation.
drm/radeon/kms: fix cursor image off-by-one error
drm/radeon/kms: Fix logic error in DP HPD handler
drm/radeon/kms: add retry limits for native DP aux defer
drm/radeon/kms: fix regression in DP aux defer handling
Linus Torvalds [Tue, 4 Oct 2011 16:52:56 +0000 (09:52 -0700)]
Merge branch 'spi/merge' of git://git.secretlab.ca/git/linux-2.6
* 'spi/merge' of git://git.secretlab.ca/git/linux-2.6:
spi-topcliff-pch: Fix overrun issue
spi-topcliff-pch: Add recovery processing in case FIFO overrun error occurs
spi-topcliff-pch: Fix CPU read complete condition issue
spi-topcliff-pch: Fix SSN Control issue
spi-topcliff-pch: add tx-memory clear after complete transmitting
Jon Mason [Mon, 3 Oct 2011 14:50:20 +0000 (09:50 -0500)]
PCI: Disable MPS configuration by default
Add the ability to disable PCI-E MPS turning and using the BIOS
configured MPS defaults. Due to the number of issues recently
discovered on some x86 chipsets, make this the default behavior.
Also, add the option for peer to peer DMA MPS configuration. Peer to
peer DMA is outside the scope of this patch, but MPS configuration could
prevent it from working by having the MPS on one root port different
than the MPS on another. To work around this, simply make the system
wide MPS the smallest possible value (128B).
Signed-off-by: Jon Mason <mason@myri.com>
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Thomas Gleixner [Tue, 4 Oct 2011 16:43:57 +0000 (18:43 +0200)]
genirq: Fix fatfinered fixup really
Putting the argument inside the quote does not really help.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Alex Deucher [Tue, 4 Oct 2011 14:46:34 +0000 (10:46 -0400)]
drm/radeon/kms: fix channel_remap setup (v2)
Most asics just use the hw default value which requires
no explicit programming. For those that need a different
value, the vbios will program it properly. As such,
there's no need to program these registers explicitly
in the driver. Changing MC_SHARED_CHREMAP requires a reload
of all data in vram otherwise its contents will be scambled.
Fixes:
https://bugs.freedesktop.org/show_bug.cgi?id=40103
v2: drop now unused channel_remap functions.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Cc: stable@kernel.org
Signed-off-by: Dave Airlie <airlied@redhat.com>
Tomoya MORINAGA [Tue, 6 Sep 2011 08:16:38 +0000 (17:16 +0900)]
spi-topcliff-pch: Fix overrun issue
We found that adding load, Rx data sometimes drops.(with DMA transfer mode)
The cause is that before starting Rx-DMA processing, Tx-DMA processing starts.
This causes FIFO overrun occurs.
This patch fixes the issue by modifying FIFO tx-threshold and DMA descriptor
size like below.
Current this patch
Rx-descriptor 4Byte+12Byte*341 --> 12Byte*340-4Byte-12Byte
Rx-threshold (Not modified)
Tx-descriptor 4Byte+12Byte*341 --> 16Byte-12Byte*340
Rx-threshold 12Byte --> 2Byte
Signed-off-by: Tomoya MORINAGA <tomoya-linux@dsn.okisemi.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Tomoya MORINAGA [Tue, 6 Sep 2011 08:16:37 +0000 (17:16 +0900)]
spi-topcliff-pch: Add recovery processing in case FIFO overrun error occurs
Add recovery processing in case FIFO overrun error occurs with DMA transfer mode.
Signed-off-by: Tomoya MORINAGA <tomoya-linux@dsn.okisemi.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Tomoya MORINAGA [Tue, 6 Sep 2011 08:16:36 +0000 (17:16 +0900)]
spi-topcliff-pch: Fix CPU read complete condition issue
We found Rx data sometimes drops.(with non-DMA transfer mode)
The cause is read complete condition is not true.
This patch fixes the issue.
Signed-off-by: Tomoya MORINAGA <tomoya-linux@dsn.okisemi.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Tomoya MORINAGA [Tue, 6 Sep 2011 08:16:35 +0000 (17:16 +0900)]
spi-topcliff-pch: Fix SSN Control issue
During processing 1 command/data series,
SSN should keep LOW.
However, currently, SSN becomes HIGH.
This patch fixes the issue.
Signed-off-by: Tomoya MORINAGA <tomoya-linux@dsn.okisemi.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Tomoya MORINAGA [Tue, 6 Sep 2011 08:16:34 +0000 (17:16 +0900)]
spi-topcliff-pch: add tx-memory clear after complete transmitting
Currently, in case of reading date from SPI flash,
command is sent twice.
The cause is that tx-memory clear processing is missing .
This patch adds the tx-momory clear processing.
Signed-off-by: Tomoya MORINAGA <tomoya-linux@dsn.okisemi.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Sascha Hauer [Tue, 4 Oct 2011 08:55:53 +0000 (10:55 +0200)]
Merge branches 'cleanups/mx3-mm-v2' and 'cleanups/mxs' into imx-cleanup
Shawn Guo [Wed, 28 Sep 2011 09:16:07 +0000 (17:16 +0800)]
arm/imx: remove cpu_is_xxx() check from __imx_ioremap()
This patch adds an ioremap hook imx_ioremap to be called in
__imx_ioremap(). Any soc that needs a customized ioremap other
than __arm_ioremap() can set up this hook in soc specific call.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Shawn Guo [Wed, 28 Sep 2011 09:16:06 +0000 (17:16 +0800)]
arm/imx: remove cpu_is_xxx() from arch_idle()
This patch adds an idle hook imx_idle to be called in arch_idle().
Any soc that needs a customized idle implementation other than
cpu_do_idle() can set up this hook in soc specific call.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>