platform/upstream/llvm.git
6 years ago[ObjCARC] Convert an if to an early continue. NFC
Shoaib Meenai [Thu, 3 May 2018 01:20:36 +0000 (01:20 +0000)]
[ObjCARC] Convert an if to an early continue. NFC

This reduces nesting and makes the logic slightly easier to follow.

Differential Revision: https://reviews.llvm.org/D46371

llvm-svn: 331422

6 years ago[ObjC] Supress the 'implementing unavailable method' warning when
Alex Lorenz [Thu, 3 May 2018 01:12:06 +0000 (01:12 +0000)]
[ObjC] Supress the 'implementing unavailable method' warning when
the method declaration is unavailable for an app extension platform

Rationale:
Classes are often shared between an app extension code and
non-app extension code. There's no way to remove the implementation
using preprocessor when building the app extension, so we should not warn here.

rdar://38150617

llvm-svn: 331421

6 years agoCommit r331416 breaks the big-endian PPC bot. On the big endian build, we
Nemanja Ivanovic [Thu, 3 May 2018 01:04:13 +0000 (01:04 +0000)]
Commit r331416 breaks the big-endian PPC bot. On the big endian build, we
actually encounter constants wider than 64-bits. Add the guard to prevent
tripping the assert.

llvm-svn: 331420

6 years agoUpdated ThinLTO test to not include forward or backward slash for testing
Rumeet Dhindsa [Thu, 3 May 2018 00:28:51 +0000 (00:28 +0000)]
Updated ThinLTO test to not include forward or backward slash for testing

Differential Revision: https://reviews.llvm.org/D46372

llvm-svn: 331419

6 years ago[gcov] Switch to an explicit if clunky array to satisfy some compilers
Chandler Carruth [Thu, 3 May 2018 00:11:03 +0000 (00:11 +0000)]
[gcov] Switch to an explicit if clunky array to satisfy some compilers
on various build bots that are unhappy with using makeArrayRef with an
initializer list.

llvm-svn: 331418

6 years agoMachineInst support mapping SDNode fast math flags for support in Back End code gener...
Michael Berg [Thu, 3 May 2018 00:07:56 +0000 (00:07 +0000)]
MachineInst support mapping SDNode fast math flags for support in Back End code generation

Summary:
Machine Instruction flags for fast math support and MIR print support

Reviewers: spatel, arsenm

Reviewed By: arsenm

Subscribers: wdng

Differential Revision: https://reviews.llvm.org/D45781

llvm-svn: 331417

6 years ago[PowerPC] Implement isMaskAndCmp0FoldingBeneficial
Nemanja Ivanovic [Wed, 2 May 2018 23:55:23 +0000 (23:55 +0000)]
[PowerPC] Implement isMaskAndCmp0FoldingBeneficial

Sinking the and closer to a compare against zero is beneficial on PPC as it
allows us to emit record-form instructions. In the future, we may expand this
to a larger set of operations that feed compares against zero since PPC has
lots of record-form instructions.

Differential revision: https://reviews.llvm.org/D46060

llvm-svn: 331416

6 years ago[NSDictionary] Simplify the formatter. NFCI.
Davide Italiano [Wed, 2 May 2018 23:36:07 +0000 (23:36 +0000)]
[NSDictionary] Simplify the formatter. NFCI.

llvm-svn: 331415

6 years ago[WebAssembly] MC: Create and use first class section symbols
Sam Clegg [Wed, 2 May 2018 23:11:38 +0000 (23:11 +0000)]
[WebAssembly] MC: Create and use first class section symbols

Differential Revision: https://reviews.llvm.org/D46335

llvm-svn: 331413

6 years ago[MC] Factor MCObjectStreamer::addFragmentAtoms out of MachO streamer.
Sam Clegg [Wed, 2 May 2018 23:01:10 +0000 (23:01 +0000)]
[MC] Factor MCObjectStreamer::addFragmentAtoms out of MachO streamer.

This code previously existed only in MCMachOStreamer but is
useful for WebAssembly too.  See: D46335

Differential Revision: https://reviews.llvm.org/D46297

llvm-svn: 331412

6 years ago[gcov] Make the CLang side coverage test work with the new
Chandler Carruth [Wed, 2 May 2018 22:57:20 +0000 (22:57 +0000)]
[gcov] Make the CLang side coverage test work with the new
instrumentation codegeneration strategy of using a data structure and
a loop. Required some finesse to get the critical things being tested to
surface in a nice way for FileCheck but I think this preserves the
original intent of the test.

llvm-svn: 331411

6 years ago[PowerPC] No CTR loop if the candidate exiting block is in a different loop
Nemanja Ivanovic [Wed, 2 May 2018 22:56:04 +0000 (22:56 +0000)]
[PowerPC] No CTR loop if the candidate exiting block is in a different loop

The CTR loops pass will insert the decrementing branch instruction in an exiting
block for the loop being transformed. However if that block is part of another
loop as well (whether a nested loop or with irreducible CFG), it is not valid
to use that exiting block. In fact, if the loop hass irreducible CFG, we don't
bother analyzing it and we just bail on the transformation. In practice, this
doesn't lead to a noticeable reduction in the number of loops transformed by
this pass.

Fixes https://bugs.llvm.org/show_bug.cgi?id=37229

Differential Revision: https://reviews.llvm.org/D46162

llvm-svn: 331410

6 years ago[ObjC] The absence of ownership qualifiers on an ambiguous property leads
Alex Lorenz [Wed, 2 May 2018 22:40:19 +0000 (22:40 +0000)]
[ObjC] The absence of ownership qualifiers on an ambiguous property leads
to synthesis of a valid property even when the selected protocol property
has ownership qualifiers

rdar://39024725

llvm-svn: 331409

6 years ago[GCOV] Emit the writeout function as nested loops of global data.
Chandler Carruth [Wed, 2 May 2018 22:24:39 +0000 (22:24 +0000)]
[GCOV] Emit the writeout function as nested loops of global data.

Summary:
Prior to this change, LLVM would in some cases emit *massive* writeout
functions with many 10s of 1000s of function calls in straight-line
code. This is a very wasteful way to represent what are fundamentally
loops and creates a number of scalability issues. Among other things,
register allocating these calls is extremely expensive. While D46127 makes this
less severe, we'll still run into scaling issues with this eventually. If not
in the compile time, just from the code size.

Now the pass builds up global data structures modeling the inputs to
these functions, and simply loops over the data structures calling the
relevant functions with those values. This ensures that the code size is
a fixed and only data size grows with larger amounts of coverage data.

A trivial change to IRBuilder is included to make it easier to build
the constants that make up the global data.

Reviewers: wmi, echristo

Subscribers: sanjoy, mcrosier, llvm-commits, hiraditya

Differential Revision: https://reviews.llvm.org/D46357

llvm-svn: 331407

6 years agoUse conventional spelling of always-failing assert.
Richard Smith [Wed, 2 May 2018 22:21:11 +0000 (22:21 +0000)]
Use conventional spelling of always-failing assert.

Fixes -Wstring-conversion warning that was breaking -Werror builds.

llvm-svn: 331406

6 years agoAdded support for ThinLTO plugin options : thinlto-index-only and thinlto-prefix...
Rumeet Dhindsa [Wed, 2 May 2018 21:40:07 +0000 (21:40 +0000)]
Added support for ThinLTO plugin options : thinlto-index-only and thinlto-prefix-replace

Differential Revision: https://reviews.llvm.org/D46034

llvm-svn: 331405

6 years ago[llvm-rc] Default to writing the output next to the input, if no output is specified
Martin Storsjo [Wed, 2 May 2018 21:15:24 +0000 (21:15 +0000)]
[llvm-rc] Default to writing the output next to the input, if no output is specified

This matches what rc.exe does if no output is specified.

Differential Revision: https://reviews.llvm.org/D46239

llvm-svn: 331403

6 years ago[llvm-cvtres] Allow parameters preceded by '-' in addition to '/'
Martin Storsjo [Wed, 2 May 2018 21:15:13 +0000 (21:15 +0000)]
[llvm-cvtres] Allow parameters preceded by '-' in addition to '/'

The real cvtres.exe also allows parameters in either form.

Differential Revision: https://reviews.llvm.org/D46358

llvm-svn: 331402

6 years ago[analyzer] Revert r331096 "CStringChecker: Add support for BSD strlcpy()...".
Artem Dergachev [Wed, 2 May 2018 20:33:17 +0000 (20:33 +0000)]
[analyzer] Revert r331096 "CStringChecker: Add support for BSD strlcpy()...".

The return values of the newly supported functions were not handled correctly:
strlcpy()/strlcat() return string sizes rather than pointers.

Differential Revision: https://reviews.llvm.org/D45177

llvm-svn: 331401

6 years ago[llvm-objcopy] Add --discard-all (-x) option
Paul Semel [Wed, 2 May 2018 20:19:22 +0000 (20:19 +0000)]
[llvm-objcopy] Add --discard-all (-x) option

llvm-svn: 331400

6 years ago[X86] Mark all x86 specific builtins as nothrow.
Craig Topper [Wed, 2 May 2018 20:18:57 +0000 (20:18 +0000)]
[X86] Mark all x86 specific builtins as nothrow.

I believe all of the x86 builtins should be considered nothrow.

I've left the incssp builtins alone because I think its current attributes are wrong and I'm following up with the contributor for that.

I plan to start adding const as well, but that requires more careful auditing.

Differential Revision: https://reviews.llvm.org/D46328

llvm-svn: 331399

6 years ago[GlobalISel][InstructionSelect] Making Coverage Info generation optional on per-match...
Roman Tereshin [Wed, 2 May 2018 20:15:11 +0000 (20:15 +0000)]
[GlobalISel][InstructionSelect] Making Coverage Info generation optional on per-match table basis

to make sure that Testgen always has access to coverage info even if
the match table used by the selector itself is stripped off that
information for performance reasons.

Reviewers: dsanders, aemerson

Reviewed By: dsanders

Subscribers: rovka, kristof.beyls, llvm-commits, dsanders

Differential Revision: https://reviews.llvm.org/D46098

llvm-svn: 331398

6 years ago[llvm-objcopy] Add --weaken option
Paul Semel [Wed, 2 May 2018 20:14:49 +0000 (20:14 +0000)]
[llvm-objcopy] Add --weaken option

llvm-svn: 331397

6 years ago[GlobalISel][InstructionSelect] Refactoring buildMatchTable out, NFC
Roman Tereshin [Wed, 2 May 2018 20:08:14 +0000 (20:08 +0000)]
[GlobalISel][InstructionSelect] Refactoring buildMatchTable out, NFC

to share it between the Instruction Selector in optimized and
non-optimized modes both and the Testgen.

Reviewers: dsanders, aemerson

Reviewed By: dsanders

Subscribers: rovka, kristof.beyls, llvm-commits, dsanders

Differential Revision: https://reviews.llvm.org/D46097

llvm-svn: 331396

6 years ago[GlobalISel][InstructionSelect] Refactoring out a getMatchTable virtual method +...
Roman Tereshin [Wed, 2 May 2018 20:07:15 +0000 (20:07 +0000)]
[GlobalISel][InstructionSelect] Refactoring out a getMatchTable virtual method + other small NFC's

The main goal is to share getMatchTable between the Instruction
Selector and the Testgen.

The commit also contains some NFC only loosely related to refactoring
out the getMatchTable, but strongly related to the initial Testgen
patch (see https://reviews.llvm.org/D43962)

Reviewers: dsanders, aemerson

Reviewed By: dsanders

Subscribers: rovka, kristof.beyls, llvm-commits, dsanders

Differential Revision: https://reviews.llvm.org/D46096

llvm-svn: 331395

6 years agoUse the UUID from the minidump's CodeView Record for placeholder modules
Leonard Mosescu [Wed, 2 May 2018 20:06:17 +0000 (20:06 +0000)]
Use the UUID from the minidump's CodeView Record for placeholder modules

This change adds support for two types of Minidump CodeView records:

PDB70 (reference: https://crashpad.chromium.org/doxygen/structcrashpad_1_1CodeViewRecordPDB70.html)
This is by far the most common record type.

ELF BuildID (found in Breakpad/Crashpad generated minidumps)
This would set a proper UUID for placeholder modules, in turn enabling
an accurate match with local module images.

Differential Revision: https://reviews.llvm.org/D46292

llvm-svn: 331394

6 years ago[OPENMP] Add support for reductions on simd directives in target
Alexey Bataev [Wed, 2 May 2018 20:03:27 +0000 (20:03 +0000)]
[OPENMP] Add support for reductions on simd directives in target
regions.

Added codegen for `simd reduction()` constructs in target directives.

llvm-svn: 331393

6 years agoRevert "Emit an error when mixing <stdatomic.h> and <atomic>"
Volodymyr Sapsai [Wed, 2 May 2018 19:52:07 +0000 (19:52 +0000)]
Revert "Emit an error when mixing <stdatomic.h> and <atomic>"

It reverts r331378 as it caused test failures

    ThreadSanitizer-x86_64 :: Darwin/gcd-groups-destructor.mm
    ThreadSanitizer-x86_64 :: Darwin/libcxx-shared-ptr-stress.mm
    ThreadSanitizer-x86_64 :: Darwin/xpc-race.mm

Only clang part of the change is reverted, libc++ part remains as is because it
emits error less aggressively.

llvm-svn: 331392

6 years ago[llvm-rc] Add rudimentary support for codepages
Martin Storsjo [Wed, 2 May 2018 19:43:44 +0000 (19:43 +0000)]
[llvm-rc] Add rudimentary support for codepages

Only support UTF-8 (since LLVM contains UTF-8 parsing support
already, and the code even does that already) and Windows-1252
(where most code points has the same value in unicode). Keep the
existing default as only allowing ASCII input.

Using the option type JoinedOrSeparate, since the real rc.exe
handles options in this form, even if llvm-rc uses Separate for
other similar existing options.

Rename the struct SearchParams to WriterParams since it's now used
for more than just include paths.

Add a missing getResourceTypeName method to the BundleResource class,
to fix error printing from within STRINGTABLE resources (used in
tests).

Differential Revision: https://reviews.llvm.org/D46238

llvm-svn: 331391

6 years ago[Driver] Infer Android sysroot location.
Dan Albert [Wed, 2 May 2018 19:38:37 +0000 (19:38 +0000)]
[Driver] Infer Android sysroot location.

Summary:
Android toolchains include their headers and libraries in a
self-contained directory within the toolchain.

Reviewers: srhines

Reviewed By: srhines

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D45291

llvm-svn: 331390

6 years ago[Driver] Obey computed sysroot when finding libc++ headers.
Dan Albert [Wed, 2 May 2018 19:31:01 +0000 (19:31 +0000)]
[Driver] Obey computed sysroot when finding libc++ headers.

Summary:
A handful of targets will try some default paths if --sysroot is not provided.
If that is the case, it should be used for the libc++ header paths.

Reviewers: srhines, EricWF

Reviewed By: srhines

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D45292

llvm-svn: 331389

6 years ago[X86][SNB] Fix scheduling of MMX integer multiply instructions.
Simon Pilgrim [Wed, 2 May 2018 19:26:14 +0000 (19:26 +0000)]
[X86][SNB] Fix scheduling of MMX integer multiply instructions.

The entries were being bound to the wrong class.

llvm-svn: 331388

6 years agoMove the TestPlugin project into the Tests folder in CMake.
Aaron Ballman [Wed, 2 May 2018 18:57:14 +0000 (18:57 +0000)]
Move the TestPlugin project into the Tests folder in CMake.

llvm-svn: 331387

6 years ago[X86] Split WriteShuffle/WriteVarShuffle + WriteBlend/WriteVarBlend into XMM and...
Simon Pilgrim [Wed, 2 May 2018 18:48:23 +0000 (18:48 +0000)]
[X86] Split WriteShuffle/WriteVarShuffle + WriteBlend/WriteVarBlend into XMM and YMM/ZMM scheduler classes

llvm-svn: 331386

6 years ago[OPENMP] Analyze the type of the mapped entity instead of its base.
Alexey Bataev [Wed, 2 May 2018 18:44:10 +0000 (18:44 +0000)]
[OPENMP] Analyze the type of the mapped entity instead of its base.

If the mapped entity is a data member, we erroneously checked the type
of its base rather than the type of the mapped entity itself.

llvm-svn: 331385

6 years ago[COFF, ARM64] Hook up a few remaining relocations
Martin Storsjo [Wed, 2 May 2018 18:24:37 +0000 (18:24 +0000)]
[COFF, ARM64] Hook up a few remaining relocations

Differential Revision: https://reviews.llvm.org/D46355

llvm-svn: 331384

6 years ago[AMDGPU] A trivial fix for a buildbot failure caused by "commit 224a839fcbbead221f872...
Farhana Aleen [Wed, 2 May 2018 18:16:39 +0000 (18:16 +0000)]
[AMDGPU] A trivial fix for a buildbot failure caused by "commit 224a839fcbbead221f872cd32a1dd0c308d37299".

Author: FarhanaAleen
llvm-svn: 331383

6 years ago[sanitizer] Fix Fuchsia ReadBinaryName not to crash when uninitialized
Petr Hosek [Wed, 2 May 2018 18:08:47 +0000 (18:08 +0000)]
[sanitizer] Fix Fuchsia ReadBinaryName not to crash when uninitialized

If the sanitizer runtime is loaded in a binary that doesn't really
support it, then __sanitizer_startup_hook will never have been
called to initialize StoredArgv. This case can't be supported, but
its failure mode shouldn't be to crash in sanitizer_common internals.

Patch By: mcgrathr

Differential Revision: https://reviews.llvm.org/D46344

llvm-svn: 331382

6 years ago[reassociate] Fix excessive revisits when processing long chains of reassociatable...
Daniel Sanders [Wed, 2 May 2018 17:59:16 +0000 (17:59 +0000)]
[reassociate] Fix excessive revisits when processing long chains of reassociatable instructions.

Summary:
Some of our internal testing detected a major compile time regression which I've
tracked down to:
    r278938 - Revert "Reassociate: Reprocess RedoInsts after each inst".
It appears that processing long chains of reassociatable instructions causes
non-linear (potentially exponential) growth in the number of times an
instruction is revisited. For example, the included test revisits instructions
220 times in a 20-instruction test.

It appears that r278938 reversed the order instructions were visited and that
this is preventing scheduled revisits from being cancelled as a result of
visiting the instructions naturally during normal processing. However, simply
reversing the order also harmed the generated code. Upon closer inspection, it
was discovered that revisits occurred in the opposite order to the first pass
(Thanks to escha for spotting that).

This patch makes the revisit order consistent with the first pass which allows
more revisits to be cancelled. This does appear to have a small impact on the
generated code in few cases but it significantly reduces compile-time.

After this patch, our internal test that was most affected by the regression
dropped from ~2 million revisits to ~4k resulting in Reassociate having 0.46%
of the runtime it had before (99.54% improvement).

Here's the summaries reported by lnt for the LLVM test-suite with --benchmarking-only:
| metric         | geomean before patch | geomean after patch | delta   |
| -----          | -----                | -----               | -----   |
| compile time   | 0.1956               | 0.1261              | -35.54% |
| execution time | 0.3240               | 0.3237              | -       |
| code size      | 7365.4459            | 7365.6079           | -       |

The results have a few wins and losses on compile-time, mostly in the +/- 2.5% range. There was one outlier though:
| Performance Regressions - compile_time | Δ | Previous | Current |
| MultiSource/Benchmarks/ASC_Sequoia/CrystalMk/CrystalMk | 9.82% | 2.0473 | 2.2483 |

Reviewers: javed.absar, dberlin

Reviewed By: dberlin

Subscribers: kristof.beyls, llvm-commits

Differential Revision: https://reviews.llvm.org/D45734

llvm-svn: 331381

6 years ago[X86] Cleanup WriteFShuffle/WriteFVarShuffle (+256 variants) scheduler classes with...
Simon Pilgrim [Wed, 2 May 2018 17:58:50 +0000 (17:58 +0000)]
[X86] Cleanup WriteFShuffle/WriteFVarShuffle (+256 variants) scheduler classes with more common default values

llvm-svn: 331380

6 years agoEmit an error when mixing <stdatomic.h> and <atomic>
Volodymyr Sapsai [Wed, 2 May 2018 17:56:45 +0000 (17:56 +0000)]
Emit an error when mixing <stdatomic.h> and <atomic>

Atomics in C and C++ are incompatible at the moment and mixing the
headers can result in confusing error messages.

Emit an error explicitly telling about the incompatibility. Introduce
the macro `__ALLOW_STDC_ATOMICS_IN_CXX__` that allows to choose in C++
between C atomics and C++ atomics.

rdar://problem/27435938

Reviewers: rsmith, EricWF, mclow.lists

Reviewed By: mclow.lists

Subscribers: jkorous-apple, christof, bumblebritches57, JonChesterfield, smeenai, cfe-commits

Differential Revision: https://reviews.llvm.org/D45470

llvm-svn: 331379

6 years agoEmit an error when mixing <stdatomic.h> and <atomic>
Volodymyr Sapsai [Wed, 2 May 2018 17:50:43 +0000 (17:50 +0000)]
Emit an error when mixing <stdatomic.h> and <atomic>

Atomics in C and C++ are incompatible at the moment and mixing the
headers can result in confusing error messages.

Emit an error explicitly telling about the incompatibility. Introduce
the macro `__ALLOW_STDC_ATOMICS_IN_CXX__` that allows to choose in C++
between C atomics and C++ atomics.

rdar://problem/27435938

Reviewers: rsmith, EricWF, mclow.lists

Reviewed By: mclow.lists

Subscribers: jkorous-apple, christof, bumblebritches57, JonChesterfield, smeenai, cfe-commits

Differential Revision: https://reviews.llvm.org/D45470

llvm-svn: 331378

6 years ago[OPENMP] Do not emit warning for implicitly declared target functions.
Alexey Bataev [Wed, 2 May 2018 17:39:00 +0000 (17:39 +0000)]
[OPENMP] Do not emit warning for implicitly declared target functions.

Since upcoming OpenMP 5.0 functions can be mapped implicitly as declare
target and we should not emit warnings for such functions.

llvm-svn: 331377

6 years agoAdd assertion to padding size calculation, NFC
Krzysztof Parzyszek [Wed, 2 May 2018 17:20:22 +0000 (17:20 +0000)]
Add assertion to padding size calculation, NFC

The size of an object cannot be less than the emitted size of all the
contained elements. This would cause an overflow in padding size
calculation. Add an assert to catch this.

Patch by Suyog Sarda.

llvm-svn: 331376

6 years agoSilence compiler warning.
Adrian Prantl [Wed, 2 May 2018 17:11:43 +0000 (17:11 +0000)]
Silence compiler warning.

llvm-svn: 331375

6 years agoFix gdb-remote qMemoryRegionInfo unit tests for xml-enabled builds
Pavel Labath [Wed, 2 May 2018 17:00:33 +0000 (17:00 +0000)]
Fix gdb-remote qMemoryRegionInfo unit tests for xml-enabled builds

In case we are building with xml enabled, the GetMemoryRegionInfo
function will send extra packets to query te extended memory map, which
the tests were not expecting.

Add an expectation for this to the test. Right now, it's just a basic
one which pretends we don't support the extension, however, it would be
also interesting the add a test which verifies the extension-enabled
case.

I also noticed that the test does a pretty lousy job of validating the
returned memory region info, so I add a couple of extra assertions to
improve that.

llvm-svn: 331374

6 years agoEnable AUTOBRIEF in doxygen configuration.
Adrian Prantl [Wed, 2 May 2018 16:55:16 +0000 (16:55 +0000)]
Enable AUTOBRIEF in doxygen configuration.

This brings the LLDB configuration closer to LLVM's and removes visual
clutter in the source code by removing the @brief commands from
comments.

This patch also reflows the paragraphs in all doxygen comments.

See also https://reviews.llvm.org/D46290.

Differential Revision: https://reviews.llvm.org/D46321

llvm-svn: 331373

6 years ago[OPENMP] Enable c++ exceptions outside of the target constructs iff they are
Alexey Bataev [Wed, 2 May 2018 16:52:07 +0000 (16:52 +0000)]
[OPENMP] Enable c++ exceptions outside of the target constructs iff they are
enabled for the host.

If the compilation for the host enables C++ exceptions, but they are not
supported by the device, we still need to allow the code with the
exception handling constructs outside of the target regions.

llvm-svn: 331372

6 years agoRevert "[AMDGPU] performAddCombine should run after DAG is legalized."
Farhana Aleen [Wed, 2 May 2018 16:48:52 +0000 (16:48 +0000)]
Revert "[AMDGPU] performAddCombine should run after DAG is legalized."

This reverts commit 6b97d2995566b4dddd6bf0d75579ff44501d4494.

llvm-svn: 331371

6 years agoAdd -foutline option to enable the MachineOutliner in AArch64
Jessica Paquette [Wed, 2 May 2018 16:42:51 +0000 (16:42 +0000)]
Add -foutline option to enable the MachineOutliner in AArch64

Since we've been working on productizing the MachineOutliner in AArch64, it
makes sense to provide a more user-friendly way to enable it.

This allows users of AArch64 to enable the outliner using -foutline instead
of -mllvm -enable-machine-outliner. Other, less mature implementations (e.g,
x86-64) can still enable the pass using the -mllvm option.

Also add a test to make sure it works.

llvm-svn: 331370

6 years ago[X86] Convert most remaining XOP uses of X86SchedWritePair scheduler classes to X86Sc...
Simon Pilgrim [Wed, 2 May 2018 16:25:41 +0000 (16:25 +0000)]
[X86] Convert most remaining XOP uses of X86SchedWritePair scheduler classes to X86SchedWriteWidths.

llvm-svn: 331369

6 years ago[AMDGPU] performAddCombine should run after DAG is legalized.
Farhana Aleen [Wed, 2 May 2018 16:24:10 +0000 (16:24 +0000)]
[AMDGPU] performAddCombine should run after DAG is legalized.

Summary: performAddCombine should run after DAG is legalized; Otherwise generic optimization
         in the DAGCombiner can optimize an addcarry+trunc into an addcarry instruction with
         illegal types.

Author: FarhanaAleen

Reviewed By: rampitec

Subscribers: llvm-commits, AMDGPU

Differential Revision: https://reviews.llvm.org/D46337

llvm-svn: 331368

6 years agoFix line-endings. NFCI.
Simon Pilgrim [Wed, 2 May 2018 16:16:24 +0000 (16:16 +0000)]
Fix line-endings. NFCI.

llvm-svn: 331367

6 years agoclc_sqrt: Reuse unary_decl.inc
Jan Vesely [Wed, 2 May 2018 16:06:52 +0000 (16:06 +0000)]
clc_sqrt: Reuse unary_decl.inc

Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>
Reviewed-by: Aaron Watry <awatry@gmail.com>
Tested-by: Aaron Watry <awatry@gmail.com>
llvm-svn: 331366

6 years ago[OPENMP] Support C++ member functions in the device constructs.
Alexey Bataev [Wed, 2 May 2018 15:45:28 +0000 (15:45 +0000)]
[OPENMP] Support C++ member functions in the device constructs.

Added correct emission of the C++ member functions for the device
function when they are used in the device constructs.

llvm-svn: 331365

6 years agoPass compiler arguments in the create_ll.sh script
Philip Pfaffe [Wed, 2 May 2018 15:27:32 +0000 (15:27 +0000)]
Pass compiler arguments in the create_ll.sh script

Summary:
Occasionally you need an include or similar things to be configured
when making a new testcase. Allow passing these to the script and down to the
compiler calls.

Reviewers: grosser, Meinersbur, bollu

Reviewed By: Meinersbur

Subscribers: bollu, llvm-commits, pollydev

Differential Revision: https://reviews.llvm.org/D46359

llvm-svn: 331364

6 years agoRevert "[polly] [ScopInfo] Don't pre-compute the name of the Scop's region."
Philip Pfaffe [Wed, 2 May 2018 14:55:39 +0000 (14:55 +0000)]
Revert "[polly] [ScopInfo] Don't pre-compute the name of the Scop's region."

This reverts commit 0f9dc03765dc301fff7a52e2a0e1dd3e5f3130c5, r328666.

The change introduced a use-after-free, caused by the temporary name string
being destroyed after converting it to a StringRef.

llvm-svn: 331363

6 years agoRe-land rL331357 "[X86] Fix scheduling info for VMPSADBWYrmi."
Clement Courbet [Wed, 2 May 2018 14:35:48 +0000 (14:35 +0000)]
Re-land rL331357 "[X86] Fix scheduling info for VMPSADBWYrmi."

Without the rebase mess.

https://reviews.llvm.org/D46356

llvm-svn: 331362

6 years ago[analyzer] Fix filename in cross-file HTML report
Malcolm Parsons [Wed, 2 May 2018 14:26:12 +0000 (14:26 +0000)]
[analyzer] Fix filename in cross-file HTML report

Summary:
The filename is currently taken from the start of the path, while the
line and column are taken from the end of the path.
This didn't matter until cross-file path reporting was added.

Reviewers: george.karpenkov, dcoughlin, vlad.tsyrklevich

Reviewed By: george.karpenkov, vlad.tsyrklevich

Subscribers: xazax.hun, szepet, a.sidorin, cfe-commits

Differential Revision: https://reviews.llvm.org/D45611

llvm-svn: 331361

6 years ago[X86] Cleanup WriteFMul scheduler classes with more common default values
Simon Pilgrim [Wed, 2 May 2018 14:25:32 +0000 (14:25 +0000)]
[X86] Cleanup WriteFMul scheduler classes with more common default values

Intel models were targeting x87 instead of packed sse.

llvm-svn: 331360

6 years agoFix '32-bit shift implicitly converted to 64 bits' warning by using APInt::setBit...
Simon Pilgrim [Wed, 2 May 2018 14:22:30 +0000 (14:22 +0000)]
Fix '32-bit shift implicitly converted to 64 bits' warning by using APInt::setBit instead.

llvm-svn: 331359

6 years ago[OPENMP] Emit names of the globals depending on target.
Alexey Bataev [Wed, 2 May 2018 14:20:50 +0000 (14:20 +0000)]
[OPENMP] Emit names of the globals depending on target.

Some symbols are not allowed to be used as names on some targets. Patch
ries to unify the emission of the names of LLVM globals so they could be
used on different targets.

llvm-svn: 331358

6 years agoRevert rL331355 "[X86] Fix scheduling info for VMPSADBWYrmi."
Clement Courbet [Wed, 2 May 2018 13:54:38 +0000 (13:54 +0000)]
Revert rL331355 "[X86] Fix scheduling info for VMPSADBWYrmi."

It contains unrelated changes.

llvm-svn: 331357

6 years ago[X86] Fix scheduling info for (V?)SQRTPDm on silvermont.
Clement Courbet [Wed, 2 May 2018 13:46:14 +0000 (13:46 +0000)]
[X86] Fix scheduling info for (V?)SQRTPDm on silvermont.

https://reviews.llvm.org/D46356

llvm-svn: 331356

6 years ago[X86] Fix scheduling info for VMPSADBWYrmi.
Clement Courbet [Wed, 2 May 2018 13:40:48 +0000 (13:40 +0000)]
[X86] Fix scheduling info for VMPSADBWYrmi.

https://reviews.llvm.org/D46356

llvm-svn: 331355

6 years ago[MIPS] Fix DIV/DIVU scheduling classes.
Clement Courbet [Wed, 2 May 2018 13:37:28 +0000 (13:37 +0000)]
[MIPS] Fix DIV/DIVU scheduling classes.

https://reviews.llvm.org/D46356.

llvm-svn: 331354

6 years ago[X86] Convert most remaining AVX512 uses of X86SchedWritePair scheduler classes to...
Simon Pilgrim [Wed, 2 May 2018 13:32:56 +0000 (13:32 +0000)]
[X86] Convert most remaining AVX512 uses of X86SchedWritePair scheduler classes to X86SchedWriteWidths.

We've dealt with the majority already.

llvm-svn: 331353

6 years ago[AArch64][SVE] Asm: Support for LDR/STR fill and spill instructions.
Sander de Smalen [Wed, 2 May 2018 13:32:39 +0000 (13:32 +0000)]
[AArch64][SVE] Asm: Support for LDR/STR fill and spill instructions.

Reviewers: fhahn, rengolin, samparker, SjoerdMeijer, javed.absar

Reviewed By: samparker

Differential Revision: https://reviews.llvm.org/D46270

llvm-svn: 331352

6 years ago[TableGen] Don't quote variable name when printing !foreach.
Simon Tatham [Wed, 2 May 2018 13:17:26 +0000 (13:17 +0000)]
[TableGen] Don't quote variable name when printing !foreach.

An input !foreach expression such as !foreach(a, lst, !add(a, 1))
would be re-emitted by llvm-tblgen -print-records with the first
argument in quotes, giving !foreach("a", lst, !add(a, 1)), which isn't
valid TableGen input syntax.

Reviewers: nhaehnle

Reviewed By: nhaehnle

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D46352

llvm-svn: 331351

6 years agoPredicate.h: remove unused functions
Pavel Labath [Wed, 2 May 2018 13:14:18 +0000 (13:14 +0000)]
Predicate.h: remove unused functions

The functions are unused, their comments are out of date with the
implementation, and the implementation is out of date with the rest of the code
base (it uses seconds(0) to mean infinite wait, whereas elsewhere we use the
Timeout class).

llvm-svn: 331350

6 years ago[AArch64][SVE] Asm: Support for scatter ST1 store instructions.
Sander de Smalen [Wed, 2 May 2018 13:00:30 +0000 (13:00 +0000)]
[AArch64][SVE] Asm: Support for scatter ST1 store instructions.

Reviewers: fhahn, rengolin, samparker, SjoerdMeijer, javed.absar

Reviewed By: SjoerdMeijer

Differential Revision: https://reviews.llvm.org/D46248

llvm-svn: 331349

6 years agoRevert "[mips] Correct the predicates of sign extension instructions"
Simon Dardis [Wed, 2 May 2018 12:35:29 +0000 (12:35 +0000)]
Revert "[mips] Correct the predicates of sign extension instructions"

I accidently committed this patch after asking for a review, but it has not
been reviewed yet.

This reverts r331346.

llvm-svn: 331348

6 years ago[X86] Convert most remaining uses of X86SchedWritePair scheduler classes to X86SchedW...
Simon Pilgrim [Wed, 2 May 2018 12:27:54 +0000 (12:27 +0000)]
[X86] Convert most remaining uses of X86SchedWritePair scheduler classes to X86SchedWriteWidths.

We've dealt with the majority already.

llvm-svn: 331347

6 years ago[mips] Correct the predicates of sign extension instructions
Simon Dardis [Wed, 2 May 2018 12:25:33 +0000 (12:25 +0000)]
[mips] Correct the predicates of sign extension instructions

And eliminate the duplication of those instructions for microMIPS32r6.

llvm-svn: 331346

6 years ago[analyzer] Add `TaintBugVisitor` to the ArrayBoundV2, DivideZero and VLASize.
Henry Wong [Wed, 2 May 2018 12:11:22 +0000 (12:11 +0000)]
[analyzer] Add `TaintBugVisitor` to the ArrayBoundV2, DivideZero and VLASize.

Summary: Add `TaintBugVisitor` to the ArrayBoundV2, DivideZero, VLASize to be able to indicate where the taint information originated from.

Reviewers: NoQ, george.karpenkov, xazax.hun, a.sidorin

Reviewed By: NoQ

Subscribers: szepet, rnkovacs, cfe-commits, MTC

Differential Revision: https://reviews.llvm.org/D46007

llvm-svn: 331345

6 years ago[ASTImporter] Fix isa cast assert
Peter Szecsi [Wed, 2 May 2018 11:52:54 +0000 (11:52 +0000)]
[ASTImporter] Fix isa cast assert

Do early return if we can't import the found decl for a member expr.
This follows the pre-existing scheme, e.g with E->getMemberDecl().
E->getFoundDecl().getDecl() can be null when a member expression does
not involve lookup. It may involve a lookup in case of a using directive
which refers to a member function in a base class template.

We faced this assert during the CTU analysis of google::protobuf v3.5.2.
We tried hard to synthesize a minimal test example both by hand and by
executing creduce on multiple files. Unfortunately, we were unable to reduce
to such a minimal example, yet. Nevertheless, this fix solved the problem in
protobuf.

To reproduce the error one must execute the analyzer with
-Xclang -analyzer-config -Xclang experimental-enable-naive-ctu-analysis=true -Xclang -analyzer-config -Xclang ctu-dir=/path/to/ctu_dir

Patch by Gabor Marton!

Differential Revision: https://reviews.llvm.org/D46019

llvm-svn: 331344

6 years ago[AArch64][SVE] Asm: Support for non-temporal, contiguous LDNT1/STNT1 load/store instr...
Sander de Smalen [Wed, 2 May 2018 11:48:49 +0000 (11:48 +0000)]
[AArch64][SVE] Asm: Support for non-temporal, contiguous LDNT1/STNT1 load/store instructions.

Reviewers: fhahn, rengolin, samparker, SjoerdMeijer, javed.absar

Reviewed By: samparker

Differential Revision: https://reviews.llvm.org/D46269

llvm-svn: 331343

6 years ago[LoopInterchange] Update some loops to use range base for loops (NFC).
Florian Hahn [Wed, 2 May 2018 10:53:04 +0000 (10:53 +0000)]
[LoopInterchange] Update some loops to use range base for loops (NFC).

llvm-svn: 331342

6 years ago[mips] Correct the predicates for shifts.
Simon Dardis [Wed, 2 May 2018 09:55:49 +0000 (09:55 +0000)]
[mips] Correct the predicates for shifts.

Reviewers: smaksimovic, abeserminji, atanasyan

Differential Revision: https://reviews.llvm.org/D46123

llvm-svn: 331341

6 years ago[X86] Cleanup WriteFAdd/WriteFCmp scheduler classes with more common default values
Simon Pilgrim [Wed, 2 May 2018 09:18:49 +0000 (09:18 +0000)]
[X86] Cleanup WriteFAdd/WriteFCmp scheduler classes with more common default values

Intel models were targeting x87 instead of packed sse.

Also fixes XOP's VFRCZ to use WriteFAdd/WriteFAddY.

llvm-svn: 331340

6 years ago[AArch64][SVE] Asm: Support for LD1RQ load-and-replicate quad-word vector instructions.
Sander de Smalen [Wed, 2 May 2018 08:49:08 +0000 (08:49 +0000)]
[AArch64][SVE] Asm: Support for LD1RQ load-and-replicate quad-word vector instructions.

Reviewers: fhahn, rengolin, samparker, SjoerdMeijer, javed.absar

Reviewed By: SjoerdMeijer

Differential Revision: https://reviews.llvm.org/D46250

llvm-svn: 331339

6 years agoMark invariant.group.barrier as inaccessiblememonly
Piotr Padlewski [Wed, 2 May 2018 08:22:07 +0000 (08:22 +0000)]
Mark invariant.group.barrier as inaccessiblememonly

It turned out that readonly argmemonly is not enough.

  store 42, %p
  %b = barrier(%p)
  store 43, %b
the first store is dead, but because barrier was marked as
reading argument memory, it was considered alive. With
inaccessiblememonly it doesn't read the argument, but
it also can't be CSEd.

based on: https://reviews.llvm.org/D32006

llvm-svn: 331338

6 years ago[SelectionDAG] Selection of DBG_VALUE using a PHI node result (pt 2)
Bjorn Pettersson [Wed, 2 May 2018 06:56:38 +0000 (06:56 +0000)]
[SelectionDAG] Selection of DBG_VALUE using a PHI node result (pt 2)

Summary:
This is a follow up to rL331182. A PHI node can be split up into
several MIR PHI nodes when being selected. When there is a
dbg.value intrinsic that uses the result of such a PHI node we
need to select several DBG_VALUE instructions, with fragment
expressions, in order to do a correct selection.

Reviewers: rnk, aprantl, vsk

Reviewed By: vsk

Subscribers: mattd, llvm-commits, JDevlieghere, aprantl, gbedwell, rnk

Tags: #debug-info

Differential Revision: https://reviews.llvm.org/D46329

llvm-svn: 331337

6 years ago[libFuzzer] Don't short-circuit from CrashCallback.
Matt Morehouse [Wed, 2 May 2018 02:55:28 +0000 (02:55 +0000)]
[libFuzzer] Don't short-circuit from CrashCallback.

Short-circuiting causes tests to fail on Mac since libFuzzer crashes
rather than exiting with an error code when an unexpected signal
happens.

llvm-svn: 331324

6 years agoUpdate lldb to match clang r331244 (addition of char8_t).
Richard Smith [Wed, 2 May 2018 02:43:22 +0000 (02:43 +0000)]
Update lldb to match clang r331244 (addition of char8_t).

Also fix misclassification of char16_t and char32_t: these are unsigned types,
not signed types.

llvm-svn: 331323

6 years ago[Modules] Allow @import to reach submodules in private module maps
Bruno Cardoso Lopes [Wed, 2 May 2018 02:25:03 +0000 (02:25 +0000)]
[Modules] Allow @import to reach submodules in private module maps

A @import targeting a top level module from a private module map file
(@import Foo_Private), would fail if there's any submodule declaration
around (module Foo.SomeSub) in the same private module map.

This happens because compileModuleImpl, when building Foo_Private, will
start with the private module map and will not parse the public one,
which leads to unsuccessful parsing of Foo.SomeSub, since top level Foo
was never parsed.

Declaring other submodules in the private module map is not common and
should usually be avoided, but it shouldn't fail to build. Canonicalize
compileModuleImpl to always look at the public module first, so that all
necessary information is available when parsing the private one.

rdar://problem/39822328

llvm-svn: 331322

6 years ago[XRay][tools] Rename llvm-xray filenames from .cc -> .cpp (NFC)
Dean Michael Berris [Wed, 2 May 2018 00:43:17 +0000 (00:43 +0000)]
[XRay][tools] Rename llvm-xray filenames from .cc -> .cpp (NFC)

Summary:
This brings the filenames in accordance to the style guide and LLVM
conventions for C++ filenames.

As suggested by rnk@ in D46068.

Reviewers: rnk

Subscribers: mgorny, mgrang, llvm-commits

Differential Revision: https://reviews.llvm.org/D46301

llvm-svn: 331321

6 years agoFix release build breakage
Sam Clegg [Wed, 2 May 2018 00:10:28 +0000 (00:10 +0000)]
Fix release build breakage

This function was added in rL331220 but wasn't
testing in release configurations.

llvm-svn: 331320

6 years agoTrack skipped files in dependency scanning.
Volodymyr Sapsai [Tue, 1 May 2018 23:59:33 +0000 (23:59 +0000)]
Track skipped files in dependency scanning.

It's possible for a header to be a symlink to another header. In this
case both will be represented by clang::FileEntry with the same UID and
they'll use the same clang::HeaderFileInfo.

If you include both headers and use some single-inclusion mechanism
like a header guard or #import, one header will get a FileChanged
callback, and another FileSkipped.

So that we get an accurate dependency file, we therefore need to also
implement the FileSkipped callback in dependency scanning.

Patch by Pete Cooper.

Reviewers: bruno, pete

Reviewed By: bruno

Subscribers: cfe-commits, jkorous, vsapsai

Differential Revision: https://reviews.llvm.org/D30881

llvm-svn: 331319

6 years agoThis test fails if there is no integrated assembler, so change the -c option to ...
Douglas Yung [Tue, 1 May 2018 23:32:09 +0000 (23:32 +0000)]
This test fails if there is no integrated assembler, so change the -c option to -S as it is not important to the test and allows it to pass when there is no integrated assembler.

llvm-svn: 331318

6 years ago[WebAssembly] Fix debug printing of symbol types
Sam Clegg [Tue, 1 May 2018 23:28:27 +0000 (23:28 +0000)]
[WebAssembly] Fix debug printing of symbol types

The Info.Kind field is a uint8_t which the OS was
trying to print as an ascii char.

llvm-svn: 331317

6 years ago[llvm-mca] Lift the logic of the RetireControlUnit from the Dispatch translation...
Matt Davis [Tue, 1 May 2018 23:04:01 +0000 (23:04 +0000)]
[llvm-mca] Lift the logic of the RetireControlUnit from the Dispatch translation unit into its own translation unit. NFC

The logic remains the same.  Eventually, I see the RCU acting as its own separate stage in the instruction pipeline.

Differential Revision: https://reviews.llvm.org/D46331

llvm-svn: 331316

6 years agoFix the .experimental. settings feature so that we don't return an error
Jason Molenda [Tue, 1 May 2018 22:49:01 +0000 (22:49 +0000)]
Fix the .experimental. settings feature so that we don't return an error
if an experimental setting has been removed/is missing.

Add tests for the .experimental. settings behaviors -- that they correctly
forward through to the real setting if it has become a real setting,
that they don't generate errors when a settig has been removed.

As Pavel notes in https://reviews.llvm.org/D45348, the way I'm suppressing
errors in the setting is not completely correct - if any of the setting
path components include "experimental", a missing setting would be declared
a non-error.  So

settings set target.experimental.setting-that-does-not-exist true

would not generate an error, which is correct.  But as Pavel notes,

settings set setting-does-not-exist.experimental.run-stopped true

should generate an error because the unknown name occurs before the
"experimental".  The amount of change to do this correctly hasn't
thrilled me, so I'm leaving this as-is for now.

<rdar://problem/39223054>
Differential Revision: https://reviews.llvm.org/D45348

llvm-svn: 331315

6 years ago[AMDGPU] Support horizontal vectorization.
Farhana Aleen [Tue, 1 May 2018 21:41:12 +0000 (21:41 +0000)]
[AMDGPU] Support horizontal vectorization.

Author: FarhanaAleen

Reviewed By: rampitec, arsenm

Subscribers: llvm-commits, AMDGPU

Differential Revision: https://reviews.llvm.org/D46213

llvm-svn: 331313

6 years ago[CFLGraph][NFC] Simplify/reorder switch in visitConstantExpr
David Bolvansky [Tue, 1 May 2018 21:35:32 +0000 (21:35 +0000)]
[CFLGraph][NFC] Simplify/reorder switch in visitConstantExpr

Reviewers: hfinkel, efriedma, spatel, dsanders, Danil, rjmccall

Reviewed By: rjmccall

Subscribers: dberlin, llvm-commits

Differential Revision: https://reviews.llvm.org/D46259

llvm-svn: 331312

6 years ago[AggressiveInstCombine] convert a chain of 'or-shift' bits into masked compare
Sanjay Patel [Tue, 1 May 2018 21:02:09 +0000 (21:02 +0000)]
[AggressiveInstCombine] convert a chain of 'or-shift' bits into masked compare

and (or (lshr X, C), ...), 1 --> (X & C') != 0

I initially thought about implementing the minimal pattern in instcombine as mentioned here:
https://bugs.llvm.org/show_bug.cgi?id=37098#c6

...but we need to do better to catch the more general sequence from the motivating test
(more than 2 bits in the compare). And a test-suite run with statistics showed that this
pattern only happened 2 times currently. It would potentially happen more often if
reassociation worked better (D45842), but it's probably still not too frequent?

This is small enough that I didn't see a need to create a whole new class/file within
AggressiveInstCombine. There are likely other relatively small matchers like what was
discussed in D44266 that would slide under foldUnusualPatterns() (name suggestions welcome).
We could potentially also consolidate matchers for ctpop, bswap, etc under here.

Differential Revision: https://reviews.llvm.org/D45986

llvm-svn: 331311

6 years ago[libFuzzer] Report at most one crash per input.
Matt Morehouse [Tue, 1 May 2018 21:01:53 +0000 (21:01 +0000)]
[libFuzzer] Report at most one crash per input.

Summary:
Fixes https://github.com/google/sanitizers/issues/788/, a deadlock
caused by multiple crashes happening at the same time.  Before printing
a crash report, we now test and set an atomic flag.  If the flag was
already set, the crash handler returns immediately.

Reviewers: kcc

Reviewed By: kcc

Subscribers: llvm-commits, kubamracek

Differential Revision: https://reviews.llvm.org/D46277

llvm-svn: 331310

6 years ago[AggressiveInstCombine] add more bitfield test patterns; NFC
Sanjay Patel [Tue, 1 May 2018 20:55:03 +0000 (20:55 +0000)]
[AggressiveInstCombine] add more bitfield test patterns; NFC

Add another baseline for D45986 and a pattern that won't be
matched with that patch.

llvm-svn: 331309

6 years ago[PhaseOrdering] add tests for bittest patterns from bitfields; NFC
Sanjay Patel [Tue, 1 May 2018 20:53:44 +0000 (20:53 +0000)]
[PhaseOrdering] add tests for bittest patterns from bitfields; NFC

As mentioned in D45986, there's a potential ordering dependency
between instcombine and aggressive-instcombine for detecting these,
so I'm adding a few tests to confirm that the expected folds occur
using -O3 (because aggressive-instcombine only runs at -O3 currently).

llvm-svn: 331308

6 years agoCreate a MachineBasicBlock for created IR-level BasicBlock
Jessica Paquette [Tue, 1 May 2018 20:49:42 +0000 (20:49 +0000)]
Create a MachineBasicBlock for created IR-level BasicBlock

While running the lit tests for the most recent version of D45916
(https://reviews.llvm.org/D45916), I found that a couple tests for this pass
suddenly started segfaulting. Since the outliner wasn't actually doing anything
to the code in either of these tests I got curious.

I found that the pass doesn’t completely create the machine-level constructs
necessary to actually add a MachineFunction and MachineBasicBlock to the
module. This patch adds in those missing bits. After this, adding the
outliner before this pass won’t cause it to segfault.

You can recreate this behaviour by adding the MachineOutliner directly before
the pass and having it return false immediately.

https://reviews.llvm.org/D46330

llvm-svn: 331307