r300: drop VDPAU support

There is no UVD and the mpeg2 shader-based decoding is broken and doesn't
lead to CPU savings anyway. VDPAU output works, but there is no real
benefit so just disable VDPAU altogether so we can clean the backend a
bit and also open a way to potentially drop the mpeg2 deconding altogether
from the fronted.

Acked-by: Filip Gawin <filip@gawin.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20524>

zink: utilize copy box tracking to avoid barrier emission for buf2img copies

this should reduce synchronization during e.g., miplevel population

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21397>

zink: add a util function for optimizing TRANSFER_DST image barriers

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21397>

zink: add some tracking for copy box regions

this enables tracking per-miplevel pipe_boxes for copy operations that
can then be used to avoid emitting barriers for successive copy operations
without overlapping regions

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21397>

util/box: add intersection test functions for 1d/3d

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21397>

anv, hasvk: Align workaround address to 32B

Not necessary but, all things being equal, be consistent with Iris.

Now that intel_debug_write_identifiers() already add the padding,
there's no need to include extra "+ 8" to the offset.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21479>

iris, crocus: Align workaround address to 32B

The workaround address is used as a source for push constants when
there's no resource available, that address must be 32B aligned.

This fixes invalid address being used for buffers in
3DSTATE_CONSTANT_* packets.

Now that intel_debug_write_identifiers() already add the padding,
there's no need to include extra "+ 8" to the offset.

Thanks to Xiaoming Wang that contributed to find and fix this issue.

Fixes: 2a4c361b069 ("iris: add identifier BO")
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21479>

intel: Add extra zeros at the end of debug identifiers

Add at least a full aligned uint64_t of zero padding at the end
to make the identifiers easier to spot.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21479>

ci/llvmpipe: add flake timeout for rusticl program@execute@builtin@builtin-float-sincos-1.0

Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21510>

d3d12: Fix VP9 Decode - Checking 0xFF instead of 0x7F for invalid frame_ref[i].Index7Bits

Fixes: c8e8ce8359ceb9161ac05cf48b15e2e6a298ebd6 ("d3d12: Add VP9 Decode support")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21507>

hasvk: Update driver name in debug information

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21481>

radv: Implement & expose VK_EXT_pipeline_library_group_handles.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21406>

radv: Use group handles based on shader hashes.

Should be stable.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21406>

radv: Use provided handles for switch cases in RT shaders.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21406>

radv: Hash group handles as part of RT pipeline key.

So that we can start varying them  to avoid collisions while keeping
handles stable.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21406>

radv: Add helper to hash stages.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21406>

zink: add debug marker tracing for qbo updates

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21425>

zink: add ZINK_DEBUG=map

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21425>

zink: actually hook up ZINK_DEBUG=norp

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21425>

freedreno/crashdec: Disable GALLIUM_DUMP_CPU

We don't want util_cpu to vomit cpu caps all over the test output.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19551>

freedreno/crashdec: Handle multi-IB prefetching

Add helper to scan the CP_INDIRECT_BUFFERs, and then work backwards
accounting for data buffered via ROQ prefetch to deduce the actual
SQE position at the time of the crash.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19551>

freedreno/crashdec: Add another prefetch test

Constructed with an invalid packet (0xdeadd00d) so there is no ambiguity
in the crash location.

This is expected to fail until the next commit.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19551>

freedreno/crashdec: Refactor crashdec tests

Simplify the process of adding additional tests.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19551>

freedreno/crashdec: Add prefetch test

Add a crash where this was seen "in the wild" on a CTS test in
!17943 which requires handling multi-IB prefetching to correctly
location the crash location.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19551>

freedreno/cffdec: Fix hang location detection

We were previously checking only every 8 dwords within the packet.  We
should instead just check if the hang location comes within the packet.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19551>

freedreno/cffdec: Add helper to parse CP_INDIRECT_BUFFER

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19551>

freedreno/cffdec: Add helper to find next pkt

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19551>

freedreno/cffdec: Fix unitialized count for pkt2

This was causing us to use the size of the previous packet.  Which just
happened to land on a valid packet because pkt2 only followed a
CP_INDIRECT_BUFFER.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19551>

freedreno/crashdec: Fix apparent off-by-one with ROQ size

I have multiple examples where this register is too large by one
when comparing to the ROQ read/write pointers in CP_ROQ_*_STAT and the
ROQ data itself, as if it includes the dword most recently read too. I
have an example where it's off by 2 compared to the read pointer, but
the read pointer is also off by 1 itself judging by the SQE program
counter, so that may just be them not getting synchronized. This
off-by-one was getting in the way of figuring out exactly IB2 was being
processed in the next commit.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19551>

freedreno/a6xx: Fill in ROQ status registers

We had a bunch of registers only defined for some parts of ROQ but now
that we know the pattern for ROQ-related registers it's easy to fill in
the rest.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19551>

freedreno/a6xx: Fix CP_ROQ_THRESHOLDS_1

Just by adding the ROQ_*_STAT registers following the previous pattern
it becomes obvious what these fields actually are.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19551>

freedreno/a6xx: Add CP_ROQ_*_STAT

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19551>

freedreno/a6xx: Rename CP_CSQ_IB*_STAT

These don't correspond to the a3xx *_STAT registers, which we're about
to add so we need to rename them. The closest analogue is CP_CSQ_AVAIL,
although the sense is inverted (and we're not sure what the low 16 bits
are about). Also, the a3xx distinction between CSQ and STQ doesn't exist
anymore so don't use these outdated terms.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19551>

anv: implement emission of 3DSTATE_HS for Wa_1306463417

We need to emit 3DSTATE_HS for each primitive with tessellation.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21308>

anv: limit generated draws to pipelines without HS stage

This is done for gfx11 specific workaround.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21308>

anv: emit 3DSTATE_HS in cmd_buffer_flush_gfx_state

Patch packs 3DSTATE_HS state during pipeline creation but it
gets emitted only before 3DPRIMITIVE. We will later need this
to implement a workaround.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21308>

iris: implement emission of 3DSTATE_HS for Wa_1306463417

We need to emit 3DSTATE_HS for each primitive with tessellation.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21308>

meson: update flex/bison requirement to cover all usages

Meson silently drops outputs such as libvulkan-freedreno when
dependencies on flex/bison can't be satisfied rather than providing
an error which this commit fixes.

Signed-off-by: Mark Collins <mark@igalia.com>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21488>

gbm: drop unnecessary vulkan dependency

gbm doesn't actually include vulkan headers

Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Erik Faye-Lund <kusmabite@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21489>

glx: include directly the useful vulkan header, instead of including everything

Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Erik Faye-Lund <kusmabite@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21489>

egl: include directly the useful vulkan header, instead of including everything

Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Erik Faye-Lund <kusmabite@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21489>

anv: process utrace payloads on queue submission

anv_QueuePresentKHR is not called by apps that do not use WSI.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21456>

pvr: Add support for dynamic buffers descriptors

This is based on the new approach of having a descriptor set
addresses table in memory. To handle dynamic offsets provided on
vkCmdBindDescriptorSets() we duplicate the set with dynamic
descriptors, apply the offsets, and write the new bo's address
into the table. There are better ways of handling dynamic
descriptors but this implementation won't require many/if any
changes in the compiler code.

The descriptor set itself doesn't allocate and reserve space for
the dynamic descriptors since they would all be collected together
when creating the pipeline layout. While copying the descriptor
set we allocate extra space at the end for the dynamic primaries
and secondaries to account for that.

Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21391>

ci/intel: Update hasvk HSW xfails

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19876>

hasvk: Handle subpass self-dependencies for stencil shadow copies

Always copying when dstAccessMask includes texture operations is not
optimal, but it's good enough.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19876>

hasvk: Mark VK_IMAGE_LAYOUT_ATTACHMENT_OPTIMAL as stencil write optimal

VK_KHR_synchronization2 added VK_IMAGE_LAYOUT_ATTACHMENT_OPTIMAL, which
was not previously recognized by vk_image_layout_stencil_write_optimal.

Would close https://gitlab.freedesktop.org/mesa/mesa/-/issues/5578 if it
wasn't already closed.

Fixes: b996fa8efaa ("anv: implement VK_KHR_synchronization2")

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19876>

hasvk: Enable PixelShaderKillsPixel when omask is used

From the Haswell PRM Vol. 2b, 3DSTATE_WM::Pixel Shader Kill Pixel:
    "This bit is required to be ENABLED in the following situations:
     - The API pixel shader program contains "killpix" or "discard"
       instructions, or other code in the pixel shader kernel that can
       cause the final pixel mask to differ from the pixel mask received
       on dispatch.
     - A sampler with chroma key enabled with kill pixel mode is used by
       the pixel shader.
     - Any render target has Alpha Test Enable or AlphaToCoverage Enable
       enabled.
     - The pixel shader kernel generates and outputs oMask."

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19876>

aux/tc: add a 'has_resolve' member to tc_renderpass_info

this indicates that the first color buffer gets resolved

Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21365>

anv: fix invalid masking of 48bit address

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 4d05be49c253 ("anv: implement vkCmdTraceRaysIndirect2KHR")
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21486>

intel/blorp: Allocate only necessary amount of VERTEX_BUFFER_STATE

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21031>

intel: Make gen12 URB space reservation dependent on compute engine presence

Tigerlake PRM: Volume 2c: Command Reference: Registers Part 2 - Registers M through Z
RCU_MODE :: Compute Engine Enable

   This bit indicates if Compute Engine (a.k.a Dual Context or Multi
   Context) is enabled or not. This bit must be treated as global
   control for enabling and disabling of compute engine. Hardware
   allocates required resources for the compute engine based on this
   bit.
   ....
   HW reserves 4KB of URB space...

Right now no gen12 platform has Dual Context enabled in kernel side,
exposing a compute engine but that can change, so here adding
has_compute_engine to intel_device_info and only reserving URB space
if compute engine is available.

While at it also fixing the error path when pb_slabs_init() fails.

Bspec: 46034
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21031>

pvr: Add push consts support to descriptor program.

Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Luigi Santivetti <luigi.santivetti@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21387>

meson: replace vk_wsi_args with dependencies to let meson take care of transitivity

Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19497>

meson: reuse vulkan_wsi_list for defining vk_wsi_args

Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19497>

docs: mention `meson configure` and drop broken workaround script

The script is broken, and nobody noticed so it wasn't used much.

Meson has had support for printing the options by pointing to the source
dir for a while (not sure the exact version though) so I think we can
just recommend users do that.

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21469>

docs: mention the meson summary

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21469>

intel/compiler: remove unused field from fs_thread_payload

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20957>

r600: fix shader blob memory leak

Fixes: 5b205ef41307406983ffac829ae423d08f7527bc
   r600: Store nir shaders serialized to save memory

Direct leak of 4096 byte(s) in 1 object(s) allocated from:
    #0 0x7faf89c3bb48 in __interceptor_realloc (/usr/lib64/libasan.so.6+0xb1b48)
    #1 0x7faf7be5981d in grow_to_fit ../src/util/blob.c:67
    #2 0x7faf7be5a538 in grow_to_fit ../src/util/blob.c:49
    #3 0x7faf7be5a538 in blob_reserve_bytes ../src/util/blob.c:177
    #4 0x7faf7be5a538 in blob_reserve_uint32 ../src/util/blob.c:190
    #5 0x7faf7d248a8c in nir_serialize ../src/compiler/nir/nir_serialize.c:2109
    #6 0x7faf7df4fdbb in r600_pipe_shader_create ../src/gallium/drivers/r600/r600_shader.c:401

Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21443>

venus: Add VkBuffer cache statistics for debug

Signed-off-by: Juston Li <justonli@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21324>

venus: add VN_DEBUG_CACHE flag

General debug flag for dumping statistics for various caching done by
venus.

Signed-off-by: Juston Li <justonli@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21324>

venus: switch to lazy VkBuffer cache

Instead of creating a static VkBuffer cache at init with hardcoded
CreateInfo's, lazily cache VkBuffers that the app requests.

Signed-off-by: Juston Li <justonli@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21324>

nir/deref: don't replace casts with deref_struct if we'd lose the stride

The result might be used in a deref_ptr_as_array, which requires a proper
stride within lower_explicit_io. If we'd lose that information or end up
with a different stride don't execute this optimization.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8289
Fixes: b779baa9bf95 ("nir/deref: fix struct wrapper casts. (v3)")
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21458>

radeonsi/vcn: disable fence for JPEG decoding

5e1bd07a is causing JPEG decoding regression issue.
Therefore, disable fence for JPEG decoding until fence issue is fixed.

Signed-off-by: Sajeesh Sidharthan <sajeesh.sidharthan@amd.com>
Reviewed-by: Boyuan Zhang <boyuan.zhang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21442>

v3d: update supertuxkart reference after 1c028a4d5b623e73bdf5

The smoke effect now looks smoother instead of having hard steps, which
looks like a reasonable change given that 1c028a4d5b623e73bdf5 added
several float formats:
https://eric.pages.freedesktop.org/-/mesa/-/jobs/36691458/artifacts/results/summary/results/trace@broadcom-rpi4@supertuxkart@supertuxkart-mansion-egl-gles-v2.trace.html

Fixes: 1c028a4d5b623e73bdf5 ("v3d: support r{g,gba}16f formats for vertex buffers")
Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21462>

iris: Avoid creating uncompressed view with unaligned tile offsets on BDW

Fixes: 60568d5d ("iris: Use isl_surf_get_uncompressed_surf")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7990
Signed-off-by: Sviatoslav Peleshko <sviatoslav.peleshko@globallogic.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21147>

docs: update calendar for 22.3.6

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21477>

docs/relnotes: add sha256sum for 22.3.6

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21477>

docs: add release notes for 22.3.6

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21477>

glsl: Drop the (v.x + v.y + v.z + v.w) -> dot(v, 1.0) optimization.

It's not connected up to anything at the moment, and even if I do enable
it for crocus HSW it only shaves 3 instructions off of one particular VS
in an old synthetic benchmark, not affecting anything else in shader-db.
I don't think anyone will care to ever fix or port this to NIR, let's just
retire it.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21353>

freedreno/a6xx: Fix view_seqno in tex cache key

If the view's seqno increments, it needs to happen *before* the tex cache
key is constructed.  Normally this happens when the sampler views are
bound.  But if the texture backing a current sampler view is rebound we
need to handle this before the cache lookup.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21408>

freedreno/a6xx: Static-ify sampler_view_update()

It doesn't need to be visible elsewhere since commit a93d3f14989
("freedreno/a6xx: Move tex state building")

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21408>

freedreno/a6xx: Small cleanup

Move the rb allocation to the place where it is populated (ie. where we
know how large it must be).

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21408>

freedreno/a6xx: Remove needs_invalidate flag

Whether the rsc seqno has changed tells us whether we need to update.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21408>

freedreno/a6xx: Add a way to assert valid format

Layout transitions caused by access as a various format must happen at
state bind time, before batch_draw_tracking().  Add a helper to assert
this fact.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21408>

freedreno/a6xx: Fix sampler view rsc_seqno for X32_S8X24

Elsewhere we are comparing it against the seqno for the "primary" z32
buffer, so be consistent.  Otherwise we'll think we need to re-validate
every time the sampler view is bound.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21408>

freedreno/a6xx: Drop unneed fd6_texture_state() arg

It is redundant with shader type (stage).

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21408>

freedreno/a6xx: Fix set_sampler_views(start != 0)

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21408>

freedreno/a6xx: Move rsc seqno out of tex cache key

Since we invalidate tex cache entries if an associated pipe_resource is
rebound, we don't rely on the rsc_seqno being part of the tex cache key.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21408>

aco: fix pathological case in LdsDirectVALUHazard

Similar to bfd4ac4581bae0d36b2c58524131f91c7c0d27ce.

No fossil-db changes.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Fixes: 296b4d95a3e ("aco/gfx11: workaround LdsDirectVALUHazard")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21423>

amd,nir: remove byte_permute_amd intrinsic

It's unused and if we ever want to use it again we should make it an alu
opcode instead.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21445>

docs: include explicit `setup` in instructions

The implicit `meson builddir/` is deprecated, and while we have fixed
our scripts, we forgot to update the docs we give our users ^^'

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21468>

radeonsi/video: use specific PIPE_BIND_ value for video buffers

Since 13cb41f6662 PIPE_BIND_SHARED was used to allocate driver internal
video buffers. These buffers are never shared, but the intent was to
get non-suballocated buffers and SHARED was used as an indirect flag.

This commit switches to PIPE_BIND_CUSTOM which isn't used anywhere else,
and is now translated as "no suballocation".

The main benefit here is that this allows these buffers to set
use_reusable_pool to true reducing the CPU overhead a lot.

For instance, running the following command on my system:

   ffmpeg -hwaccel vaapi -hwaccel_output_format vaapi \
       -i tears_of_steel_1080p.mov -an -c:v h264_vaapi output.mp4

takes 35 sec with this commit vs 45 sec without.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Boyuan Zhang <boyuan.zhang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21416>

mesa: use mesa_log from output_if_debug

Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21454>

mesa: add missing newlines for _mesa_debug/_mesa_log callers

Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21454>

util/log: add logger_windbg

Because output_if_debug has it.

Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21454>

util/log: add support for MESA_LOG_FILE

It allows logger_file to log to any file.

v2: check "geteuid() == getuid()"

Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21454>

util/log: add logger_syslog

This is useful when the app is a daemon.

Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21454>

util/log: improve logger_android

Avoid __android_log_vprint which can truncate messages.  Also add
MESA_LOG=wait to lower the chance of logger_android dropping messages.

Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21454>

util/log: improve logger_file newline handling

Add logger_vasnprintf that will be used by other loggers.  For
logger_file, it improves newline handling for

  mesa_logd("%s", "hello\n");

Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21454>

util/log: allow multiple loggers

It still logs to logcat on Android and stderr otherwise by default.
MESA_LOG is introduced to override the loggers.

v2: add va_copy

Reviewed-by: Emma Anholt <emma@anholt.net> (v1)
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21454>

util/log: refactor mesa_log

Add logger_file and logger_android.

Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21454>

v3dv: handle ASPECT_MEMORY_PLANE aspect flags when getting plane number

As we support VK_EXT_image_drm_format_modifier, we could receive
VK_IMAGE_ASPECT_MEMORY_PLANE_0/1/2_BIT_EXT flags.

Fixes several tests like this:
dEQP-VK.drm_format_modifiers.create_explicit_modifier.*

when using CTS 1.3.5.0

Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21463>

loader: do not check the mesa DRI_Mesa version if it was not found

Signed-off-by: Sebastian Wick <sebastian.wick@redhat.com>
Fixes: 1026d2934419 ("dri: Introduce internal Mesa DRI driver loader extension.")
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21429>

nir: Skip samplers and textures in lower_explicit_io

We have specialized lowering passes dealing with most of that already:
1. gl_nir_lower_samplers_as_deref
2. nir_lower_samplers
3. nir_lower_cl_images

If we need more than that, those passes can deal with following deref
chains as well.

We _might_ need to improve nir_lower_cl_images a bit for more complex
kernels, but CL also doesn't allow indirect images, so we are always able
to optimize the entire deref chain away.

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20161>

rusticl: allocate printf buffer as staging

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20161>

rusticl: no compute only

This might be a good optimization, but we should figure first what drivers
should be able to disable and what not first.

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20161>

rusticl/device: limit CL_DEVICE_MAX_CONSTANT_ARGS

At the moment we implement constant memory as normal global memory, but
we still should limit to the actual constant buffer cap once we properly
use UBOs for that.

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20161>

rusticl/device: fix some device limits

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20161>

llvmpipe/ci: increase deqp-runner timeout

Some of the OpenCL tests are flaky, because they just take that long.
Builtins can generated really complex code and if we are unlucky they can
timeout.

Proper support for functions would also solve the issue, probably, but for
now increase the deqp-runner timeout so it's less of an annoyence.

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20161>

radv/ci: cleanup CI lists for dEQP-VK.memory.* tests that timeout

These tests usually take more than 30s to complete, so exclude them
completely instead. This should also make runs slightly faster.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21464>