platform/upstream/llvm.git
6 years ago[x86] wbnoinvd intrinsic
Gabor Buella [Wed, 11 Apr 2018 20:09:09 +0000 (20:09 +0000)]
[x86] wbnoinvd intrinsic

The WBNOINVD instruction writes back all modified
cache lines in the processor’s internal cache to main memory
but does not invalidate (flush) the internal caches.

Reviewers: craig.topper, zvi, ashlykov

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D43817

llvm-svn: 329848

6 years ago[X86] Describe wbnoinvd instruction
Gabor Buella [Wed, 11 Apr 2018 20:01:57 +0000 (20:01 +0000)]
[X86] Describe wbnoinvd instruction

Similar to the wbinvd instruction, except this
one does not invalidate caches. Ring 0 only.
The encoding matches a wbinvd instruction with
an F3 prefix.

Reviewers: craig.topper, zvi, ashlykov

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D43816

llvm-svn: 329847

6 years agoRemove references to old SymbolBody class
Sam Clegg [Wed, 11 Apr 2018 19:52:53 +0000 (19:52 +0000)]
Remove references to old SymbolBody class

Differential Revision: https://reviews.llvm.org/D45400

llvm-svn: 329846

6 years ago[DSE] Add tests for atomic memory intrinsics (NFC)
Daniel Neilson [Wed, 11 Apr 2018 19:46:02 +0000 (19:46 +0000)]
[DSE] Add tests for atomic memory intrinsics (NFC)

Summary:
These tests show that DSE currently does nothing with the atomic memory
intrinsics. Future work will teach DSE how to simplify these.

llvm-svn: 329845

6 years agoFix a thinko in CommandObjectMemoryRegion.
Jim Ingham [Wed, 11 Apr 2018 19:27:03 +0000 (19:27 +0000)]
Fix a thinko in CommandObjectMemoryRegion.

Don't try to read the first argument till you've checked
that there is one.

llvm-svn: 329844

6 years ago[OPENMP] Code cleanup, NFC.
Alexey Bataev [Wed, 11 Apr 2018 19:21:00 +0000 (19:21 +0000)]
[OPENMP] Code cleanup, NFC.

llvm-svn: 329843

6 years ago[sanitizer] Correct name length computation for some Fuchsia vmos
Kostya Kortchinsky [Wed, 11 Apr 2018 18:55:26 +0000 (18:55 +0000)]
[sanitizer] Correct name length computation for some Fuchsia vmos

Summary:
This was missed during the review of D38595, but the vmo name size computation
should use internal_strlen, not sizeof, otherwise we end up with 7 character
names.

Reviewers: mcgrathr, flowerhack

Reviewed By: mcgrathr

Subscribers: kubamracek, delcypher, #sanitizers, llvm-commits

Differential Revision: https://reviews.llvm.org/D45525

llvm-svn: 329842

6 years agoRename to match an LLVM change
David Blaikie [Wed, 11 Apr 2018 18:49:41 +0000 (18:49 +0000)]
Rename to match an LLVM change

llvm-svn: 329841

6 years agoRename *CommandFlags.def to *CommandFlags.inc
David Blaikie [Wed, 11 Apr 2018 18:49:37 +0000 (18:49 +0000)]
Rename *CommandFlags.def to *CommandFlags.inc

These aren't the .def style files used in LLVM that require a macro
defined before their inclusion - they're just basic non-modular includes
to stamp out command line flag variables.

llvm-svn: 329840

6 years ago[DSE] Regenerate tests with update_test_checks.py (NFC)
Daniel Neilson [Wed, 11 Apr 2018 18:43:10 +0000 (18:43 +0000)]
[DSE] Regenerate tests with update_test_checks.py (NFC)

Summary:
In preparation for a future commit, this regenerates the test checks for
test/Transforms/DeadStoreElimination/OverwriteStoreBegin.ll
test/Transforms/DeadStoreElimination/OverwriteStoreEnd.ll

llvm-svn: 329839

6 years agoCodeGen: Don't try to canonicalize Unix-style paths in CodeView debug info.
Peter Collingbourne [Wed, 11 Apr 2018 18:24:03 +0000 (18:24 +0000)]
CodeGen: Don't try to canonicalize Unix-style paths in CodeView debug info.

Most importantly, we should not replace slashes with backslashes
because that would invalidate the path.

Differential Revision: https://reviews.llvm.org/D45473

llvm-svn: 329838

6 years ago[X86][Atom] Convert Atom scheduler model to SchedRW (PR32431)
Simon Pilgrim [Wed, 11 Apr 2018 18:23:01 +0000 (18:23 +0000)]
[X86][Atom] Convert Atom scheduler model to SchedRW (PR32431)

Atom is the only x86 target that still uses schedule itineraries, if we can remove this then we can begin the work on removing x86 itineraries. I've also found that it will help with PR36550.

I've focussed on matching the existing model as closely as possible (relying on the schedule tests), PR36895 indicated a lot of these were incorrect but we can just as easily fix these after this patch as before. Hopefully we can get llvm-exegesis to help here,

There are a few instructions that rely on itinerary scheduling (mainly push/pop/return) of multiple resource stages, but I don't think any of these are show stoppers.

There are also a few codegen changes that seem related to the post-ra scheduler acting a little differently, I haven't tracked these down but they don't seem critical.

NOTE: I don't have access to any Atom hardware, so this hasn't been tested in the wild.

Differential Revision: https://reviews.llvm.org/D45486

llvm-svn: 329837

6 years ago[CodeGen] Handle __func__ inside __finally
Shoaib Meenai [Wed, 11 Apr 2018 18:17:35 +0000 (18:17 +0000)]
[CodeGen] Handle __func__ inside __finally

When we enter a __finally block, the CGF's CurCodeDecl will be null
(because CodeGenFunction::StartFunction is given an empty GlobalDecl for
a __finally block), and so the dyn_cast here will result in an assertion
failure. Change it to dyn_cast_or_null to handle this case.

Differential Revision: https://reviews.llvm.org/D45523

llvm-svn: 329836

6 years ago[llvm-mca] Let the Scheduler notify dispatch stall events caused by the lack of sched...
Andrea Di Biagio [Wed, 11 Apr 2018 18:05:23 +0000 (18:05 +0000)]
[llvm-mca] Let the Scheduler notify dispatch stall events caused by the lack of scheduling resources.

This patch moves part of the logic that notifies dispatch stall events from the
DispatchUnit to the Scheduler.

The main goal of this patch is to remove (yet another) dependency between the
DispatchUnit and the Scheduler. Before this patch, the DispatchUnit had to know
about `Scheduler::Event` and how to classify stalls due to the lack of scheduling
resources. This patch removes that knowledge and simplifies the logic in
DispatchUnit::checkScheduler.

This is another change done in preparation for the work to fix PR36663.

No functional change intended.

llvm-svn: 329835

6 years ago[X86] Generalize X86PadShortFunction to work with TargetSchedModel
Simon Pilgrim [Wed, 11 Apr 2018 18:05:17 +0000 (18:05 +0000)]
[X86] Generalize X86PadShortFunction to work with TargetSchedModel

Pre-commit for D45486, don't rely on itinerary scheduler model to determine latencies for padding, use the generic TargetSchedModel::computeInstrLatency call.

Also, replace hard coded (atom specific) 2*uop creation per padding cycle with a version based on the scheduler model's issue width.

Differential Revision: https://reviews.llvm.org/D45486

llvm-svn: 329834

6 years ago[Documentation] Fix formatting and order in Release Notes for recent changes in moder...
Eugene Zelenko [Wed, 11 Apr 2018 18:03:57 +0000 (18:03 +0000)]
[Documentation] Fix formatting and order in Release Notes for recent changes in modernize-use-auto.

llvm-svn: 329833

6 years ago[xray] Fix OS X bots.
George Karpenkov [Wed, 11 Apr 2018 18:00:09 +0000 (18:00 +0000)]
[xray] Fix OS X bots.

OS X has "fat" executables which contain the code for all architectures.

llvm-svn: 329832

6 years ago[Target] Remove dead/commented out code. NFC.
Davide Italiano [Wed, 11 Apr 2018 17:53:02 +0000 (17:53 +0000)]
[Target] Remove dead/commented out code. NFC.

Some spring cleaning before I touch this file more extensively.

llvm-svn: 329831

6 years ago[NVPTX] Removed 'satom' feature which is no longer used.
Artem Belevich [Wed, 11 Apr 2018 17:51:33 +0000 (17:51 +0000)]
[NVPTX] Removed 'satom' feature which is no longer used.

Differential Revision: https://reviews.llvm.org/D45061

llvm-svn: 329830

6 years ago[NVPTX, CUDA] Improved feature constraints on NVPTX target builtins.
Artem Belevich [Wed, 11 Apr 2018 17:51:19 +0000 (17:51 +0000)]
[NVPTX, CUDA] Improved feature constraints on NVPTX target builtins.

When NVPTX TARGET_BUILTIN specifies sm_XX or ptxYY as required feature,
consider those features available if we're compiling for GPU >= sm_XX or have
enabled PTX version >= ptxYY.

Differential Revision: https://reviews.llvm.org/D45061

llvm-svn: 329829

6 years agoRevert "[cmake] Remove duplicate command line options from build"
Aaron Smith [Wed, 11 Apr 2018 17:31:18 +0000 (17:31 +0000)]
Revert "[cmake] Remove duplicate command line options from build"

The Android sanitizer buildbot is failing with this change and it
looks like an additional change to cmake is necessary to fix the
build. Reverting this change for now.

llvm-svn: 329828

6 years agoDocument -std= values for different languages
Dimitry Andric [Wed, 11 Apr 2018 17:21:52 +0000 (17:21 +0000)]
Document -std= values for different languages

Summary:
After a remark on a FreeBSD mailing list that the clang man page did
not have any list of possible values for the `-std=` flag, I have now
attempted to exhaustively list those, for each available language.

I also documented the default standard for each language, if there was
more than one choice.

Reviewers: rsmith, dexonsmith, sylvestre.ledru, mgorny

Reviewed By: rsmith

Subscribers: fhahn, emaste, cfe-commits, krytarowski

Differential Revision: https://reviews.llvm.org/D45406

llvm-svn: 329827

6 years ago[AMDGPU] Ensure there are enough registers for wave dispatch
Tim Renouf [Wed, 11 Apr 2018 17:18:36 +0000 (17:18 +0000)]
[AMDGPU] Ensure there are enough registers for wave dispatch

Summary:
This fixes the number of SGPRs and VGPRs in the *_RSRC1 register to
allow for registers set up in wave dispatch, even if those registers are
not used in the shader.

Re-landed after noticing that the buildbot failure from 329808 seemed to
be unrelated.

Subscribers: arsenm, kzhuravl, wdng, nhaehnle, yaxunl, dstuttard, t-tye, llvm-commits

Differential Revision: https://reviews.llvm.org/D45503

Change-Id: I6575f0e0d2a528d1319d0b289f0ebe4510fa5771
llvm-svn: 329826

6 years agoRevert r327216 'Add isl operator overloads for isl::pw_aff'
Tobias Grosser [Wed, 11 Apr 2018 16:58:08 +0000 (16:58 +0000)]
Revert r327216 'Add isl operator overloads for isl::pw_aff'

This commit requires further discussions.

llvm-svn: 329825

6 years ago[DSE] Regenerate tests with update_test_checks.py (NFC)
Daniel Neilson [Wed, 11 Apr 2018 16:50:04 +0000 (16:50 +0000)]
[DSE] Regenerate tests with update_test_checks.py (NFC)

Summary:
In preparation for a future commit, this regenerates the test checks for
test/Transforms/DeadStoreElimination/simple.ll
test/Transforms/DeadStoreElimination/memintrinsics.ll

llvm-svn: 329824

6 years agobpf: accept all asm register names
Yonghong Song [Wed, 11 Apr 2018 16:08:00 +0000 (16:08 +0000)]
bpf: accept all asm register names

Sometimes when people compile bpf programs with
"clang ... -target bpf ...", the kernel header
files may contain host arch inline assembly codes
as in the patch https://patchwork.kernel.org/patch/10119683/
by Arnaldo Carvaldo de Melo.

The current workaround in the above patch
is to guard the inline assembly with "#ifndef __BPF__"
marco. So when __BPF__ is defined, these macros will
have no use.

Such a method is not extensible. As a matter of fact,
most of these inline assembly codes will be thrown away
at the end of clang compilation.

So for bpf target, this patch accepts all asm register
names in clang AST stage. The name will be checked
again during llc code generation if the inline assembly
code is indeed for bpf programs.

With this patch, the above "#ifndef __BPF__" is not needed
any more in https://patchwork.kernel.org/patch/10119683/.

Signed-off-by: Yonghong Song <yhs@fb.com>
llvm-svn: 329823

6 years ago[FastISel] Disable local value sinking by default
Reid Kleckner [Wed, 11 Apr 2018 16:03:07 +0000 (16:03 +0000)]
[FastISel] Disable local value sinking by default

This is causing compilation timeouts on code with long sequences of
local values and calls (i.e. foo(1); foo(2); foo(3); ...).  It turns out
that code coverage instrumentation is a great way to create sequences
like this, which how our users ran into the issue in practice.

Intel has a tool that detects these kinds of non-linear compile time
issues, and Andy Kaylor reported it as PR37010.

The current sinking code scans the whole basic block once per local
value sink, which happens before emitting each call. In theory, local
values should only be introduced to be used by instructions between the
current flush point and the last flush point, so we should only need to
scan those instructions.

llvm-svn: 329822

6 years ago[InstCombine] limit X - (cast(-Y) --> X + cast(Y) with hasOneUse()
Sanjay Patel [Wed, 11 Apr 2018 15:57:18 +0000 (15:57 +0000)]
[InstCombine] limit X - (cast(-Y) --> X + cast(Y) with hasOneUse()

llvm-svn: 329821

6 years ago[DWARFv5] Fuss with asm syntax for conveying MD5 checksum.
Paul Robinson [Wed, 11 Apr 2018 15:14:05 +0000 (15:14 +0000)]
[DWARFv5] Fuss with asm syntax for conveying MD5 checksum.

Previously the MD5 option of the .file directive provided the checksum
as a quoted hex string; now it's a normal hex number with 0x prefix,
same as the .octa directive accepts.

Differential Revision: https://reviews.llvm.org/D45459

llvm-svn: 329820

6 years ago[MIPS GlobalISel] Select add i32, i32
Petar Jovanovic [Wed, 11 Apr 2018 15:12:32 +0000 (15:12 +0000)]
[MIPS GlobalISel] Select add i32, i32

Add the minimal support necessary to lower a function that returns the
sum of two i32 values.
Support argument/return lowering of i32 values through registers only.
Add tablegen for regbankselect and instructionselect.

Patch by Petar Avramovic.

Differential Revision: https://reviews.llvm.org/D44304

llvm-svn: 329819

6 years ago[SLP] update a test case. NFC.
Haicheng Wu [Wed, 11 Apr 2018 15:09:49 +0000 (15:09 +0000)]
[SLP] update a test case. NFC.

llvm-svn: 329818

6 years ago[cmake] Remove duplicate command line options from build
Aaron Smith [Wed, 11 Apr 2018 14:56:35 +0000 (14:56 +0000)]
[cmake] Remove duplicate command line options from build

CMAKE_CXX_FLAGS was added twice to the command line. This causes the command
line options to be doubled which works until it doesn't as not all options
can be specified twice.

For example,

clang-cl foo.c /GS- /GS- -mllvm -small-loop-cost=1 -mllvm -small-loop-cost=1
clang (LLVM option parsing): for the -small-loop-cost option: may only occur zero or one times!

llvm-svn: 329817

6 years agoFix bugs around handling C++11 attributes.
Manuel Klimek [Wed, 11 Apr 2018 14:51:54 +0000 (14:51 +0000)]
Fix bugs around handling C++11 attributes.

Previously, we would format:
  int a() { ... }
  [[unused]] int b() { ... }
as...
  int a() {} [[unused] int b() {}
Now we correctly format each on its own line.

Similarly, we would detect:
  [[unused]] int b() { return 42; }
As a lambda and leave it on a single line, even if that was disallowed
by the format style.

llvm-svn: 329816

6 years ago[AMDGPU] Fix lowering enqueue_kernel
Yaxun Liu [Wed, 11 Apr 2018 14:46:15 +0000 (14:46 +0000)]
[AMDGPU] Fix lowering enqueue_kernel

Two issues were fixed:

runtime has difficulty to allocate memory for an external symbol of a
kernel and set the address of the external symbol, therefore make the runtime
handle of an enqueued kernel an ordinary global variable. Runtime only needs
to store the address of the loaded kernel to the handle and has verified
that this approach works.

handle the situation where __enqueue_kernel* gets inlined therefore
the enqueued kernel may be used through a constant expr instead
of an instruction.

Differential Revision: https://reviews.llvm.org/D45187

llvm-svn: 329815

6 years ago[NEON] Support vfma_n and vfms_n intrinsics
Ivan A. Kosarev [Wed, 11 Apr 2018 14:43:11 +0000 (14:43 +0000)]
[NEON] Support vfma_n and vfms_n intrinsics

Differential Revision: https://reviews.llvm.org/D45483

llvm-svn: 329814

6 years ago[clang-apply-replacements] Convert tooling::Replacements to tooling::AtomicChange...
Malcolm Parsons [Wed, 11 Apr 2018 14:39:17 +0000 (14:39 +0000)]
[clang-apply-replacements] Convert tooling::Replacements to tooling::AtomicChange for conflict resolving of changes, code cleanup, and code formatting.

Summary:
By converting Replacements by AtomicChange, clang-apply-replacements is able like clang-tidy to automatically cleanup and format changes.
This should permits to close this ticket: https://bugs.llvm.org/show_bug.cgi?id=35051 and attempt to follow hints from https://reviews.llvm.org/D43500 comments.

Reviewers: klimek, ioeric

Reviewed By: ioeric

Subscribers: malcolm.parsons, mgorny, cfe-commits

Differential Revision: https://reviews.llvm.org/D43764

Patch by Jeremy Demeule.

llvm-svn: 329813

6 years agoRevert "[llvm-mca][CMake] Remove unused libraries from set LLVM_LINK_COMPONENTS"
Andrea Di Biagio [Wed, 11 Apr 2018 14:35:23 +0000 (14:35 +0000)]
Revert "[llvm-mca][CMake] Remove unused libraries from set LLVM_LINK_COMPONENTS"

It caused a buildbot failure (clang-ppc64le-linux-multistage - build #6424)

llvm-svn: 329812

6 years agoRevert "[AMDGPU] Ensure there are enough registers for wave dispatch"
Tim Renouf [Wed, 11 Apr 2018 14:27:41 +0000 (14:27 +0000)]
Revert "[AMDGPU] Ensure there are enough registers for wave dispatch"

This reverts 329808. That change caused a report of a failure in
test/CodeGen/MIR/AMDGPU/mir-canon-multi.mir that I didn't see. I suspect
it is an expensive-check-only error.

Change-Id: I8133f26f15e7d5ec2b09c687c12cd70e918461b0
llvm-svn: 329811

6 years ago[Driver] Don't forward -m[no-]unaligned-access options to GCC when assembling/linking
Chad Rosier [Wed, 11 Apr 2018 14:20:37 +0000 (14:20 +0000)]
[Driver] Don't forward -m[no-]unaligned-access options to GCC when assembling/linking

Differential Revision: https://reviews.llvm.org/D45092

llvm-svn: 329810

6 years ago[AArch64][AsmParser] Split index parsing from vector list.
Sander de Smalen [Wed, 11 Apr 2018 14:10:37 +0000 (14:10 +0000)]
[AArch64][AsmParser] Split index parsing from vector list.

Summary:
Place parsing of a vector index into a separate function to reduce
duplication, since the code is duplicated in both the parsing of a
Neon vector register operand and a Neon vector list.

This is patch [2/6] in a series to add assembler/disassembler support for
SVE's contiguous ST1 (scalar+imm) instructions.

Reviewers: fhahn, rengolin, javed.absar, huntergr, SjoerdMeijer, t.p.northover, echristo, evandro

Reviewed By: rengolin

Subscribers: kristof.beyls, llvm-commits

Differential Revision: https://reviews.llvm.org/D45428

llvm-svn: 329809

6 years ago[AMDGPU] Ensure there are enough registers for wave dispatch
Tim Renouf [Wed, 11 Apr 2018 14:02:41 +0000 (14:02 +0000)]
[AMDGPU] Ensure there are enough registers for wave dispatch

Summary:
This fixes the number of SGPRs and VGPRs in the *_RSRC1 register to
allow for registers set up in wave dispatch, even if those registers are
not used in the shader.

Subscribers: arsenm, kzhuravl, wdng, nhaehnle, yaxunl, dstuttard, t-tye, llvm-commits

Differential Revision: https://reviews.llvm.org/D45503

Change-Id: I6575f0e0d2a528d1319d0b289f0ebe4510fa5771
llvm-svn: 329808

6 years ago[llvm-mca][CMake] Remove unused libraries from set LLVM_LINK_COMPONENTS.
Andrea Di Biagio [Wed, 11 Apr 2018 13:52:42 +0000 (13:52 +0000)]
[llvm-mca][CMake] Remove unused libraries from set LLVM_LINK_COMPONENTS.

llvm-svn: 329807

6 years ago[X86] Add variable shuffle schedule classes
Simon Pilgrim [Wed, 11 Apr 2018 13:49:19 +0000 (13:49 +0000)]
[X86] Add variable shuffle schedule classes

Split variable index shuffles from immediate index shuffles

WriteFVarShuffle - variable 'in-lane' shuffles (VPERMILPS/VPERMIL2PS etc.)
WriteVarShuffle - variable 'in-lane' shuffles (PSHUFB/VPPERM etc.)

WriteFVarShuffle256 - variable 'cross-lane' shuffles (VPERMPS etc.)
WriteVarShuffle256 - variable 'cross-lane' shuffles (VPERMD etc.)

Differential Revision: https://reviews.llvm.org/D45404

llvm-svn: 329806

6 years ago[AArch64] Add test case for r329797
Francis Visoiu Mistrih [Wed, 11 Apr 2018 13:37:25 +0000 (13:37 +0000)]
[AArch64] Add test case for r329797

Forgot to add a test case in the previous commit.

llvm-svn: 329805

6 years ago[Sema] Fix built-in decrement operator overload resolution
Jan Korous [Wed, 11 Apr 2018 13:36:29 +0000 (13:36 +0000)]
[Sema] Fix built-in decrement operator overload resolution

C++ [over.built] p4:

"For every pair (T, VQ), where T is an arithmetic type other than bool, and VQ is either volatile or empty, there exist candidate operator functions of the form

  VQ T&      operator--(VQ T&);
  T          operator--(VQ T&, int);
"
The bool type is in position LastPromotedIntegralType in BuiltinOperatorOverloadBuilder::getArithmeticType::ArithmeticTypes, but addPlusPlusMinusMinusArithmeticOverloads() was expecting it at position 0.

Differential Revision: https://reviews.llvm.org/D44988

rdar://problem/34255516

llvm-svn: 329804

6 years agollgs: Send "rich" errors in response to vAttach packets
Pavel Labath [Wed, 11 Apr 2018 13:30:54 +0000 (13:30 +0000)]
llgs: Send "rich" errors in response to vAttach packets

There are plenty of ways attaching can go wrong. Having the server
report the exact error means we can give better feedback to the user.
(This patch does not do the second part, it only makes sure the
information is sent from the server.)

Triggering all possible error conditions in a test would prove
challenging, but there is one error that is very easy to reproduce
(attempting to attach while debugging), so I write a test based on that.

The test immediately exposed a bug where the m_send_error_strings field
was being used uninitialized (so it was sometimes true from the get-go),
so I fix that as well.

llvm-svn: 329803

6 years ago[X86][SSE] Tweak cmpps schedule test so that it works properly with just sse1
Simon Pilgrim [Wed, 11 Apr 2018 13:15:36 +0000 (13:15 +0000)]
[X86][SSE] Tweak cmpps schedule test so that it works properly with just sse1

movhps/movlps test are still broken so we can't disable sse2 yet

llvm-svn: 329802

6 years ago[AMDGPU][MC][GFX9] Added v_screen_partition_4se_b32
Dmitry Preobrazhensky [Wed, 11 Apr 2018 13:13:30 +0000 (13:13 +0000)]
[AMDGPU][MC][GFX9] Added v_screen_partition_4se_b32

See bug 36845: https://bugs.llvm.org/show_bug.cgi?id=36845

Differential Revision: https://reviews.llvm.org/D45443

Reviewers: artem.tamazov, arsenm, timcorringham
llvm-svn: 329801

6 years ago[AArch64] Fix regression after r329691
Francis Visoiu Mistrih [Wed, 11 Apr 2018 12:36:55 +0000 (12:36 +0000)]
[AArch64] Fix regression after r329691

In r329691, we would choose FP even if the offset wouldn't fit, just
because the offset is smaller than the one from BP. This made many
accesses through FP need to scavenge a register, which resulted in
slower and bigger code for no good reason.

This patch now always picks the offset that fits first, even if FP is
preferred.

llvm-svn: 329797

6 years ago[llvm-mca] Minor code cleanup. NFC
Andrea Di Biagio [Wed, 11 Apr 2018 12:31:44 +0000 (12:31 +0000)]
[llvm-mca] Minor code cleanup. NFC

llvm-svn: 329796

6 years ago[PowerPC] Option for secure plt mode
Strahinja Petrovic [Wed, 11 Apr 2018 12:24:44 +0000 (12:24 +0000)]
[PowerPC] Option for secure plt mode

This patch enables option for secure plt mode in
clang (-msecure-plt).

Differential Revision: https://reviews.llvm.org/D44921

llvm-svn: 329795

6 years ago[llvm-mca] Renamed BackendStatistics to RetireControlUnitStatistics.
Andrea Di Biagio [Wed, 11 Apr 2018 12:12:53 +0000 (12:12 +0000)]
[llvm-mca] Renamed BackendStatistics to RetireControlUnitStatistics.

Also, removed flag -verbose in favor of flag -retire-stats.

llvm-svn: 329794

6 years ago[llvm-mca] Move the logic that prints scheduler statistics from BackendStatistics...
Andrea Di Biagio [Wed, 11 Apr 2018 11:37:46 +0000 (11:37 +0000)]
[llvm-mca] Move the logic that prints scheduler statistics from BackendStatistics to its own view.

Added flag -scheduler-stats to print scheduler related statistics.

llvm-svn: 329792

6 years agoEliminate a bitwise 'not' op of 'not' min/max by inverting the min/max.
Artur Gainullin [Wed, 11 Apr 2018 10:29:37 +0000 (10:29 +0000)]
Eliminate a bitwise 'not' op of 'not' min/max by inverting the min/max.

Bitwise 'not' of the min/max could be eliminated in the pattern:

%notx = xor i32 %x, -1
%cmp1 = icmp sgt[slt/ugt/ult] i32 %notx, %y
%smax = select i1 %cmp1, i32 %notx, i32 %y
%res = xor i32 %smax, -1

https://rise4fun.com/Alive/lCN

Reviewers: spatel

Reviewed by: spatel

Subscribers: a.elovikov, llvm-commits

Differential Revision: https://reviews.llvm.org/D45317

llvm-svn: 329791

6 years ago[clang-tidy] fix buildbots from hicpp-signed-bitwise
Jonas Toth [Wed, 11 Apr 2018 10:22:25 +0000 (10:22 +0000)]
[clang-tidy] fix buildbots from hicpp-signed-bitwise

The applied patch to diagnose assignment operators introduced
breakage on some architectures. This patch tries to rectify that.

llvm-svn: 329790

6 years ago[clang-tidy] add missing assignment operations in hicpp-signed-bitwise
Jonas Toth [Wed, 11 Apr 2018 09:53:08 +0000 (09:53 +0000)]
[clang-tidy] add missing assignment operations in hicpp-signed-bitwise

This patch resolves the bug https://bugs.llvm.org/show_bug.cgi?id=36963.

- implement missing assignment operators for hicpp-signed-bitwise
- mention fix in release notes

Reviewers:
aaron.ballman, hokein, alexfh

Differential: https://reviews.llvm.org/D45414
llvm-svn: 329789

6 years ago[ARM] FP16 VSEL codegen
Sjoerd Meijer [Wed, 11 Apr 2018 09:28:04 +0000 (09:28 +0000)]
[ARM] FP16 VSEL codegen

This is a follow up of rL327695 to instruction select more variants of VSELGT
and VSELGE, for which it is necessary to custom lower SELECT.

More work is required in this area, which will be addressed soon:
- more variants need to be regression tested, but this depends on the next point.
- first LowerConstantFP need to be adjusted for fp16 values.

Differential Revision: https://reviews.llvm.org/D45205

llvm-svn: 329788

6 years ago[ELF] - Reorder local symbols.
George Rimar [Wed, 11 Apr 2018 09:24:27 +0000 (09:24 +0000)]
[ELF] - Reorder local symbols.

This fixes PR36716 (https://bugs.llvm.org/show_bug.cgi?id=36716),

Patch sorts local symbols to match the
following order: file1, local1, hidden1, file2, local2, hidden2 ...

Differential revision: https://reviews.llvm.org/D45325

llvm-svn: 329787

6 years ago[Tooling] Correct the "-std" compile command option.
Haojian Wu [Wed, 11 Apr 2018 09:18:18 +0000 (09:18 +0000)]
[Tooling] Correct the "-std" compile command option.

Summary:
"-std c++11" is not valid in compiler, we have to use "-std=c++11".

Test in vscode with this patch, code completion for header works as expected.

Reviewers: sammccall

Subscribers: cfe-commits, klimek

Differential Revision: https://reviews.llvm.org/D45512

llvm-svn: 329786

6 years ago[ELF] - Simplify. NFC.
George Rimar [Wed, 11 Apr 2018 09:03:02 +0000 (09:03 +0000)]
[ELF] - Simplify. NFC.

llvm-svn: 329785

6 years ago[Tooling] Optimize memory usage in InMemoryToolResults.
Haojian Wu [Wed, 11 Apr 2018 08:13:07 +0000 (08:13 +0000)]
[Tooling] Optimize memory usage in InMemoryToolResults.

Avoid storing duplicated "std::string"s.

clangd's global-symbol-builder takes 20+GB memory running across LLVM
repository. With this patch, the used memory is ~10GB (running on 48
threads, most of meory are AST-related).

Subscribers: klimek, cfe-commits

Differential Revision: https://reviews.llvm.org/D45479

llvm-svn: 329784

6 years ago[Build][NFC] Split off libpfm detection to a separate module.
Clement Courbet [Wed, 11 Apr 2018 07:39:00 +0000 (07:39 +0000)]
[Build][NFC] Split off libpfm detection to a separate module.

llvm-svn: 329783

6 years ago[AArch64][AsmParser] Unify code for parsing Neon/SVE vectors.
Sander de Smalen [Wed, 11 Apr 2018 07:36:10 +0000 (07:36 +0000)]
[AArch64][AsmParser] Unify code for parsing Neon/SVE vectors.

Summary:
Merged 'tryMatchVectorRegister' (specific to Neon) and
'tryParseSVERegister' into a single 'tryParseVectorRegister' function, and
created a generic 'parseVectorKind()' function that returns the #Elements
and ElementWidth of a vector suffix. This reduces the duplication of
this functionality between two the vector implementations.

This is patch [1/6] in a series to add assembler/disassembler support for
SVE's contiguous ST1 (scalar+imm) instructions.

Reviewers: fhahn, rengolin, javed.absar, huntergr, SjoerdMeijer, t.p.northover, echristo, evandro

Reviewed By: fhahn

Subscribers: tschuett, llvm-commits, kristof.beyls

Differential Revision: https://reviews.llvm.org/D45427

llvm-svn: 329782

6 years ago[llvm-exegesis] Add a flag to disable libpfm even if present.
Clement Courbet [Wed, 11 Apr 2018 07:32:43 +0000 (07:32 +0000)]
[llvm-exegesis] Add a flag to disable libpfm even if present.

Summary: Fixes PR37053.

Reviewers: uabelho, gchatelet

Subscribers: mgorny, tschuett, llvm-commits

Differential Revision: https://reviews.llvm.org/D45436

llvm-svn: 329781

6 years ago[Analyzer] SValBuilder Comparison Rearrangement (with Restrictions and Analyzer Option)
Adam Balogh [Wed, 11 Apr 2018 06:21:12 +0000 (06:21 +0000)]
[Analyzer] SValBuilder Comparison Rearrangement (with Restrictions and Analyzer Option)

Since the range-based constraint manager (default) is weak in handling comparisons where symbols are on both sides it is wise to rearrange them to have symbols only on the left side. Thus e.g. A + n >= B + m becomes A - B >= m - n which enables the constraint manager to store a range m - n .. MAX_VALUE for the symbolic expression A - B. This can be used later to check whether e.g. A + k == B + l can be true, which is also rearranged to A - B == l - k so the constraint manager can check whether l - k is in the range (thus greater than or equal to m - n).

The restriction in this version is the the rearrangement happens only if both the symbols and the concrete integers are within the range [min/4 .. max/4] where min and max are the minimal and maximal values of their type.

The rearrangement is not enabled by default. It has to be enabled by using -analyzer-config aggressive-relational-comparison-simplification=true.

Co-author of this patch is Artem Dergachev (NoQ).

Differential Revision: https://reviews.llvm.org/D41938

llvm-svn: 329780

6 years agoAdding fuzzer flags support to OpenBSD driver
Dean Michael Berris [Wed, 11 Apr 2018 05:40:47 +0000 (05:40 +0000)]
Adding fuzzer flags support to OpenBSD driver

Summary: - Following-up the sanitizer's part commit https://reviews.llvm.org/rCRT329631, we enable fuzzer flags.

Reviewers: brad, thakis, dberris

Reviewed By: dberris

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D44878

llvm-svn: 329779

6 years ago[CMake][runtimes] Process common options in runtimes build
Petr Hosek [Wed, 11 Apr 2018 05:18:03 +0000 (05:18 +0000)]
[CMake][runtimes] Process common options in runtimes build

This was removed in D39932 but turned out this is actually needed
because runtimes such as compiler-rt and libc++ rely on common options
processing for setting certain flags such as -ffunction-sections and
-fdata-sections.

Differential Revision: https://reviews.llvm.org/D45507

llvm-svn: 329778

6 years ago[X86] Fix typo in intrinsic header file __mask16->__mmask16 from r329775.
Craig Topper [Wed, 11 Apr 2018 05:17:14 +0000 (05:17 +0000)]
[X86] Fix typo in intrinsic header file __mask16->__mmask16 from r329775.

llvm-svn: 329777

6 years ago[XRay][compiler-rt] Fix osx-based builds
Dean Michael Berris [Wed, 11 Apr 2018 05:16:11 +0000 (05:16 +0000)]
[XRay][compiler-rt] Fix osx-based builds

This is a follow-up to D45474.

llvm-svn: 329776

6 years ago[X86] Replace 512-bit masked pmaddubsw and pmaddwd intrinsic with unmasked intrinsic...
Craig Topper [Wed, 11 Apr 2018 04:55:10 +0000 (04:55 +0000)]
[X86] Replace 512-bit masked pmaddubsw and pmaddwd intrinsic with unmasked intrinsic and a select.

This makes it consistent with the 128/256-bit functions.

Someday maybe we'll have all the masking moved to selects.

llvm-svn: 329775

6 years ago[X86] Remove 128/256-bit masked pmaddubsw and pmaddwd intrinsics. Replace 512-bit...
Craig Topper [Wed, 11 Apr 2018 04:55:04 +0000 (04:55 +0000)]
[X86] Remove 128/256-bit masked pmaddubsw and pmaddwd intrinsics. Replace 512-bit masked intrinsic with unmasked intrinsic and a select.

The 128/256-bit versions were no longer used by clang. It uses the legacy SSE/AVX2 version and a select. The 512-bit was changed to the same for consistency.

llvm-svn: 329774

6 years ago[XRay][clang] Only enable test for supported platforms
Dean Michael Berris [Wed, 11 Apr 2018 01:47:40 +0000 (01:47 +0000)]
[XRay][clang] Only enable test for supported platforms

This is a follow-up to D45474.

llvm-svn: 329773

6 years ago[XRay][clang+compiler-rt] Support build-time mode selection
Dean Michael Berris [Wed, 11 Apr 2018 01:28:25 +0000 (01:28 +0000)]
[XRay][clang+compiler-rt] Support build-time mode selection

Summary:
This patch implements the `-fxray-modes=` flag which allows users
building with XRay instrumentation to decide which modes to pre-package
into the binary being linked. The default is the status quo, which will
link all the available modes.

For this to work we're also breaking apart the mode implementations
(xray-fdr and xray-basic) from the main xray runtime. This gives more
granular control of which modes are pre-packaged, and picked from
clang's invocation.

This fixes llvm.org/PR37066.

Note that in the future, we may change the default for clang to only
contain the profiling implementation under development in D44620, when
that implementation is ready.

Reviewers: echristo, eizan, chandlerc

Reviewed By: echristo

Subscribers: mgorny, mgrang, cfe-commits, llvm-commits

Differential Revision: https://reviews.llvm.org/D45474

llvm-svn: 329772

6 years ago[X86] In X86FlagsCopyLowering, when rewriting a memory setcc we need to emit an expli...
Craig Topper [Wed, 11 Apr 2018 01:09:10 +0000 (01:09 +0000)]
[X86] In X86FlagsCopyLowering, when rewriting a memory setcc we need to emit an explicit MOV8mr instruction.

Previously the code only knew how to handle setcc to a register.

This should fix a crash in the chromium build.

llvm-svn: 329771

6 years ago[libcxx] Set ABI version 2 as default for Fuchsia
Petr Hosek [Wed, 11 Apr 2018 01:06:28 +0000 (01:06 +0000)]
[libcxx] Set ABI version 2 as default for Fuchsia

This avoids the need for a custom generated config file which is desired
because the custom config files differs per-target which means we cannot
reuse headers across different targets.

Differential Revision: https://reviews.llvm.org/D45304

llvm-svn: 329770

6 years ago[X86] Switch a test from grep to FileCheck. NFC
Craig Topper [Wed, 11 Apr 2018 01:05:32 +0000 (01:05 +0000)]
[X86] Switch a test from grep to FileCheck. NFC

llvm-svn: 329769

6 years agoSimplification of libcall like printf->puts must check for RtLibUseGOT metadata.
Sriraman Tallam [Tue, 10 Apr 2018 23:32:36 +0000 (23:32 +0000)]
Simplification of libcall like printf->puts must check for RtLibUseGOT metadata.

With -fno-plt, for example, calls to printf when getting converted to puts
still use the PLT. This patch checks for the metadata "RtLibUseGOT" and
annotates the declaration with the right attributes.

Differential Revision: https://reviews.llvm.org/D45180

llvm-svn: 329768

6 years agoUse contains_lower() instead of find_lower() != StringRef::npos. NFC.
Rui Ueyama [Tue, 10 Apr 2018 22:58:08 +0000 (22:58 +0000)]
Use contains_lower() instead of find_lower() != StringRef::npos. NFC.

llvm-svn: 329767

6 years ago[AST] Fix some Clang-tidy modernize-use-auto and Include What You Use warnings; other...
Eugene Zelenko [Tue, 10 Apr 2018 22:54:42 +0000 (22:54 +0000)]
[AST] Fix some Clang-tidy modernize-use-auto and Include What You Use warnings; other minor fixes (NFC).

llvm-svn: 329766

6 years agoGOTPCREL references must always use RIP.
Sriraman Tallam [Tue, 10 Apr 2018 22:50:05 +0000 (22:50 +0000)]
GOTPCREL references must always use RIP.

With -fno-plt, global value references can use GOTPCREL and RIP must be used.

Differential Revision: https://reviews.llvm.org/D45460

llvm-svn: 329765

6 years agoAMDGPU: enable 128-bit for local addr space under an option
Marek Olsak [Tue, 10 Apr 2018 22:48:23 +0000 (22:48 +0000)]
AMDGPU: enable 128-bit for local addr space under an option

Author: Samuel Pitoiset

ds_read_b128 and ds_write_b128 have been recently enabled
under the amdgpu-ds128 option because the performance benefit
is unclear.

Though, using 128-bit loads/stores for the local address space
appears to introduce regressions in tessellation shaders. Not
sure what is broken, but as ds_read_b128/ds_write_b128 are not
enabled by default, just introduce a global option and enable
128-bit only if requested (until it's fixed/used correctly).

v2: - fix regressions in merge-stores.ll and multiple_tails.ll

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105464
llvm-svn: 329764

6 years agoDisable flaky tests till they get fixed.
Galina Kistanova [Tue, 10 Apr 2018 22:07:29 +0000 (22:07 +0000)]
Disable flaky tests till they get fixed.

llvm-svn: 329763

6 years agoIntroduce a new builtin, __builtin_dump_struct, that is useful for dumping structure...
Aaron Ballman [Tue, 10 Apr 2018 21:58:13 +0000 (21:58 +0000)]
Introduce a new builtin, __builtin_dump_struct, that is useful for dumping structure contents at runtime in circumstances where debuggers may not be easily available (such as in kernel work).

Patch by Paul Semel.

llvm-svn: 329762

6 years ago[AArch64][Falkor] Fix bug in Falkor HWPF collision avoidance pass.
Geoff Berry [Tue, 10 Apr 2018 21:43:03 +0000 (21:43 +0000)]
[AArch64][Falkor] Fix bug in Falkor HWPF collision avoidance pass.

Summary:
When inserting MOVs to avoid Falkor HWPF collisions, the non-base
register operand of load instructions (e.g. a register offset) was not
being considered live, so it could potentially have been used as a
scratch register, clobbering the actual offset value.

Reviewers: mcrosier

Subscribers: rengolin, javed.absar, kristof.beyls, llvm-commits

Differential Revision: https://reviews.llvm.org/D45502

llvm-svn: 329761

6 years agoRevert "Handle the default case"
Petr Hosek [Tue, 10 Apr 2018 21:29:18 +0000 (21:29 +0000)]
Revert "Handle the default case"

This reverts commit r329758.

llvm-svn: 329760

6 years ago[clang-tidy] Add a `android-comparison-in-temp-failure-retry` check
George Burgess IV [Tue, 10 Apr 2018 21:22:22 +0000 (21:22 +0000)]
[clang-tidy] Add a `android-comparison-in-temp-failure-retry` check

This check attempts to catch buggy uses of the `TEMP_FAILURE_RETRY`
macro, which is provided by both Bionic and glibc.

Differential Revision: https://reviews.llvm.org/D45059

llvm-svn: 329759

6 years agoHandle the default case
Petr Hosek [Tue, 10 Apr 2018 21:19:05 +0000 (21:19 +0000)]
Handle the default case

This was omitted in D45422 resulting in a warning.

Differential Revision: https://reviews.llvm.org/D45499

llvm-svn: 329758

6 years agoDon't warn on ICFed symbols, warn on synthetic ones.
Rafael Espindola [Tue, 10 Apr 2018 21:13:52 +0000 (21:13 +0000)]
Don't warn on ICFed symbols, warn on synthetic ones.

Based on a patch for the ICF warning by Rui.

llvm-svn: 329757

6 years ago[clang-tidy] Unbreak run-clang-tidy.cpp test (modernize-use-auto.MinTypeNameLength)
Roman Lebedev [Tue, 10 Apr 2018 20:59:27 +0000 (20:59 +0000)]
[clang-tidy] Unbreak run-clang-tidy.cpp test (modernize-use-auto.MinTypeNameLength)

Again, refs. D45405, rL329730.

llvm-svn: 329756

6 years ago[CVP] simplify phi with constant incoming values that match common variable edge...
Sanjay Patel [Tue, 10 Apr 2018 20:42:39 +0000 (20:42 +0000)]
[CVP] simplify phi with constant incoming values that match common variable edge values

This is based on an example that was recently posted on llvm-dev:

void *propagate_null(void* b, int* g) {
  if (!b) {
    return 0;
  }
  (*g)++;
  return b;
}

https://godbolt.org/g/xYk3qG

The original code or constant propagation in other passes has obscured the fact
that the phi can be removed completely.

Differential Revision: https://reviews.llvm.org/D45448

llvm-svn: 329755

6 years ago[Driver] Handle the default case missed in r329748.
Chad Rosier [Tue, 10 Apr 2018 20:30:16 +0000 (20:30 +0000)]
[Driver] Handle the default case missed in r329748.

Differential Revision: https://reviews.llvm.org/D45499

llvm-svn: 329754

6 years ago[Verifier] Refactor duplicate code for atomic mem intrinsic verification (NFC)
Daniel Neilson [Tue, 10 Apr 2018 20:23:50 +0000 (20:23 +0000)]
[Verifier] Refactor duplicate code for atomic mem intrinsic verification (NFC)

Summary:
The verification rules for the intrinsics for atomic memcpy, atomic memmove,
and atomic memset are basically code clones. This change merges their verification
rules into a single block to remove duplication.

llvm-svn: 329753

6 years ago[MachO] Emit Weak ReadOnlyWithRel to ConstDataSection
Steven Wu [Tue, 10 Apr 2018 20:16:35 +0000 (20:16 +0000)]
[MachO] Emit Weak ReadOnlyWithRel to ConstDataSection

Summary:
Darwin dynamic linker can handle weak symbols in ConstDataSection.
ReadonReadOnlyWithRel symbols should be emitted in ConstDataSection
instead of normal DataSection.

rdar://problem/39298457

Reviewers: dexonsmith, kledzik

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D45472

llvm-svn: 329752

6 years ago[OPENMP] Additional attributes for the pointer parameters.
Alexey Bataev [Tue, 10 Apr 2018 20:10:53 +0000 (20:10 +0000)]
[OPENMP] Additional attributes for the pointer parameters.

Added attributes for better optimization of the OpenMP code.

llvm-svn: 329751

6 years ago[clang-tidy][modernize]: don't forget to actually link to Tooling.
Roman Lebedev [Tue, 10 Apr 2018 20:07:06 +0000 (20:07 +0000)]
[clang-tidy][modernize]: don't forget to actually link to Tooling.

Fixes build for me:

[1/5] Linking CXX shared library lib/libclangTidyModernizeModule.so.7svn
FAILED: lib/libclangTidyModernizeModule.so.7svn
<...>
/usr/local/bin/ld.lld: error: undefined symbol: clang::tooling::fixit::internal::getText(clang::SourceRange, clang::ASTContext const&)
>>> referenced by UseAutoCheck.cpp
>>>               tools/clang/tools/extra/clang-tidy/modernize/CMakeFiles/clangTidyModernizeModule.dir/UseAutoCheck.cpp.o:(clang::tidy::modernize::UseAutoCheck::replaceExpr(clang::DeclStmt const*, clang::ASTContext*, llvm::function_ref<clang::QualType (clang::Expr const*)>, llvm::StringRef))

Refs. D45405, rL329730.

llvm-svn: 329750

6 years ago[clang-tidy][Fuchsia]: don't forget to actually link to Google Module.
Roman Lebedev [Tue, 10 Apr 2018 20:07:02 +0000 (20:07 +0000)]
[clang-tidy][Fuchsia]: don't forget to actually link to Google Module.

Fixes build for me:

[1/7] Linking CXX shared library lib/libclangTidyFuchsiaModule.so.7svn
FAILED: lib/libclangTidyFuchsiaModule.so.7svn
<...>
/usr/local/bin/ld.lld: error: undefined symbol: clang::tidy::google::build::UnnamedNamespaceInHeaderCheck::UnnamedNamespaceInHeaderCheck(llvm::StringRef, clang::tidy::ClangTidyContext*)
>>> referenced by FuchsiaTidyModule.cpp
>>>               tools/clang/tools/extra/clang-tidy/fuchsia/CMakeFiles/clangTidyFuchsiaModule.dir/FuchsiaTidyModule.cpp.o:(std::_Function_handler<clang::tidy::ClangTidyCheck* (llvm::StringRef, clang::tidy::ClangTidyContext*), void clang::tidy::ClangTidyCheckFactories::registerCheck<clang::tidy::google::build::UnnamedNamespaceInHeaderCheck>(llvm::StringRef)::'lambda'(llvm::StringRef, clang::tidy::ClangTidyContext*)>::_M_invoke(std::_Any_data const&, llvm::StringRef&&, clang::tidy::ClangTidyContext*&&))

Refs. D45447, rCTE329720

llvm-svn: 329749

6 years ago[Driver] Allow drivers to add multiple libc++ include paths
Petr Hosek [Tue, 10 Apr 2018 19:55:55 +0000 (19:55 +0000)]
[Driver] Allow drivers to add multiple libc++ include paths

This allows toolchain drivers to add multiple libc++ include paths akin
to libstdc++. This is useful in multiarch setup when some headers might
be in target specific include directory. There should be no functional
change.

Differential Revision: https://reviews.llvm.org/D45422

llvm-svn: 329748

6 years ago[IR] Refactor memset inst classes (NFC)
Daniel Neilson [Tue, 10 Apr 2018 19:51:44 +0000 (19:51 +0000)]
[IR] Refactor memset inst classes (NFC)

Summary:
A simple refactor to remove duplicate code in the definitions of
MemSetInst, AtomicMemSetInst, and AnyMemSetInst. Introduce a
templated base class that contains all of the methods unique to
a memset intrinsic, and derive these three classes from that.

llvm-svn: 329747

6 years agoRecommit r329716 "Add missing nullptr check before getSection() to AArch64MachObjectW...
Jessica Paquette [Tue, 10 Apr 2018 19:46:43 +0000 (19:46 +0000)]
Recommit r329716 "Add missing nullptr check before getSection() to AArch64MachObjectWriter::recordRelocation"

This commit fixes the bot failures that were coming up before with r329716.

The fix was to move the check for "isInSection()" inside of the if condition
and emit the error there instead of waiting to get past the unreachable statement.

This should work in debug and release builds now.

llvm-svn: 329746

6 years agoConvert an absolute to a group relative reference for TestOptionArgParser.cpp.
Jim Ingham [Tue, 10 Apr 2018 19:29:37 +0000 (19:29 +0000)]
Convert an absolute to a group relative reference for TestOptionArgParser.cpp.

llvm-svn: 329745