arm64: dts: qcom: sm8350: Add DISPCC node

Add the dispcc clock-controller DT node for sm8350.

Signed-off-by: Robert Foss <robert.foss@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220706154337.2026269-6-robert.foss@linaro.org

Merge branch '20220706154337.2026269-1-robert.foss@linaro.org' into arm64-for-5.20

arm64: dts: qcom: sm8450: Add description of camera clock controller

The change adds description of Qualcomm SM8450 camera clock controller.

Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220701062622.2757831-3-vladimir.zapolskiy@linaro.org

Merge branch '20220701062622.2757831-2-vladimir.zapolskiy@linaro.org' into arm64-for-5.20

dt-bindings: clock: add QCOM SM8450 camera clock bindings

The change adds device tree bindings for camera clock controller
found on SM8450 SoC.

Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220701062622.2757831-2-vladimir.zapolskiy@linaro.org

dt-bindings: clock: Add Qcom SM8350 DISPCC bindings

Add sm8350 DISPCC bindings, which are simply a symlink to the sm8250
bindings. Update the documentation with the new compatible.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Signed-off-by: Robert Foss <robert.foss@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220706154337.2026269-4-robert.foss@linaro.org

dt-bindings: clock: Add Qcom SM8350 GPUCC bindings

Add device tree bindings for graphics clock controller for
Qualcomm Technology Inc's SM8350 SoCs.

Signed-off-by: Robert Foss <robert.foss@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmityr.baryshkov@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220706154337.2026269-2-robert.foss@linaro.org

arm64: dts: qcom: msm8996: Add interconnect support

Add interconnect providers for the multiple NoCs available on the platform,
and assign interconnects used by some blocks.

Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211021132329.234942-6-y.oudjana@protonmail.com

Merge tag 'qcom-arm64-fixes-for-5.19' into arm64-for-5.20

This merges the 'qcom-arm64-fixes-for-5.19' tag into arm64-for-5.20 to
handle the merge conflict related to the header file changes in
sc7180-trogdor.

arm64: dts: qcom: sc7180-trogdor: Split out keyboard node and describe detachables

Trogdor devices that have a detachable keyboard still have a
non-detachable keyboard input device present because we include the
cros-ec-keyboard.dtsi snippet in the top-level sc7180-trogdor.dtsi file
that every variant board includes. We do this because the
keyboard-controller node also provides some buttons like the power
button and volume buttons. Unfortunately, this means we register a
keyboard input device that doesn't do anything on boards with a
detachable keyboard.

Change the node's compatible on detachables to the newly introduced
"google,cros-ec-keyb-switches" compatible to indicate that there are
only switches and no keyboard to register. Similarly, move the keyboard
include that defines the keyboard-controller node out of
sc7180-trogdor.dtsi to boards that actually have a keyboard so that the
matrix properties are not defined on boards with the switches
compatible. Future boards can either use the include approach or the
node definition approach to describe a keyboard with possible switches
or just some switches.

Cc: Benson Leung <bleung@chromium.org>
Cc: Guenter Roeck <groeck@chromium.org>
Cc: Douglas Anderson <dianders@chromium.org>
Cc: Hsin-Yi Wang <hsinyi@chromium.org>
Cc: "Joseph S. Barrera III" <joebar@chromium.org>
Signed-off-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220627212802.3593012-1-swboyd@chromium.org

arm64: dts: qcom: ipq8074: fix NAND node name

Per schema it should be nand-controller@79b0000 instead of nand@79b0000.
Fix it to match nand-controller.yaml requirements.

Signed-off-by: Robert Marko <robimarko@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220621120642.518575-1-robimarko@gmail.com

arm64: dts: qcom: msm8916: add xo clocks to rpmcc and a53pll

Both a53pll and rpmcc make use of xo as a clock parent. Add it to the
respective device nodes.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Stephan Gerhold <stephan@gerhold.net>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220620010519.1533364-1-dmitry.baryshkov@linaro.org

arm64: dts: qcom: msm8996: add second DSI interface

Add device nodes for the DSI1, second DSI interface found on
MSM8996/APQ8096 platforms. For example on db820c it is routed to the
secondary HS expansion connector.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220617103652.606250-1-dmitry.baryshkov@linaro.org

arm64: dts: qcom: add mdp_clk clock to the MDSS device

Add MDP_CLK ("core") clock to the mdss device to allow MDSS driver to
access HW_REV/etc registers.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220615135935.87381-5-dmitry.baryshkov@linaro.org

arm64: dts: qcom: sm8250: Enable per-process page tables.

This is an SMMU for the adreno gpu, and adding this compatible lets
the driver use per-fd page tables, which are required for security
between GPU clients.

Signed-off-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
[bjorn: Move arm,smmu-500 last, per Dmitry's request]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220614230136.3726047-2-emma@anholt.net

arm64: dts: qcom: msm8916-samsung-a2015: Add touchscreen pinctrl

A3, A5 and most of the Samsung phones with MSM8916 SoC use GPIO pin 13 for
touchscreen interrupts. Add touchscreen pinctrl to a2015 common dtsi.

Signed-off-by: Lin, Meng-Bo <linmengbo0689@protonmail.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220610175332.104154-1-linmengbo0689@protonmail.com

arm64: dts: qcom: msm8996: drop phy-names from HDMI device node

The HDMI driver doesn't use the phy-names to identify the PHY. Different
Qualcomm platforms have used different names for the PHY. So, we are
deprecating phy-names propertty of the HDMI device and dropping them
from existing DTs.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220609122350.3157529-15-dmitry.baryshkov@linaro.org

arm64: dts: qcom: msm8994: add required ranges to OCMEM

The OCMEM bindings require ranges property.

Fixes: 9d511d0a7926 ("arm64: dts: qcom: msm8994: Add OCMEM node")
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220607171848.535128-14-krzysztof.kozlowski@linaro.org

arm64: dts: qcom: sdm845: add dedicated IMEM and syscon compatibles

Add proper compatibles to the IMEM device node:
1. syscon to allow accessing memory from other devices,
2. dedicated compatible as required for syscon and simple-mfd nodes.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220607171848.535128-13-krzysztof.kozlowski@linaro.org

arm64: dts: qcom: sdm630: add dedicated IMEM and syscon compatibles

Add proper compatibles to the IMEM device node:
1. syscon to allow accessing memory from other devices,
2. dedicated compatible as required for syscon and simple-mfd nodes.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220607171848.535128-12-krzysztof.kozlowski@linaro.org

arm64: dts: qcom: sc7280: add simple-mfd to IMEM

The IMEM node has children (PIL) which should be instantiated with
simple-mfd.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220607171848.535128-11-krzysztof.kozlowski@linaro.org

arm64: dts: qcom: sc7180: add dedicated IMEM and syscon compatibles

Add proper compatibles to the IMEM device node:
1. syscon to allow accessing memory from other devices,
2. dedicated compatible as required for syscon and simple-mfd nodes.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220607171848.535128-10-krzysztof.kozlowski@linaro.org

arm64: dts: qcom: qcs404: add dedicated IMEM and syscon compatibles

Add proper compatibles to the IMEM device node:
1. syscon to allow accessing memory from other devices,
2. dedicated compatible as required for syscon and simple-mfd nodes.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220607171848.535128-9-krzysztof.kozlowski@linaro.org

arm64: dts: qcom: use generic sram as name for imem and ocmem nodes

According to Devicetree specification, the device nodes should be
generic, reflecting the function of the device.  The typical name for
memory regions is "sram".

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220607171848.535128-8-krzysztof.kozlowski@linaro.org

arm64: dts: qcom: sdm845-db845c: add function and color to LED nodes

Add common LED properties - the function and color - to LED nodes.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220607102931.102805-10-krzysztof.kozlowski@linaro.org

arm64: dts: qcom: sc7280-herobrine: add function to LED node

Add common LED property - the function - to LED node.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220607102931.102805-9-krzysztof.kozlowski@linaro.org

arm64: dts: qcom: sc7180-trogdor: add function to LED node

Add common LED property - the function - to LED node.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220607102931.102805-8-krzysztof.kozlowski@linaro.org

arm64: dts: qcom: qrb5165-rb5: add function and color to LED nodes

Add common LED properties - the function and color - to LED nodes.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220607102931.102805-7-krzysztof.kozlowski@linaro.org

arm64: dts: qcom: apq8016-sbc: add function and color to LED nodes

Add common LED properties - the function and color - to LED nodes.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220607102931.102805-6-krzysztof.kozlowski@linaro.org

arm64: dts: qcom: sm8250: Move qup-opp-table out of soc node

The soc node expects all the nodes to have unit addresses. The
qup-opp-table does not have that which causes warnings:

arch/arm64/boot/dts/qcom/sm8250.dtsi:916.32-933.5:
Warning (simple_bus_reg): /soc@0/qup-opp-table:
missing or empty reg/ranges property

Move the qup-opp-table out of soc node to fix these warnings

Signed-off-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
[bjorn: Rebased ontop of Krzysztof's node name update]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220606065035.553533-4-vkoul@kernel.org

arm64: dts: qcom: sm8350: Move qup-opp-tables out of soc node

The soc node expects all the nodes to have unit addresses. The
qup-opp-tables do not have that which causes warnings:

arch/arm64/boot/dts/qcom/sm8350.dtsi:640.46-657.5:
Warning (simple_bus_reg): /soc@0/qup-100mhz-opp-table:
missing or empty reg/ranges property
arch/arm64/boot/dts/qcom/sm8350.dtsi:659.46-676.5:
Warning (simple_bus_reg): /soc@0/qup-120mhz-opp-table:
missing or empty reg/ranges property

Move the qup-opp-tables out of soc node to fix these warnings

Signed-off-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
[bjorn: Rebased ontop of Krzysztof's node name update]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220606065035.553533-3-vkoul@kernel.org

arm64: dts: qcom: sm8450: rename interconnect nodes

clk-virt and mc-virt interconnect nodes were named interconnect@0 and
interconnect@1. That is incorrect as we don't have unit addresses 0/1
for these node.

This causes warning:
arch/arm64/boot/dts/qcom/sm8450.dtsi:255.27-259.4:
Warning (unit_address_vs_reg): /interconnect@0:
node has a unit name, but no reg or ranges property
arch/arm64/boot/dts/qcom/sm8450.dtsi:261.26-265.4:
Warning (unit_address_vs_reg): /interconnect@1:
node has a unit name, but no reg or ranges property
arch/arm64/boot/dts/qcom/sm8450.dtsi:255.27-259.4:
Warning (unique_unit_address_if_enabled): /interconnect@0:
duplicate unit-address (also used in node /soc@0)

Rename the nodes to interconnect-0 and interconnect-1 to fix the
warning.

Signed-off-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220606065035.553533-2-vkoul@kernel.org

arm64: dts: qcom: msm8996-xiaomi-natrium: Add support for Xiaomi Mi 5s Plus

Add the device tree for Xiaomi Mi 5s Plus (natrium).

Signed-off-by: Alec Su <ae40515@yahoo.com.tw>
Reviewed-by: Yassine Oudjana <y.oudjana@protonmail.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220606024706.22861-3-ae40515@yahoo.com.tw

dt-bindings: arm: qcom: Document xiaomi,natrium board

Document Xiaomi Mi 5s Plus (xiaomi-natrium) smartphone which is based on
Snapdragon 821 SoC.

Signed-off-by: Alec Su <ae40515@yahoo.com.tw>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220606024706.22861-2-ae40515@yahoo.com.tw

arm64: dts: qcom: ipq6018: correct QUP peripheral labels

Current QUP peripheral labels like spi_0 and i2c_0 dont really tell what is
the exact QUP HW being used as there are actually 6 identical QUP HW blocks
for UART, SPI and I2C.
For example current i2c_0 label actually points to the QUP2 I2C HW.

This style of labeling does not follow what the rest of Qualcomm SoC-s use,
for example IPQ8074 which has the identical QUP blocks.
It also makes it really hard to add the missing QUP DT nodes as there are
multiple missing.

So utilize the same style as other Qualcomm SoC-s are using and update the
CP01 DTS as its the current sole user of them.

Signed-off-by: Robert Marko <robimarko@gmail.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220604153003.55172-1-robimarko@gmail.com

arm64: dts: qcom: sm8250: use constants for audio clocks

The use of these constants was removed during merging, probably because
the patches adding those defines and the dts patches were merged through
different trees.

Re-add them to make it clear which clocks are getting used.

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220603094710.64591-2-luca.weiss@fairphone.com

arm64: dts: qcom: sdm845*: replace i2s reg with constant

Make it easier to understand what the reg in those nodes is by using the
constants provided by qcom,q6dsp-lpass-ports.h.

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220603094710.64591-1-luca.weiss@fairphone.com

arm64: dts: qcom: sm8450: Fix the IRQ trigger type for remoteproc nodes

The watchdog IRQ trigger type should be EDGE_RISING. So fix all remoteproc
nodes.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220530080842.37024-3-manivannan.sadhasivam@linaro.org

arm64: dts: qcom: msm8916: Fix typo in pronto remoteproc node

The smem-state properties for the pronto node were incorrectly labelled,
reading `qcom,state*` rather than `qcom,smem-state*`. Fix that, allowing
the stop state to be used.

Fixes: 88106096cbf8 ("ARM: dts: msm8916: Add and enable wcnss node")
Signed-off-by: Sireesh Kodali <sireeshkodali1@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220526141740.15834-3-sireeshkodali1@gmail.com

arm64: dts: qcom: msm8998-xperia: Introduce ToF sensor support

This patch adds device tree support for the VL53L0X ToF sensor
found on all Yoshino devices.

Signed-off-by: Markuss Broks <markuss.broks@gmail.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220523175344.5845-6-markuss.broks@gmail.com

arm64: dts: qcom: sc7280: Add proxy interconnect requirements for modem

Add interconnects that are required to be proxy voted upon during modem
bootup on SC7280 SoCs.

Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1652978825-5304-2-git-send-email-quic_sibis@quicinc.com

arm64: dts: qcom: sm8450: remove duplicated glink-edge interrupt

Specifying interrupts and interrupts-extended is not correct.  Keep only
the extended ones, routed towards IPCC mailbox to fix warnings like:

  sm8450-qrd.dtb: glink-edge: More than one condition true in oneOf schema:
    {'$filename': 'Documentation/devicetree/bindings/remoteproc/qcom,glink-edge.yaml',

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220517070113.18023-13-krzysztof.kozlowski@linaro.org

arm64: dts: qcom: sm8350: remove duplicated glink-edge interrupt

Specifying interrupts and interrupts-extended is not correct.  Keep only
the extended ones, routed towards IPCC mailbox to fix warnings like:

  sm8350-sony-xperia-sagami-pdx214.dtb: glink-edge: More than one condition true in oneOf schema:
    {'$filename': 'Documentation/devicetree/bindings/remoteproc/qcom,glink-edge.yaml',

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220517070113.18023-12-krzysztof.kozlowski@linaro.org

arm64: dts: qcom: sdm630: remove unneeded address/size cells in glink-edge

glink-edge node does not have children with unit addresses:

  sdm630-sony-xperia-ganges-kirin.dtb: glink-edge: '#address-cells', '#size-cells' do not match any of the regexes: 'pinctrl-[0-9]

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220517070113.18023-11-krzysztof.kozlowski@linaro.org

arm64: dts: qcom: ipq6018: add label to remoteproc node

glink-edge bindings require label:

  ipq6018-cp01-c1.dtb: glink-edge: 'label' is a required property

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220517070113.18023-10-krzysztof.kozlowski@linaro.org

arm64: dts: qcom: Remove unused 'vdda-max-microamp' & 'vdda-pll-max-microamp' properties

As Bjorn noted in [1], since the qmp phy driver doesn't
use the 'vdda-max-microamp' & 'vdda-pll-max-microamp' properties
currently, let's remove them from the dts files as well.

Otherwise, it leads to the following '$ make dtbs_check'
warning(s):

sm8350-microsoft-surface-duo2.dt.yaml: phy@1d87000:
  'vdda-max-microamp', 'vdda-pll-max-microamp' do not match any of
   the regexes: '^phy@[0-9a-f]+$', 'pinctrl-[0-9]+

If later on the driver support is added, we can add these properties
back to the dts files.

[1]. https://lore.kernel.org/linux-arm-msm/YmQhpsmiYJzR99LK@ripper/

Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Vinod Koul <vkoul@kernel.org>
Cc: Rob Herring <robh@kernel.org>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220516063155.1332683-5-bhupesh.sharma@linaro.org

arm64: dts: qcom: ipq8074: add USB power domains

Add USB power domains provided by GCC GDSCs.
Add the required #power-domain-cells to the GCC as well.

Signed-off-by: Robert Marko <robimarko@gmail.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220515210048.483898-11-robimarko@gmail.com

Merge branch '20220515210048.483898-8-robimarko@gmail.com' into arm64-for-5.20

arm64: dts: qcom: Fix 'reg-names' for sdhci nodes

Since the Qualcomm sdhci-msm device-tree binding has been converted
to yaml format, 'make dtbs_check' reports a number of issues with
ordering of 'reg-names' as various possible combinations
are possible for different qcom SoC dts files.

Fix the same by updating the offending 'dts' files.

Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Rob Herring <robh@kernel.org>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220514215424.1007718-6-bhupesh.sharma@linaro.org

arm64: dts: qcom: Fix ordering of 'clocks' & 'clock-names' for sdhci nodes

Since the Qualcomm sdhci-msm device-tree binding has been converted
to yaml format, 'make dtbs_check' reports a number of issues with
ordering of 'clocks' & 'clock-names' for sdhci nodes:

 arch/arm64/boot/dts/qcom/ipq8074-hk10-c2.dtb: sdhci@7824900:
  clock-names:0: 'iface' was expected

 arch/arm64/boot/dts/qcom/ipq8074-hk10-c2.dtb: sdhci@7824900:
  clock-names:1: 'core' was expected

 arch/arm64/boot/dts/qcom/ipq8074-hk10-c2.dtb: sdhci@7824900:
  clock-names:2: 'xo' was expected

Fix the same by updating the offending 'dts' files.

Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Rob Herring <robh@kernel.org>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220514215424.1007718-5-bhupesh.sharma@linaro.org

arm64: dts: qcom: sdm630: Fix 'interconnect-names' for sdhci nodes

Since the Qualcomm sdhci-msm device-tree binding has been converted
to yaml format, 'make dtbs_check' reports issues with
inconsistent 'interconnect-names' used for sdhci nodes.

Fix the same.

Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Rob Herring <robh@kernel.org>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220514215424.1007718-3-bhupesh.sharma@linaro.org

arm64: dts: qcom: Fix sdhci node names - use 'mmc@'

Since the Qualcomm sdhci-msm device-tree binding has been converted
to yaml format, 'make dtbs_check' reports issues with
inconsistent 'sdhci@' convention used for specifying the
sdhci nodes. The generic mmc bindings expect 'mmc@' format
instead.

Fix the same.

Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Rob Herring <robh@kernel.org>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
[bjorn: Moved non-arm64 changes to separate commit]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220514215424.1007718-2-bhupesh.sharma@linaro.org

arm64: dts: qcom: sdm630-nile: Add RGB status LED on the PM660L LPG

The entire Sony Nile and Ganges lineup utilize the first three channels
(the triled channels) of the LPG block for an RGB (battery) status and
notification indicator.

Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
[bjorn: Dropped #address/#size-cells]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220511190718.764445-4-marijn.suijten@somainline.org

arm64: dts: qcom: pm660l: Add LPG node

The Light Pulse Generator describes a hardware block responsible for
displaying colors and patterns on an RGB LED (usually used for [battery]
status and notifications), and drive PWM signals for general-purpose
(ie. backlight) LEDs.  The availability and usage of the individual
channels differ per board and is hence left for individual platform DTs
to configure.

Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
[bjorn: Dropped #address/size-cells]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220511190718.764445-3-marijn.suijten@somainline.org

arm64: dts: qcom: qcs404: fix default pinctrl settings for blsp1_spi1

The current settings refer to "blsp_spi1" function which isn't defined.
For this reason an attempt to enable blsp1_spi1 interface results in
the probe failure below:

[    3.492900] qcs404-pinctrl 1000000.pinctrl: invalid function blsp_spi1 in map table
[    3.502460] qcs404-pinctrl 1000000.pinctrl: invalid function blsp_spi1 in map table
[    3.517725] qcs404-pinctrl 1000000.pinctrl: invalid function blsp_spi1 in map table
[    3.532998] qcs404-pinctrl 1000000.pinctrl: invalid function blsp_spi1 in map table
[    3.548277] spi_qup: probe of 78b6000.spi failed with error -22

Fix this by making the functions used in qcs404.dtsi to match the contents
of drivers/pinctrl/qcom/pinctrl-qcs404.c.

Signed-off-by: Andrey Konovalov <andrey.konovalov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220611195713.131597-1-andrey.konovalov@linaro.org

arm64: dts: qcom: qrb5165-rb5: declare tri-led user leds

Qualcomm RB5 platform uses Light Pulse Generator tri-led block to drive
three green leds. Add device nodes defining those leds.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220505145102.1432670-4-dmitry.baryshkov@linaro.org

arm64: dts: qcom: pm8150l: add Light Pulse Generator device node

Add device node defining LPG/PWM block on PM8150L PMIC chip.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220505145102.1432670-3-dmitry.baryshkov@linaro.org

arm64: dts: qcom: pm8150b: add Light Pulse Generator device node

Add device node defining LPG/PWM block on PM8150B PMIC chip.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220505145102.1432670-2-dmitry.baryshkov@linaro.org

arm64: dts: qcom: align led node names with dtschema

The node names should be generic and DT schema expects certain pattern
with 'led'.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220616005333.18491-24-krzysztof.kozlowski@linaro.org

arm64: dts: qcom: sdm630-sony-xperia-nile: drop unneeded status from gpio-keys

Nodes do not need explicit status=okay.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220616005333.18491-23-krzysztof.kozlowski@linaro.org

arm64: dts: qcom: correct gpio-keys properties

gpio-keys children do not use unit addresses.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220616005333.18491-22-krzysztof.kozlowski@linaro.org

arm64: dts: qcom: align gpio-key node names with dtschema

The node names should be generic and DT schema expects certain pattern
(e.g. with key/button/switch).

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220616005333.18491-21-krzysztof.kozlowski@linaro.org

arm64: dts: qcom: adjust whitespace around '='

Fix whitespace coding style: use single space instead of tabs or
multiple spaces around '=' sign in property assignment.  No functional
changes (same DTB).

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220526204248.832139-1-krzysztof.kozlowski@linaro.org

arm64: dts: qcom: msm8998-mtp: correct board compatible

Add qcom,msm8998 SoC fallback to the board compatible.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220521164550.91115-12-krzysztof.kozlowski@linaro.org

arm64: dts: qcom: ipq6018-cp01-c1: fix Micron SPI NOR compatible

The proper compatible for Micron n25q128a11 SPI NOR flash should include
vendor-prefix.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220521164550.91115-11-krzysztof.kozlowski@linaro.org

arm64: dts: qcom: sdm630: correct QFPROM byte offsets

The NVMEM bindings expect that 'bits' property holds offset and size of
region within a byte, so it applies a constraint of <0, 7> for the
offset.  Using 25 as HSTX trim offset is within 4-byte QFPROM word, but
outside of the byte:

  sdm630-sony-xperia-nile-discovery.dtb: qfprom@780000: hstx-trim@240:bits:0:0: 25 is greater than the maximum of 7
  sdm630-sony-xperia-nile-discovery.dtb: qfprom@780000: gpu-speed-bin@41a0:bits:0:0: 21 is greater than the maximum of 7

Align the offsets to match the bindings.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220505113802.243301-6-krzysztof.kozlowski@linaro.org

arm64: dts: qcom: use dedicated QFPROM compatibles

Use dedicated compatibles for QFPROM on MSM8916, MSM8996, MSM8998,
QCS404 and SDM630 which is expected by the bindings:

  msm8996-mtp.dtb: qfprom@74000: compatible:0: 'qcom,qfprom' is not one of ['qcom,apq8064-qfprom', ...

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220505113802.243301-5-krzysztof.kozlowski@linaro.org

arm64: dts: qcom: correct SPMI WLED register range encoding

On PM660L, PMI8994 and PMI8998, the WLED has two address spaces and with
size-cells=0, they should be encoded as two separate items.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220505154702.422108-2-krzysztof.kozlowski@linaro.org

arm64: dts: qcom: add missing AOSS QMP compatible fallback

The AOSS QMP bindings expect all compatibles to be followed by fallback
"qcom,aoss-qmp" because all of these are actually compatible with each
other.  This fixes dtbs_check warnings like:

  sm8250-hdk.dtb: power-controller@c300000: compatible: ['qcom,sm8250-aoss-qmp'] is too short

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220504131923.214367-6-krzysztof.kozlowski@linaro.org

arm64: dts: qcom: sc7180: Add kingoftown dts files

Kingoftown is a trogdor-based board. These dts files are unchanged copies
from the downstream Chrome OS 5.4 kernel.

Signed-off-by: Joseph S. Barrera III <joebar@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Tested-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220625183538.v14.5.Ib62291487a664a65066d18a3e83c5428a6d2cc6c@changeid

arm64: dts: qcom: sc7180: Add pazquel dts files

Pazquel is a trogdor-based board. These dts files are unchanged copies
from the downstream Chrome OS 5.4 kernel.

Signed-off-by: Joseph S. Barrera III <joebar@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Tested-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220625183538.v14.4.I41e2c2dc12961fe000ebc4d4ef6f0bc5da1259ea@changeid

arm64: dts: qcom: sc7180: Add mrbland dts files

Mrbland is a trogdor-based board. These dts files are copies from
the downstream Chrome OS 5.4 kernel, but with downstream bits removed.

Signed-off-by: Joseph S. Barrera III <joebar@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220625183538.v14.3.I71176ebf7e5aebddb211f00e805b32c08376d1be@changeid

arm64: dts: qcom: sc7180: Add quackingstick dts files

Quackingstick is a trogdor-based board. These dts files are copies from
the downstream Chrome OS 5.4 kernel, but with downstream bits removed.

Signed-off-by: Joseph S. Barrera III <joebar@chromium.org>
Tested-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220625183538.v14.2.I0977b1a08830d0caa8bfb1bdedb4ecceac709a7f@changeid

arm64: dts: qcom: sc7180: Add wormdingler dts files

Wormdingler is a trogdor-based board, shipping to customers as the
Lenovo IdeaPad Chromebook Duet 3. These dts files are copies from
the downstream Chrome OS 5.4 kernel, but with the camera
(sc7180-trogdor-mipi-camera.dtsi) #include removed.

Signed-off-by: Joseph S. Barrera III <joebar@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Tested-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220625183538.v14.1.Id769ddc5dbf570ccb511db96da59f97d08f75a9c@changeid

arm64: dts: qcom: sc7280: Rename sar sensor labels

To ease matching configuration of sysfs attributes for particular
sensor, match label reported by iio 'label' attribute with the location
label generated by ChromeOS config tool.

Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220623223119.1858863-1-gwendal@chromium.org

arm64: dts: qcom: sc8280xp: add Lenovo Thinkpad X13s devicetree

Add an initial devicetree for the Lenovo Thinkpad X13s with support for
USB, backlight, keyboard, touchpad, touchscreen (to be verified), PMICs
and remoteprocs.

Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220622132617.24604-1-johan+linaro@kernel.org

arm64: dts: qcom: add SA8540P and ADP

Introduce the Qualcomm SA8540P automotive platform and the SA8295P ADP
development board.

The SA8540P and SC8280XP are fairly similar, so the SA8540P is built
ontop of the SC8280XP dtsi to reduce duplication. As more advanced
features are integrated this might be re-evaluated.

This initial contribution supports SMP, CPUFreq, cluster idle, UFS, RPMh
regulators, debug UART, PMICs, remoteprocs (NSPs crashes shortly after
booting) and USB.

The SA8295P ADP contains four PM8450 PMICs, which according to their
revid are compatible with PM8150. They are defined within the ADP for
now, to avoid creating additional .dtsi files for PM8150 with just
addresses changed - and to allow using the labels from the schematics.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
Link: https://lore.kernel.org/r/20220629041438.1352536-6-bjorn.andersson@linaro.org

arm64: dts: qcom: sc8280xp: Add reference device

Add basic support for the SC8280XP reference device, which allows it to
boot to a shell (using EFIFB) with functional storage (UFS), USB,
keyboard, touchpad, touchscreen, backlight and remoteprocs.

The PMICs are, per socinfo, reused from other platforms. But given that
the address of the PMICs doesn't match other cases and that it's
desirable to label things according to the schematics a new dtsi file is
created to represent the reference combination of PMICs.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
Link: https://lore.kernel.org/r/20220629041438.1352536-5-bjorn.andersson@linaro.org

dt-bindings: clock: qcom: ipq8074: add USB GDSCs

Add bindings for the USB GDSCs found in IPQ8074 GCC.

Signed-off-by: Robert Marko <robimarko@gmail.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220515210048.483898-8-robimarko@gmail.com

arm64: dts: qcom: add SC8280XP platform

Introduce initial support for the Qualcomm SC8280XP platform, aka 8cx
Gen 3. This initial contribution supports SMP, CPUfreq, CPU cluster
idling, GCC, TLMM, SMMU, RPMh regulators, power-domains and clocks,
interconnects, some QUPs, UFS, remoteprocs, USB, watchdog, LLCC and
tsens.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220629041438.1352536-4-bjorn.andersson@linaro.org

dt-bindings: mailbox: qcom-ipcc: Add NSP1 client

Add a client for the NSP1 found in some recent Qualcomm platforms.

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220629041438.1352536-3-bjorn.andersson@linaro.org

dt-bindings: arm: qcom: Document additional sc8280xp devices

Add the CRD (Compute Reference Design?) and the Lenovo Thinkpad X13s to
the valid device compatibles found on the sc8280xp platform.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
Link: https://lore.kernel.org/r/20220629041438.1352536-2-bjorn.andersson@linaro.org

arm64: dts: qcom: sm8450: Add interconnect requirements for SCM

Add interconnects requirements for the SCM interface on SM8450 SoCs.

Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1653289258-17699-4-git-send-email-quic_sibis@quicinc.com

arm64: dts: qcom: sdm660: Add initial Inforce IFC6560 board support

The IFC6560 is a board from Inforce Computing, built around the SDA660
SoC. This patch describes core clocks, some regulators from the two
PMICs, debug uart, storage, bluetooth and audio DSP remoteproc.

The regulator settings are inherited from prior work by Konrad Dybcio
and AngeloGioacchino Del Regno.

Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Co-developed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220521202708.1509308-12-dmitry.baryshkov@linaro.org

dt-bindings: arm: qcom: document sda660 SoC and ifc6560 board

Add binding documentation for the Inforce IFC6560 board which uses
Snapdragon SDA660.

Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220521202708.1509308-11-dmitry.baryshkov@linaro.org

arm64: dts: qcom: sdm660: move SDHC2 card detect pinconf to board files

This results in dts duplication, but per mutual agreement card detect
pin configuration belongs to the board files. Move it from the SoC
dtsi to the board DT files.

Suggested-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220521202708.1509308-10-dmitry.baryshkov@linaro.org

arm64: dts: qcom: sdm636-sony-xperia-ganges-mermaid: correct sdc2 pinconf

Fix the device tree node in the &sdc2_state_on override. The sdm630 uses
'clk' rather than 'pinconf-clk'.

Fixes: 4c1d849ec047 ("arm64: dts: qcom: sdm630-xperia: Retire sdm630-sony-xperia-ganges.dtsi")
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220521202708.1509308-9-dmitry.baryshkov@linaro.org

arm64: dts: qcom: sdm630: fix gpu's interconnect path

ICC path for the GPU incorrectly states <&gnoc 1 &bimc 5>, which is
a path from SLAVE_GNOC_BIMC to SLAVE_EBI. According to the downstream
kernel sources, the GPU uses MASTER_OXILI here, which is equivalent to
<&bimc 1 ...>.

While we are at it, use defined names instead of the numbers for this
interconnect path.

Fixes: 5cf69dcbec8b ("arm64: dts: qcom: sdm630: Add Adreno 508 GPU configuration")
Reported-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220521202708.1509308-8-dmitry.baryshkov@linaro.org

arm64: dts: qcom: sdm630: add second (HS) USB host support

Add DT entries for the second DWC3 USB host, which is limited to the
USB2.0 (HighSpeed), and the corresponding QUSB PHY.

Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220521202708.1509308-7-dmitry.baryshkov@linaro.org

arm64: dts: qcom: sdm630: rename qusb2phy to qusb2phy0

In preparation to adding second USB host/PHY pair, change first USB
PHY's label to qusb2phy0.

Suggested-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220521202708.1509308-6-dmitry.baryshkov@linaro.org

arm64: dts: qcom: sdm630: fix the qusb2phy ref clock

According to the downstram DT file, the qusb2phy ref clock should be
GCC_RX0_USB2_CLKREF_CLK, not GCC_RX1_USB2_CLKREF_CLK.

Fixes: c65a4ed2ea8b ("arm64: dts: qcom: sdm630: Add USB configuration")
Cc: Konrad Dybcio <konrad.dybcio@somainline.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220521202708.1509308-5-dmitry.baryshkov@linaro.org

arm64: dts: qcom: sdm630: disable GPU by default

The SoC's device tree file disables gpucc and adreno's SMMU by default.
So let's disable the GPU too. Moreover it looks like SMMU might be not
usable without additional patches (which means that GPU is unusable
too). No board uses GPU at this moment.

Fixes: 5cf69dcbec8b ("arm64: dts: qcom: sdm630: Add Adreno 508 GPU configuration")
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220521202708.1509308-4-dmitry.baryshkov@linaro.org

arm64: dts: qcom: sdm660: disable dsi1/dsi1_phy by default

Follow the typical practice and keep DSI1/DSI1 PHY disabled by default.
They should be enabled in the board DT files. No existing boards use
them at this moment.

Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220521202708.1509308-3-dmitry.baryshkov@linaro.org

arm64: dts: qcom: sdm630: disable dsi0/dsi0_phy by default

Follow the typical practice and keep DSI0/DSI0 PHY disabled by default.
They should be enabled in the board DT files. No existing boards use
them at this moment.

Suggested-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220521202708.1509308-2-dmitry.baryshkov@linaro.org

arm64: dts: qcom: correct interrupt controller on PM8916 and PMS405

The PM8916 and PMS405 PMIC GPIOs are interrupt controllers, as described
in the bindings and used by the driver.  Drop the interrupts (apparently
copied from downstream tree), just like in commit 61d2ca503d0b ("arm64:
dts: qcom: fix pm8150 gpio interrupts"):

  qcs404-evb-4000.dtb: gpio@c000: 'interrupts' does not match any of the regexes: '-state$', 'pinctrl-[0-9]+'
  qcs404-evb-4000.dtb: gpio@c000: 'interrupt-controller' is a required property

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220508135932.132378-4-krzysztof.kozlowski@linaro.org

arm64: dts: qcom: add missing gpio-ranges in PMIC GPIOs

The new Qualcomm PMIC GPIO bindings require gpio-ranges property:

  sm8250-sony-xperia-edo-pdx203.dtb: gpio@c000: 'gpio-ranges' is a required property

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220508135932.132378-3-krzysztof.kozlowski@linaro.org

arm64: dts: qcom: sdm630: order interrupts according to bindings

The CAMSS DTSI device node, which came after the bindings were merged,
got the interrupts ordered differently then specified in the bindings:

  sdm630-sony-xperia-nile-pioneer.dtb: camss@ca00000: interrupt-names:0: 'csid0' was expected

Reordering them to match bindings should not cause ABI issues, because
the driver relies on names, not ordering.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220509144714.144154-4-krzysztof.kozlowski@linaro.org

arm64: dts: qcom: sdm630: order regs according to bindings

The CAMSS DTSI device node, which came after the bindings were merged,
got the regs ordered differently then specified in the bindings:

  sdm636-sony-xperia-ganges-mermaid.dtb: camss@ca00000: reg-names:0: 'csi_clk_mux' was expected

Reordering them to match bindings should not cause ABI issues, because
the driver relies on names, not ordering.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220509144714.144154-3-krzysztof.kozlowski@linaro.org

arm64: dts: qcom: sdm630: order clocks according to bindings

The CAMSS DTSI device node, which came after the bindings were merged,
got the clocks ordered differently then specified in the bindings:

  sdm636-sony-xperia-ganges-mermaid.dtb: camss@ca00000: reg-names:4: 'csid3' was expected

Reordering them to match bindings should not cause ABI issues, because
the driver relies on names, not ordering.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220509144714.144154-2-krzysztof.kozlowski@linaro.org

arm64: dts: qcom: msm8994-msft-lumia-octagon: add PM8994 pin properties

The bindings require that every pin configuration comes with 'function'
property.  There is also no 'drive-strength' property but
'qcom,drive-strength':

  msm8994-msft-lumia-octagon-cityman.dtb: gpios@c000: amsel-high-state: 'oneOf' conditional failed, one must be fixed:
    'drive-strength' does not match any of the regexes: 'pinctrl-[0-9]+'
    'bias-pull-up', 'drive-strength', 'function', 'pins' do not match any of the regexes: '(pinconf|-pins)$', 'pinctrl-[0-9]+'

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220507194913.261121-9-krzysztof.kozlowski@linaro.org