AKASHI Takahiro [Wed, 9 Feb 2022 08:24:23 +0000 (17:24 +0900)]
CI: enforce packages upgrade for Msys2 on Windows
We need to install libgnutls-devel package to build the host tool,
mkeficapsule, and as of now, there seems to be a depencency conflict
in the current msys2 installer;
:: installing libp11-kit (0.24.1-1) breaks dependency \
'libp11-kit=0.23.22' required by p11-kit
To resolve this conflict, however, the initial "pacman -Syyuu" in
'tools_only_windows' job is not enough. Another "pacman -Su" will
enforce all the out-of-date packages being upgraded.
(Probably the first "-Syyuu" can be changed to "-Syu".)
See the installation steps in
https://www.msys2.org/
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Tom Rini [Thu, 10 Feb 2022 22:38:04 +0000 (17:38 -0500)]
Merge branch '2022-02-10-platform-updates'
- Assorted Apple M1 platform updates
- Drop CONFIG_SYS_RESET_ADDR, update k3-am64-sk memory values in dts
Sinthu Raja [Mon, 29 Nov 2021 12:04:49 +0000 (17:34 +0530)]
arm:dts:k3-am64-sk: EMIF tool update to 0.8.0 with 1333MTs for lpddr4
EMIF tool for AM64 SK is now updated to 0.8.0 that includes
* disabled Write DQ training
* improve CA ODT to 60 ohms
The lpddr4 enabled with periodic WDQ training is causing periodic 26us
stall. This makes the SoC stall without doing anything which leads to
R5 interrupt latency in TCM memory. Due to this periodic training there
are some outstanding CPU transactions waiting for the lpddr4 to complete.
Hence, disable the periodic write DQ training during the
non-initialization stage of lpddr4 which results in an approximate 1us
stall. Also, update the lpddr4 config to improve CA ODT by 60 ohms
The rationales are as follows:
- PI_WDQLVL_EN: 2 Bits register field to support write DQ leveling,
disable bit 1 that supports Write DQ during non-initialization to
avoid ~26us stall during code execution.
- MR11_DATA_F1/F2_x register fields value changed to 0x66 that changes
the CA ODT from 48ohm to 60ohm to improve the eye margin on CA bus by
increasing the signal swing.
Signed-off-by: James Doublesin <doublesin@ti.com>
Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
Mark Kettenis [Sun, 6 Feb 2022 12:21:14 +0000 (13:21 +0100)]
apple: Fix debug uart clock rate
The clock rate for the serial console on Apple M1 systems is 24 MHz
instead of 240 kHz.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Ovidiu Panait [Mon, 31 Jan 2022 07:20:22 +0000 (09:20 +0200)]
common: drop CONFIG_SYS_RESET_ADDR
There are no boards that define CONFIG_SYS_RESET_ADDR, so drop the
remaining comments referencing it and also the config_whitelist.txt entry.
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Acked-by: thomas@wytron.com.tw
Ovidiu Panait [Mon, 31 Jan 2022 07:20:21 +0000 (09:20 +0200)]
powerpc: mpc8xx: drop CONFIG_SYS_RESET_ADDRESS
There are no boards that define CONFIG_SYS_RESET_ADDRESS, so drop the
associated mpc8xx code that checks for it.
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Acked-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Mark Kettenis [Sun, 23 Jan 2022 15:48:13 +0000 (16:48 +0100)]
input: apple: Add support for Apple SPI keyboard
This driver adds support for the keyboard on Apple Silicon laptops.
The controller for this keyboard sits on an SPI bus and uses an
Apple-specific HID over SPI protocol. The packets sent by this
controller for key presses and key releases are fairly simple and
are decoded directly by the code in this driver and converted into
standard Linux keycodes. The same controller handles the touchpad
found on these laptops. Packets for touchpad events are simply
ignored.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested on: Macbook Air M1
Tested-by: Simon Glass <sjg@chromium.org>
Mark Kettenis [Sun, 23 Jan 2022 15:48:12 +0000 (16:48 +0100)]
spi: apple: Add driver for Apple SPI controller
Add a driver for the SPI controller integrated on Apple SoCs.
This is necessary to support the keyboard on Apple Silicon laopts
since their keyboard uses an Apple-specific HID over SPI protocol.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested on: Macbook Air M1
Tested-by: Simon Glass <sjg@chromium.org>
Mark Kettenis [Sat, 22 Jan 2022 19:38:19 +0000 (20:38 +0100)]
configs: apple: Add NVMe boot target
Add a boot target for NVMe such that we can boot from NVMe.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Mark Kettenis [Sat, 22 Jan 2022 19:38:18 +0000 (20:38 +0100)]
nvme: apple: Add driver for Apple NVMe storage controller
Add a driver for the NVMe storage controller integrated on
Apple SoCs. This NVMe controller isn't PCI based and deviates
from the NVMe standard in its implementation of the command
submission queue and the integration of an NVMMU that needs
to be managed. This commit tweaks the core NVMe code to
support the linear command submission queue implemented by
this controller. But setting up the submission queue and
managing the NVMMU controller is handled by implementing
the driver ops that were added in an earlier commit.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Tested-on: firefly-rk3399
Tested-by: Mark Kettenis <kettenis@openbsd.org>
Tested on: Macbook Air M1
Tested-by: Simon Glass <sjg@chromium.org>
Mark Kettenis [Sat, 22 Jan 2022 19:38:17 +0000 (20:38 +0100)]
power: domain: apple: Add reset support
The power management controller found on Apple SoCs als provides
a way to reset all devices within a power domain. This is needed
to cleanly shutdown the NVMe controller before we hand over
control to the OS.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested on: Macbook Air M1
Tested-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Mark Kettenis [Sat, 22 Jan 2022 19:38:16 +0000 (20:38 +0100)]
nvme: Add shutdown function
Add a function to disable the NVMe controller. This will be used
to let the driver for the NVMe storage integrated on Apple SoCs
shutdown the NVMe controller such we can shutdown the NVMe
IOP controller in a clean way afterwards before handing control
to the OS.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested on: Macbook Air M1
Tested-by: Simon Glass <sjg@chromium.org>
Mark Kettenis [Sat, 22 Jan 2022 19:38:15 +0000 (20:38 +0100)]
nvme: Introduce driver ops
The NVMe storage controller integrated on Apple SoCs deviates
from the NVMe standard in two aspects. It uses a "linear"
submission queue and it integrates an NVMMU that needs to be
programmed for each NVMe command. Introduce driver ops such
that we can set up the linear submission queue and program the
NVMMU in the driver for this strange beast.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested on: Macbook Air M1
Tested-by: Simon Glass <sjg@chromium.org>
Mark Kettenis [Sat, 22 Jan 2022 19:38:14 +0000 (20:38 +0100)]
arm: apple: Add RTKit support
Most Apple IOPs run a firmware that is based on what Apple calls
RTKit. RTKit implements a common mailbox protocol. This code
provides an implementation of the AP side of this protocol,
providing a function to initialize RTKit-based firmwares as well
as a function to do a clean shutdown of this firmware.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested on: Macbook Air M1
Tested-by: Simon Glass <sjg@chromium.org>
Mark Kettenis [Sat, 22 Jan 2022 19:38:13 +0000 (20:38 +0100)]
arm: apple: Change SoC name from "m1" into "apple"
U-Boot is expected to support multiple generations of Apple SoCs
in a single binary with a single defconfig. Therefore it makes
more sense to set SYS_SOC to "apple".
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Mark Kettenis [Sat, 22 Jan 2022 19:38:12 +0000 (20:38 +0100)]
mailbox: apple: Add driver for Apple IOP mailbox
This mailbox driver provides a communication channel with the
Apple IOP controllers found on Apple SoCs. These IOP controllers
are used to implement various functions such as the System
Manegement Controller (SMC) and NVMe storage. It allows sending
and receiving a 96-bit message over a single channel.
The header file with the struct used for mailbox messages is taken
straight from Linux.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Signed-off-by: Sven Peter <sven@svenpeter.dev>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested on: Macbook Air M1
Tested-by: Simon Glass <sjg@chromium.org>
Mark Kettenis [Sat, 22 Jan 2022 19:38:11 +0000 (20:38 +0100)]
nvme: Split out PCI support
Apple SoCs have an integrated NVMe controller that isn't connected
over a PCIe bus. In preparation for adding support for this NVMe
controller, split out the PCI support into its own file. This file
is selected through a new CONFIG_NVME_PCI Kconfig option, so do
a wholesale replacement of CONFIG_NVME with CONFIG_NVME_PCI.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested on: Macbook Air M1
Tested-by: Simon Glass <sjg@chromium.org>
Tom Rini [Thu, 10 Feb 2022 20:09:55 +0000 (15:09 -0500)]
Merge https://source.denx.de/u-boot/custodians/u-boot-riscv
Tom Rini [Thu, 10 Feb 2022 14:02:06 +0000 (09:02 -0500)]
Merge tag 'dm-pull-8feb22-take3' of https://gitlab.denx.de/u-boot/custodians/u-boot-dm
patman snake-case conversion
binman fit improvements
ACPI fixes and making MCFG available to ARM
[trini: Update scripts/pylint.base]
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Thu, 10 Feb 2022 12:37:14 +0000 (07:37 -0500)]
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvell
- kwboot: Misc improvements and fixes (Pali)
- Kirkwood: Move to DM ethernet support for some boards (Tony)
- Minor misc stuff
Tony Dinh [Wed, 9 Feb 2022 02:56:22 +0000 (18:56 -0800)]
arm: kirkwood: Pogoplug E02 : Convert Ethernet to Driver Model
The Pogoplug E02 board has the network chip Marvell 88E1116R. Convert
to Driver Model and use uclass mvgbe and the compatible driver M88E1118R
to bring up Ethernet.
- Add board_eth_init(), CONFIG_DM_ETH, and CONFIG_PHY_MARVELL
to bring up Ethernet.
- Currently, CONFIG_RESET_PHY_R symbol is used in
arch/arm/mach-kirkwood/include/mach/config.h for all Kirkwood
boards with mv8831116 PHY, with each board defines the function
reset_phy(). Undefine it for this board.
- As the result of the migration to Driver Model, this u-boot image has
grown substantially (about 100K, give or take). The old envs location
at 0x60000 (384k) is no longer possible. Move it to 0xC0000 (768K).
- Miscellaneous changes: Move constants to .c file and remove header file
board/cloudengines/pogo_e02/pogo_e02.h, use CONFIG_SYS_THUMB_BUILD to
keep u-boot image under 512K, use BIT macro, and cleanup comments.
Signed-off-by: Tony Dinh <mibodhi@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Mon, 7 Feb 2022 09:12:24 +0000 (10:12 +0100)]
tools: kwboot: Allow to use -b without image path as the last getopt() option
Currently it is possible to call "kwboot -b -t /dev/ttyUSB0" but not to
call "kwboot -b /dev/ttyUSB0".
Fix it by not trying to process the last argv[], which is non-getopt()
option (tty path) as the image path for -b.
Fixes:
c513fe47dca2 ("tools: kwboot: Allow to use option -b without image path")
Reported-by: Marcel Ziswiler <marcel@ziswiler.com>
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marcel Ziswiler <marcel@ziswiler.com>
Tested-by: Marcel Ziswiler <marcel@ziswiler.com>
Tony Dinh [Thu, 3 Feb 2022 22:32:29 +0000 (14:32 -0800)]
arm: kirkwood: Dockstar : Add DM Ethernet
The Dockstar board has the network chip Marvell 88E1116R. Convert to
Ethernet driver model, and use uclass mvgbe and the compatible driver
M88E1118R to bring up Ethernet.
- Add CONFIG_DM_ETH and associated configs.
- Add board_eth_init() to use uclass mvgbe to bring up the network.
And remove ad-hoc code.
- Add CONFIG_PHY_MARVELL to properly configure the network.
- Currently, CONFIG_RESET_PHY_R symbol is used in
arch/arm/mach-kirkwood/include/mach/config.h for all Kirkwood
boards with mv8831116 PHY, with each board defines the function
reset_phy(). Undefine it for this board.
- Miscellaneous changes: Move constants to .c file and remove
header file board/Seagate/dockstar/dockstar.h, use
CONFIG_SYS_THUMB_BUILD to keep u-boot image
under 512K, add CONFIG_HUSH_PARSER, use BIT macro, and cleanup comments.
- Note: This patch is a RESEND for a previous patch:
https://patchwork.ozlabs.org/project/uboot/patch/
20210812051854.1340-2-mibodhi@gmail.com/
Signed-off-by: Tony Dinh <mibodhi@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Thu, 3 Feb 2022 16:57:49 +0000 (17:57 +0100)]
MAINTAINERS: Update list of Armada 385 and Armada 3720 drivers
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Thu, 3 Feb 2022 16:45:20 +0000 (17:45 +0100)]
tools: kwboot: Fix detection of quit esc sequence
Quit esc sequence may be also in the middle of the read buffer.
Fix the detection for that case.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Tony Dinh [Wed, 2 Feb 2022 05:59:27 +0000 (21:59 -0800)]
arm: kirkwood: iConnect : Add Ethernet support
- Currently, CONFIG_RESET_PHY_R symbol is used in
arch/arm/mach-kirkwood/include/mach/config.h for all Kirkwood
boards with mv8831116 PHY, with each board defines the function
reset_phy(). Undefine it for this board.
- Add board_eth_init(), CONFIG_DM_ETH, and CONFIG_PHY_MARVELL
to bring up Ethernet.
- Miscellaneous changes: Move constants to .c file and remove header file
board/iomega/iconnect/iconnect.h. Add CONFIG_HUSH_PARSER, use BIT macro,
and cleanup comments.
Signed-off-by: Tony Dinh <mibodhi@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tony Dinh [Sun, 30 Jan 2022 23:02:30 +0000 (15:02 -0800)]
arm: kirkwood: Dreamplug : Use Marvell uclass mvgbe and PHY driver for Ethernet
The Globalscale Technologies Dreamplug board has the network chip
Marvell 88E1116R. Use uclass mvgbe and the compatible driver M88E1310
driver to bring up Ethernet.
- Currently, CONFIG_RESET_PHY_R symbol is used in
arch/arm/mach-kirkwood/include/mach/config.h for all Kirkwood
boards with mv8831116 PHY, with each board defines the function
reset_phy(). Undefine it for this board.
- Add board_eth_init() to use uclass mvgbe to bring up both network
port 0 and 1. And remove ad-hoc code.
- Enable CONFIG_PHY_MARVELL to properly configure the network.
- Add myself as maintainer (this board seems to be orphaned,
could not contact Jason Cooper using current email).
- Miscellaneous changes: Move constants to .c file and remove header file
board/Marvell/dreamplug/dreamplug.h, cleanup comments.
Signed-off-by: Tony Dinh <mibodhi@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Pali Rohár <pali@kernel.org>
Anup Patel [Thu, 27 Jan 2022 06:11:10 +0000 (11:41 +0530)]
doc: qemu-riscv: Update documentation for QEMU spike machine
We can now use same U-Boot images on both QEMU virt machine and QEMU
spike machine so let's update the QEMU RISC-V documentation.
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Anup Patel [Thu, 27 Jan 2022 06:11:09 +0000 (11:41 +0530)]
riscv: qemu: Implement is_flash_available() for MTD NOR
Currently, if MTD NOR is enabled then U-Boot tries to issue flash
commands even when CFI flash DT node is not present. This causes
access fault on RISC-V emulators or ISS which do not emulate CFI
flash. To handle this issue, we implement is_flash_available() for
qemu-riscv board which will return 1 only if CFI flash DT node is
present.
Fixes:
d248627f9d42 ("riscv: qemu: Enable MTD NOR flash support")
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Anup Patel [Thu, 27 Jan 2022 06:11:08 +0000 (11:41 +0530)]
riscv: qemu: Enable HTIF console support
Enable support for HTIF console so that we can use QEMU RISC-V U-Boot
on RISC-V emulators and ISS having it.
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@vrull.eu>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Anup Patel [Thu, 27 Jan 2022 06:11:07 +0000 (11:41 +0530)]
serial: Add RISC-V HTIF console driver
Quite a few RISC-V emulators and ISS (including Spike) have host
transfer interface (HTIF) based console. This patch adds HTIF
based console driver for RISC-V platforms which depends totally
on DT node for HTIF register base address.
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@vrull.eu>
Reviewed-by: Rick Chen <rick@andestech.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Alper Nebi Yasak [Mon, 7 Feb 2022 22:08:07 +0000 (01:08 +0300)]
binman: Convert FIT entry type to a subclass of Section entry type
The binman FIT entry type shares some code with the Section entry type.
This shared code is bound to grow, since FIT entries are conceptually a
variation of Section entries.
Make FIT entry type a subclass of Section entry type, simplifying it a
bit and providing us the features that Section implements. Also fix the
subentry alignment test which now attempts to write symbols to a
nonexistent SPL ELF test file by creating it first.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Avoid AddMissingProperties() and SetCalculatedProperties() with FIT:
Signed-off-by: Simon Glass <sjg@chromium.org>
Alper Nebi Yasak [Mon, 7 Feb 2022 22:08:06 +0000 (01:08 +0300)]
binman: Check missing bintools of Section subclasses
Binman can check for missing binary tools and prints warnings if
anything required for an image is missing. The implementation of this
for the Section entry only checks the subentries, presumably because
Section does not use any binary tools itself. However, this means the
check is also skipped for subclasses of Section which might need binary
tools.
Make sure missing binary tools are checked for subclasses of the Section
entry type as well, by calling the parent class' implementation in
the relevant Section method.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Alper Nebi Yasak [Mon, 7 Feb 2022 22:08:05 +0000 (01:08 +0300)]
binman: Register and check bintools from FIT subentries
Binman keeps track of binary tools each entry wants to use. The
implementation of this for the FIT entry only adds "mkimage", but not
the tools that would be used by its subentries.
Register the binary tools that FIT subentries will use in addition to
the one FIT itself uses, and check their existence by copying the
appropriate method from Section entry type. Also add tests that check if
these subentries can use and warn about binary tools.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Alper Nebi Yasak [Mon, 7 Feb 2022 22:08:04 +0000 (01:08 +0300)]
binman: Fix subentry expansion for FIT entry type
Binman tries to expand some entries into parts that make it up, e.g.
'u-boot' into a 'u-boot-expanded' section that contains 'u-boot-nodtb'
and 'u-boot-dtb'. Entries with child entries must call ExpandEntries()
on them to build a correct image, as it's possible that unexpanded child
entries have no data of their own. The FIT entry type doesn't currently
do this, which means putting a "u-boot" entry inside it doesn't work as
expected.
Implement ExpandEntries() for FIT and add a copy of a simple FIT image
test that checks subentry expansion in FIT entries.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Moritz Fischer [Sat, 5 Feb 2022 20:17:45 +0000 (12:17 -0800)]
acpi: Move MCFG implementation to common lib
MCFG tables are used on multiple arches. Move to common ACPI lib.
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Moritz Fischer <moritzf@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Use sizeof(*mcfg) instead of sizeof(*header)
Signed-off-by: Simon Glass <sjg@chromium.org>
Moritz Fischer [Sat, 5 Feb 2022 20:17:44 +0000 (12:17 -0800)]
arch: x86: lib: acpi_table: Fix MCFG entries
Commit
d953137526cc ("x86: Move SSDT table to a writer function")
introduced a bug where the actual MCFG entries are no longer generated.
Cc: Simon Glass <sjg@chromium.org>
Fixes:
d953137526cc ("x86: Move SSDT table to a writer function")
Signed-off-by: Moritz Fischer <moritzf@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Heiko Schocher [Wed, 2 Feb 2022 12:55:19 +0000 (13:55 +0100)]
serial-uclass: fix build warning
if CONFIG_DM_STDIO is defined but SERIAL_PRESENT not,
gcc drops warnings for serial_stub_* functions
that they are defined but not used.
Fix it.
Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Heiko Schocher [Wed, 2 Feb 2022 12:53:17 +0000 (13:53 +0100)]
serial: remove nulldev_serial_input
nulldev_serial_input is static and not used in this file,
so remove it.
Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sat, 29 Jan 2022 21:14:19 +0000 (14:14 -0700)]
patman: Update with new pylint scores
Update the new baseline since various scores have improved.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sat, 29 Jan 2022 21:14:18 +0000 (14:14 -0700)]
patman: Convert camel case in terminal.py
Convert this file to snake case and update all files which use it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sat, 29 Jan 2022 21:14:17 +0000 (14:14 -0700)]
patman: Rename Color() method to build()
This method has the same name as its class which is confusing. It is also
annoying when searching the code.
It builds a string with a colour, so rename it to build().
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sat, 29 Jan 2022 21:14:16 +0000 (14:14 -0700)]
patman: Rename Print() to Tprint()
Rename this function so that when we convert it to snake case it will not
conflict with the built-in print() function.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sat, 29 Jan 2022 21:14:15 +0000 (14:14 -0700)]
patman: Convert camel case in tout.py
Convert this file to snake case and update all files which use it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sat, 29 Jan 2022 21:14:14 +0000 (14:14 -0700)]
patman: Convert camel case in test_util.py
Convert this file to snake case and update all files which use it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sat, 29 Jan 2022 21:14:13 +0000 (14:14 -0700)]
patman: Convert camel case in test_checkpatch.py
Convert this file to snake case and update all files which use it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sat, 29 Jan 2022 21:14:12 +0000 (14:14 -0700)]
patman: Convert camel case in project.py
Convert this file to snake case and update all files which use it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sat, 29 Jan 2022 21:14:11 +0000 (14:14 -0700)]
patman: Convert camel case in gitutil.py
Convert this file to snake case and update all files which use it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sat, 29 Jan 2022 21:14:10 +0000 (14:14 -0700)]
patman: Convert camel case in get_maintainer.py
Convert this file to snake case and update all files which use it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sat, 29 Jan 2022 21:14:09 +0000 (14:14 -0700)]
patman: Convert camel case in func_test.py
Convert this file to snake case and update all files which use it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sat, 29 Jan 2022 21:14:08 +0000 (14:14 -0700)]
patman: Convert camel case in cros_subprocess.py
Convert this file to snake case and update all files which use it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sat, 29 Jan 2022 21:14:07 +0000 (14:14 -0700)]
patman: Convert camel case in commit.py
Convert this file to snake case and update all files which use it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sat, 29 Jan 2022 21:14:06 +0000 (14:14 -0700)]
patman: Convert camel case in checkpatch.py
Convert this file to snake case and update all files which use it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sat, 29 Jan 2022 21:14:05 +0000 (14:14 -0700)]
patman: Convert camel case in command.py
Convert this file to snake case and update all files which use it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sat, 29 Jan 2022 21:14:04 +0000 (14:14 -0700)]
patman: Convert camel case in tools.py
Convert this file to snake case and update all files which use it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Sughosh Ganu [Sat, 29 Jan 2022 19:21:08 +0000 (00:51 +0530)]
dm: Use parenthesis for the device_get_ops macro argument
Use parenthesis for the device_get_ops macro argument. This prevents
errors when using an expression for the parameter.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Heinrich Schuchardt [Fri, 28 Jan 2022 09:08:32 +0000 (10:08 +0100)]
sandbox: fix build failure with musl and SDL
sdl.c is compiled against the SDL library.
Trying to redefine wchar_t with -fshort-wchar is not necessary
and leads to build failures when compiling against musl.
Cc: Milan P. Stanić <mps@arvanta.net>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Rasmus Villemoes [Mon, 10 Jan 2022 13:34:41 +0000 (14:34 +0100)]
dts: automatically build necessary .dtb files
When building for a custom board, it is quite common to maintain a
private branch which include some defconfig and .dts files. But to
hook up those .dts files requires modifying a file "belonging" to
upstream U-Boot, the arch/*/dts/Makefile. Forward-porting that branch
to a newer upstream then often results in a conflict which, while it
is trivial to resolve by hand, makes it harder to have a CI do "try to
build our board against latest upstream".
The .config usually includes information on precisely what .dtb(s) are
needed, so to avoid having to modify the Makefile, simply add the
files in (SPL_)OF_LIST to dtb-y.
A technicality is that (SPL_)OF_LIST is not always defined, so rework
the Kconfig symbols so that (SPL_)OF_LIST is always defined (when
(SPL_)OF_CONTROL), but only prompted for in the cases which used to be
their "depends on".
nios2 and microblaze already have something like this in their
dts/Makefile, and the rationale in commit
41f59f68539 is similar to
the above. So this simply generalizes existing practice. Followup
patches could remove the logic in those two makefiles, just as there's
potential for moving some common boilerplate from all the
arch/*/dts/Makefile files to the new scripts/Makefile.dts.
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tom Rini [Wed, 9 Feb 2022 16:40:27 +0000 (11:40 -0500)]
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-mmc
- Fix an issue with fsl_esdhc_imx
- Consider GP partitions in "mmc hwpartition user enh start -"
Tom Rini [Wed, 9 Feb 2022 14:29:07 +0000 (09:29 -0500)]
Merge branch '2022-02-08-Kconfig-updates'
- Assorted general code cleanups to make sure we use the right macros
and use them correctly and buildman updates around kconfig.h itself.
- Convert some IDE and SCSI symbols to Kconfig.
- Convert CONFIG_REMAKE_ELF
- Introduce conversion deadline for DM_SCSI.
Tom Rini [Tue, 8 Feb 2022 23:50:55 +0000 (23:50 +0000)]
configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py and update
scripts/pylint.base
Signed-off-by: Tom Rini <trini@konsulko.com>
Simon Glass [Mon, 31 Jan 2022 14:49:38 +0000 (07:49 -0700)]
dm: scsi: Add a migration deadline for scsi
Very few boards remain to be migrated:
am57xx_hs_evm_usb
controlcenterdc
highbank
ls1021atsn_qspi
ls1021atsn_sdcard
ls1021atwr_sdcard_ifc_SECURE_BOOT
ls1046ardb_sdcard_SECURE_BOOT
ls1088ardb_sdcard_qspi_SECURE_BOOT
omap5_uevm
pg_wcom_expu1
pg_wcom_seli8
sandbox
sandbox64
sandbox_flattree
sandbox_noinst
sandbox_spl
tools-only
Addd a migration deadline for a year out.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Simon Glass [Mon, 31 Jan 2022 14:49:37 +0000 (07:49 -0700)]
Convert CONFIG_SCSI_AHCI_PLAT et al to Kconfig
This converts the following to Kconfig:
CONFIG_SCSI_AHCI_PLAT
CONFIG_SYS_SCSI_MAX_SCSI_ID
CONFIG_SYS_SCSI_MAX_LUN
CONFIG_SYS_SATA_MAX_DEVICE
Drop CONFIG_SCSI for everything except the sandbox build. We only need
one build for tests.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Simon Glass [Mon, 31 Jan 2022 14:49:36 +0000 (07:49 -0700)]
scsi: Drop CONFIG_SYS_SCSI_MAX_DEVICE
This is defined based on two other CONFIGs for all boards except sandbox
and durian.
For sandbox the value does not matter. For durian the value seems
excessive.
Drop the option completely, to simplify configuration and reduce the
number of things we need to convert to Kconfig.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Simon Glass [Mon, 31 Jan 2022 14:49:35 +0000 (07:49 -0700)]
ahci: Make ahci drivers depend on AHCI
At present all ahci drivers depend on AHCI except for DWC_AHCI. But no
boards enable that without also enabling AHCI:
/tools/moveconfig.py -f ~AHCI DWC_AHCI
0 matches
Group them together and sort them in order by Kconfig name (except for
AHCI_MVEBU which uses a different naming convention).
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Simon Glass [Mon, 31 Jan 2022 14:49:34 +0000 (07:49 -0700)]
sata: sata_sil: Only support BLK
No boards use this driver without CONFIG_BLK, so clean up the dead code.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Simon Glass [Mon, 31 Jan 2022 14:49:33 +0000 (07:49 -0700)]
sata: Rearrange Kconfig for SATA
Move the SATA options inside an 'if SATA' part, so they are grouped.
Fix the 'Complient' typo while we are here.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Simon Glass [Mon, 31 Jan 2022 14:49:32 +0000 (07:49 -0700)]
sata: Only support BLK
No boards currently use SATA without BLK:
./tools/moveconfig.py -f SATA ~BLK
0 matches
Make SATA depend on BLK to avoid any future confusion. Drop the dead code.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Simon Glass [Mon, 31 Jan 2022 14:49:31 +0000 (07:49 -0700)]
sata: Drop Silicon Image SIL3114 SATA driver
This is not used in U-Boot and has not been converted to driver model.
Drop it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Alper Nebi Yasak [Sat, 29 Jan 2022 15:25:30 +0000 (18:25 +0300)]
Convert CONFIG_REMAKE_ELF to Kconfig
This converts the following to Kconfig:
CONFIG_REMAKE_ELF
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Simon Glass [Sat, 22 Jan 2022 12:53:25 +0000 (05:53 -0700)]
Drop CONFIG_SYS_PIO_MODE
This option is not used in U-Boot. Drop it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Simon Glass [Sat, 22 Jan 2022 12:53:24 +0000 (05:53 -0700)]
Convert CONFIG_SYS_IDE_MAXBUS et al to Kconfig
This converts the following to Kconfig:
CONFIG_SYS_IDE_MAXBUS
CONFIG_SYS_IDE_MAXDEVICE
CONFIG_SYS_ATA_BASE_ADDR
CONFIG_SYS_ATA_STRIDE
CONFIG_SYS_ATA_DATA_OFFSET
CONFIG_SYS_ATA_REG_OFFSET
CONFIG_SYS_ATA_ALT_OFFSET
CONFIG_SYS_ATA_IDE0_OFFSET
CONFIG_SYS_ATA_IDE1_OFFSET
CONFIG_ATAPI
CONFIG_IDE_RESET
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Simon Glass [Sat, 22 Jan 2022 12:53:23 +0000 (05:53 -0700)]
ide: Drop CONFIG_IDE_AHB
This is not used in U-Boot anymore. Drop it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Simon Glass [Sat, 22 Jan 2022 12:07:33 +0000 (05:07 -0700)]
buildman: Allow adjusting board config on the fly
Add a -a option to specify changes to the config before the build
commences. For example
buildman -a ~CONFIG_CMDLINE
disables CONFIG_CMDLINE before doing the build.
This makes it easier to try things out as well as to write tests without
creating a new board or manually manging the .config file.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sat, 22 Jan 2022 12:07:32 +0000 (05:07 -0700)]
buildman: Provide a hint on how to debug thread crashes
If a thread crashes it is helpful to try the operation again with
threading disabled. Add a hint about that.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sat, 22 Jan 2022 12:07:31 +0000 (05:07 -0700)]
buildman: Add helper functions for updating .config files
At present the only straightforward way to write tests that need a
slightly different configuration is to create a new board with its own
configuration. This is cumbersome.
It would be useful if buildman could adjust the configuration of a build
on the fly. In preparation for this, add a utility library which can
modify a .config file according to various parameters passed to it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sat, 22 Jan 2022 12:07:30 +0000 (05:07 -0700)]
buildman: Make use of test_util
Use test_util to run the tests, with the ability to select a single test
to run, if desired.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sat, 22 Jan 2022 12:07:29 +0000 (05:07 -0700)]
buildman: Add a flag to control the traceback
At present the full horror of the Python traceback is shown by default. It
is normally only useful for debugging. Turn it off by default and add a
--debug flag to enable it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sat, 22 Jan 2022 12:07:28 +0000 (05:07 -0700)]
patman: Update test_util to run doc tests
At present this function does not run the doctests. Allow the caller to
pass these modules in as strings.
Update patman to use this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sat, 22 Jan 2022 12:07:27 +0000 (05:07 -0700)]
bloblist: Update to use conditional value
Use the new IF_ENABLED_INT() feature to avoid needing our own inline
function to handle this case. Tidy up the logic to ensure that the value
is only used when present. Update the 'expected' comment also.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sat, 22 Jan 2022 12:07:26 +0000 (05:07 -0700)]
kconfig: Add support for conditional values
At present if an optional Kconfig value needs to be used it must be
bracketed by #ifdef. For example, with this Kconfig setup:
config WIBBLE
bool "Support wibbles, the world needs more wibbles"
config WIBBLE_ADDR
hex "Address of the wibble"
depends on WIBBLE
then the following code must be used:
#ifdef CONFIG_WIBBLE
static void handle_wibble(void)
{
int val = CONFIG_WIBBLE_ADDR;
...
}
#endif
static void init_machine()
{
...
#ifdef CONFIG_WIBBLE
handle_wibble();
#endif
}
Add a new IF_ENABLED_INT() to help with this. So now it is possible to
write, without #ifdefs:
static void handle_wibble(void)
{
int val = IF_ENABLED_INT(CONFIG_WIBBLE, CONFIG_WIBBLE_ADDR);
...
}
static void init_machine()
{
...
if (IS_ENABLED(CONFIG_WIBBLE))
handle_wibble();
}
The value will be CONFIG_WIBBLE_ADDR if CONFIG_WIBBLE is defined and will
produce a build error if not.. This allows us to reduce the use of #ifdef
in the code, ensuring that the compiler still checks the code even if it
is not ultimately used for a particular build.
Add a CONFIG_IF_ENABLED_INT() version as well.
If an attempt is made to use a value that does not exist (i.e. when the
conditional is not enabled), an error about a non-existing function is
generated, e.g.:
common/bloblist.c:447: undefined reference to `invalid_use_of_IF_ENABLED_INT'
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sat, 22 Jan 2022 12:07:25 +0000 (05:07 -0700)]
kconfig: Update IS_ENABLED() internals
The config_enabled() macro currently uses 0 as the default value. Update
it to allow any value, so we can pass it something else, such as a
non-existent function, to produce a build error if it is not defined.
Also tidy up the code style for IS_ENABLED() and drop the unnecessary
brackets (the value is a simple 0 or 1).
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sat, 22 Jan 2022 12:07:24 +0000 (05:07 -0700)]
mmc: fsl: Use brackets around if()
At present the IS_ENABLED() macro has extra brackets, making it possible
to write:
if IS_ENABLED(CONFIG_XXX)
but it is a bit confusing. Add the missing brackets.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Simon Glass [Sat, 22 Jan 2022 12:07:23 +0000 (05:07 -0700)]
mips: Avoid using config_enabled() directly
Use IS_ENABLED() instead, which is the correct macro for checking a CONFIG
option.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sat, 22 Jan 2022 12:07:22 +0000 (05:07 -0700)]
imx: Don't define __ASSEMBLY__ in source files
This is supposed to be a build-system flag. Move it there so we can
define it before linux/kconfig.h is included.
Signed-off-by: Simon Glass <sjg@chromium.org>
Marcel Ziswiler [Mon, 31 Jan 2022 22:08:31 +0000 (23:08 +0100)]
mmc: fsl_esdhc_imx: fix watermark level in dma
Seems that we need the waterlevel setting not only for PIO mode as
without this at least the i.MX 8M Mini won't boot anymore when being
written by such a U-Boot. Corruption has also been observed both on
the i.MX 6 as well as i.MX 8M Mini when using ums on the eMMC. Fix
this by setting the watermark level again regardless of whether in
DMA or PIO mode.
Fixes:
41c6a22fc296 ("mmc: fsl_esdhc_imx: simplify esdhc_setup_data()")
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Tested-by: Fabio Estevam <festevam@gmail.com>
Marek Vasut [Mon, 17 Jan 2022 21:54:29 +0000 (22:54 +0100)]
cmd: mmc: Consider GP partitions in mmc hwpartition user enh start -
In case the eMMC contains any GP partitions or user sets up new GP
partitions, the size of these GP partitions reduce the size of the
USER partition. Subtract the size of those GP partitions from the
calculated size of USER partition when using `user enh start -`.
The following test used to fail before:
```
u-boot=> mmc hwpartition gp1 524288 enh user enh 0 - wrrel on check
Partition configuration:
User Enhanced Start: 0 Bytes
User Enhanced Size: 1.8 GiB
User partition write reliability: on
GP1 Capacity: 256 MiB ENH
No GP2 partition
No GP3 partition
No GP4 partition
Total enhanced size exceeds maximum (261 > 229)
Failed!
```
The test now passes:
```
u-boot=> mmc hwpartition gp1 524288 enh user enh 0 - wrrel on check
Partition configuration:
User Enhanced Start: 0 Bytes
User Enhanced Size: 1.5 GiB
User partition write reliability: on
GP1 Capacity: 256 MiB ENH
No GP2 partition
No GP3 partition
No GP4 partition
```
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Tom Rini [Tue, 8 Feb 2022 17:28:04 +0000 (12:28 -0500)]
Merge branch '2022-02-08-TI-platform-updates'
- J721S2 support, IPU support on DRA7, SIERRA PHY mulitlink
configuration support, Nokia RX-51 DM_KEYBOARD conversion
Pali Rohár [Thu, 3 Feb 2022 18:38:50 +0000 (19:38 +0100)]
Nokia RX-51: Convert to CONFIG_DM_KEYBOARD
Signed-off-by: Pali Rohár <pali@kernel.org>
Aswath Govindraju [Fri, 28 Jan 2022 08:11:52 +0000 (13:41 +0530)]
include: configs: j721e_evm: Add support to boot ethfw core in j721e
Add configs to enable booting ethfw core in j721e
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Aswath Govindraju [Fri, 28 Jan 2022 08:11:51 +0000 (13:41 +0530)]
arm: dts: k3-j721e: Add support for multilink PCIe + QSGMII
Add support for QSGMII multilink configuration.
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Aswath Govindraju [Fri, 28 Jan 2022 08:11:50 +0000 (13:41 +0530)]
phy: cadence: Sierra: Add support for skipping configuration
In some cases, a single SerDes instance can be shared between two different
processors, each using a separate link. In these cases, the SerDes
configuration is done in an earlier boot stage. Therefore, add support to
skip reconfiguring, if it is was already configured beforehand.
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Swapnil Jakhade [Fri, 28 Jan 2022 08:11:49 +0000 (13:41 +0530)]
phy: cadence: Sierra: Add PCIe + QSGMII PHY multilink configuration
Add register sequences for PCIe + QSGMII PHY multilink configuration.
Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Swapnil Jakhade [Fri, 28 Jan 2022 08:11:48 +0000 (13:41 +0530)]
phy: cadence: Sierra: Add support for PHY multilink configurations
Add support for multilink configuration of Sierra PHY. Currently,
maximum two links are supported.
Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Swapnil Jakhade [Fri, 28 Jan 2022 08:11:47 +0000 (13:41 +0530)]
phy: cadence: Sierra: Update single link PCIe register configuration
Add single link PCIe register configurations for no SSC and internal
SSC. Also, add missing PMA lane registers for external SSC.
Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Swapnil Jakhade [Fri, 28 Jan 2022 08:11:46 +0000 (13:41 +0530)]
phy: cadence: Sierra: Check PIPE mode PHY status to be ready for operation
PIPE phy status is used to communicate the completion of several PHY
functions. Check if PHY is ready for operation while configured for
PIPE mode during startup.
Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Swapnil Jakhade [Fri, 28 Jan 2022 08:11:45 +0000 (13:41 +0530)]
phy: cadence: Sierra: Check cmn_ready assertion during PHY power on
Check if PMA cmn_ready is set indicating the startup process is complete.
Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Swapnil Jakhade [Fri, 28 Jan 2022 08:11:44 +0000 (13:41 +0530)]
phy: cadence: Sierra: Add PHY PCS common register configurations
Add PHY PCS common register configuration sequences for single link.
Update single link PCIe register sequence accordingly.
Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Swapnil Jakhade [Fri, 28 Jan 2022 08:11:43 +0000 (13:41 +0530)]
phy: cadence: Sierra: Rename some regmap variables to be in sync with Sierra documentation
No functional change. Rename some regmap variables as mentioned in Sierra
register description documentation.
Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Swapnil Jakhade [Fri, 28 Jan 2022 08:11:42 +0000 (13:41 +0530)]
phy: cadence: Sierra: Add support to get SSC type from device tree.
Add support to get SSC type from DT.
Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>