Claudiu Zissulescu [Thu, 13 Feb 2020 10:32:05 +0000 (12:32 +0200)]
[ARC] Deprecate q-class option.
This option was used to control the short instruction selection. However,
there is no difference in cycles if we use or not a short instruction,
and always someone wants a smaller program.
gcc/
xxxx-xx-xx Claudiu Zissulescu <claziss@synopsys.com>
* config/arc/arc.c (arc_conditional_register_usage): R0-R3 and
R12-R15 are always in ARCOMPACT16_REGS register class.
* config/arc/arc.opt (mq-class): Deprecate.
* config/arc/constraint.md ("q"): Remove dependency on mq-class
option.
* doc/invoke.texi (mq-class): Update text.
* common/config/arc/arc-common.c (arc_option_optimization_table):
Update list.
testsuite/
xxxx-xx-xx Claudiu Zissulescu <claziss@synopsys.com>
* gcc.target/arc/nps400-1.c: Update test.
Claudiu Zissulescu [Thu, 13 Feb 2020 10:32:05 +0000 (12:32 +0200)]
[ARC] Use TARGET_INSN_COST.
TARGET_INSN_COST gives us a better control over the instruction costs
than classical RTX_COSTS. A simple cost scheme is in place for the
time being, when optimizing for size, the cost is given by the
instruction length. When optimizing for speed, the cost is 1 for any
recognized instruction, and 2 for any load/store instruction. The
latter one can be overwritten by using cost attribute for an
instruction. Due to this change, we need to update also a number of
instruction patterns with a new predicate to better reflect the costs.
gcc/
xxxx-xx-xx Claudiu Zissulescu <claziss@synopsys.com>
* config/arc/arc.c (arc_insn_cost): New function.
(TARGET_INSN_COST): Define.
* config/arc/arc.md (cost): New attribute.
(add_n): Use arc_nonmemory_operand.
(ashlsi3_insn): Likewise, also update constraints.
(ashrsi3_insn): Likewise.
(rotrsi3): Likewise.
(add_shift): Likewise.
* config/arc/predicates.md (arc_nonmemory_operand): New predicate.
testsuite/
xxxx-xx-xx Claudiu Zissulescu <claziss@synopsys.com>
* gcc.target/arc/or-cnst-size2.c: Update test.
Claudiu Zissulescu [Thu, 13 Feb 2020 10:32:05 +0000 (12:32 +0200)]
[ARC] Update mlo/mhi handling when big-endian CPU.
gcc/
xxxx-xx-xx Claudiu Zissulescu <claziss@synopsys.com>
* config/arc/arc.md (mulsidi_600): Correctly select mlo/mhi
registers.
(umulsidi_600): Likewise.
testsuite/
xxxx-xx-xx Claudiu Zissulescu <claziss@synopsys.com>
Petro Karashchenko <petro.karashchenko@ring.com>
* estsuite/gcc.target/arc/mul64-1.c: New test.
Jakub Jelinek [Thu, 13 Feb 2020 09:43:27 +0000 (10:43 +0100)]
i386: Fix up _mm*_mask_popcnt_epi* [PR93696]
As mentioned in the PR and as
https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mask_popcnt_epi
also documents, _mm*_popcnt_epi* intrinsics are consistent with all other
unary AVX512* intrinsics regarding arguments, i.e. the
_mm*_whatever has just single argument (called a in the docs, and __A in the
GCC headers),
_mm*_mask_whatever has 3 arguments (called src, k, a in the docs and
_W, __U, __A in GCC headers) and
_mm*_maskz_whatever 2 arguments (called k, a in the docs and __U, __A in GCC
headers). Unfortunately, whomever implemented the _mm*_popcnt_epi*
intrinsics got it wrong for the _mm*_mask_popcnt_epi* ones, calling the
args __A, __U, __B and not passing them in the canonical order to the
builtins, making it API incompatible with ICC as well as clang (tested on
godbolts clang 7/8/9/trunk and ICC 19.0.{0,1}, older clang/ICC don't
understand those, so it isn't that it used to be broken even in other
compilers and got changed afterwards).
2020-02-13 Jakub Jelinek <jakub@redhat.com>
PR target/93696
* config/i386/avx512bitalgintrin.h (_mm512_mask_popcnt_epi8,
_mm512_mask_popcnt_epi16, _mm256_mask_popcnt_epi8,
_mm256_mask_popcnt_epi16, _mm_mask_popcnt_epi8,
_mm_mask_popcnt_epi16): Rename __B argument to __A and __A to __W,
pass __A to the builtin followed by __W instead of __A followed by
__B.
* config/i386/avx512vpopcntdqintrin.h (_mm512_mask_popcnt_epi32,
_mm512_mask_popcnt_epi64): Likewise.
* config/i386/avx512vpopcntdqvlintrin.h (_mm_mask_popcnt_epi32,
_mm256_mask_popcnt_epi32, _mm_mask_popcnt_epi64,
_mm256_mask_popcnt_epi64): Likewise.
* gcc.target/i386/pr93696-1.c: New test.
* gcc.target/i386/pr93696-2.c: New test.
* gcc.target/i386/avx512bitalg-vpopcntw-1.c (TEST): Fix argument order
of _mm*_mask_popcnt_*.
* gcc.target/i386/avx512vpopcntdq-vpopcntq-1.c (TEST): Likewise.
* gcc.target/i386/avx512vpopcntdq-vpopcntd-1.c (TEST): Likewise.
* gcc.target/i386/avx512bitalg-vpopcntb-1.c (TEST): Likewise.
* gcc.target/i386/avx512bitalg-vpopcntb.c (foo): Likewise.
* gcc.target/i386/avx512bitalg-vpopcntbvl.c (foo): Likewise.
* gcc.target/i386/avx512vpopcntdq-vpopcntd.c (foo): Likewise.
* gcc.target/i386/avx512bitalg-vpopcntwvl.c (foo): Likewise.
* gcc.target/i386/avx512bitalg-vpopcntw.c (foo): Likewise.
* gcc.target/i386/avx512vpopcntdq-vpopcntq.c (foo): Likewise.
Frederik Harwath [Thu, 13 Feb 2020 09:24:39 +0000 (10:24 +0100)]
Add ChangeLog entry for my last commit
Frederik Harwath [Thu, 13 Feb 2020 06:30:16 +0000 (07:30 +0100)]
openmp: ignore nowait if async execution is unsupported [PR93481]
An OpenMP "nowait" clause on a target construct currently leads to
a call to GOMP_OFFLOAD_async_run in the plugin that is used for
offloading at execution time. The nvptx plugin contains only a stub
of this function that always produces a fatal error if called.
This commit changes the "nowait" implementation to ignore the clause
if the executing device's plugin does not implement GOMP_OFFLOAD_async_run.
The stub in the nvptx plugin is removed which effectively means that
programs containing "nowait" can now be executed with nvptx offloading
as if the clause had not been used.
This behavior is consistent with the OpenMP specification which says that
"[...] execution of the target task *may* be deferred" (emphasis added),
cf. OpenMP 5.0, page 172.
libgomp/
* plugin/plugin-nvptx.c: Remove GOMP_OFFLOAD_async_run stub.
* target.c (gomp_load_plugin_for_device): Make "async_run" loading
optional.
(gomp_target_task_fn): Assert "devicep->async_run_func".
(clear_unsupported_flags): New function to remove unsupported flags
(right now only GOMP_TARGET_FLAG_NOWAIT) that can be be ignored.
(GOMP_target_ext): Apply clear_unsupported_flags to flags.
* testsuite/libgomp.c/target-33.c:
Remove xfail for offload_target_nvptx.
* testsuite/libgomp.c/target-34.c: Likewise.
Jakub Jelinek [Thu, 13 Feb 2020 09:04:11 +0000 (10:04 +0100)]
sccvn: Handle bitfields in vn_reference_lookup_3 [PR93582]
The following patch is first step towards fixing PR93582.
vn_reference_lookup_3 right now punts on anything that isn't byte aligned,
so to be able to lookup a constant bitfield store, one needs to use
the exact same COMPONENT_REF, otherwise it isn't found.
This patch lifts up that that restriction if the bits to be loaded are
covered by a single store of a constant (keeps the restriction so far
for the multiple store case, can tweak that incrementally, but I think
for bisection etc. it is worth to do it one step at a time).
2020-02-13 Jakub Jelinek <jakub@redhat.com>
PR tree-optimization/93582
* fold-const.h (shift_bytes_in_array_left,
shift_bytes_in_array_right): Declare.
* fold-const.c (shift_bytes_in_array_left,
shift_bytes_in_array_right): New function, moved from
gimple-ssa-store-merging.c, no longer static.
* gimple-ssa-store-merging.c (shift_bytes_in_array): Move
to gimple-ssa-store-merging.c and rename to shift_bytes_in_array_left.
(shift_bytes_in_array_right): Move to gimple-ssa-store-merging.c.
(encode_tree_to_bitpos): Use shift_bytes_in_array_left instead of
shift_bytes_in_array.
(verify_shift_bytes_in_array): Rename to ...
(verify_shift_bytes_in_array_left): ... this. Use
shift_bytes_in_array_left instead of shift_bytes_in_array.
(store_merging_c_tests): Call verify_shift_bytes_in_array_left
instead of verify_shift_bytes_in_array.
* tree-ssa-sccvn.c (vn_reference_lookup_3): For native_encode_expr
/ native_interpret_expr where the store covers all needed bits,
punt on PDP-endian, otherwise allow all involved offsets and sizes
not to be byte-aligned.
* gcc.dg/tree-ssa/pr93582-1.c: New test.
* gcc.dg/tree-ssa/pr93582-2.c: New test.
* gcc.dg/tree-ssa/pr93582-3.c: New test.
Richard Biener [Thu, 13 Feb 2020 08:10:28 +0000 (09:10 +0100)]
testsuite/93717 fix up gcc.dg/optimize-bswapsi-2.c for BE
2020-02-13 Richard Biener <rguenther@suse.de>
PR testsuite/93717
* gcc.dg/optimize-bswapsi-2.c: Add BE case.
Jakub Jelinek [Thu, 13 Feb 2020 07:17:07 +0000 (08:17 +0100)]
i386: Fix k*shift* intrinsics [PR93673]
As mentioned in the PR, the intrinsics allow counts from 0 to 255, but
we actually reject values from 128 to 255. That is because QImode
CONST_INTs can be only -128 to 127. Fixed by using const_0_to_255_operand
and dropping the modes for the operands with those predicates
(the IL actually contains the CONST_INT which has VOIDmode).
2020-02-13 Jakub Jelinek <jakub@redhat.com>
PR target/93673
* config/i386/sse.md (k<code><mode>): Drop mode from last operand and
use const_0_to_255_operand predicate instead of immediate_operand.
(avx512dq_fpclass<mode><mask_scalar_merge_name>,
avx512dq_vmfpclass<mode><mask_scalar_merge_name>,
vgf2p8affineinvqb_<mode><mask_name>,
vgf2p8affineqb_<mode><mask_name>): Drop mode from
const_0_to_255_operand predicated operands.
* gcc.target/i386/avx512f-pr93673.c: New test.
* gcc.target/i386/avx512dq-pr93673.c: New test.
* gcc.target/i386/avx512bw-pr93673.c: New test.
Jakub Jelinek [Thu, 13 Feb 2020 07:06:51 +0000 (08:06 +0100)]
testsuite: Fix g++.dg/analyzer/pr93212.C with check-c++-all
The test FAILs with c++11:
.../gcc/testsuite/g++.dg/analyzer/pr93212.C:4:1: error: 'lol' function uses 'auto' type specifier without trailing return type
.../gcc/testsuite/g++.dg/analyzer/pr93212.C:4:1: note: deduced return type only available with '-std=c++14' or '-std=gnu++14'
2020-02-13 Jakub Jelinek <jakub@redhat.com>
* g++.dg/analyzer/pr93212.C: Require c++14 rather than c++11.
GCC Administrator [Thu, 13 Feb 2020 00:16:35 +0000 (00:16 +0000)]
Daily bump.
Jason Merrill [Mon, 10 Feb 2020 13:12:07 +0000 (14:12 +0100)]
c++: Fix constexpr if and braced functional cast.
While partially instantiating a generic lambda, we can encounter pack
expansions or constexpr if where we can't actually do the substitution
immediately, and instead remember a partial instantiation context
in *_EXTRA_ARGS. This includes any local_specializations used in the
pattern or condition. In this testcase our tree walk wasn't finding the use
of i because we weren't walking into the type of a CONSTRUCTOR. Fixed by
moving the code for doing that from find_parameter_packs_r into
cp_walk_subtrees.
2020-02-11 Jason Merrill <jason@redhat.com>
PR c++/92583
PR c++/92654
* tree.c (cp_walk_subtrees): Walk CONSTRUCTOR types here.
* pt.c (find_parameter_packs_r): Not here.
Iain Sandoe [Wed, 12 Feb 2020 15:10:38 +0000 (16:10 +0100)]
coroutines: Update to n4849 allocation/deallocation.
This updates the coroutine frame allocation and deallocation usage to
match n4849.
[dcl.fct.def.coroutine] /9, /10, /12.
9 An implementation may need to allocate additional storage for a coroutine.
This storage is known as the coroutine state and is obtained by calling a
non-array allocation function. The allocation function’s name is looked up
in the scope of the promise type. If this lookup fails, the allocation
function’s name is looked up in the global scope. If the lookup finds an
allocation function in the scope of the promise type, overload resolution
is performed on a function call created by assembling an argument list.
The first argument is the amount of space requested, and has type
std::size_t. The lvalues p1 . . . pn are the succeeding [user's function]
arguments. If no viable function is found, overload resolution is performed
again on a function call created by passing just the amount of space required
as an argument of type std::size_t.
10 The unqualified-id get_return_object_on_allocation_failure is looked up in
the scope of the promise type by class member access lookup. If any
declarations are found, then the result of a call to an allocation function
used to obtain storage for the coroutine state is assumed to return nullptr
if it fails to obtain storage, and if a global allocation function is
selected, the ::operator new(size_t, nothrow_t) form is used. The allocation
function used in this case shall have a non-throwing noexcept-specification.
If the allocation function returns nullptr, the coroutine returns control to
the caller of the coroutine and the return value is obtained by a call to
T::get_return_object_on_allocation_failure(), where T is the promise type.
12 The deallocation function’s name is looked up in the scope of the promise
type. If this lookup fails, the deallocation function’s name is looked up in
the global scope. If deallocation function lookup finds both a usual
deallocation function with only a pointer parameter and a usual deallocation
function with both a pointer parameter and a size parameter, then the
selected deallocation function shall be the one with two parameters.
Otherwise, the selected deallocation function shall be the function with one
parameter. If no usual deallocation function is found, the program is ill-
formed. The selected deallocation function shall be called with the address
of the block of storage to be reclaimed as its first argument. If a
deallocation function with a parameter of type std::size_t is used, the size
of the block is passed as the corresponding argument.
gcc/cp/ChangeLog:
2020-02-12 Iain Sandoe <iain@sandoe.co.uk>
* coroutines.cc (build_actor_fn): Implement deallocation function
selection per n4849, dcl.fct.def.coroutine bullet 12.
(morph_fn_to_coro): Implement allocation function selection per
n4849, dcl.fct.def.coroutine bullets 9 and 10.
2020-02-12 Iain Sandoe <iain@sandoe.co.uk>
* g++.dg/coroutines/coro1-allocators.h: New.
* g++.dg/coroutines/coro-bad-alloc-00-bad-op-new.C: New test.
* g++.dg/coroutines/coro-bad-alloc-01-bad-op-del.C: New test.
* g++.dg/coroutines/coro-bad-alloc-02-no-op-new-nt.C: New test.
* g++.dg/coroutines/torture/alloc-00-gro-on-alloc-fail.C: Use new
coro1-allocators.h header.
* g++.dg/coroutines/torture/alloc-01-overload-newdel.C: Likewise.
* g++.dg/coroutines/torture/alloc-02-fail-new-grooaf-check.C: New.
* g++.dg/coroutines/torture/alloc-03-overload-new-1.C: New test.
* g++.dg/coroutines/torture/alloc-04-overload-del-use-two-args.C:New.
Jakub Jelinek [Wed, 12 Feb 2020 22:18:56 +0000 (23:18 +0100)]
testsuite: Fix up gcc.target/powerpc/pr93122.c test
The recent renaming of PowerPC -mprefixed-addr option to -mprefixed
has not adjusted the gcc.target/powerpc/pr93122.c test, so it now
FAIL: gcc.target/powerpc/pr93122.c (test for excess errors)
Excess errors:
xgcc: error: unrecognized command-line option '-mprefixed-addr'; did you mean '-mprefixed'?
2020-02-12 Jakub Jelinek <jakub@redhat.com>
* gcc.target/powerpc/pr93122.c: Use -mprefixed instead of
-mprefixed-addr in dg-options.
Jeff Law [Wed, 12 Feb 2020 21:57:50 +0000 (14:57 -0700)]
Commit correct version of last patch
Jeff Law [Wed, 12 Feb 2020 21:52:24 +0000 (14:52 -0700)]
Combine the two H8 mode shortening peepholes into a single peephole
* config/h8300/h8300.md (comparison shortening peepholes): Use
a mode iterator to merge the HImode and SImode peepholes.
Patrick Palka [Tue, 11 Feb 2020 15:45:26 +0000 (10:45 -0500)]
libstdc++: Fix LWG issues 3389 and 3390
libstdc++-v3/ChangeLog:
LWG 3389 and LWG 3390
* include/bits/stl_iterator.h (move_move_iterator): Use std::move when
constructing the move_iterator with __i.
(counted_iterator::counted_iterator): Use std::move when initializing
M_current with __i.
* testsuite/24_iterators/counted_iterator/lwg3389.cc: New test.
* testsuite/24_iterators/move_iterator/lwg3390.cc: New test.
Sandra Loosemore [Wed, 12 Feb 2020 20:20:15 +0000 (12:20 -0800)]
Use a non-empty test program to test ability to link.
On bare-metal targets, I/O support is typically provided by a BSP and
requires a linker script and/or hosting library to be specified on the
linker command line. Linking an empty program with the default linker
script may succeed, however, which confuses libstdc++ configuration
when programs that probe for the presence of various I/O features fail
with link errors.
2020-02-12 Sandra Loosemore <sandra@codesourcery.com>
PR libstdc++/79193
PR libstdc++/88999
config/
* no-executables.m4: Use a non-empty program to test for linker
support.
libgcc/
* configure: Regenerated.
libgfortran/
* configure: Regenerated.
libiberty/
* configure: Regenerated.
libitm/
* configure: Regenerated.
libobjc/
* configure: Regenerated.
libquadmath/
* configure: Regenerated.
libssp/
* configure: Regenerated.
libstdc++v-3/
* configure: Regenerated.
Jakub Jelinek [Wed, 12 Feb 2020 21:14:27 +0000 (22:14 +0100)]
real: Fix roundeven on inf/nan [PR93663]
As can be seen in the testcase, roundeven with inf or nan arguments
ICE because of those asserts where nothing prevents from is_halfway_below
being called with those arguments.
The following patch fixes that by just returning false for rvc_inf/rvc_nan
like it returns for rvc_zero, so that we handle roundeven with all those
values as round. Inf/NaN are not halfway in between two integers...
2020-02-12 Jakub Jelinek <jakub@redhat.com>
PR middle-end/93663
* real.c (is_even): Make static. Function comment fix.
(is_halfway_below): Make static, don't assert R is not inf/nan,
instead return false for those. Small formatting fixes.
* gcc.dg/torture/builtin-round-roundeven.c (main): Add tests
for DBL_MAX, inf, their negations and nan.
François Dumont [Tue, 11 Feb 2020 18:09:48 +0000 (19:09 +0100)]
libstdc++: Add missing std:: qualification of a forward call
* include/bits/hashtable.h
(_Hashtable<>(_Hashtable&&, std::allocator_type&)): Add
missing std namespace qualification to forward call.
Martin Sebor [Wed, 12 Feb 2020 20:53:49 +0000 (13:53 -0700)]
PR middle-end/93646 - confusing -Wstringop-truncation on strncat where -Wstringop-overflow is expected
gcc/ChangeLog:
PR middle-end/93646
* tree-ssa-strlen.c (handle_builtin_stxncpy): Rename...
(handle_builtin_stxncpy_strncat): ...to this. Change first argument.
Issue only -Wstringop-overflow strncat, never -Wstringop-truncation.
(strlen_check_and_optimize_call): Adjust callee name.
gcc/testsuite/ChangeLog:
PR middle-end/93646
* gcc.dg/Wstringop-overflow-31.c: New test.
Jeff Law [Wed, 12 Feb 2020 19:12:22 +0000 (12:12 -0700)]
Drop unused comparison shortening pattern and consolidate remaining comparison shortening patterns.
* config/h8300/h8300.md (comparison shortening peepholes): Drop
(and (xor)) variant. Combine other two into single peephole.
Wilco Dijkstra [Wed, 12 Feb 2020 18:23:21 +0000 (18:23 +0000)]
[AArch64] Set ctz rtx_cost (PR93565)
Combine sometimes behaves oddly and duplicates ctz to remove an unnecessary
sign extension. Avoid this by setting the cost for ctz to be higher than
that of a simple ALU instruction. Deepsjeng performance improves by ~0.6%.
gcc/
PR rtl-optimization/93565
* config/aarch64/aarch64.c (aarch64_rtx_costs): Add CTZ costs.
testsuite/
PR rtl-optimization/93565
* gcc.target/aarch64/pr93565.c: New test.
Wilco Dijkstra [Wed, 12 Feb 2020 18:19:25 +0000 (18:19 +0000)]
[AArch64] Improve popcount expansion
The popcount expansion uses umov to extend the result and move it back
to the integer register file. If we model ADDV as a zero-extending
operation, fmov can be used to move back to the integer side. This
results in a ~0.5% speedup on deepsjeng on Cortex-A57.
A typical __builtin_popcount expansion is now:
fmov s0, w0
cnt v0.8b, v0.8b
addv b0, v0.8b
fmov w0, s0
gcc/
* config/aarch64/aarch64-simd.md
(aarch64_zero_extend<GPI:mode>_reduc_plus_<VDQV_E:mode>): New pattern.
* config/aarch64/aarch64.md (popcount<mode>2): Use it instead of
generating separate ADDV and zero_extend patterns.
* config/aarch64/iterators.md (VDQV_E): New iterator.
testsuite/
* gcc.target/aarch64/popcnt2.c: New test.
Jeff Law [Wed, 12 Feb 2020 17:35:12 +0000 (10:35 -0700)]
Clean up dead patterns, splitters, expanders and peepholes on the H8 port.
* config/h8300/h8300.md (cpymemsi, movmd): Remove dead patterns,
expanders, splits, etc.
(movmd_internal_<mode>, movmd splitter, movstr, movsd): Likewise.
(stpcpy_internal_<mode>, stpcpy splitter): Likewise.
(peepholes to convert QI/HI mode pushes to SI mode pushes): Likewise.
* config/h8300/h8300.c (h8300_swap_into_er6): Remove unused function.
(h8300_swap_out_of_er6, h8sx_emit_movmd): Likewise
* config/h8300/h8300-protos.h (h8300_swap_into_er6): Remove unused
function prototype.
(h8300_swap_out_of_er6, h8sx_emit_movmd): Likewise.
Marek Polacek [Wed, 12 Feb 2020 16:20:07 +0000 (11:20 -0500)]
c++: Add new test [PR88819]
Fixed by r10-1975-g59febe0ece37bedab7f42ae51b9f2b7a372d2950.
2020-02-12 Marek Polacek <polacek@redhat.com>
PR c++/88819
* g++.dg/cpp2a/nontype-class32.C: New test.
Marek Polacek [Tue, 11 Feb 2020 20:29:24 +0000 (15:29 -0500)]
c++: Fix ICE-on-invalid with broken attribute [PR93684]
We crash when parsing
[[a::
because we see a CPP_SCOPE and then we're trying to consume a CPP_EOF
token. So peek before consuming it.
PR c++/93684 - ICE-on-invalid with broken attribute.
* parser.c (cp_parser_std_attribute): Peek a token first before
consuming it.
* g++.dg/parse/attr4.C: New test.
Jakub Jelinek [Wed, 12 Feb 2020 10:58:35 +0000 (11:58 +0100)]
i386: Fix up vec_extract_lo* patterns [PR93670]
The VEXTRACT* insns have way too many different CPUID feature flags (ATT
syntax)
vextractf128 $imm, %ymm, %xmm/mem AVX
vextracti128 $imm, %ymm, %xmm/mem AVX2
vextract{f,i}32x4 $imm, %ymm, %xmm/mem {k}{z} AVX512VL+AVX512F
vextract{f,i}32x4 $imm, %zmm, %xmm/mem {k}{z} AVX512F
vextract{f,i}64x2 $imm, %ymm, %xmm/mem {k}{z} AVX512VL+AVX512DQ
vextract{f,i}64x2 $imm, %zmm, %xmm/mem {k}{z} AVX512DQ
vextract{f,i}32x8 $imm, %zmm, %ymm/mem {k}{z} AVX512DQ
vextract{f,i}64x4 $imm, %zmm, %ymm/mem {k}{z} AVX512F
As the testcase shows and the patch too, we didn't get it right in all
cases.
The first hunk is about avx512vl_vextractf128v8s[if] incorrectly
requiring TARGET_AVX512DQ. The corresponding insn is the first
vextract{f,i}32x4 above, so it requires VL+F, and the builtins have it
correct (TARGET_AVX512VL implies TARGET_AVX512F):
BDESC (OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_avx512vl_vextractf128v8sf, "__builtin_ia32_extractf32x4_256_mask", IX86_BUILTIN_EXTRACTF32X4_256, UNKNOWN, (int) V4SF_FTYPE_V8SF_INT_V4SF_UQI)
BDESC (OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_avx512vl_vextractf128v8si, "__builtin_ia32_extracti32x4_256_mask", IX86_BUILTIN_EXTRACTI32X4_256, UNKNOWN, (int) V4SI_FTYPE_V8SI_INT_V4SI_UQI)
We only need TARGET_AVX512DQ for avx512vl_vextractf128v4d[if].
The second hunk is about vec_extract_lo_v16s[if]{,_mask}. These are using
the vextract{f,i}32x8 insns (AVX512DQ above), but we weren't requiring that,
but instead incorrectly && 1 for non-masked and && (64 == 64 && TARGET_AVX512VL)
for masked insns. This is extraction from ZMM, so it doesn't need VL for
anything. The hunk actually only requires TARGET_AVX512DQ when the insn
is masked, if it is not masked, when TARGET_AVX512DQ isn't available we can
use vextract{f,i}64x4 instead which is available already in TARGET_AVX512F
and does the same thing, extracts the low 256 bits from 512 bits vector
(often we split it into just nothing, but there are some special cases like
when using xmm16+ when we can't without AVX512VL).
The last hunk is about vec_extract_lo_v8s[if]{,_mask}. The non-_mask
suffixed ones are ok already and just split into nothing (lowpart subreg).
The masked ones were incorrectly requiring TARGET_AVX512VL and
TARGET_AVX512DQ, when we only need TARGET_AVX512VL.
2020-02-12 Jakub Jelinek <jakub@redhat.com>
PR target/93670
* config/i386/sse.md (VI48F_256_DQ): New mode iterator.
(avx512vl_vextractf128<mode>): Use it instead of VI48F_256. Remove
TARGET_AVX512DQ from condition.
(vec_extract_lo_<mode><mask_name>): Use <mask_avx512dq_condition>
instead of <mask_mode512bit_condition> in condition. If
TARGET_AVX512DQ is false, emit vextract*64x4 instead of
vextract*32x8.
(vec_extract_lo_<mode><mask_name>): Drop <mask_avx512dq_condition>
from condition.
* gcc.target/i386/avx512vl-pr93670.c: New test.
Richard Biener [Wed, 12 Feb 2020 09:03:09 +0000 (10:03 +0100)]
testsuite/93697 fix inconsistent warning in testcase
The warning was emitted inconsistently on targets, so disable it since
the testcase was for an ICE.
2020-02-12 Richard Biener <rguenther@suse.de>
PR testsuite/93697
* gcc.dg/pr93661.c: Pass -w, remove dg-warning.
Kewen Lin [Wed, 12 Feb 2020 05:22:02 +0000 (23:22 -0600)]
[IRA] Fix PR91052 by skipping multiple_sets insn in combine_and_move_insns
As PR91052's comments show, commit r272731 exposed one issue in function
combine_and_move_insns. Function combine_and_move_insns perform the
unexpected movement which alter live interval of some register, leading
incorrect value to be used. See PR91052 for details.
2020-02-12 Kewen Lin <linkw@gcc.gnu.org>
PR target/91052
* ira.c (combine_and_move_insns): Skip multiple_sets def_insn.
David Malcolm [Thu, 6 Feb 2020 02:29:04 +0000 (21:29 -0500)]
analyzer: use ultimate alias target at calls (PR 93288)
PR analyzer/93288 reports an ICE in a C++ testcase when calling a
constructor.
The issue is that when building the supergraph, we encounter the
cgraph edge to "__ct_comp ", the DECL_COMPLETE_CONSTRUCTOR_P, and
this node's DECL_STRUCT_FUNCTION has a NULL CFG, which the analyzer
reads through, leading to the ICE.
This patch reworks function and fndecl lookup at calls throughout the
analyzer so that it looks for the ultimate_alias_target of the callee.
In the case above, this means using the "__ct_base " for the ctor,
which has a CFG, fixing the ICE.
Getting this right allows for some simple C++ cases involving ctors to
work, so the patch also adds some test coverage for that.
gcc/analyzer/ChangeLog:
PR analyzer/93288
* analysis-plan.cc (analysis_plan::use_summary_p): Look through
the ultimate_alias_target when getting the called function.
* engine.cc (exploded_node::on_stmt): Rename second "ctxt" to
"sm_ctxt". Use the region_model's get_fndecl_for_call rather than
gimple_call_fndecl.
* region-model.cc (region_model::get_fndecl_for_call): Use
ultimate_alias_target on fndecl.
* supergraph.cc (get_ultimate_function_for_cgraph_edge): New
function.
(supergraph_call_edge): Use it when rejecting edges without
functions.
(supergraph::supergraph): Use it to get the function for the
cgraph_edge when building interprocedural superedges.
(callgraph_superedge::get_callee_function): Use it.
* supergraph.h (supergraph::get_num_snodes): Make param const.
(supergraph::function_to_num_snodes_t): Make first type param
const.
gcc/testsuite/ChangeLog:
PR analyzer/93288
* g++.dg/analyzer/malloc.C: Add test coverage for a double-free
called in a constructor.
* g++.dg/analyzer/pr93288.C: New test.
Segher Boessenkool [Tue, 11 Feb 2020 02:20:56 +0000 (02:20 +0000)]
rs6000: Use strlen instead of sizeof - 1
It is easier to read and understand strlen ("string") than it is to
read and understand sizeof ("string") - 1 .
* config/rs6000/rs6000.c (rs6000_debug_print_mode): Don't use sizeof
where strlen is more legible.
(rs6000_builtin_vectorized_libmass): Ditto.
(rs6000_print_options_internal): Ditto.
David Malcolm [Thu, 21 Nov 2019 17:30:45 +0000 (12:30 -0500)]
analyzer: g++ testsuite support
PR analyzer/93288 reports a C++-specific ICE with -fanalyzer.
This patch creates the beginnings of a C++ test suite for the analyzer,
so that there's a place to put test coverage for the fix.
It adds a regression test for PR analyzer/93212, an ICE fixed
in r10-5970-g32077b693df8e3ed0424031a322df23822bf2f7e.
gcc/testsuite/ChangeLog:
PR analyzer/93212
* g++.dg/analyzer/analyzer.exp: New subdirectory and .exp suite.
* g++.dg/analyzer/malloc.C: New test.
* g++.dg/analyzer/pr93212.C: New test.
GCC Administrator [Wed, 12 Feb 2020 00:16:40 +0000 (00:16 +0000)]
Daily bump.
Jason Merrill [Tue, 11 Feb 2020 11:04:37 +0000 (12:04 +0100)]
c++: Fix implicit friend operator==.
It seems that in writing testcases for the operator<=> proposal I didn't
include any tests for implicitly declared friend operator==, and
consequently it didn't work.
2020-02-11 Jason Merrill <jason@redhat.com>
PR c++/93675
* class.c (add_implicitly_declared_members): Use do_friend.
* method.c (implicitly_declare_fn): Fix friend handling.
(decl_remember_implicit_trigger_p): New.
(synthesize_method): Use it.
* decl2.c (mark_used): Use it.
Martin Sebor [Tue, 11 Feb 2020 23:53:13 +0000 (16:53 -0700)]
PR tree-optimization/93683 - ICE on calloc with unused return value in ao_ref_init_from_ptr_and_size
gcc/testsuite/ChangeLog:
PR tree-optimization/93683
* gcc.dg/tree-ssa/ssa-dse-39.c: New test.
gcc/ChangeLog:
PR tree-optimization/93683
* tree-ssa-alias.c (stmt_kills_ref_p): Avoid using LHS when not set.
Will Schmidt [Tue, 11 Feb 2020 20:01:59 +0000 (14:01 -0600)]
Add ppc_ieee128_ok target-supports proc
Add a target_supports entry to check that the __ieee128 keyword
is understood by the target.
Also add a dg-requires check to the existing pr92796 testcase.
[testsuite]
* lib/target-supports.exp (check_effective_target_ppc_ieee128_ok): New.
* gcc.target/powerpc/pr92796.c: Add a require-effective-target
statement for ppc_ieee128_ok.
Michael Meissner [Tue, 11 Feb 2020 19:03:16 +0000 (14:03 -0500)]
Rename -mprefixed-addr to be -mprefixed, and document it.
2020-02-11 Michael Meissner <meissner@linux.ibm.com>
* config/rs6000/predicates.md (cint34_operand): Rename the
-mprefixed-addr option to be -mprefixed.
* config/rs6000/rs6000-cpus.def (ISA_FUTURE_MASKS_SERVER): Rename
the -mprefixed-addr option to be -mprefixed.
(OTHER_FUTURE_MASKS): Likewise.
(POWERPC_MASKS): Likewise.
* config/rs6000/rs6000.c (rs6000_option_override_internal): Rename
the -mprefixed-addr option to be -mprefixed. Change error
messages to refer to -mprefixed.
(num_insns_constant_gpr): Rename the -mprefixed-addr option to be
-mprefixed.
(rs6000_legitimate_offset_address_p): Likewise.
(rs6000_mode_dependent_address): Likewise.
(rs6000_opt_masks): Change the spelling of "-mprefixed-addr" to be
"-mprefixed" for target attributes and pragmas.
(address_to_insn_form): Rename the -mprefixed-addr option to be
-mprefixed.
(rs6000_adjust_insn_length): Likewise.
* config/rs6000/rs6000.h (FINAL_PRESCAN_INSN): Rename the
-mprefixed-addr option to be -mprefixed.
(ASM_OUTPUT_OPCODE): Likewise.
* config/rs6000/rs6000.md (prefixed insn attribute): Rename the
-mprefixed-addr option to be -mprefixed.
* config/rs6000/rs6000.opt (-mprefixed): Rename the
-mprefixed-addr option to be prefixed. Change the option from
being undocumented to being documented.
* doc/invoke.texi (RS/6000 and PowerPC Options): Document the
-mprefixed option. Update the -mpcrel documentation to mention
-mprefixed.
David Malcolm [Tue, 11 Feb 2020 15:52:40 +0000 (10:52 -0500)]
analyzer: fix ICE due to missing state_change purging (PR 93374)
PR analyzer/93374 reports an ICE within state_change::validate due to an
m_new_sid in a recorded state-change being out of range of the svalues
of the region_model of the new state.
During get_or_create_node we attempt to merge the new state with the
state of each of the existing enodes at the program point (in the
absence of sm-state differences), simplifying the state at each
attempt, and potentially reusing a node if we get a match.
This state-merging invalidates any svalue_ids within any state_change
object.
The root cause is that, although the code was purging any such
svalue_ids for the case where no match was found during merging, it was
failing to purge them for the case where a matching enode *was* found
for the merged state, leading to an invalid state_change along the
exploded_edge to the reused enode.
This patch moves the invalidation code to cover both cases, fixing the
ICE. It also extends state_change validation so that states are also
checked.
gcc/analyzer/ChangeLog:
PR analyzer/93374
* engine.cc (exploded_edge::exploded_edge): Add ext_state param
and pass it to change.validate.
(exploded_graph::get_or_create_node): Move purging of change
svalues to also cover the case of reusing an existing enode.
(exploded_graph::add_edge): Pass m_ext_state to exploded_edge's
ctor.
* exploded-graph.h (exploded_edge::exploded_edge): Add ext_state
param.
* program-state.cc (state_change::sm_change::validate): Likewise.
Assert that m_sm_idx is sane. Use ext_state to validate
m_old_state and m_new_state.
(state_change::validate): Add ext_state param and pass it to
the sm_change validate calls.
* program-state.h (state_change::sm_change::validate): Add
ext_state param.
(state_change::validate): Likewise.
gcc/testsuite/ChangeLog:
PR analyzer/93374
* gcc.dg/analyzer/torture/pr93374.c: New test.
David Malcolm [Tue, 11 Feb 2020 14:45:48 +0000 (09:45 -0500)]
analyzer: fix ICE in "__analyzer_dump_exploded_nodes" on non-empty worklist (PR 93669)
gcc/analyzer/ChangeLog:
PR analyzer/93669
* engine.cc (exploded_graph::dump_exploded_nodes): Handle missing
case of STATUS_WORKLIST in implementation of
"__analyzer_dump_exploded_nodes".
gcc/testsuite/ChangeLog:
PR analyzer/93669
* gcc.dg/analyzer/pr93669.c: New test.
David Malcolm [Mon, 10 Feb 2020 21:47:21 +0000 (16:47 -0500)]
analyzer: fix ICE with equiv_class constant (PR 93649)
gcc/analyzer/ChangeLog:
PR analyzer/93649
* constraint-manager.cc (constraint_manager::add_constraint): When
merging equivalence classes and updating m_constant, also update
m_cst_sid.
(constraint_manager::validate): If m_constant is non-NULL assert
that m_cst_sid is non-null and is valid.
gcc/testsuite/ChangeLog:
PR analyzer/93649
* gcc.dg/analyzer/torture/pr93649.c: New test.
David Malcolm [Mon, 10 Feb 2020 21:00:42 +0000 (16:00 -0500)]
analyzer.opt: reword descriptions of two dump options (PR 93657)
gcc/analyzer/ChangeLog:
PR analyzer/93657
* analyzer.opt (fdump-analyzer): Reword description.
(fdump-analyzer-stderr): Likewise.
David Malcolm [Wed, 5 Feb 2020 20:26:44 +0000 (15:26 -0500)]
analyzer: workaround for nested pp_printf
The dumps from the analyzer sometimes contain garbled output.
The root cause is due to nesting of calls to pp_printf: I'm using
pp_printf with %qT to print types with a PP using default_tree_printer.
default_tree_printer handles 'T' (and various other codes) via
dump_generic_node (pp, t, 0, TDF_SLIM, 0);
and dump_generic_node can call pp_printf in various ways, leading
to a pp_printf within a pp_printf, and garbled output.
I don't think it's feasible to fix pp_printf to be reentrant, in
stage 4, at least, so for the moment this patch works around it
in the analyzer.
gcc/analyzer/ChangeLog:
* region-model.cc (print_quoted_type): New function.
(svalue::print): Use it to replace %qT.
(region::dump_to_pp): Likewise.
(region::dump_child_label): Likewise.
(region::print_fields): Likewise.
Hans-Peter Nilsson [Tue, 11 Feb 2020 17:16:40 +0000 (18:16 +0100)]
regalloc/debug: fix buggy print_hard_reg_set
* ira-conflicts.c (print_hard_reg_set): Correct output for sets
including FIRST_PSEUDO_REGISTER - 1.
* ira-color.c (print_hard_reg_set): Ditto.
Before, for a target with FIRST_PSEUDO_REGISTER 20, you'd get "19-18"
for (1<<19). For (1<<18)|(1<<19), you'd get "18".
I was using ira-conflicts.c:print_hard_reg_set with a local
patch to gdbinit.in in a debug-session, and noticed the
erroneous output. I see there's an almost identical function in
ira-color.c and on top of that, there's another function by the
same name and with similar semantics in sel-sched-dump.c, but
the last one doesn't try to print ranges.
Will Schmidt [Tue, 11 Feb 2020 16:27:25 +0000 (10:27 -0600)]
Tweak testcases for pr70010
[testsuite]
* gcc.target/powerpc/pr70010-2.c: Add -maltivec.
* gcc.target/powerpc/pr70010-3.c: Add -maltivec.
Stam Markianos-Wright [Tue, 11 Feb 2020 11:14:07 +0000 (11:14 +0000)]
[GCC][PATCH][ARM]Add ACLE intrinsics for dot product (vusdot - vector, v<us/su>dot - by element) for AArch32 AdvSIMD ARMv8.6 Extension
This patch adds the ARMv8.6 Extension ACLE intrinsics for dot product
operations (vector/by element) to the ARM back-end.
These are:
usdot (vector), <us/su>dot (by element).
The functions are optional from ARMv8.2-a as -march=armv8.2-a+i8mm and
for ARM they remain optional after as of ARMv8.6-a.
The functions are declared in arm_neon.h, RTL patterns are defined to
generate assembler and tests are added to verify and perform adequate checks.
Regression testing on arm-none-eabi passed successfully.
gcc/ChangeLog:
2020-02-11 Stam Markianos-Wright <stam.markianos-wright@arm.com>
* config/arm/arm-builtins.c (enum arm_type_qualifiers):
(USTERNOP_QUALIFIERS): New define.
(USMAC_LANE_QUADTUP_QUALIFIERS): New define.
(SUMAC_LANE_QUADTUP_QUALIFIERS): New define.
(arm_expand_builtin_args): Add case ARG_BUILTIN_LANE_QUADTUP_INDEX.
(arm_expand_builtin_1): Add qualifier_lane_quadtup_index.
* config/arm/arm_neon.h (vusdot_s32): New.
(vusdot_lane_s32): New.
(vusdotq_lane_s32): New.
(vsudot_lane_s32): New.
(vsudotq_lane_s32): New.
* config/arm/arm_neon_builtins.def (usdot, usdot_lane,sudot_lane): New.
* config/arm/iterators.md (DOTPROD_I8MM): New.
(sup, opsuffix): Add <us/su>.
* config/arm/neon.md (neon_usdot, <us/su>dot_lane: New.
* config/arm/unspecs.md (UNSPEC_DOT_US, UNSPEC_DOT_SU): New.
gcc/testsuite/ChangeLog:
2020-02-11 Stam Markianos-Wright <stam.markianos-wright@arm.com>
* gcc.target/arm/simd/vdot-2-1.c: New test.
* gcc.target/arm/simd/vdot-2-2.c: New test.
* gcc.target/arm/simd/vdot-2-3.c: New test.
* gcc.target/arm/simd/vdot-2-4.c: New test.
Richard Biener [Tue, 11 Feb 2020 09:56:03 +0000 (10:56 +0100)]
tree-optimization/93661 properly guard tree_to_poly_int64
2020-02-11 Richard Biener <rguenther@suse.de>
PR tree-optimization/93661
PR tree-optimization/93662
* tree-ssa-sccvn.c (vn_reference_lookup_3): Properly guard
tree_to_poly_int64.
* tree-sra.c (get_access_for_expr): Likewise.
* gcc.dg/pr93661.c: New testcase.
Richard Biener [Tue, 11 Feb 2020 09:52:31 +0000 (10:52 +0100)]
tree-optimization/93661 properly guard tree_to_poly_int64
2020-02-11 Richard Biener <rguenther@suse.de>
PR tree-optimization/93661
PR tree-optimization/93662
* tree-ssa-sccvn.c (vn_reference_lookup_3): Properly guard
tree_to_poly_int64.
* tree-sra.c (get_access_for_expr): Likewise.
* gcc.dg/pr93661.c: New testcase.
Jason Merrill [Mon, 10 Feb 2020 13:05:06 +0000 (14:05 +0100)]
c++: Fix static initialization from <=>.
Constant evaluation of genericize_spaceship produced a CONSTRUCTOR, which we
then wanted to bind to a reference, which we can't do. So wrap the result
in a TARGET_EXPR so we get something with an address.
We also need to handle treating the result of cxx_eval_binary_expression as
a glvalue for SPACESHIP_EXPR.
My earlier change to add uid_sensitive to maybe_constant_value was wrong; we
don't even look at the cache when manifestly_const_eval, and I failed to
adjust the later call to cxx_eval_outermost_constant_expr.
gcc/cp/ChangeLog
2020-02-11 Jason Merrill <jason@redhat.com>
PR c++/93650
PR c++/90691
* constexpr.c (maybe_constant_value): Correct earlier change.
(cxx_eval_binary_expression) [SPACESHIP_EXPR]: Pass lval through.
* method.c (genericize_spaceship): Wrap result in TARGET_EXPR.
Patrick Palka [Mon, 10 Feb 2020 03:23:25 +0000 (22:23 -0500)]
c++: Fix return type deduction with an abbreviated function template
This patch fixes two issues with return type deduction in the presence of an
abbreviated function template.
The first issue (PR 69448) is that if a placeholder auto return type contains
any modifiers such as & or *, then the abbreviated function template
compensation in splice_late_return_type does not get performed for the
underlying auto node, leading to incorrect return type deduction. This happens
because splice_late_return_type does not consider that a placeholder auto return
type might have modifiers. To fix this it seems we need to look through
modifiers in the return type to obtain the location of the underlying auto node
in order to replace it with the adjusted auto node. To that end this patch
refactors the utility function find_type_usage to return a pointer to the
matched tree, and uses it to find and replace the underlying auto node.
The second issue (PR 80471) is that the AUTO_IS_DECLTYPE flag is not being
preserved in splice_late_return_type when compensating for an abbreviated
function template, leading to us treating a decltype(auto) return type as if it
was an auto return type. Fixed by making make_auto_1 set the AUTO_IS_DECLTYPE
flag whenever we're building a decltype(auto) node and adjusting callers
appropriately. The test for PR 80471 is adjusted to expect the correct
behavior.
gcc/cp/ChangeLog:
PR c++/69448
PR c++/80471
* type-utils.h (find_type_usage): Refactor to take a tree * and to
return a tree *, and update documentation accordingly.
* pt.c (make_auto_1): Set AUTO_IS_DECLTYPE when building a
decltype(auto) node.
(make_constrained_decltype_auto): No need to explicitly set
AUTO_IS_DECLTYPE anymore.
(splice_late_return_type): Use find_type_usage to find and
replace a possibly nested auto node instead of using is_auto.
Check test for is_auto into an assert when deciding whether
to late_return_type.
(type_uses_auto): Adjust the call to find_type_usage.
* parser.c (cp_parser_decltype): No need to explicitly set
AUTO_IS_DECLTYPE anymore.
libcc1/ChangeLog:
PR c++/69448
PR c++/80471
* libcp1plugin.cc (plugin_get_expr_type): No need to explicitly set
AUTO_IS_DECLTYPE anymore.
gcc/testsuite/ChangeLog:
PR c++/69448
PR c++/80471
* g++.dg/concepts/abbrev3.C: New test.
* g++.dg/cpp2a/concepts-pr80471.C: Adjust a static_assert to expect the
correct behavior.
* g++.dg/cpp0x/auto9.C: Adjust a dg-error directive.
Patrick Palka [Mon, 10 Feb 2020 15:48:27 +0000 (10:48 -0500)]
c++: Improve dump_decl for standard concepts
This patch improves the pretty printing of standard concept definitions in error
messages. In particular, standard concepts are now printed qualified whenever
appropriate, and the "concept" specifier is printed only when the
TFF_DECL_SPECIFIERS flag is specified.
In the below test, the first error message changes from
9:15: error: ‘b’ was not declared in this scope; did you mean ‘concept b’?
to
9:15: error: ‘b’ was not declared in this scope; did you mean ‘a::b’?
gcc/cp/ChangeLog:
* error.c (dump_decl) [CONCEPT_DECL]: Use dump_simple_decl.
(dump_simple_decl): Handle standard concept definitions as well as
variable concept definitions.
gcc/testsuite/ChangeLog:
* g++.dg/cpp2a/concepts6.C: New test.
GCC Administrator [Tue, 11 Feb 2020 00:16:32 +0000 (00:16 +0000)]
Daily bump.
David Malcolm [Mon, 10 Feb 2020 21:04:13 +0000 (16:04 -0500)]
analyzer.opt: fix typos in descriptions (PR 93659)
gcc/analyzer/ChangeLog:
PR analyzer/93659
* analyzer.opt (-param=analyzer-max-recursion-depth=): Fix "tha"
-> "that" typo.
(Wanalyzer-use-of-uninitialized-value): Fix "initialized" ->
"uninitialized" typo.
David Malcolm [Fri, 7 Feb 2020 10:49:24 +0000 (05:49 -0500)]
analyzer: handle vector types (PR 93350)
gcc/analyzer/ChangeLog:
PR analyzer/93350
* region-model.cc (region_model::get_lvalue_1):
Handle BIT_FIELD_REF.
(make_region_for_type): Handle VECTOR_TYPE.
gcc/testsuite/ChangeLog:
PR analyzer/93350
* gcc.dg/analyzer/torture/pr93350.c: New test.
David Malcolm [Mon, 10 Feb 2020 15:01:46 +0000 (10:01 -0500)]
analyzer: fix ICE reporting NULL dereference (PR 93647)
gcc/analyzer/ChangeLog:
PR analyzer/93647
* diagnostic-manager.cc
(diagnostic_manager::prune_for_sm_diagnostic): Bulletproof against
VAR being constant.
* region-model.cc (region_model::get_lvalue_1): Provide a better
error message when encountering an unhandled tree code.
gcc/testsuite/ChangeLog:
PR analyzer/93647
* gcc.dg/analyzer/torture/pr93647.c: New test.
Jakub Jelinek [Mon, 10 Feb 2020 21:44:40 +0000 (22:44 +0100)]
i386: Fix -mavx -mno-mavx2 ICE with VEC_COND_EXPR [PR93637]
As mentioned in the PR, for -mavx -mno-avx2 the backend does support
vcondv4div4df and vcondv8siv8sf optabs (while generally 32-byte vectors
aren't much supported in that case, it is performed using
vandps/vandnps/vorps). The problem is that after the last generic vector
lowering (where the VEC_COND_EXPR still compares two V4DF vectors and
has two V4DI last operands and V4DI result and so is considered ok) fre4
folds the condition into constant, at which point the middle-end during
expansion will try vcond_mask_optab and fall back to trying to expand it
as the constant vector < 0 vcondv4div4di, but neither of them is supported
for -mavx -mno-avx2 and thus we ICE.
So, the options I see is either what the following patch does, also support
vcond_mask_v4div4di and vcond_mask_v4siv4si already for TARGET_AVX, or
require for vcondv4div4df and vcondv8siv8sf TARGET_AVX2 rather than current
TARGET_AVX.
2020-02-10 Jakub Jelinek <jakub@redhat.com>
PR target/93637
* config/i386/sse.md (VI_256_AVX2): New mode iterator.
(vcond_mask_<mode><sseintvecmodelower>): Use it instead of VI_256.
Change condition from TARGET_AVX2 to TARGET_AVX.
* gcc.target/i386/avx-pr93637.c: New test.
David Malcolm [Wed, 5 Feb 2020 21:48:53 +0000 (16:48 -0500)]
analyzer: fix ICE with fortran constant arguments (PR 93405)
PR analyzer/93405 reports an ICE with -fanalyzer when passing
a constant "by reference" in gfortran.
The issue is that the constant is passed as an ADDR_EXPR
of a CONST_DECL, and region_model::get_lvalue_1 doesn't
know how to handle CONST_DECL.
This patch implements it for CONST_DECL by providing
a placeholder region, holding the CONST_DECL's value,
fixing the ICE.
gcc/analyzer/ChangeLog:
PR analyzer/93405
* region-model.cc (region_model::get_lvalue_1): Implement
CONST_DECL.
gcc/testsuite/ChangeLog:
PR analyzer/93405
* gfortran.dg/analyzer/pr93405.f90: New test.
David Malcolm [Wed, 5 Feb 2020 15:54:00 +0000 (10:54 -0500)]
analyzer: gfortran testsuite support
This patch adds a gfortran.dg/analyzer subdirectory with an analyzer.exp,
setting DEFAULT_FFLAGS on the tests run within it.
It also adds a couple of simple proof-of-concept tests of e.g. detecting
double-frees from gfortran.
gcc/testsuite/ChangeLog:
* gfortran.dg/analyzer/analyzer.exp: New subdirectory and .exp
suite.
* gfortran.dg/analyzer/malloc-example.f90: New test.
* gfortran.dg/analyzer/malloc.f90: New test.
Jeff Law [Mon, 10 Feb 2020 21:12:32 +0000 (14:12 -0700)]
Fix libgcc build failure for FRV with recent versions of gas.
* config/frv/frvbegin.c: Use right flags for .ctors and .dtors
sections.
* config/frv/frvend.c: Similarly.
Iain Sandoe [Mon, 10 Feb 2020 19:29:30 +0000 (20:29 +0100)]
Darwin: -Wformat-diag fix (PR93641)
The length used for the comparison for 'CFStringRef' was only comparing
for 'CFString', potentially allowing mismatched identifiers.
2020-02-10 Iain Sandoe <iain@sandoe.co.uk>
PR other/93641
* config/darwin-c.c (darwin_cfstring_ref_p): Fix up last
argument of strncmp.
Andrew Benson [Mon, 10 Feb 2020 17:59:34 +0000 (17:59 +0000)]
Fix bogus duplicate attribute errors for submodule functions.
PR fortran/83113
* array.c: Do not attempt to set the array spec for a submodule
function symbol (as it has already been set in the corresponding
module procedure interface).
* symbol.c: Do not reject duplicate POINTER, ALLOCATABLE, or
DIMENSION attributes in declarations of a submodule function.
* gfortran.h: Add a macro that tests for a module procedure in a
submodule.
* gfortran.dg/pr83113.f90: New test.
Martin Sebor [Mon, 10 Feb 2020 17:27:00 +0000 (10:27 -0700)]
PR c/93640 - The write_only and read_write attributes can be mistyped due to invalid strncmp size argument
gcc/c-family/ChangeLog:
PR c/93640
* c-attribs.c (handle_access_attribute): Correct off-by-one mistakes.
gcc/testsuite/ChangeLog:
PR c/93640
* gcc.dg/attr-access.c: New test.
Hans-Peter Nilsson [Mon, 10 Feb 2020 16:42:58 +0000 (17:42 +0100)]
gcc.target/cris/dbr-1.c: New test.
Random spotting. Exposes the missed benefit for delay-slot
filling of a splitter for indexed addressing mode (the [rN+M]
one). To be considered for common instructions and perhaps only
for suitable M; at least +-63 is obvious (when there's a register
available) as both the original and the add fit in delay-slots.
Hans-Peter Nilsson [Mon, 10 Feb 2020 16:39:00 +0000 (17:39 +0100)]
gcc.target/cris/pr93372-3.c, -4.c...-35.c: New tests.
PR target/93372
* gcc.target/cris/pr93372-3.c, gcc.target/cris/pr93372-4.c,
gcc.target/cris/pr93372-6.c, gcc.target/cris/pr93372-7.c,
gcc.target/cris/pr93372-9.c, gcc.target/cris/pr93372-10.c,
gcc.target/cris/pr93372-11.c, gcc.target/cris/pr93372-12.c,
gcc.target/cris/pr93372-13.c, gcc.target/cris/pr93372-14.c,
gcc.target/cris/pr93372-15.c, gcc.target/cris/pr93372-16.c,
gcc.target/cris/pr93372-17.c, gcc.target/cris/pr93372-18.c,
gcc.target/cris/pr93372-19.c, gcc.target/cris/pr93372-20.c,
gcc.target/cris/pr93372-21.c, gcc.target/cris/pr93372-22.c,
gcc.target/cris/pr93372-23.c, gcc.target/cris/pr93372-24.c,
gcc.target/cris/pr93372-25.c, gcc.target/cris/pr93372-26.c,
gcc.target/cris/pr93372-27.c, gcc.target/cris/pr93372-28.c,
gcc.target/cris/pr93372-29.c, gcc.target/cris/pr93372-30.c,
gcc.target/cris/pr93372-31.c, gcc.target/cris/pr93372-32.c,
gcc.target/cris/pr93372-33.c, gcc.target/cris/pr93372-34.c,
gcc.target/cris/pr93372-35.c: New tests.
Check that somewhat-trivially eliminable compare-instructions
are eliminated, for all instructions. Note that pr93372-23.c
and pr93372-24.c are xfailed with cc0.
Hans-Peter Nilsson [Mon, 10 Feb 2020 16:34:23 +0000 (17:34 +0100)]
gcc.target/cris/pr93372-2.c, -5.c, -8.c: New tests.
* gcc.target/cris/pr93372-2.c, gcc.target/cris/pr93372-5.c,
gcc.target/cris/pr93372-8.c: New tests.
These tests fails miserably both at being an example of cc0
eliminating compare instructions, and post-cc0-CRIS at showing a
significant improvement. They're here to track suboptimal
comparison code for CRIS.
Hans-Peter Nilsson [Mon, 10 Feb 2020 16:30:05 +0000 (17:30 +0100)]
gcc.target/cris/pr93372-1.c: New test.
This test was separated from the posted and approved patch named
"dbr: Filter-out TARGET_FLAGS_REGNUM from end_of_function_needs"
and applied: it doesn't fail yet. It differs from the posted
version in that function "g" is commented-out; see the added
comment.
Hans-Peter Nilsson [Mon, 10 Feb 2020 16:25:56 +0000 (17:25 +0100)]
gcc.target/cris/cris.exp (check_effective_target_cc0): New.
To simplify separating the cc0-specific xfails, let's have an
effective-target.
This likely fits all targets.
Hans-Peter Nilsson [Mon, 10 Feb 2020 16:21:13 +0000 (17:21 +0100)]
cris: try to generate zero-based comparisons
* config/cris/cris.c (cris_reduce_compare): New function.
* config/cris/cris-protos.h (cris_reduce_compare): Add prototype.
* config/cris/cris.md ("cbranch<mode>4", "cbranchdi4", "cstoredi4")
(cstore<mode>4"): Apply cris_reduce_compare in expanders.
The decc0ration work of the CRIS port made me look closer at the
code for trivial comparisons, as in the condition for branches
and conditional-stores, like in:
void g(short int a, short int b)
{
short int c = a + b;
if (c >= 0)
foo ();
}
At -O2, the cc0 version of the CRIS port has an explicit
*uneliminated* compare instruction ("cmp.w -1,$r10") instead of
an (eliminated) compare against 0 (which below I'll call a
zero-compare). This for the CRIS-cc0 version, but I see this
also for a much older gcc, at 4.7. For the decc0rated port, the
compare *is* a test against 0, eventually eliminated. To wit,
for cc0 (mind the delay-slot):
_g:
subq 4,$sp
add.w $r11,$r10
cmp.w -1,$r10
ble .L9
move $srp,[$sp]
jsr _foo
.L9:
jump [$sp+]
The compare instruction is expected to be eliminated, i.e. the
following diff to the above is desired, modulo the missing
sibling call, which corresponds to what I get from 4.7 and for
the decc0rated port:
!--- a Wed Feb 5 15:22:27 2020
!+++ b Wed Feb 5 15:22:51 2020
!@@ -1,8 +1,7 @@
! _g:
! subq 4,$sp
! add.w $r11,$r10
!- cmp.w -1,$r10
!- ble .L9
!+ bmi .L9
! move $srp,[$sp]
!
! jsr _foo
Tracking this difference, I see that for both cc0-CRIS and the
decc0rated CRIS, the comparison actually starts out as a compare
against -1 at "expand" time, but is transformed for decc0rated
CRIS to a zero-compare in "cse1".
For CRIS-cc0 "cse1" does try to replace the compare with a
zero-compare, but fails because at the same time it tries to
replace the c operand with (a + b). Or some such; it fails and
no other pass succeeds. I was not into fixing cc0-handling in
core gcc, so I didn't look closer.
BTW, at first, I was a bit surprised to see that for compares
against a constant, a zero-compare is not canonical RTX for
*all* conditions, and that instead only a subset of all RTX
conditions against a constant are canonical, transforming one
condition to the canonical one by adding 1 or -1 to the
constant. It does makes sense at a closer look, but still not
so much when emitting RTL.
There are several places that mention in comments that emitting
RTX as zero-compare is preferable, but nothing is done about it.
Some generic code instead seems confused that the *target* is
helped by seeing canonical RTX, or perhaps it (its authors) like
me, confused about what a canonical comparison is. For example,
prepare_cmp_insn calls canonicalize_comparison last before
emitting the actual instructions. I see most ports for various
port-specific reasons does their own massaging in their cbranch
and cstore expanders. Still, the suboptimal compares *should*
be fixed at expand time; better start out right than just
relying on later optimizations.
This kind of change is not acceptable in the current gcc
development stage, at least as a change in generic code.
However, it's problematic enough that I chose to fix this right
now in the CRIS port. For that, I claim a possibly
long-standing regression. After this, code before and after
decc0ration is similar enough that I can spot
compare-elimination-efforts and apply regression test-cases
without them drowning in cc0-specific xfailing.
I hope to eventually lift out cris_reduce_compare (renamed) into
say expmed.c, called in e.g. emit_store_flag_1 (replacing the
in-line code) and prepare_cmp_insn. Later.
H.J. Lu [Mon, 10 Feb 2020 16:06:53 +0000 (08:06 -0800)]
Move ChangeLog entry of commit
bf6465d046 from gcc to libgcc
Jakub Jelinek [Mon, 10 Feb 2020 16:05:58 +0000 (17:05 +0100)]
arm: Add testcase for already fixed ICE [PR91913]
2020-02-10 Jakub Jelinek <jakub@redhat.com>
PR target/91913
* gfortran.dg/pr91913.f90: New test.
H.J. Lu [Mon, 10 Feb 2020 15:58:45 +0000 (07:58 -0800)]
i386: Properly pop restore token in signal frame
Linux CET kernel places a restore token on shadow stack for signal
handler to enhance security. The restore token is 8 byte and aligned
to 8 bytes. It is usually transparent to user programs since kernel
will pop the restore token when signal handler returns. But when an
exception is thrown from a signal handler, now we need to pop the
restore token from shadow stack. For x86-64, we just need to treat
the signal frame as normal frame. For i386, we need to search for
the restore token to check if the original shadow stack is 8 byte
aligned. If the original shadow stack is 8 byte aligned, we just
need to pop 2 slots, one restore token, from shadow stack. Otherwise,
we need to pop 3 slots, one restore token + 4 byte padding, from
shadow stack.
This patch also includes 2 tests, one has a restore token with 4 byte
padding and one without.
Tested on Linux/x86-64 CET machine with and without -m32.
libgcc/
PR libgcc/85334
* config/i386/shadow-stack-unwind.h (_Unwind_Frames_Increment):
New.
gcc/testsuite/
PR libgcc/85334
* g++.target/i386/pr85334-1.C: New test.
* g++.target/i386/pr85334-2.C: Likewise.
Richard Earnshaw [Mon, 10 Feb 2020 15:37:23 +0000 (15:37 +0000)]
arm: correct constraints on movsi_compare0 [PR91913]
The peephole that detects a mov of one register to another followed by
a comparison of the original register against zero is only used in Arm
state; but the instruction that matches this is generic to all 32-bit
compilation states. That instruction lacks support for SP which is
permitted in Arm state, but has restrictions in Thumb2 code.
This patch fixes the problem by allowing SP when in ARM state for all
registers; in Thumb state it allows SP only as a source when the
register really is copied to another target.
* config/arm/arm.md (movsi_compare0): Allow SP as a source register
in Thumb state and also as a destination in Arm state. Add T16
variants.
Hans-Peter Nilsson [Tue, 28 Jan 2020 21:34:49 +0000 (22:34 +0100)]
md.texi (Define Subst): Match closing paren in example.
Jakub Jelinek [Mon, 10 Feb 2020 14:50:17 +0000 (15:50 +0100)]
c-format: -Wformat-diag fix [PR93641]
The last argument to strncasecmp is incorrect, so it matched even when
can%' wasn't followed by t. Also, the !ISALPHA (format_chars[1]) test
looks pointless, format_chars[1] must be ' if strncasecmp succeeded and
so will never be ISALPHA.
2020-02-10 Jakub Jelinek <jakub@redhat.com>
PR other/93641
* c-format.c (check_plain): Fix up last argument of strncasecmp.
Remove useless extra test.
* gcc.dg/format/gcc_diag-11.c (test_cdiag_bad_words): Add two further
tests.
Christophe Lyon [Mon, 10 Feb 2020 12:54:39 +0000 (12:54 +0000)]
arm: Fix up arm installed unwind.h for use in pedantic modes [PR93615]
Commit r10-6500-g811a475ea3fcc55ee4aea7c81171891ef19dfc25 broke the
GCC build for arm-none-uclinuxfdpiceabi, as it forgot to update some
uses of gnu_Unwind_Find_got.
2020-02-10 Christophe Lyon <christophe.lyon@linaro.org>
libgcc/
PR target/93615
* unwind-arm-common.inc: Replace uses of gnu_Unwind_Find_got with
_Unwind_gnu_Find_got.
* unwind-pe.h: Likewise.
Jakub Jelinek [Mon, 10 Feb 2020 14:04:55 +0000 (15:04 +0100)]
c++: Fux strncmp last argument in dump_decl_name [PR93641]
I'm not aware of symbols starting with _ZG that don't start with _ZGR
prefix, but perhaps in the future there might be some.
2020-02-10 Jakub Jelinek <jakub@redhat.com>
PR other/93641
* error.c (dump_decl_name): Fix up last argument to strncmp.
Jakub Jelinek [Mon, 10 Feb 2020 14:02:39 +0000 (15:02 +0100)]
i386: Fix strncmp last arguments in x86_64_elf_section_type_flags
Clearly I can't count, so we would consider as SECTION_BSS even sections
like .lbssfoo or .gnu.linkonce.lbbar, even when linker only considers as
special .lbss or .lbss.baz or .gnu.linkonce.lb.qux.
2020-02-10 Jakub Jelinek <jakub@redhat.com>
PR target/58218
PR other/93641
* config/i386/i386.c (x86_64_elf_section_type_flags): Fix up last
arguments of strncmp.
Jason Merrill [Sun, 9 Feb 2020 23:47:34 +0000 (00:47 +0100)]
c++: Fix flexible array with synthesized constructor.
We were already rejecting initialization of a flexible array member in a
constructor; we similarly shouldn't try to clean it up.
PR c++/93618
* tree.c (array_of_unknown_bound_p): New.
* init.c (perform_member_init): Do nothing for flexible arrays.
Frederik Harwath [Mon, 10 Feb 2020 07:08:00 +0000 (08:08 +0100)]
Add xfails to libgomp tests target-{33,34}.c, target-link-1.c
Add xfails for nvptx offloading because
"no GOMP_OFFLOAD_async_run implemented in plugin-nvptx.c"
(https://gcc.gnu.org/PR81688) and because
"omp target link not implemented for nvptx"
(https://gcc.gnu.org/PR81689).
libgomp/
* testsuite/libgomp.c/target-33.c: Add xfail for execution on
offload_target_nvptx, cf. https://gcc.gnu.org/PR81688.
* testsuite/libgomp.c/target-34.c: Likewise.
* testsuite/libgomp.c/target-link-1.c: Add xfail for
offload_target_nvptx, cf. https://gcc.gnu.org/PR81689.
Feng Xue [Mon, 10 Feb 2020 04:46:45 +0000 (12:46 +0800)]
Update testcase ChangeLog for PR93203
2020-02-10 Feng Xue <fxue@os.amperecomputing.com>
PR ipa/93203
* g++.dg/ipa/pr93203.C: New test.
* gcc.dg/ipa/ipcp-1.c: Change dump string.
Feng Xue [Tue, 21 Jan 2020 12:53:38 +0000 (20:53 +0800)]
Generalized value pass-through for self-recusive function (PR ipa/93203)
Besides simple pass-through (aggregate) jump function, arithmetic (aggregate)
jump function could also bring same (aggregate) value as parameter passed-in
for self-feeding recursive call. For example,
f1 (int i) /* normal jump function */
{
f1 (i & 1);
}
Suppose i is 0, recursive propagation via (i & 1) also gets 0, which
can be seen as a simple pass-through of i.
f2 (int *p) /* aggregate jump function */
{
int t = *p & 1;
f2 (&t);
}
Likewise, if *p is 0, (*p & 1) is also 0, and &t is an aggregate simple
pass-through of p.
2020-02-10 Feng Xue <fxue@os.amperecomputing.com>
PR ipa/93203
* ipa-cp.c (ipcp_lattice::add_value): Add source with same call edge
but different source value.
(adjust_callers_for_value_intersection): New function.
(gather_edges_for_value): Adjust order of callers to let a
non-self-recursive caller be the first element.
(self_recursive_pass_through_p): Add a new parameter "simple", and
check generalized self-recursive pass-through jump function.
(self_recursive_agg_pass_through_p): Likewise.
(find_more_scalar_values_for_callers_subset): Compute value from
pass-through jump function for self-recursive.
(intersect_with_plats): Cleanup previous implementation code for value
itersection with self-recursive call edge.
(intersect_with_agg_replacements): Likewise.
(intersect_aggregates_with_edge): Deduce value from pass-through jump
function for self-recursive call edge. Cleanup previous implementation
code for value intersection with self-recursive call edge.
(decide_whether_version_node): Remove dead callers and adjust order
to let a non-self-recursive caller be the first element.
PR ipa/93203
* g++.dg/ipa/pr93203.C: New test.
GCC Administrator [Mon, 10 Feb 2020 00:16:38 +0000 (00:16 +0000)]
Daily bump.
Uros Bizjak [Sun, 9 Feb 2020 17:04:31 +0000 (18:04 +0100)]
Fix target selector for pr91333.c
* gcc.target/i386/pr91333.c (dg-do): Fix target selector.
Uros Bizjak [Sun, 9 Feb 2020 16:56:38 +0000 (17:56 +0100)]
Improve splitX passes management
The names of split_before_sched2 ("split4") and split_before_regstack
("split3") do not reflect their insertion point in the sequence of passes,
where split_before_regstack follows split_before_sched2. Reorder the code
and rename the passes to reflect the reality.
split_before_regstack pass does not need to run if split_before_sched2 pass
was already performed. Introduce enable_split_before_sched2 function to
simplify gating functions of these two passes.
There is no need for a separate rest_of_handle_split_before_sched2.
split_all_insns can be called unconditionally from
pass_split_before_sched2::execute, since the corresponding gating function
determines if the pass is executed or not.
* recog.c: Move pass_split_before_sched2 code in front of
pass_split_before_regstack.
(pass_data_split_before_sched2): Rename pass to split3 from split4.
(pass_data_split_before_regstack): Rename pass to split4 from split3.
(rest_of_handle_split_before_sched2): Remove.
(pass_split_before_sched2::execute): Unconditionally call
split_all_insns.
(enable_split_before_sched2): New function.
(pass_split_before_sched2::gate): Use enable_split_before_sched2.
(pass_split_before_regstack::gate): Ditto.
* config/nds32/nds32.c (nds32_split_double_word_load_store_p):
Update name check for renamed split4 pass.
* config/sh/sh.c (register_sh_passes): Update pass insertion
point for renamed split4 pass.
Jonathan Wakely [Sun, 9 Feb 2020 13:58:16 +0000 (13:58 +0000)]
libstdc++: Fix names of types in comment
* testsuite/20_util/function_objects/range.cmp/equal_to.cc: Fix
comment.
* testsuite/20_util/function_objects/range.cmp/less.ccL Likewise.
Jonathan Wakely [Sun, 9 Feb 2020 13:54:32 +0000 (13:54 +0000)]
libstdc++: Fix non-ASCII characters in comment
* include/std/ranges: Fix non-ASCII characters in comment.
Jonathan Wakely [Sun, 9 Feb 2020 13:37:43 +0000 (13:37 +0000)]
libstdc++: Fix BUILTIN-PTR-CMP helpers
The helpers that implement BUILTIN-PTR-CMP do not currently check if the
arguments are actually comparable, so the concept is true when it
shouldn't be.
Since we're trying to test for an unambiguous conversion to pointers, we
can also require that it returns bool, because the built-in comparisons
for pointers do return bool.
* include/bits/range_cmp.h (__detail::__eq_builtin_ptr_cmp): Require
equality comparison to be valid and return bool.
(__detail::__less_builtin_ptr_cmp): Likewise for less-than comparison.
* testsuite/20_util/function_objects/range.cmp/equal_to.cc: Check
type with ambiguous conversion to fundamental types.
* testsuite/20_util/function_objects/range.cmp/less.cc: Likewise.
Jakub Jelinek [Sun, 9 Feb 2020 11:32:22 +0000 (12:32 +0100)]
c++: Fix ICE during constexpr virtual call evaluation [PR93633]
The first (valid) testcase ICEs because for
A *a = new B ();
a->foo (); // virtual method call
we actually see &heap and the "heap " objects don't have the class or
whatever else type was used in new expression, but an array type containing
one (or more of those for array new) and so when using TYPE_BINFO (objtype)
on it we ICE.
This patch handles this special case, and otherwise punts (as shown e.g. in
the second testcase, where because the heap object is already deleted,
we don't really want to allow it to be used.
2020-02-09 Jakub Jelinek <jakub@redhat.com>
PR c++/93633
* constexpr.c (cxx_eval_constant_expression): If obj is heap var with
ARRAY_TYPE, use the element type. Punt if objtype after that is not
a class type.
* g++.dg/cpp2a/constexpr-new11.C: New test.
* g++.dg/cpp2a/constexpr-new12.C: New test.
* g++.dg/cpp2a/constexpr-new13.C: New test.
Jakub Jelinek [Sun, 9 Feb 2020 07:17:10 +0000 (08:17 +0100)]
openmp: Optimize DECL_IN_CONSTANT_POOL vars in target regions
DECL_IN_CONSTANT_POOL are shared and thus don't really get emitted in the
BLOCK where they are used, so for OpenMP target regions that have initializers
gimplified into copying from them we actually map them at runtime from host to
offload devices. This patch instead marks them as "omp declare target", so
that they are on the target device from the beginning and don't need to be
copied there.
2020-02-09 Jakub Jelinek <jakub@redhat.com>
* gimplify.c (gimplify_adjust_omp_clauses_1): Promote
DECL_IN_CONSTANT_POOL variables into "omp declare target" to avoid
copying them around between host and target.
* testsuite/libgomp.c/target-38.c: New test.
GCC Administrator [Sun, 9 Feb 2020 00:16:37 +0000 (00:16 +0000)]
Daily bump.
Andrew Pinski [Sat, 8 Feb 2020 15:57:54 +0000 (15:57 +0000)]
aarch64: fix strict alignment for vector load/stores (PR 91927)
Hi,
The problem here is that the vector mode version of movmisalign<mode>
was only conditionalized on if SIMD was enabled instead of being
also conditionalized on STRICT_ALIGNMENT too.
Applied as pre-approved in the bug report by Richard Sandiford
after a bootstrap/test on aarch64-linux-gnu.
Thanks,
Andrew Pinski
ChangeLog:
PR target/91927
* config/aarch64/aarch64-simd.md (movmisalign<mode>): Check
STRICT_ALIGNMENT also.
testsuite/ChangeLog:
PR target/91927
* gcc.target/aarch64/pr91927.c: New testcase.
Peter Bergner [Sat, 8 Feb 2020 23:33:08 +0000 (17:33 -0600)]
rs6000: Fix testsuite fallout from previous fix. [PR93136]
The fix for PR target/92923 exposed some test cases with fragile
scan-assembler-times counting. Split the test cases into smaller
functions, which allows less chance of optimizations causing slight
instruction count numbers.
gcc/testsuite/
PR target/93136
* gcc.dg/vmx/ops.c: Add -flax-vector-conversions to dg-options.
* gcc.target/powerpc/vsx-vector-6.h: Split tests into smaller functions.
* gcc.target/powerpc/vsx-vector-6.p7.c: Adjust scan-assembler-times
regex directives. Adjust expected instruction counts.
* gcc.target/powerpc/vsx-vector-6.p8.c: Likewise.
* gcc.target/powerpc/vsx-vector-6.p9.c: Likewise.
Jim Wilson [Sat, 8 Feb 2020 21:57:36 +0000 (13:57 -0800)]
RISC-V: Improve caller-save code generation.
Avoid paradoxical subregs when caller save. This reduces stack frame size
due to smaller loads and stores, and more frequent rematerialization.
PR target/93532
* config/riscv/riscv.h (HARD_REGNO_CALLER_SAVE_MODE): Define.
Jason Merrill [Mon, 27 Jan 2020 03:58:32 +0000 (22:58 -0500)]
c++: Use constexpr to avoid wrong -Wsign-compare (PR90691).
We would like to do constexpr evaluation to avoid false positives on
warnings, but constexpr evaluation can involve function body copying that
changes DECL_UID, which breaks -fcompare-debug. So let's remember
that we need to avoid that.
PR c++/90691
* expr.c (fold_for_warn): Call maybe_constant_value.
* constexpr.c (struct constexpr_ctx): Add uid_sensitive field.
(maybe_constant_value): Add uid_sensitive parm.
(get_fundef_copy): Don't copy if it's true.
(cxx_eval_call_expression): Don't instantiate if it's true.
(cxx_eval_outermost_constant_expr): Likewise.
Jason Merrill [Fri, 7 Feb 2020 21:28:20 +0000 (16:28 -0500)]
c++: Preserve location in maybe_constant_value.
If cxx_eval_outermost_constant_expr doesn't change the argument, we really
shouldn't unshare it when we try to fold it again.
PR c++/92852
* constexpr.c (maybe_constant_value): Don't unshare if the cached
value is the same as the argument.
Jason Merrill [Fri, 7 Feb 2020 22:14:11 +0000 (17:14 -0500)]
c++: Fix -Wreturn-local-addr location.
* typeck.c (maybe_warn_about_returning_address_of_local): Add
location parameter.
Jason Merrill [Fri, 7 Feb 2020 21:10:18 +0000 (16:10 -0500)]
c++: Fix TREE_SIDE_EFFECTS after digest_init.
* typeck2.c (process_init_constructor): Also clear TREE_SIDE_EFFECTS
if appropriate.
Jakub Jelinek [Sat, 8 Feb 2020 14:11:28 +0000 (15:11 +0100)]
c++: Handle CONSTRUCTORs without indexes in find_array_ctor_elt [PR93549]
My change
* typeck2.c (store_init_value): Don't call cp_fully_fold_init on
initializers of automatic non-constexpr variables in constexpr
functions.
- value = cp_fully_fold_init (value);
+ /* Don't fold initializers of automatic variables in constexpr functions,
+ that might fold away something that needs to be diagnosed at constexpr
+ evaluation time. */
+ if (!current_function_decl
+ || !DECL_DECLARED_CONSTEXPR_P (current_function_decl)
+ || TREE_STATIC (decl))
+ value = cp_fully_fold_init (value);
from the constexpr new change apparently broke the following testcase.
When handling COND_EXPR, we build_vector_from_val, however as the argument we
pass to it is not an INTEGER_CST/REAL_CST, but that wrapped in a
NON_LVALUE_EXPR location wrapper, we end up with a CONSTRUCTOR and as it is
middle-end that builds it, it doesn't bother with indexes. The
cp_fully_fold_init call used to fold it into VECTOR_CST in the past, but as
we intentionally don't invoke it anymore as it might fold away something
that needs to be diagnosed during constexpr evaluation, we end up evaluating
ARRAY_REF into the index-less CONSTRUCTOR. The following patch fixes the
ICE by teaching find_array_ctor_elt to handle CONSTRUCTORs without indexes
(that itself could be still very efficient) and CONSTRUCTORs with some
indexes present and others missing (the rules are that if the index on the
first element is missing, then it is the array's lowest index (in C/C++ 0)
and if other indexes are missing, they are the index of the previous element
+ 1).
Here is a new version, which assumes CONSTRUCTORs with all or none indexes
and for CONSTRUCTORs without indexes performs the verification for
flag_checking directly in find_array_ctor_elt. For CONSTRUCTORs with
indexes, it doesn't do the verification of all elts, because some CONSTRUCTORs
can be large, and it "verifies" only what it really needs - if all elts
touched during the binary search have indexes, that is actually all we care
about because we are sure we found the right elt. It is just if we see a
missing index we need assurance that all are missing to be able to directly
access it.
The assumption then simplifies the patch, for no index CONSTRUCTORs we can
use direct access like for CONSTRUCTORs where last elt index is equal to the
elt position. If we append right after the last elt, we just should clear
the index so that we don't violate the assumption, and if we need a gap
between the elts and the elt to be added, we need to add indexes.
2020-02-08 Jakub Jelinek <jakub@redhat.com>
PR c++/93549
* constexpr.c (find_array_ctor_elt): If last element has no index,
for flag_checking verify all elts have no index. If i is within the
elts, return it directly, if it is right after the last elt, append
if NULL index, otherwise force indexes on all elts.
(cxx_eval_store_expression): Allow cep->index to be NULL.
* g++.dg/ext/constexpr-pr93549.C: New test.
Jakub Jelinek [Sat, 8 Feb 2020 09:59:40 +0000 (10:59 +0100)]
i386: Make xmm16-xmm31 call used even in ms ABI [PR65782]
On Tue, Feb 04, 2020 at 11:16:06AM +0100, Uros Bizjak wrote:
> I guess that Comment #9 patch form the PR should be trivially correct,
> but althouhg it looks obvious, I don't want to propose the patch since
> I have no means of testing it.
I don't have means of testing it either.
https://docs.microsoft.com/en-us/cpp/build/x64-calling-convention?view=vs-2019
is quite explicit that [xyz]mm16-31 are call clobbered and only xmm6-15 (low
128-bits only) are call preserved.
We are talking e.g. about
/* { dg-options "-O2 -mabi=ms -mavx512vl" } */
typedef double V __attribute__((vector_size (16)));
void foo (void);
V bar (void);
void baz (V);
void
qux (void)
{
V c;
{
register V a __asm ("xmm18");
V b = bar ();
asm ("" : "=x" (a) : "0" (b));
c = a;
}
foo ();
{
register V d __asm ("xmm18");
V e;
d = c;
asm ("" : "=x" (e) : "0" (d));
baz (e);
}
}
where according to the MSDN doc gcc incorrectly holds the c value
in xmm18 register across the foo call; if foo is compiled by some Microsoft
compiler (or LLVM), then it could clobber %xmm18.
If all xmm18 occurrences are changed to say xmm15, then it is valid to hold
the 128-bit value across the foo call (though, surprisingly, LLVM saves it
into stack anyway).
The other parts are I guess mainly about SEH. Consider e.g.
void
foo (void)
{
register double x __asm ("xmm14");
register double y __asm ("xmm18");
asm ("" : "=x" (x));
asm ("" : "=v" (y));
x += y;
y += x;
asm ("" : : "x" (x));
asm ("" : : "v" (y));
}
looking at cross-compiler output, with -O2 -mavx512f this emits
.file "abcdeq.c"
.text
.align 16
.globl foo
.def foo; .scl 2; .type 32; .endef
.seh_proc foo
foo:
subq $40, %rsp
.seh_stackalloc 40
vmovaps %xmm14, (%rsp)
.seh_savexmm %xmm14, 0
vmovaps %xmm18, 16(%rsp)
.seh_savexmm %xmm18, 16
.seh_endprologue
vaddsd %xmm18, %xmm14, %xmm14
vaddsd %xmm18, %xmm14, %xmm18
vmovaps (%rsp), %xmm14
vmovaps 16(%rsp), %xmm18
addq $40, %rsp
ret
.seh_endproc
.ident "GCC: (GNU) 10.0.1
20200207 (experimental)"
Does whatever assembler mingw64 uses even assemble this (I mean the
.seh_savexmm %xmm16, 16 could be problematic)?
I can find e.g.
https://stackoverflow.com/questions/
43152633/invalid-register-for-seh-savexmm-in-cygwin/
43210527
which then links to
https://gcc.gnu.org/PR65782
2020-02-08 Uroš Bizjak <ubizjak@gmail.com>
Jakub Jelinek <jakub@redhat.com>
PR target/65782
* config/i386/i386.h (CALL_USED_REGISTERS): Make
xmm16-xmm31 call-used even in 64-bit ms-abi.
* gcc.target/i386/pr65782.c: New test.
Co-authored-by: Uroš Bizjak <ubizjak@gmail.com>
GCC Administrator [Sat, 8 Feb 2020 00:16:49 +0000 (00:16 +0000)]
Daily bump.