David Green [Mon, 27 Feb 2023 14:34:52 +0000 (14:34 +0000)]
[AArch64] Add some tests for multiple uses of extended vector extracts. NFC
Alexander Belyaev [Mon, 27 Feb 2023 14:16:27 +0000 (15:16 +0100)]
[mlir] Insert tensor.cast only when needed when folding tensor.cast into extract_slice.
Differential Revision: https://reviews.llvm.org/D144868
Pavel Kosov [Mon, 27 Feb 2023 14:15:45 +0000 (17:15 +0300)]
[OHOS] Add support for OpenHarmony
Add support for OpenHarmony OS
General OpenHarmony OS discussion on discourse thread "[RFC] Add support for OpenHarmony OS"
https://discourse.llvm.org/t/rfc-add-support-for-openharmony-os/66656
Reviewed By: DavidSpickett
Differential Revision: https://reviews.llvm.org/D138202
Kerry McLaughlin [Mon, 27 Feb 2023 13:38:37 +0000 (13:38 +0000)]
[SME2][AArch64] Add multi-indexed multiply-add long long intrinsics
Adds intrinsics for the following SME2 instructions (1, 2 & 4 vector):
- smlall
- umlall
- smlsll
- umlsll
- sumlall
- usmlall
NOTE: These intrinsics are still in development and are subject to future changes.
Reviewed By: david-arm
Differential Revision: https://reviews.llvm.org/D143278
Nikita Popov [Wed, 22 Feb 2023 15:35:51 +0000 (16:35 +0100)]
[GlobalOpt] Ignore only loaded / only stored global parts in global SRA heuristic
When limiting the number of parts we split a global into, ignore
any parts that are either only loaded or only stored, because we
expect these to be optimized away after SRA.
Differential Revision: https://reviews.llvm.org/D129857
Igor Zhukov [Sun, 19 Feb 2023 00:40:41 +0000 (07:40 +0700)]
[libc++][ranges] Implement LWG-3860 range_common_reference_t is missing
Adrian Kuegel [Mon, 27 Feb 2023 13:01:20 +0000 (14:01 +0100)]
[mlir] Use the same name as the generated parameter name (NFC).
When commenting for which parameter a value is passed, the same name
should be used as is used for the real parameter. In this case, the
parameter name is generated from the TransformOps.td file.
Nimish Mishra [Mon, 27 Feb 2023 11:54:02 +0000 (17:24 +0530)]
[flang][OpenMP] Handle lastprivate on sections construct
This patch adds support for lastprivate on sections construct.
One omp.sections operation can have several omp.section operation. As such, the privatization happens in the lexically last omp.section operation.
Reviewed By: kiranchandramohan, peixin
Differential Revision: https://reviews.llvm.org/D133686
Sacha Ballantyne [Mon, 27 Feb 2023 11:00:45 +0000 (11:00 +0000)]
[Flang] Add Minloc to simplify intrinsics pass
This patch adds minloc to the simplify intrinsics pass, supporting calls with KIND or MASK arguments while calls which have BACK, DIM or have a CHARACTER input array are rejected. This patch is targeting exchange2, and in benchmarks provides a ~11% improvement in performance.
Also included are some minor style changes / cleanup in simplifyIntrinsics.cpp.
Reviewed By: vzakhari
Differential Revision: https://reviews.llvm.org/D144103
Max Kazantsev [Mon, 27 Feb 2023 11:22:52 +0000 (18:22 +0700)]
[LoopPredication] Account for critical edges when inserting assumes. PR26496
Loop predication can insert assumes to preserve knowledge about some facts that
may otherwise be lost, because loop predication is a lossy transform. When a guard
is represented as branch by widenable condition, it should insert it in the guarded
block. However, if the guarded block has other predecessors than the guard block,
then the condition might not dominate it. Currently we generate invalid code here.
One possible fix here is to split critical edge and insert the assume there, but in
this case we should modify CFG, which Loop Predication is not currently doing, and we
want to keep it that way.
The fix is to handle this case by inserting a Phi which takes `Cond` as input from the
guard block and `true` from any other blocks. This is valid in terms of IR and does
not introduce any new knowledge if we came from another block.
Differential Revision: https://reviews.llvm.org/D144859
Reviewed By: nikic, skatkov
Nikita Popov [Mon, 20 Feb 2023 08:46:54 +0000 (09:46 +0100)]
Reapply [InstCombine] Remove early constant fold
The reported compile-time regression has been address in
47f9109dff80a1abbe2705ee71dc0882b1d62274.
Additionally, this contains a change to immediately fold zext
with constant operand, even if it's used in a trunc. I'm not sure
if this is relevant for anything, but I noticed it as a behavioral
discrepancy when investigating this issue.
-----
InstCombine currently performs a constant folding attempt as part
of the main InstCombine loop, before visiting the instruction.
However, each visit method will also attempt to simplify the
instruction, which will in turn constant fold it. (Additionally,
we also constant fold instructions before the main InstCombine loop
and use a constant folding IR builder, so this is doubly redundant.)
There is one place where InstCombine visit methods currently don't
call into simplification, and that's casts. To be conservative,
I've added an explicit constant folding call there (though it has
no impact on tests).
This makes for a mild compile-time improvement and in particular
mitigates the compile-time regression from enabling load
simplification in
be88b5814d9efce131dbc0c8e288907e2e6c89be.
Differential Revision: https://reviews.llvm.org/D144369
Marco Elver [Mon, 27 Feb 2023 11:05:02 +0000 (12:05 +0100)]
[SelectionDAG] Transitively copy NodeExtraInfo on RAUW
During legalization of the SelectionDAG, some nodes are replaced with
arch-specific nodes. These may be complex nodes, where the root node no
longer corresponds to the node that should carry the extra info.
Fix the issue by copying extra info to the new node and all its new
transitive operands during RAUW. See code comments for more details.
This fixes the remaining pcsections-atomics.ll tests on X86.
Reviewed By: dvyukov
Differential Revision: https://reviews.llvm.org/D144677
Marco Elver [Mon, 27 Feb 2023 11:04:52 +0000 (12:04 +0100)]
[X86][FixupBWInsts] Fix propagation of !pcsections metadata
Use MIMetadata() to propagate both DebugLoc and !pcsections metadata.
This fixes several of the non-native sized !pcsections tests in
pcsections-atomics.ll.
Reviewed By: dvyukov
Differential Revision: https://reviews.llvm.org/D144676
Marco Elver [Mon, 27 Feb 2023 11:04:42 +0000 (12:04 +0100)]
[X86] Improve atomics test for !pcsections
Extend pcsections-atomics.ll to exhaustively test all atomic ops up to
64 bits. This currently shows that some atomic operations do not end up
in PC sections. This will be addressed in a subsequent change.
Differential Revision: https://reviews.llvm.org/D144710
Marco Elver [Mon, 27 Feb 2023 11:04:21 +0000 (12:04 +0100)]
[X86] Move atomics test for !pcsections into separate file
The pcsections.ll test primarily tests that the AsmPrinter produces the
right output in sections. This output is not easily covered by
update_llc_test_checks.py, and as such is hand written. This makes
maintenance rather burdensome. Instead, let's keep pcsections.ll as
simple as possible.
Move the more complex tests that primarily test that some atomic
operations end up in the PC section to pcsections-atomics.ll.
NFC.
Reviewed By: dvyukov, vitalybuka
Differential Revision: https://reviews.llvm.org/D144675
Nikita Popov [Mon, 27 Feb 2023 10:56:36 +0000 (11:56 +0100)]
[InstCombine] Guard against many users when swapping icmp operands
This addresses the compile-time regression reported on D144369.
If we don't fold constant operands early, then we might end up
walking very large use lists of constants here. Explicitly exclude
constants, and also limit the number of inspected users to avoid
degenerate cases like this.
This entire transform shouldn't be part of InstCombine in the
first place though.
Manuel Klimek [Mon, 27 Feb 2023 10:50:05 +0000 (10:50 +0000)]
[clang-format] Fix assertion that doesn't hold under fuzzing.
chendewen [Mon, 27 Feb 2023 09:24:11 +0000 (17:24 +0800)]
[SVE] Add intrinsics for uniform dsp operations that explicitly undefine the result for inactive lanes.
This patch adds new intrinsics for uniform dsp operations and changes the lowering for the following builtins to emit calls to the new aarch64.sve.###.u intrinsics.
svsqsub_x
svsqsub_n_x
svuqsub_x
svuqsub_n_x
svsqsubr_x
svsqsubr_n_x
svuqsubr_x
svuqsubr_n_x
Reviewed By: Paul Walker
Differential Revision: https://reviews.llvm.org/D144704
Manuel Klimek [Mon, 27 Feb 2023 09:39:40 +0000 (09:39 +0000)]
[clang-format] Add macro replacement to fuzzing.
Haojian Wu [Mon, 27 Feb 2023 10:33:45 +0000 (11:33 +0100)]
Michael Platings [Fri, 24 Feb 2023 21:07:27 +0000 (21:07 +0000)]
Allow building with CMAKE_SYSTEM_NAME=Generic
This is important for building runtimes for bare metal targets.
Differential Revision: https://reviews.llvm.org/D144757
Max Kazantsev [Mon, 27 Feb 2023 10:19:17 +0000 (17:19 +0700)]
[Test] Add failing test for PR61022
Details: https://github.com/llvm/llvm-project/issues/61022
Sergey Kachkov [Mon, 27 Feb 2023 09:56:13 +0000 (12:56 +0300)]
Revert "[GVN] Support address translation through select instructions"
This reverts commit
b5bf6f6392a3408be1b7b7e036eb69358c5a2c29.
Nikita Popov [Wed, 22 Feb 2023 16:05:33 +0000 (17:05 +0100)]
[SCEV] Make scalable size representation more explicit
Represent scalable type sizes using C * vscale, where vscale is
the vscale constant expression. This exposes a bit more information
to SCEV, because the vscale multiplier is explicitly modeled in SCEV
(rather than part of the sizeof expression).
This is mainly intended as an alternative to D143642.
Differential Revision: https://reviews.llvm.org/D144624
Augustin Fabre [Mon, 27 Feb 2023 09:51:56 +0000 (01:51 -0800)]
[clang-format] clang-format.el: fix warnings
Differential Revision: https://reviews.llvm.org/D143560
LLVM GN Syncbot [Mon, 27 Feb 2023 09:25:56 +0000 (09:25 +0000)]
[gn build] Port
e7950fceb1e7
Carlos Alberto Enciso [Mon, 27 Feb 2023 08:12:19 +0000 (08:12 +0000)]
[llvm-debuginfo-analyzer] (09/09) - CodeView Reader
llvm-debuginfo-analyzer is a command line tool that processes debug
info contained in a binary file and produces a debug information
format agnostic “Logical View”, which is a high-level semantic
representation of the debug info, independent of the low-level
format.
The code has been divided into the following patches:
1) Interval tree
2) Driver and documentation
3) Logical elements
4) Locations and ranges
5) Select elements
6) Warning and internal options
7) Compare elements
8) ELF Reader
9) CodeView Reader
Full details:
https://discourse.llvm.org/t/llvm-dev-rfc-llvm-dva-debug-information-visual-analyzer/62570
This patch:
This is a high level summary of the changes in this patch.
CodeView Reader
- Support for CodeView/PDB.
LVCodeViewReader, LVTypeVisitor, LVSymbolVisitor, LVLogicalVisitor
Reviewed By: psamolysov, probinson, djtodoro, zequanwu
Differential Revision: https://reviews.llvm.org/D125784
Haojian Wu [Mon, 27 Feb 2023 09:07:16 +0000 (10:07 +0100)]
[include-cleaner] Fix an unintended early return when checking the
incompatible flags in the CLI tool.
Sergey Kachkov [Wed, 25 Jan 2023 13:10:29 +0000 (16:10 +0300)]
[GVN] Support address translation through select instructions
Process cases when phi incoming in predecessor block has select
instruction, and this select address is unavailable, but there
are addresses translated from both sides of select instruction.
Differential Revision: https://reviews.llvm.org/D142705
Christian Ulmann [Mon, 27 Feb 2023 08:49:06 +0000 (09:49 +0100)]
[mlir][llvm] Stop exporting empty debug MD strings
This commit ensures that no empty debug metadata strings are exported as
these are not legal names. Additionally, this commit ensures that
non-existing strings are not accidentially imported as empty strings.
Reviewed By: gysit
Differential Revision: https://reviews.llvm.org/D144263
Diana Picus [Thu, 23 Feb 2023 12:01:02 +0000 (13:01 +0100)]
[AMDGPU] Run update scripts on existing tests. NFC
Update a few tests where the checks aren't exactly kosher.
Differential Revision: https://reviews.llvm.org/D144639
Christian Ulmann [Mon, 27 Feb 2023 08:31:48 +0000 (09:31 +0100)]
[mlir][llvm] Builders dont access null attr (NFC)
Reviewed By: gysit
Differential Revision: https://reviews.llvm.org/D144267
Matthias Springer [Mon, 27 Feb 2023 08:35:37 +0000 (09:35 +0100)]
[mlir][SCF] Fix incorrect API usage in RewritePatterns
Incorrect API usage was detected by D144552.
Differential Revision: https://reviews.llvm.org/D144636
Jean Perier [Mon, 27 Feb 2023 08:05:11 +0000 (09:05 +0100)]
[flang][hlfir] Lower associate construct to HLFIR
- always use genExprAddr when lowering to HLFIR: it does not create
temporary for array sections without vector subscripts, so there is
no need to have custom logic.
- update mangling to deal with AssocDetailsEntity. Their name is
required in HLFIR so that it can be added to the hlfir.declare
that is created for the selector once it is lowered. This should
allow getting debug info for selector when debug info are generated
from hlfir.declare.
The rest of associate construct lowering is unchanged and shared with
the current lowering.
This patch also enables select type lowering to work properly, but some
other todos (mainly about parent component references) prevents porting
the tests for now, so this will be done later.
Differential Revision: https://reviews.llvm.org/D144740
Jean Perier [Mon, 27 Feb 2023 08:04:20 +0000 (09:04 +0100)]
[flang][hlfir] Lower allocatable assignment to HLFIR
Nothing much to do except set the right attributes on hlfir.assign.
Differential Revision: https://reviews.llvm.org/D144727
Jean Perier [Mon, 27 Feb 2023 08:03:09 +0000 (09:03 +0100)]
[flang][hlfir] add allocatable assignment semantic to hlfir.assign
Differential Revision: https://reviews.llvm.org/D144723
Nilanjana Basu [Sat, 11 Feb 2023 05:34:43 +0000 (21:34 -0800)]
[AArch64] Added tests for inserting scalar result of uaddlv neon instrinsic function into a vector
Inserting scalar result of 'uaddlv' neon intrinsic function to a destination vector currently makes use of the integer unit. Subsequent patches will eliminate the redundant use of the integer registers in a more generic way that will include this special case. This is an initial set of tests for this functionality.
Differential Revision: https://reviews.llvm.org/D143038
Lei Zhang [Mon, 27 Feb 2023 06:22:56 +0000 (06:22 +0000)]
[mlir][spirv] Fix Physical32/Physical64 support for OpenCL
We use `use64bitIndex` in the option to decide the target device
address bitwidth. This makes it consistent with index type
conversion too.
Reviewed By: kuhar
Differential Revision: https://reviews.llvm.org/D144827
Lei Zhang [Mon, 27 Feb 2023 06:15:18 +0000 (06:15 +0000)]
[mlir][spirv] Respect client API requirements for 64-bit index
Vulkan requires GPU processor ID/count builtin variables to be
32-bit scalar or vector for all the cases. Similarly there
are special requirements for OpenCL. We need to make sure those
rules are respected when converting using 64bit for index.
Reviewed By: kuhar
Differential Revision: https://reviews.llvm.org/D144819
Rahul Kayaith [Sat, 25 Feb 2023 08:51:31 +0000 (03:51 -0500)]
[mlir][python] Don't emit diagnostics when printing invalid ops
The asm printer grew the ability to automatically fall back to the
generic format for invalid ops, so this logic doesn't need to be in the
bindings anymore. The printer already handles supressing diagnostics
that get emitted while checking if the op is valid.
Reviewed By: mehdi_amini, stellaraccident
Differential Revision: https://reviews.llvm.org/D144805
Jun Zhang [Mon, 27 Feb 2023 04:22:18 +0000 (12:22 +0800)]
Precommit test for D144777, NFC
Signed-off-by: Jun Zhang <jun@junz.org>
Serge Pavlov [Mon, 27 Feb 2023 04:19:20 +0000 (11:19 +0700)]
[Clang] Copy strictfp attribute from pattern to instantiation
If a template function contained a pragma that made it strictfp, code
generation for such function crashed, because the instantiation did not
have strictfp attribute. As a solution this attribute is copied from the
template to instantiation.
Differential Revision: https://reviews.llvm.org/D143919
Craig Topper [Mon, 27 Feb 2023 03:36:34 +0000 (19:36 -0800)]
[TableGen] Use raw_svector_ostream and ListSeparator to simplify some code. NFC
Jie Fu [Mon, 27 Feb 2023 02:17:27 +0000 (10:17 +0800)]
[X86][MC] Fix -Wimplicit-fallthrough in X86MCCodeEmitter.cpp (NFC)
/data/llvm-project/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp:1200:3: error: unannotated fall-through between switch labels [-Werror,-Wimplicit-fallthrough]
case X86II::RawFrm:
^
Shengchen Kan [Sat, 25 Feb 2023 05:57:34 +0000 (13:57 +0800)]
[X86][MC] Assert unexpected form in emitREXPrefix, NFCI
1. Add a variable `HasRegOp` to record if the instruction has a register operand
2. Enumerate all the formats with a register operand in the switch
2. Add a default (unreachable) label in the switch (suggested by @reames)
Reviewed By: pengfei
Differential Revision: https://reviews.llvm.org/D144776
Craig Topper [Mon, 27 Feb 2023 00:32:25 +0000 (16:32 -0800)]
[TableGen] Remove duplicate call to getPredicateCheck. NFC
Amara Emerson [Sun, 26 Feb 2023 23:42:57 +0000 (15:42 -0800)]
[GlobalISel] Fix an assertion failure in matchHoistLogicOpWithSameOpcodeHands().
We use this combine in the AArch64 postlegalizer combiner, which causes this
function to query the legalizer rules for the action for an invalid opcode/type
combination (G_AND and p0). Moving the legalizer query until after the validity
check in matchHoistLogicOpWithSameOpcodeHands() fixes this.
isuckatcs [Fri, 7 Oct 2022 22:23:33 +0000 (00:23 +0200)]
[clang-tidy] handle exceptions properly in `ExceptionAnalyzer`
This patch implements the exception handling rules found in
N4849 14.4 and as a result fixes many false positives in
the bugprone-exception-escape checker.
Differential Revision: https://reviews.llvm.org/D135495
Lei Zhang [Sun, 26 Feb 2023 21:23:07 +0000 (21:23 +0000)]
[mlir] NFC: Prepare GPUToSPIRV tests for supporting 64bit index
This commit just adds options to control index type bitwidth in
GPUToSPIRV conversion, and updates tests to prepare for 64bit
index conversion.
Reviewed By: kuhar
Differential Revision: https://reviews.llvm.org/D144826
LLVM GN Syncbot [Sun, 26 Feb 2023 21:40:55 +0000 (21:40 +0000)]
[gn build] Port
ff93c9beefd4
Nico Weber [Sun, 26 Feb 2023 21:40:09 +0000 (16:40 -0500)]
Alex Bradbury [Sun, 26 Feb 2023 19:17:06 +0000 (19:17 +0000)]
[WebAssembly][test] Clean up ir-locals.ll after opaque pointer conversion
The `tyname_cell` definitions at the top are now all the same, so
replace them with a single `alloca_cell` type.
Alex Bradbury [Sun, 26 Feb 2023 19:12:36 +0000 (19:12 +0000)]
[Webassembly][test] Regenerate ir-locals.ll using update_llc_test_checks.py
Preparation for further additions.
Alexey Lapshin [Sun, 26 Feb 2023 17:57:50 +0000 (18:57 +0100)]
[DWARFLinker][DWARFv5] Add support for .debug_rnglists.
This patch adds support of DWARFv5 .debug_rnglists table.
As DWARFLinker resolves relocations, it is able to always
use DW_FORM_addr instead of DW_FORM_addrx. DW_FORM_addrx
helps to minimize number of relocations, it is also used for
split DWARF. Both of these cases are not relevant for the
DWARFLinker. Thus, this patch converts all DW_FORM_addrx
forms into the DW_FORM_addr. And, as the result, it converts
range lists of DW_FORM_rnglistx form into the DW_FORM_sec_offset.
For the --update case all DW_FORM_addrx, DW_FORM_rnglistx
are preserved as is.
Reviewed By: aprantl
Differential Revision: https://reviews.llvm.org/D143903
Noah Goldstein [Sun, 26 Feb 2023 17:25:59 +0000 (11:25 -0600)]
Add additional operations that masked instructions can combine with
Added: OR, SMAX, SMIN, UMAX, UMIN, ABS, SHL, SRL, SRA, MUL
Intentionally not generically using TLI.isBinOp as that causes
regressions as there are many binops that cannot combine with masked
instructions.
Reviewed By: RKSimon
Differential Revision: https://reviews.llvm.org/D143860
Noah Goldstein [Thu, 16 Feb 2023 17:57:39 +0000 (11:57 -0600)]
Add tests for combining mask with shuffles; NFC
Differential Revision: https://reviews.llvm.org/D144144
Noah Goldstein [Thu, 16 Feb 2023 17:57:31 +0000 (11:57 -0600)]
Widen i16 shuffle masks if vector width < 512 even with BWI
`{v}blend{d|ps|pd}` is preferable to `{v}blendw` so widen so that we
can match it.
Reviewed By: RKSimon
Differential Revision: https://reviews.llvm.org/D143789
Noah Goldstein [Thu, 16 Feb 2023 17:57:23 +0000 (11:57 -0600)]
Add more tests for promoting `blendw` -> `blendd`; NFC
Reviewed By: RKSimon
Differential Revision: https://reviews.llvm.org/D143788
Simon Pilgrim [Sun, 26 Feb 2023 18:01:05 +0000 (18:01 +0000)]
[X86] Add additional uses tests for select(icmp(x,y),sub(x,y),sub(y,x)) -> abd(x,y) patterns
William S. Moses [Tue, 14 Feb 2023 23:36:07 +0000 (18:36 -0500)]
[LICM] Ensure LICM can hoist invariant.group
Invariant.group's are not sufficiently handled by LICM. Specifically,
if a given invariant.group loaded pointer is not overwritten between
the start of a loop, and its use in the load, it can be hoisted.
The invariant.group (on an already invariant pointer operand) ensures
the result is the same. If it is not overwritten between the start
of the loop and the load, it is therefore legal to hoist.
Reviewed By: nikic
Differential Revision: https://reviews.llvm.org/D144053
zhongyunde [Sun, 26 Feb 2023 17:21:24 +0000 (01:21 +0800)]
[MergeICmps] Adapt to non-eq comparisons, retry
Fix https://github.com/llvm/llvm-project/issues/59740.
NOTE: retry as we can't reproduce the break locally when first commit.
Reviewed By: vitalybuka
Differential Revision: https://reviews.llvm.org/D141188
Simon Pilgrim [Sun, 26 Feb 2023 17:05:46 +0000 (17:05 +0000)]
[X86] Add vector test coverage for select(icmp(x,y),sub(x,y),sub(y,x)) -> abd(x,y) patterns
Simon Pilgrim [Sun, 26 Feb 2023 16:45:18 +0000 (16:45 +0000)]
[X86] Add scalar test coverage for select(icmp(x,y),sub(x,y),sub(y,x)) -> abd(x,y) patterns
Brad Smith [Sun, 26 Feb 2023 15:45:00 +0000 (10:45 -0500)]
[Driver][OpenBSD] Simplify command-line option handling. NFC
Simon Pilgrim [Sun, 26 Feb 2023 15:43:03 +0000 (15:43 +0000)]
[TextAPI] Use const auto& in foreach loop to avoid pass-by-value static analyzer warnings. NFCI.
Simon Pilgrim [Sun, 26 Feb 2023 15:31:58 +0000 (15:31 +0000)]
[X86] Add test showing poor bitselect between constants on BMI targets
bitselect(52,-6553,m) -> xor(and(xor(52,-6553),m),52) folds much better than or(and(52,not(m)),and(-6553,m))
Sanjay Patel [Fri, 24 Feb 2023 17:05:14 +0000 (12:05 -0500)]
[InstCombine] add tests for redundant-via-demanded-elts vec binops; NFC
Simon Pilgrim [Sun, 26 Feb 2023 15:19:46 +0000 (15:19 +0000)]
[X86] Add PR46472 bitselect test coverage
As noted on Issue #45817 we didn't have scalar coverage for this
Piotr Zegar [Sun, 26 Feb 2023 14:54:36 +0000 (14:54 +0000)]
[clang-tidy] Improved too-small-loop-variable with bit-field support
Implemented support for bit-field members as a loop variable
or upper limit. Supporting also non bit-field integer members.
Fixes issues: https://github.com/llvm/llvm-project/issues/58614
Reviewed By: carlosgalvezp
Differential Revision: https://reviews.llvm.org/D142587
Mehdi Amini [Sat, 25 Feb 2023 03:43:20 +0000 (20:43 -0700)]
[mlir-opt] Rename internally the variables backing --no-implicit-module to ExplicitModule (NFC)
The flag name isn't the best: avoiding negative is in general more readable
and conveys the intent better.
Simon Pilgrim [Sun, 26 Feb 2023 14:00:22 +0000 (14:00 +0000)]
[X86] Add i686 and fast/slow-inc test coverage to constant select tests
Extend tests for D144449 to ensure we aren't regressing code on targets with a slow INC/DEC instruction (or i686 without CMOV)
Roy Jacobson [Sun, 12 Feb 2023 19:17:00 +0000 (21:17 +0200)]
[clang-tidy] Tweak 'rule of 3/5' checks to allow defaulting a destructor outside the class.
A somewhat common code-pattern is to default a destructor in the source file and not in the header.
For example, this is the way to use smart pointers with forward-declared classes:
```c++
struct Impl;
struct A {
~A(); // Can't be defaulted in the header.
private:
std::unique_ptr<Impl> impl;
};
```
To be able to use this check with this pattern, I modified the behavior with `AllowSoleDefaultDtor`
to not trigger on destructors if they aren't defined yet.
Since a declared destructor should still be defined somewhere in the program, this
won't miss bad classes, just diagnose on less translation units.
Reviewed By: carlosgalvezp
Differential Revision: https://reviews.llvm.org/D143851
Mark de Wever [Sat, 25 Feb 2023 14:24:58 +0000 (15:24 +0100)]
[libc++] Improves clang-tidy configuration.
The current clang-tidy settings work in the CI but not on all systems
outside the CI.
- The range 16...17 doesn't work when only clang-17 is installed.
- Running CMake a second time will fail.
This addresses these issues.
Reviewed By: philnik, #libc
Differential Revision: https://reviews.llvm.org/D144785
Younan Zhang [Wed, 15 Feb 2023 06:48:24 +0000 (14:48 +0800)]
[clangd] Hide inlay hints when using a macro as a calling argument that with a param comment
We don't want to produce inlay hints for arguments for which
user has left param name comments. But we're not decomposing
location of the parameter correctly at the moment because the
location we've passed into `SM.getDecomposedLoc` is not always
FileID.
Fixes clangd/clangd#1495
Reviewed By: nridge
Differential Revision: https://reviews.llvm.org/D144074
Simon Pilgrim [Sun, 26 Feb 2023 10:40:43 +0000 (10:40 +0000)]
[X86] Fix ambiguous operator ordering to stop -Wparentheses warning. NFCI.
Valentin Clement [Sun, 26 Feb 2023 09:44:19 +0000 (10:44 +0100)]
[flang] Do not initialize intent(out) polymorphic pointer or allocatable
Calling the runtime on disassociated pointer or unallocated
allocatable will trigger a segfault.
Reviewed By: PeteSteinfeld
Differential Revision: https://reviews.llvm.org/D144752
Piotr Zegar [Sun, 26 Feb 2023 08:58:03 +0000 (08:58 +0000)]
[clang-tidy] Fix bugprone-copy-constructor-init documentation
Correct example, and add information about limitations.
Fixes: https://github.com/llvm/llvm-project/issues/55572
Reviewed By: carlosgalvezp
Differential Revision: https://reviews.llvm.org/D144594
Alexis Murzeau [Sun, 26 Feb 2023 08:05:54 +0000 (08:05 +0000)]
[clang-tidy] readability-identifier-naming.HungarianNotation: rename CharPrinter to CharPointer
The CharPrinter is a typo and should have been named CharPointer as it
configures the hungarian notation prefix for char pointers (char*).
As all configuration options within
readability-identifier-naming.HungarianNotation.CString.* were not read
at all in the previous clang-tidy version (fixed in D144431), this option
rename won't break existing users.
A note in release notes is added to let users know these options were
renamed.
Reviewed By: carlosgalvezp
Differential Revision: https://reviews.llvm.org/D144790
Kazu Hirata [Sun, 26 Feb 2023 07:33:50 +0000 (23:33 -0800)]
[X86] Precommit a test
This patch precommits a test for:
https://github.com/llvm/llvm-project/issues/60374
Craig Topper [Sun, 26 Feb 2023 04:07:41 +0000 (20:07 -0800)]
[RISCV] Add explicit i64 to isel patterns to reduce RISCVGenDAGISel.inc size.
Brad Smith [Sun, 26 Feb 2023 01:33:36 +0000 (20:33 -0500)]
[Driver][FreeBSD] Further simplify the Driver handling for older FreeBSD releases
Since GCC 4.2 was removed with 10.0 and newer the respective Driver bits can be removed.
Reviewed By: dim
Differential Revision: https://reviews.llvm.org/D144778
Mehdi Amini [Sat, 25 Feb 2023 22:04:08 +0000 (17:04 -0500)]
Refactor a MlirOptMainConfig class to hold the configuration of MlirOptMain (NFC)
The list of boolean flags and others is becoming unresonnably long.
Reviewed By: rriddle
Differential Revision: https://reviews.llvm.org/D143829
Simon Pilgrim [Sat, 25 Feb 2023 21:27:57 +0000 (21:27 +0000)]
[ScalarEvolution] Fix unused variable warnings. NFC.
Replace dyn_cast<> with isa<> as we don't actually need the variable
Simon Pilgrim [Sat, 25 Feb 2023 21:12:32 +0000 (21:12 +0000)]
[AArch64] Add coverage for select(icmp(x,y),sub(x,y),sub(y,x)) -> abd(x,y) patterns
Simon Pilgrim [Sat, 25 Feb 2023 21:04:16 +0000 (21:04 +0000)]
[PowerPC] Add coverage for select(icmp_sgt(x,y),sub(x,y),sub(y,x)) -> abds(x,y) patterns
Simon Pilgrim [Sat, 25 Feb 2023 20:06:19 +0000 (20:06 +0000)]
[PowerPC] Replace PPCISD::VABSD cases with generic ISD::ABDU(X,Y) node
A move towards using the generic ISD::ABDU nodes on more backends
Also support ISD::ABDS for v4i32 types using the existing signbit flip trick
PowerPC has a select(icmp_ugt(x,y),sub(x,y),sub(y,x)) -> abdu(x,y) combine that I intend to move to DAGCombiner in a future patch.
The ABS(SUB(X,Y)) -> PPCISD::VABSD(X,Y,1) v4i32 combine wasn't legal (https://alive2.llvm.org/ce/z/jc2hLU) - so I've removed it, having already added the legal sub nsw tests equivalent.
Differential Revision: https://reviews.llvm.org/D142313
Craig Topper [Sat, 25 Feb 2023 19:22:28 +0000 (11:22 -0800)]
[RISCV] Reuse the condop/invcondop ComplexPatterns for seteq/setne isel. NFC NFC NFC NFC
To do this we need to remove the always matching behavior from condop.
This requires us to add more 'select' isel patterns with a bare GPR
as the condition.
Rename condop/invcondop to riscv_setne/riscv_seteq.
This centralizes the ADDI/XORI/XOR tricks into one place.
Simon Pilgrim [Sat, 25 Feb 2023 19:51:46 +0000 (19:51 +0000)]
[PPC] Fix abs(sub(x,y)) -> abs(x,y) tests
As detailed on D142313, this fold should be restricted by sub nsw
Craig Topper [Sat, 25 Feb 2023 18:39:57 +0000 (10:39 -0800)]
[RISCV] Add a check for integer setcc to RISCVDAGToDAGISel::selectCondOp
Piotr Zegar [Sat, 25 Feb 2023 16:07:04 +0000 (16:07 +0000)]
[clang-tidy] Fix false-positive in readability-container-size-empty
Ignoring std::array type when matching 'std:array == std::array()'.
In such case we shouldn't propose to use empty().
Fixes: https://github.com/llvm/llvm-project/issues/48286
Differential Revision: https://reviews.llvm.org/D144217
Craig Topper [Sat, 25 Feb 2023 18:07:26 +0000 (10:07 -0800)]
[RISCV] Add explicit i64 to reduce RISCVGenDAGISel.inc size.
Craig Topper [Sat, 25 Feb 2023 17:57:57 +0000 (09:57 -0800)]
[RISCV] Add explicit types to some XTHead isel patterns to reduce RISCVGenDAGISel.inc size.
HWMode expansion of GPR can create patterns with i32 types with
Subtarget->is64Bit() or i64 types with !Subtarget->is64Bit().
These patterns will never match. They just waste space in the table.
By adding explicit i32 or i64 to patterns that only apply to RV32
or RV64 we can filter these patterns.
Nikolas Klauser [Sat, 25 Feb 2023 09:26:28 +0000 (10:26 +0100)]
[libc++] Add FTM for views::as_rvalue
`views::as_rvalue` was implemented in D137637, but we forgot to set the feature test macro.
Fixes #60986.
Reviewed By: Mordante, #libc
Spies: libcxx-commits, arichardson
Differential Revision: https://reviews.llvm.org/D144781
Sebastian Pop [Sat, 18 Feb 2023 01:12:33 +0000 (01:12 +0000)]
[BOLT] fix tests on arm64
The two tests were failing on arm64-linux with:
BOLT-ERROR: invalid target 'x86-64'.
Differential Revision: https://reviews.llvm.org/D144593
Aaron Ballman [Sat, 25 Feb 2023 16:04:54 +0000 (11:04 -0500)]
Remove WG14 N2829 from the C status page; NFC
This paper is about changes to the assert macro, but assert.h is not
provided by the compiler, so there's no work for Clang to do to support
this feature.
Igor Zhukov [Sat, 25 Feb 2023 14:43:37 +0000 (21:43 +0700)]
[libc++] Implement LWG-3204: `sub_match::swap` only swaps the base class
Reviewed By: Mordante, JMazurkiewicz, #libc
Differential Revision: https://reviews.llvm.org/D144629
Aaron Ballman [Sat, 25 Feb 2023 14:27:46 +0000 (09:27 -0500)]
[C2x] Implement support for revised spelling of keywords
This implements WG14 N2934
(https://www.open-std.org/jtc1/sc22/wg14/www/docs/n2934.pdf), which
adds keywords for alignas, alignof, bool, static_assert, and
thread_local in C, as aliases for _Alignas, _Alignof, _Bool,
_Static_assert, and _Thread_local. We already supported the keywords in
C2x mode, but this completes support by adding pre-C2x compat warnings
and updates the stdalign.h header in freestanding mode.
Luo, Yuanke [Thu, 23 Feb 2023 09:02:18 +0000 (17:02 +0800)]
[X86] Fix the base pointer save/restore bug
Previous the stack slot for spilling base pointer register is allocated
after the stack realignment. When the stack is naturally aligned the
stack slot is share with other data that allocated from stack and cause
data corrupt. Another issue is the stack slot for save/restore the
callee saved register is not fixed for each function. It depends on the
register usage of them in each function.
This patch is to recalculate the offset the stack slot for base pointer
register during the prolog/epilog insert pass, and allocate the stack
slot when spilling callee saved registers.
Differential Revision: https://reviews.llvm.org/D144625
DianQK [Sat, 25 Feb 2023 11:42:58 +0000 (19:42 +0800)]
[SimplifyCFG] Improve the precision of `PtrValueMayBeModified`
The result value of `getelementptr inbounds (TY, null, not zero)` is a poison value. We can think of it as undefined behavior.
> Please let me know if there is anything I don't understand correctly.
Reviewed By: nikic, xbolva00
Differential Revision: https://reviews.llvm.org/D144563
Kiran Chandramohan [Sat, 25 Feb 2023 11:38:57 +0000 (11:38 +0000)]
[Flang][OpenMP] NFC: Remove omp prefix of test files in OpenMP Lower
For tests in the OpenMP sub-directory the `omp` prefix is removed.