Karmjit Mahil [Mon, 23 Jan 2023 23:54:06 +0000 (23:54 +0000)]
pvr: Remove component_alignment
We don't support output register subdivision so no need to keep
track of how many bytes have been allocated within the output regs.
Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21386>
Karmjit Mahil [Mon, 9 Jan 2023 15:55:20 +0000 (15:55 +0000)]
pvr: Remove unused msaa_mode field
Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21386>
Karmjit Mahil [Mon, 9 Jan 2023 16:04:16 +0000 (16:04 +0000)]
pvr: Setup SPM EOT state
On entering SPM we need to store the tile data for the current
render into the scratch buffer so we need to setup an EOT program
to do so.
Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21386>
Karmjit Mahil [Mon, 9 Jan 2023 16:03:53 +0000 (16:03 +0000)]
pvr: Move PBE START_POS into csb enum helpers header
This commit adds 'pvr_pbestate_source_pos()' and moves
`enum pvr_pbe_source_start_pos` into pvr_csb_enum_helpers.h .
The enum will be needed in other files in the commits following.
Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21386>
Samuel Pitoiset [Tue, 8 Nov 2022 16:43:18 +0000 (17:43 +0100)]
radv: advertise VK_EXT_image_sliced_view_of_3d on GFX10+
Pass dEQP-VK.pipeline.monolithic.sliced_view_of_3d_image.* on NAVI21.
Looks like older generations can't support it.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21359>
Samuel Pitoiset [Mon, 20 Feb 2023 08:06:00 +0000 (09:06 +0100)]
radv: implement VK_EXT_image_sliced_view_of_3d on GFX10+
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21359>
Samuel Pitoiset [Mon, 20 Feb 2023 08:05:55 +0000 (09:05 +0100)]
ac/nir: add resinfo lowering for sliced storage 3D views
The first layer isn't necessarily 0 and depth shouldn't be minified.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21359>
Karmjit Mahil [Tue, 13 Dec 2022 17:03:36 +0000 (17:03 +0000)]
pvr: Add support for blend constants.
Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21388>
David Heidelberg [Fri, 24 Feb 2023 00:00:19 +0000 (01:00 +0100)]
util/process_test: make the error variable static
Make the `error` variable static to prevent a clash with
the glibc error() function when LTO is used.
Fixes the LTO build.
Otherwise, it'll fail in the linking phase with a conflict:
```
[411/2321] Linking target src/util/process_test
FAILED: src/util/process_test
c++ -o src/util/process_test src/util/process_test.p/tests_process_test.c.o -flto -Wl,--as-needed -Wl,--no-undefined -Wl,--fatal-warnings -Wl,--start-group src/util/libmesa_util.a src/util/format/libmesa_format.a src/util/libmesa_util_sse41.a src/c11/impl/libmesa_util_c11.a subprojects/perfetto/libperfetto.a /usr/lib/x86_64-linux-gnu/libz.so -pthread -lm -ldl /usr/lib/x86_64-linux-gnu/libunwind.so -Wl,--end-group
mold: error: symbol type mismatch: error
>>> defined in /tmp/process_test.SLc9I6.ltrans0.ltrans.o as STT_OBJECT
>>> defined in /lib/x86_64-linux-gnu/libc.so.6 as STT_FUNC
```
Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21511>
Simon Perretta [Wed, 22 Feb 2023 14:00:51 +0000 (14:00 +0000)]
pvr: Add encodings for index registers
Signed-off-by: Simon Perretta <simon.perretta@imgtec.com>
Acked-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21474>
Simon Perretta [Wed, 22 Feb 2023 14:00:11 +0000 (14:00 +0000)]
pvr: Amend definitions for ST and IDF
Signed-off-by: Simon Perretta <simon.perretta@imgtec.com>
Acked-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21474>
Simon Perretta [Fri, 17 Feb 2023 17:29:08 +0000 (17:29 +0000)]
pvr: Add late op lowering pass and conditional execution
Signed-off-by: Simon Perretta <simon.perretta@imgtec.com>
Acked-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21474>
Simon Perretta [Fri, 17 Feb 2023 16:29:22 +0000 (16:29 +0000)]
pvr: Add support for MOVC
Signed-off-by: Simon Perretta <simon.perretta@imgtec.com>
Acked-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21474>
Simon Perretta [Fri, 17 Feb 2023 14:59:47 +0000 (14:59 +0000)]
pvr: Add basic support for manual instruction grouping
Signed-off-by: Simon Perretta <simon.perretta@imgtec.com>
Acked-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21474>
Simon Perretta [Thu, 16 Feb 2023 16:40:50 +0000 (16:40 +0000)]
pvr: Add support for TST
Signed-off-by: Simon Perretta <simon.perretta@imgtec.com>
Acked-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21474>
Simon Perretta [Thu, 16 Feb 2023 15:33:00 +0000 (15:33 +0000)]
pvr: Add branch support
Signed-off-by: Simon Perretta <simon.perretta@imgtec.com>
Acked-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21474>
Simon Perretta [Wed, 15 Feb 2023 22:26:29 +0000 (22:26 +0000)]
pvr: Add support for ST
Signed-off-by: Simon Perretta <simon.perretta@imgtec.com>
Acked-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21474>
Simon Perretta [Tue, 14 Feb 2023 01:12:20 +0000 (01:12 +0000)]
pvr: Add support for IDF
Signed-off-by: Simon Perretta <simon.perretta@imgtec.com>
Acked-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21474>
Simon Perretta [Tue, 14 Feb 2023 00:48:57 +0000 (00:48 +0000)]
pvr: Add support for generating NOP program
Signed-off-by: Simon Perretta <simon.perretta@imgtec.com>
Acked-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21474>
Simon Perretta [Tue, 14 Feb 2023 00:45:01 +0000 (00:45 +0000)]
pvr: Add support for generating per-job EOT program
Signed-off-by: Simon Perretta <simon.perretta@imgtec.com>
Acked-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21474>
Simon Perretta [Wed, 15 Feb 2023 18:19:59 +0000 (18:19 +0000)]
pvr: Fix descriptor set address calculation
Signed-off-by: Simon Perretta <simon.perretta@imgtec.com>
Acked-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21474>
Simon Perretta [Wed, 15 Feb 2023 16:57:24 +0000 (16:57 +0000)]
pvr: Register allocation improvements
Signed-off-by: Simon Perretta <simon.perretta@imgtec.com>
Acked-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21474>
Simon Perretta [Mon, 13 Feb 2023 22:09:58 +0000 (22:09 +0000)]
pvr: Add support for WOP
Signed-off-by: Simon Perretta <simon.perretta@imgtec.com>
Acked-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21474>
Simon Perretta [Mon, 13 Feb 2023 22:05:21 +0000 (22:05 +0000)]
pvr: Add support for emitpix
Signed-off-by: Simon Perretta <simon.perretta@imgtec.com>
Acked-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21474>
Simon Perretta [Sun, 12 Feb 2023 15:26:06 +0000 (15:26 +0000)]
pvr: Add support for validating modifier combos
Signed-off-by: Simon Perretta <simon.perretta@imgtec.com>
Acked-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21474>
Simon Perretta [Sun, 12 Feb 2023 14:22:27 +0000 (14:22 +0000)]
pvr: Add support for sample instructions
Signed-off-by: Simon Perretta <simon.perretta@imgtec.com>
Acked-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21474>
Simon Perretta [Sat, 11 Feb 2023 22:44:56 +0000 (22:44 +0000)]
pvr: Add support for fitr.pixel
Signed-off-by: Simon Perretta <simon.perretta@imgtec.com>
Acked-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21474>
Simon Perretta [Mon, 13 Feb 2023 14:17:01 +0000 (14:17 +0000)]
pvr: Amend subarray ownership code
Signed-off-by: Simon Perretta <simon.perretta@imgtec.com>
Acked-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21474>
Simon Perretta [Fri, 4 Nov 2022 16:51:44 +0000 (16:51 +0000)]
pvr: Add NIR pass to lower vars to SSA
Signed-off-by: Simon Perretta <simon.perretta@imgtec.com>
Acked-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21474>
Sviatoslav Peleshko [Wed, 22 Feb 2023 02:24:09 +0000 (04:24 +0200)]
anv: Move WA MEDIA_VFE_STATE after stalling PIPE_CONTROL
Fixes:
bc612536 ("anv: Emit a dummy MEDIA_VFE_STATE before switching from GPGPU to 3D")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6172
Signed-off-by: Sviatoslav Peleshko <sviatoslav.peleshko@globallogic.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21472>
Friedrich Vock [Sun, 6 Nov 2022 16:36:39 +0000 (17:36 +0100)]
mesa: Report GL_SHADER_BINARY_FORMAT_SPIR_V as supported
GL_ARB_gl_spirv introduced it, but its corresponding format was never listed in GL_SHADER_BINARY_FORMATS.
Fixes:
5bc03d25 ("mesa: implement SPIR-V loading in glShaderBinary")
Closes: #7644
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19559>
Pierre-Eric Pelloux-Prayer [Thu, 23 Feb 2023 09:52:26 +0000 (10:52 +0100)]
radeonsi: fix incorrect vgpr indices in the ps_prolog
In monolithic PS shaders, we need to account for PERSP_PULL_MODEL even
if we don't use it; si_get_ps_prolog_key already does the same thing
to determine color_interp_vgpr_index.
Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8280
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21483>
Pavel Ondračka [Wed, 22 Feb 2023 19:32:33 +0000 (20:32 +0100)]
r300: simplify KILL transformation
We had some special cases before when we could actually get some IFs on
R300 with VDPAU. Now that VDPAU is gone and everything goes through
ntt, we don't have to worry anymore. Remove the complicated logic and
just always transform KILL into KIL none.-1
No shader-db change on RV530 or RV370.
Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Filip Gawin <filip@gawin.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21503>
Emma Anholt [Wed, 22 Feb 2023 22:08:46 +0000 (14:08 -0800)]
ci/zink: Add a glx flake on anv
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Acked-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21366>
Emma Anholt [Wed, 22 Feb 2023 22:01:43 +0000 (14:01 -0800)]
ci: Fix stage of etnaviv manual runs.
Fixes:
f6c06ef2f66a ("ci: Add manual rules variations to disable irrelevant driver jobs.")
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Acked-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21366>
Emma Anholt [Wed, 22 Feb 2023 22:00:46 +0000 (14:00 -0800)]
ci/hasvk: Add a synchronization flake.
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Acked-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21366>
Emma Anholt [Thu, 16 Feb 2023 17:40:04 +0000 (09:40 -0800)]
ci/zink+turnip: Disable flaky minetest trace.
random 1-pixel changes sometimes.
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Acked-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21366>
Emma Anholt [Thu, 16 Feb 2023 17:32:50 +0000 (09:32 -0800)]
ci/turnip: Drop the #8219 xfail.
It hasn't showed up in the last couple runs, the other test is no longer
showing up in the caselist so the fail isn't triggered. Bug is still
there, though.
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Acked-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21366>
Emma Anholt [Thu, 16 Feb 2023 17:19:49 +0000 (09:19 -0800)]
ci/freedreno: Drop a530 piglit_gl coverage.
It hasn't worked in a long time -- the board gets wedged 20 minutes in and
then we reboot it and try again until failure.
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Acked-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21366>
Emma Anholt [Thu, 16 Feb 2023 17:16:05 +0000 (09:16 -0800)]
ci/etnaviv: Drop one more gc7000 xfail.
Looks like I missed it in the last full-run update.
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Acked-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21366>
Sviatoslav Peleshko [Wed, 15 Feb 2023 15:15:42 +0000 (17:15 +0200)]
anv: Handle all fields in VkAccelerationStructureBuildRangeInfoKHR
Add handling of primitiveOffset and firstVertex.
Fixes:
f3ddfd81 ("anv: Build BVHs on the GPU with GRL")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8296
Signed-off-by: Sviatoslav Peleshko <sviatoslav.peleshko@globallogic.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21342>
Caio Oliveira [Thu, 17 Nov 2022 04:41:28 +0000 (20:41 -0800)]
spirv: Implement SPV_KHR_subgroup_rotate
Map SpvOpGroupNonUniformRotateKHR to nir_intrinsic_rotate.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19797>
Caio Oliveira [Thu, 17 Nov 2022 07:58:27 +0000 (23:58 -0800)]
nir/lower_subgroups: Add option lower_rotate_to_shuffle
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19797>
Caio Oliveira [Thu, 17 Nov 2022 07:54:21 +0000 (23:54 -0800)]
nir: Add nir_intrinsic_rotate
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19797>
Pavel Ondračka [Wed, 4 Jan 2023 16:27:14 +0000 (17:27 +0100)]
r300: drop VDPAU support
There is no UVD and the mpeg2 shader-based decoding is broken and doesn't
lead to CPU savings anyway. VDPAU output works, but there is no real
benefit so just disable VDPAU altogether so we can clean the backend a
bit and also open a way to potentially drop the mpeg2 deconding altogether
from the fronted.
Acked-by: Filip Gawin <filip@gawin.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20524>
Mike Blumenkrantz [Fri, 17 Feb 2023 22:09:50 +0000 (17:09 -0500)]
zink: utilize copy box tracking to avoid barrier emission for buf2img copies
this should reduce synchronization during e.g., miplevel population
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21397>
Mike Blumenkrantz [Thu, 23 Feb 2023 13:30:09 +0000 (08:30 -0500)]
zink: add a util function for optimizing TRANSFER_DST image barriers
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21397>
Mike Blumenkrantz [Fri, 17 Feb 2023 22:05:45 +0000 (17:05 -0500)]
zink: add some tracking for copy box regions
this enables tracking per-miplevel pipe_boxes for copy operations that
can then be used to avoid emitting barriers for successive copy operations
without overlapping regions
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21397>
Mike Blumenkrantz [Fri, 17 Feb 2023 22:04:28 +0000 (17:04 -0500)]
util/box: add intersection test functions for 1d/3d
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21397>
Caio Oliveira [Wed, 22 Feb 2023 23:48:10 +0000 (15:48 -0800)]
anv, hasvk: Align workaround address to 32B
Not necessary but, all things being equal, be consistent with Iris.
Now that intel_debug_write_identifiers() already add the padding,
there's no need to include extra "+ 8" to the offset.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21479>
Caio Oliveira [Wed, 22 Feb 2023 23:47:54 +0000 (15:47 -0800)]
iris, crocus: Align workaround address to 32B
The workaround address is used as a source for push constants when
there's no resource available, that address must be 32B aligned.
This fixes invalid address being used for buffers in
3DSTATE_CONSTANT_* packets.
Now that intel_debug_write_identifiers() already add the padding,
there's no need to include extra "+ 8" to the offset.
Thanks to Xiaoming Wang that contributed to find and fix this issue.
Fixes:
2a4c361b069 ("iris: add identifier BO")
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21479>
Caio Oliveira [Thu, 23 Feb 2023 03:07:52 +0000 (19:07 -0800)]
intel: Add extra zeros at the end of debug identifiers
Add at least a full aligned uint64_t of zero padding at the end
to make the identifiers easier to spot.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21479>
David Heidelberg [Fri, 24 Feb 2023 00:21:33 +0000 (01:21 +0100)]
ci/llvmpipe: add flake timeout for rusticl program@execute@builtin@builtin-float-sincos-1.0
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21510>
Sil Vilerino [Thu, 23 Feb 2023 04:32:28 +0000 (23:32 -0500)]
d3d12: Fix VP9 Decode - Checking 0xFF instead of 0x7F for invalid frame_ref[i].Index7Bits
Fixes:
c8e8ce8359ceb9161ac05cf48b15e2e6a298ebd6 ("d3d12: Add VP9 Decode support")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21507>
Caio Oliveira [Thu, 23 Feb 2023 05:37:20 +0000 (21:37 -0800)]
hasvk: Update driver name in debug information
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21481>
Bas Nieuwenhuizen [Sat, 18 Feb 2023 15:16:27 +0000 (16:16 +0100)]
radv: Implement & expose VK_EXT_pipeline_library_group_handles.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21406>
Bas Nieuwenhuizen [Wed, 11 Jan 2023 01:32:27 +0000 (02:32 +0100)]
radv: Use group handles based on shader hashes.
Should be stable.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21406>
Bas Nieuwenhuizen [Wed, 11 Jan 2023 00:30:24 +0000 (01:30 +0100)]
radv: Use provided handles for switch cases in RT shaders.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21406>
Bas Nieuwenhuizen [Wed, 11 Jan 2023 00:43:14 +0000 (01:43 +0100)]
radv: Hash group handles as part of RT pipeline key.
So that we can start varying them to avoid collisions while keeping
handles stable.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21406>
Bas Nieuwenhuizen [Sat, 18 Feb 2023 22:32:30 +0000 (23:32 +0100)]
radv: Add helper to hash stages.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21406>
Mike Blumenkrantz [Thu, 16 Feb 2023 14:30:16 +0000 (09:30 -0500)]
zink: add debug marker tracing for qbo updates
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21425>
Mike Blumenkrantz [Mon, 20 Feb 2023 14:01:32 +0000 (09:01 -0500)]
zink: add ZINK_DEBUG=map
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21425>
Mike Blumenkrantz [Mon, 20 Feb 2023 13:57:42 +0000 (08:57 -0500)]
zink: actually hook up ZINK_DEBUG=norp
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21425>
Rob Clark [Thu, 23 Feb 2023 17:18:30 +0000 (09:18 -0800)]
freedreno/crashdec: Disable GALLIUM_DUMP_CPU
We don't want util_cpu to vomit cpu caps all over the test output.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19551>
Rob Clark [Fri, 4 Nov 2022 20:27:11 +0000 (13:27 -0700)]
freedreno/crashdec: Handle multi-IB prefetching
Add helper to scan the CP_INDIRECT_BUFFERs, and then work backwards
accounting for data buffered via ROQ prefetch to deduce the actual
SQE position at the time of the crash.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19551>
Rob Clark [Sun, 19 Feb 2023 17:19:10 +0000 (09:19 -0800)]
freedreno/crashdec: Add another prefetch test
Constructed with an invalid packet (0xdeadd00d) so there is no ambiguity
in the crash location.
This is expected to fail until the next commit.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19551>
Rob Clark [Sun, 19 Feb 2023 17:08:53 +0000 (09:08 -0800)]
freedreno/crashdec: Refactor crashdec tests
Simplify the process of adding additional tests.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19551>
Connor Abbott [Fri, 4 Nov 2022 16:19:01 +0000 (09:19 -0700)]
freedreno/crashdec: Add prefetch test
Add a crash where this was seen "in the wild" on a CTS test in
!17943 which requires handling multi-IB prefetching to correctly
location the crash location.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19551>
Rob Clark [Sat, 5 Nov 2022 19:16:16 +0000 (12:16 -0700)]
freedreno/cffdec: Fix hang location detection
We were previously checking only every 8 dwords within the packet. We
should instead just check if the hang location comes within the packet.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19551>
Rob Clark [Tue, 25 Oct 2022 20:19:25 +0000 (13:19 -0700)]
freedreno/cffdec: Add helper to parse CP_INDIRECT_BUFFER
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19551>
Rob Clark [Fri, 4 Nov 2022 22:07:40 +0000 (15:07 -0700)]
freedreno/cffdec: Add helper to find next pkt
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19551>
Rob Clark [Sat, 5 Nov 2022 19:03:33 +0000 (12:03 -0700)]
freedreno/cffdec: Fix unitialized count for pkt2
This was causing us to use the size of the previous packet. Which just
happened to land on a valid packet because pkt2 only followed a
CP_INDIRECT_BUFFER.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19551>
Connor Abbott [Mon, 17 Oct 2022 16:39:16 +0000 (18:39 +0200)]
freedreno/crashdec: Fix apparent off-by-one with ROQ size
I have multiple examples where this register is too large by one
when comparing to the ROQ read/write pointers in CP_ROQ_*_STAT and the
ROQ data itself, as if it includes the dword most recently read too. I
have an example where it's off by 2 compared to the read pointer, but
the read pointer is also off by 1 itself judging by the SQE program
counter, so that may just be them not getting synchronized. This
off-by-one was getting in the way of figuring out exactly IB2 was being
processed in the next commit.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19551>
Connor Abbott [Mon, 17 Oct 2022 15:57:03 +0000 (17:57 +0200)]
freedreno/a6xx: Fill in ROQ status registers
We had a bunch of registers only defined for some parts of ROQ but now
that we know the pattern for ROQ-related registers it's easy to fill in
the rest.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19551>
Connor Abbott [Mon, 17 Oct 2022 14:52:30 +0000 (16:52 +0200)]
freedreno/a6xx: Fix CP_ROQ_THRESHOLDS_1
Just by adding the ROQ_*_STAT registers following the previous pattern
it becomes obvious what these fields actually are.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19551>
Connor Abbott [Mon, 17 Oct 2022 14:38:57 +0000 (16:38 +0200)]
freedreno/a6xx: Add CP_ROQ_*_STAT
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19551>
Connor Abbott [Mon, 17 Oct 2022 14:22:52 +0000 (16:22 +0200)]
freedreno/a6xx: Rename CP_CSQ_IB*_STAT
These don't correspond to the a3xx *_STAT registers, which we're about
to add so we need to rename them. The closest analogue is CP_CSQ_AVAIL,
although the sense is inverted (and we're not sure what the low 16 bits
are about). Also, the a3xx distinction between CSQ and STQ doesn't exist
anymore so don't use these outdated terms.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19551>
Tapani Pälli [Thu, 9 Feb 2023 15:29:28 +0000 (17:29 +0200)]
anv: implement emission of 3DSTATE_HS for Wa_1306463417
We need to emit 3DSTATE_HS for each primitive with tessellation.
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21308>
Tapani Pälli [Thu, 9 Feb 2023 15:26:40 +0000 (17:26 +0200)]
anv: limit generated draws to pipelines without HS stage
This is done for gfx11 specific workaround.
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21308>
Tapani Pälli [Thu, 9 Feb 2023 14:34:54 +0000 (16:34 +0200)]
anv: emit 3DSTATE_HS in cmd_buffer_flush_gfx_state
Patch packs 3DSTATE_HS state during pipeline creation but it
gets emitted only before 3DPRIMITIVE. We will later need this
to implement a workaround.
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21308>
Tapani Pälli [Tue, 14 Feb 2023 09:23:29 +0000 (11:23 +0200)]
iris: implement emission of 3DSTATE_HS for Wa_1306463417
We need to emit 3DSTATE_HS for each primitive with tessellation.
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21308>
Mark Collins [Thu, 23 Feb 2023 12:49:05 +0000 (12:49 +0000)]
meson: update flex/bison requirement to cover all usages
Meson silently drops outputs such as libvulkan-freedreno when
dependencies on flex/bison can't be satisfied rather than providing
an error which this commit fixes.
Signed-off-by: Mark Collins <mark@igalia.com>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21488>
Eric Engestrom [Thu, 23 Feb 2023 13:24:16 +0000 (13:24 +0000)]
gbm: drop unnecessary vulkan dependency
gbm doesn't actually include vulkan headers
Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Erik Faye-Lund <kusmabite@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21489>
Eric Engestrom [Thu, 23 Feb 2023 13:21:56 +0000 (13:21 +0000)]
glx: include directly the useful vulkan header, instead of including everything
Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Erik Faye-Lund <kusmabite@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21489>
Eric Engestrom [Thu, 23 Feb 2023 13:21:22 +0000 (13:21 +0000)]
egl: include directly the useful vulkan header, instead of including everything
Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Erik Faye-Lund <kusmabite@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21489>
Chia-I Wu [Tue, 21 Feb 2023 22:56:39 +0000 (14:56 -0800)]
anv: process utrace payloads on queue submission
anv_QueuePresentKHR is not called by apps that do not use WSI.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21456>
Karmjit Mahil [Wed, 14 Dec 2022 17:32:51 +0000 (17:32 +0000)]
pvr: Add support for dynamic buffers descriptors
This is based on the new approach of having a descriptor set
addresses table in memory. To handle dynamic offsets provided on
vkCmdBindDescriptorSets() we duplicate the set with dynamic
descriptors, apply the offsets, and write the new bo's address
into the table. There are better ways of handling dynamic
descriptors but this implementation won't require many/if any
changes in the compiler code.
The descriptor set itself doesn't allocate and reserve space for
the dynamic descriptors since they would all be collected together
when creating the pipeline layout. While copying the descriptor
set we allocate extra space at the end for the dynamic primaries
and secondaries to account for that.
Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21391>
Väinö Mäkelä [Thu, 23 Feb 2023 07:00:55 +0000 (09:00 +0200)]
ci/intel: Update hasvk HSW xfails
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19876>
Väinö Mäkelä [Sat, 19 Nov 2022 19:18:24 +0000 (21:18 +0200)]
hasvk: Handle subpass self-dependencies for stencil shadow copies
Always copying when dstAccessMask includes texture operations is not
optimal, but it's good enough.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19876>
Väinö Mäkelä [Sat, 19 Nov 2022 19:23:27 +0000 (21:23 +0200)]
hasvk: Mark VK_IMAGE_LAYOUT_ATTACHMENT_OPTIMAL as stencil write optimal
VK_KHR_synchronization2 added VK_IMAGE_LAYOUT_ATTACHMENT_OPTIMAL, which
was not previously recognized by vk_image_layout_stencil_write_optimal.
Would close https://gitlab.freedesktop.org/mesa/mesa/-/issues/5578 if it
wasn't already closed.
Fixes:
b996fa8efaa ("anv: implement VK_KHR_synchronization2")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19876>
Väinö Mäkelä [Sat, 19 Nov 2022 19:06:20 +0000 (21:06 +0200)]
hasvk: Enable PixelShaderKillsPixel when omask is used
From the Haswell PRM Vol. 2b, 3DSTATE_WM::Pixel Shader Kill Pixel:
"This bit is required to be ENABLED in the following situations:
- The API pixel shader program contains "killpix" or "discard"
instructions, or other code in the pixel shader kernel that can
cause the final pixel mask to differ from the pixel mask received
on dispatch.
- A sampler with chroma key enabled with kill pixel mode is used by
the pixel shader.
- Any render target has Alpha Test Enable or AlphaToCoverage Enable
enabled.
- The pixel shader kernel generates and outputs oMask."
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19876>
Mike Blumenkrantz [Tue, 14 Feb 2023 18:10:28 +0000 (13:10 -0500)]
aux/tc: add a 'has_resolve' member to tc_renderpass_info
this indicates that the first color buffer gets resolved
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21365>
Lionel Landwerlin [Thu, 23 Feb 2023 11:02:11 +0000 (13:02 +0200)]
anv: fix invalid masking of 48bit address
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes:
4d05be49c253 ("anv: implement vkCmdTraceRaysIndirect2KHR")
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21486>
José Roberto de Souza [Tue, 31 Jan 2023 18:57:35 +0000 (10:57 -0800)]
intel/blorp: Allocate only necessary amount of VERTEX_BUFFER_STATE
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21031>
José Roberto de Souza [Tue, 31 Jan 2023 20:52:33 +0000 (12:52 -0800)]
intel: Make gen12 URB space reservation dependent on compute engine presence
Tigerlake PRM: Volume 2c: Command Reference: Registers Part 2 - Registers M through Z
RCU_MODE :: Compute Engine Enable
This bit indicates if Compute Engine (a.k.a Dual Context or Multi
Context) is enabled or not. This bit must be treated as global
control for enabling and disabling of compute engine. Hardware
allocates required resources for the compute engine based on this
bit.
....
HW reserves 4KB of URB space...
Right now no gen12 platform has Dual Context enabled in kernel side,
exposing a compute engine but that can change, so here adding
has_compute_engine to intel_device_info and only reserving URB space
if compute engine is available.
While at it also fixing the error path when pb_slabs_init() fails.
Bspec: 46034
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21031>
Karmjit Mahil [Mon, 12 Dec 2022 15:45:17 +0000 (15:45 +0000)]
pvr: Add push consts support to descriptor program.
Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Luigi Santivetti <luigi.santivetti@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21387>
Eric Engestrom [Thu, 3 Nov 2022 10:13:16 +0000 (10:13 +0000)]
meson: replace vk_wsi_args with dependencies to let meson take care of transitivity
Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19497>
Eric Engestrom [Thu, 3 Nov 2022 10:13:16 +0000 (10:13 +0000)]
meson: reuse vulkan_wsi_list for defining vk_wsi_args
Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19497>
Eric Engestrom [Wed, 22 Feb 2023 16:00:35 +0000 (16:00 +0000)]
docs: mention `meson configure` and drop broken workaround script
The script is broken, and nobody noticed so it wasn't used much.
Meson has had support for printing the options by pointing to the source
dir for a while (not sure the exact version though) so I think we can
just recommend users do that.
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21469>
Eric Engestrom [Wed, 22 Feb 2023 15:59:48 +0000 (15:59 +0000)]
docs: mention the meson summary
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21469>
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